2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/types.h>
40 #include <linux/pci.h>
41 #include <linux/netdevice.h>
42 #include <linux/etherdevice.h>
43 #include <linux/ethtool.h>
44 #include <linux/slab.h>
45 #include <linux/device.h>
46 #include <linux/skbuff.h>
47 #include <linux/if_vlan.h>
48 #include <linux/if_bridge.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/bitops.h>
52 #include <linux/list.h>
53 #include <linux/notifier.h>
54 #include <linux/dcbnl.h>
55 #include <linux/inetdevice.h>
56 #include <net/switchdev.h>
57 #include <net/pkt_cls.h>
58 #include <net/tc_act/tc_mirred.h>
59 #include <net/netevent.h>
60 #include <net/tc_act/tc_sample.h>
70 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
71 static const char mlxsw_sp_driver_version[] = "1.0";
77 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
80 * Packet control type.
81 * 0 - Ethernet control (e.g. EMADs, LACP)
84 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
87 * Packet protocol type. Must be set to 1 (Ethernet).
89 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
91 /* tx_hdr_rx_is_router
92 * Packet is sent from the router. Valid for data packets only.
94 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
97 * Indicates if the 'fid' field is valid and should be used for
98 * forwarding lookup. Valid for data packets only.
100 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
103 * Switch partition ID. Must be set to 0.
105 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
107 /* tx_hdr_control_tclass
108 * Indicates if the packet should use the control TClass and not one
109 * of the data TClasses.
111 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
114 * Egress TClass to be used on the egress device on the egress port.
116 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
119 * Destination local port for unicast packets.
120 * Destination multicast ID for multicast packets.
122 * Control packets are directed to a specific egress port, while data
123 * packets are transmitted through the CPU port (0) into the switch partition,
124 * where forwarding rules are applied.
126 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
129 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
130 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
131 * Valid for data packets only.
133 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
137 * 6 - Control packets
139 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
141 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
157 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
159 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
169 static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
173 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
176 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
181 if (!mlxsw_sp->span.entries)
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
190 static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 kfree(mlxsw_sp->span.entries);
202 static struct mlxsw_sp_span_entry *
203 mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
213 /* find a free entry to use */
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
218 span_entry = &mlxsw_sp->span.entries[i];
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
231 span_entry->used = true;
232 span_entry->id = index;
233 span_entry->ref_count = 1;
234 span_entry->local_port = local_port;
238 static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
250 static struct mlxsw_sp_span_entry *
251 mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259 if (curr->used && curr->local_port == port->local_port)
265 static struct mlxsw_sp_span_entry
266 *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
268 struct mlxsw_sp_span_entry *span_entry;
270 span_entry = mlxsw_sp_span_entry_find(port);
272 /* Already exists, just take a reference */
273 span_entry->ref_count++;
277 return mlxsw_sp_span_entry_create(port);
280 static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
281 struct mlxsw_sp_span_entry *span_entry)
283 WARN_ON(!span_entry->ref_count);
284 if (--span_entry->ref_count == 0)
285 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
289 static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
291 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
292 struct mlxsw_sp_span_inspected_port *p;
295 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
296 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
298 list_for_each_entry(p, &curr->bound_ports_list, list)
299 if (p->local_port == port->local_port &&
300 p->type == MLXSW_SP_SPAN_EGRESS)
307 static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
309 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
312 static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
314 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
315 char sbib_pl[MLXSW_REG_SBIB_LEN];
318 /* If port is egress mirrored, the shared buffer size should be
319 * updated according to the mtu value
321 if (mlxsw_sp_span_is_egress_mirror(port)) {
322 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
323 mlxsw_sp_span_mtu_to_buffsize(mtu));
324 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
326 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
334 static struct mlxsw_sp_span_inspected_port *
335 mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
336 struct mlxsw_sp_span_entry *span_entry)
338 struct mlxsw_sp_span_inspected_port *p;
340 list_for_each_entry(p, &span_entry->bound_ports_list, list)
341 if (port->local_port == p->local_port)
347 mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
348 struct mlxsw_sp_span_entry *span_entry,
349 enum mlxsw_sp_span_type type)
351 struct mlxsw_sp_span_inspected_port *inspected_port;
352 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
353 char mpar_pl[MLXSW_REG_MPAR_LEN];
354 char sbib_pl[MLXSW_REG_SBIB_LEN];
355 int pa_id = span_entry->id;
358 /* if it is an egress SPAN, bind a shared buffer to it */
359 if (type == MLXSW_SP_SPAN_EGRESS) {
360 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
361 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
362 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
364 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
369 /* bind the port to the SPAN entry */
370 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
371 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
372 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
374 goto err_mpar_reg_write;
376 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
377 if (!inspected_port) {
379 goto err_inspected_port_alloc;
381 inspected_port->local_port = port->local_port;
382 inspected_port->type = type;
383 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
388 err_inspected_port_alloc:
389 if (type == MLXSW_SP_SPAN_EGRESS) {
390 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
391 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
397 mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
398 struct mlxsw_sp_span_entry *span_entry,
399 enum mlxsw_sp_span_type type)
401 struct mlxsw_sp_span_inspected_port *inspected_port;
402 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
403 char mpar_pl[MLXSW_REG_MPAR_LEN];
404 char sbib_pl[MLXSW_REG_SBIB_LEN];
405 int pa_id = span_entry->id;
407 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
411 /* remove the inspected port */
412 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
413 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
416 /* remove the SBIB buffer if it was egress SPAN */
417 if (type == MLXSW_SP_SPAN_EGRESS) {
418 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
419 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
422 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
424 list_del(&inspected_port->list);
425 kfree(inspected_port);
428 static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
429 struct mlxsw_sp_port *to,
430 enum mlxsw_sp_span_type type)
432 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
433 struct mlxsw_sp_span_entry *span_entry;
436 span_entry = mlxsw_sp_span_entry_get(to);
440 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
443 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
450 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
454 static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
455 struct mlxsw_sp_port *to,
456 enum mlxsw_sp_span_type type)
458 struct mlxsw_sp_span_entry *span_entry;
460 span_entry = mlxsw_sp_span_entry_find(to);
462 netdev_err(from->dev, "no span entry found\n");
466 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
468 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
471 static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
472 bool enable, u32 rate)
474 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
475 char mpsc_pl[MLXSW_REG_MPSC_LEN];
477 mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
478 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
481 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
484 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
485 char paos_pl[MLXSW_REG_PAOS_LEN];
487 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
488 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
489 MLXSW_PORT_ADMIN_STATUS_DOWN);
490 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
493 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
496 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
497 char ppad_pl[MLXSW_REG_PPAD_LEN];
499 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
500 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
501 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
504 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
506 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
507 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
509 ether_addr_copy(addr, mlxsw_sp->base_mac);
510 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
511 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
514 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
516 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
517 char pmtu_pl[MLXSW_REG_PMTU_LEN];
521 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
523 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
526 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
531 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
535 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
538 char pspa_pl[MLXSW_REG_PSPA_LEN];
540 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
541 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
544 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
548 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
552 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
555 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
556 char svpe_pl[MLXSW_REG_SVPE_LEN];
558 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
559 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
562 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
563 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
566 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
567 char svfa_pl[MLXSW_REG_SVFA_LEN];
569 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
571 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
574 int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
575 u16 vid_begin, u16 vid_end,
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
582 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
585 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
586 vid_end, learn_enable);
587 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
592 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
593 u16 vid, bool learn_enable)
595 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
600 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
602 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
603 char sspr_pl[MLXSW_REG_SSPR_LEN];
605 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
606 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
609 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
610 u8 local_port, u8 *p_module,
611 u8 *p_width, u8 *p_lane)
613 char pmlp_pl[MLXSW_REG_PMLP_LEN];
616 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
617 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
620 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
621 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
622 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
626 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
627 u8 module, u8 width, u8 lane)
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
632 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
633 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
634 for (i = 0; i < width; i++) {
635 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
636 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
642 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
644 char pmlp_pl[MLXSW_REG_PMLP_LEN];
646 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
647 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
648 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
651 static int mlxsw_sp_port_open(struct net_device *dev)
653 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
656 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
659 netif_start_queue(dev);
663 static int mlxsw_sp_port_stop(struct net_device *dev)
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
667 netif_stop_queue(dev);
668 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
671 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
672 struct net_device *dev)
674 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
675 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
676 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
677 const struct mlxsw_tx_info tx_info = {
678 .local_port = mlxsw_sp_port->local_port,
684 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
685 return NETDEV_TX_BUSY;
687 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
688 struct sk_buff *skb_orig = skb;
690 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
692 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
693 dev_kfree_skb_any(skb_orig);
696 dev_consume_skb_any(skb_orig);
699 if (eth_skb_pad(skb)) {
700 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
704 mlxsw_sp_txhdr_construct(skb, &tx_info);
705 /* TX header is consumed by HW on the way so we shouldn't count its
706 * bytes as being sent.
708 len = skb->len - MLXSW_TXHDR_LEN;
710 /* Due to a race we might fail here because of a full queue. In that
711 * unlikely case we simply drop the packet.
713 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
716 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
717 u64_stats_update_begin(&pcpu_stats->syncp);
718 pcpu_stats->tx_packets++;
719 pcpu_stats->tx_bytes += len;
720 u64_stats_update_end(&pcpu_stats->syncp);
722 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
723 dev_kfree_skb_any(skb);
728 static void mlxsw_sp_set_rx_mode(struct net_device *dev)
732 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
734 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
735 struct sockaddr *addr = p;
738 if (!is_valid_ether_addr(addr->sa_data))
739 return -EADDRNOTAVAIL;
741 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
744 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
748 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
749 bool pause_en, bool pfc_en, u16 delay)
751 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
753 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
754 MLXSW_SP_PAUSE_DELAY;
756 if (pause_en || pfc_en)
757 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
758 pg_size + delay, pg_size);
760 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
763 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
764 u8 *prio_tc, bool pause_en,
765 struct ieee_pfc *my_pfc)
767 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
768 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
769 u16 delay = !!my_pfc ? my_pfc->delay : 0;
770 char pbmc_pl[MLXSW_REG_PBMC_LEN];
773 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
774 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
778 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
779 bool configure = false;
782 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
783 if (prio_tc[j] == i) {
784 pfc = pfc_en & BIT(j);
792 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
795 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
798 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
799 int mtu, bool pause_en)
801 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
802 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
803 struct ieee_pfc *my_pfc;
806 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
807 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
809 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
813 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
815 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
816 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
819 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
822 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
824 goto err_span_port_mtu_update;
825 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
827 goto err_port_mtu_set;
832 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
833 err_span_port_mtu_update:
834 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
839 mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
840 struct rtnl_link_stats64 *stats)
842 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
843 struct mlxsw_sp_port_pcpu_stats *p;
844 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
849 for_each_possible_cpu(i) {
850 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
852 start = u64_stats_fetch_begin_irq(&p->syncp);
853 rx_packets = p->rx_packets;
854 rx_bytes = p->rx_bytes;
855 tx_packets = p->tx_packets;
856 tx_bytes = p->tx_bytes;
857 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
859 stats->rx_packets += rx_packets;
860 stats->rx_bytes += rx_bytes;
861 stats->tx_packets += tx_packets;
862 stats->tx_bytes += tx_bytes;
863 /* tx_dropped is u32, updated without syncp protection. */
864 tx_dropped += p->tx_dropped;
866 stats->tx_dropped = tx_dropped;
870 static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
873 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
880 static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
884 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
885 return mlxsw_sp_port_get_sw_stats64(dev, sp);
891 static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
892 int prio, char *ppcnt_pl)
894 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
895 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
897 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
898 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
901 static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
902 struct rtnl_link_stats64 *stats)
904 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
907 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
913 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
915 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
917 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
919 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
921 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
923 stats->rx_crc_errors =
924 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
925 stats->rx_frame_errors =
926 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
928 stats->rx_length_errors = (
929 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
930 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
931 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
933 stats->rx_errors = (stats->rx_crc_errors +
934 stats->rx_frame_errors + stats->rx_length_errors);
940 static void update_stats_cache(struct work_struct *work)
942 struct mlxsw_sp_port *mlxsw_sp_port =
943 container_of(work, struct mlxsw_sp_port,
944 hw_stats.update_dw.work);
946 if (!netif_carrier_ok(mlxsw_sp_port->dev))
949 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
950 mlxsw_sp_port->hw_stats.cache);
953 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
954 MLXSW_HW_STATS_UPDATE_TIME);
957 /* Return the stats from a cache that is updated periodically,
958 * as this function might get called in an atomic context.
961 mlxsw_sp_port_get_stats64(struct net_device *dev,
962 struct rtnl_link_stats64 *stats)
964 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
966 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
969 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
970 u16 vid_end, bool is_member, bool untagged)
972 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
976 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
980 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
981 vid_end, is_member, untagged);
982 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
987 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
989 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
990 u16 vid, last_visited_vid;
993 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
994 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
997 last_visited_vid = vid;
998 goto err_port_vid_to_fid_set;
1002 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
1004 last_visited_vid = VLAN_N_VID;
1005 goto err_port_vid_to_fid_set;
1010 err_port_vid_to_fid_set:
1011 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1012 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1017 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1019 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1023 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1027 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1028 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1037 static struct mlxsw_sp_port *
1038 mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
1040 struct mlxsw_sp_port *mlxsw_sp_vport;
1042 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1043 if (!mlxsw_sp_vport)
1046 /* dev will be set correctly after the VLAN device is linked
1047 * with the real device. In case of bridge SELF invocation, dev
1048 * will remain as is.
1050 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1051 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1052 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1053 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
1054 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1055 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
1056 mlxsw_sp_vport->vport.vid = vid;
1058 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1060 return mlxsw_sp_vport;
1063 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1065 list_del(&mlxsw_sp_vport->vport.list);
1066 kfree(mlxsw_sp_vport);
1069 static int mlxsw_sp_port_add_vid(struct net_device *dev,
1070 __be16 __always_unused proto, u16 vid)
1072 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1073 struct mlxsw_sp_port *mlxsw_sp_vport;
1074 bool untagged = vid == 1;
1077 /* VLAN 0 is added to HW filter when device goes up, but it is
1078 * reserved in our case, so simply return.
1083 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
1086 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
1087 if (!mlxsw_sp_vport)
1090 /* When adding the first VLAN interface on a bridged port we need to
1091 * transition all the active 802.1Q bridge VLANs to use explicit
1092 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1094 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
1095 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
1097 goto err_port_vp_mode_trans;
1100 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
1102 goto err_port_add_vid;
1107 if (list_is_singular(&mlxsw_sp_port->vports_list))
1108 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1109 err_port_vp_mode_trans:
1110 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1114 static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1115 __be16 __always_unused proto, u16 vid)
1117 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1118 struct mlxsw_sp_port *mlxsw_sp_vport;
1119 struct mlxsw_sp_fid *f;
1121 /* VLAN 0 is removed from HW filter when device goes down, but
1122 * it is reserved in our case, so simply return.
1127 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
1128 if (WARN_ON(!mlxsw_sp_vport))
1131 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
1133 /* Drop FID reference. If this was the last reference the
1134 * resources will be freed.
1136 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1137 if (f && !WARN_ON(!f->leave))
1138 f->leave(mlxsw_sp_vport);
1140 /* When removing the last VLAN interface on a bridged port we need to
1141 * transition all active 802.1Q bridge VLANs to use VID to FID
1142 * mappings and set port's mode to VLAN mode.
1144 if (list_is_singular(&mlxsw_sp_port->vports_list))
1145 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1147 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1152 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1155 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1156 u8 module = mlxsw_sp_port->mapping.module;
1157 u8 width = mlxsw_sp_port->mapping.width;
1158 u8 lane = mlxsw_sp_port->mapping.lane;
1161 if (!mlxsw_sp_port->split)
1162 err = snprintf(name, len, "p%d", module + 1);
1164 err = snprintf(name, len, "p%ds%d", module + 1,
1173 static struct mlxsw_sp_port_mall_tc_entry *
1174 mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1175 unsigned long cookie) {
1176 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1178 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1179 if (mall_tc_entry->cookie == cookie)
1180 return mall_tc_entry;
1186 mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1187 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
1188 const struct tc_action *a,
1191 struct net *net = dev_net(mlxsw_sp_port->dev);
1192 enum mlxsw_sp_span_type span_type;
1193 struct mlxsw_sp_port *to_port;
1194 struct net_device *to_dev;
1197 ifindex = tcf_mirred_ifindex(a);
1198 to_dev = __dev_get_by_index(net, ifindex);
1200 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1204 if (!mlxsw_sp_port_dev_check(to_dev)) {
1205 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1208 to_port = netdev_priv(to_dev);
1210 mirror->to_local_port = to_port->local_port;
1211 mirror->ingress = ingress;
1212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1213 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1217 mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1218 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1220 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1221 enum mlxsw_sp_span_type span_type;
1222 struct mlxsw_sp_port *to_port;
1224 to_port = mlxsw_sp->ports[mirror->to_local_port];
1225 span_type = mirror->ingress ?
1226 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1227 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1231 mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1232 struct tc_cls_matchall_offload *cls,
1233 const struct tc_action *a,
1238 if (!mlxsw_sp_port->sample)
1240 if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1241 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1244 if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1245 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1249 rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1250 tcf_sample_psample_group(a));
1251 mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1252 mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1253 mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1255 err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1257 goto err_port_sample_set;
1260 err_port_sample_set:
1261 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1266 mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1268 if (!mlxsw_sp_port->sample)
1271 mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1272 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1275 static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1277 struct tc_cls_matchall_offload *cls,
1280 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1281 const struct tc_action *a;
1285 if (!tc_single_action(cls->exts)) {
1286 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1290 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1293 mall_tc_entry->cookie = cls->cookie;
1295 tcf_exts_to_list(cls->exts, &actions);
1296 a = list_first_entry(&actions, struct tc_action, list);
1298 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1299 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1301 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1302 mirror = &mall_tc_entry->mirror;
1303 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1304 mirror, a, ingress);
1305 } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1306 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1307 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, cls,
1314 goto err_add_action;
1316 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1320 kfree(mall_tc_entry);
1324 static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1325 struct tc_cls_matchall_offload *cls)
1327 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1329 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1331 if (!mall_tc_entry) {
1332 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1335 list_del(&mall_tc_entry->list);
1337 switch (mall_tc_entry->type) {
1338 case MLXSW_SP_PORT_MALL_MIRROR:
1339 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1340 &mall_tc_entry->mirror);
1342 case MLXSW_SP_PORT_MALL_SAMPLE:
1343 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1349 kfree(mall_tc_entry);
1352 static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1353 __be16 proto, struct tc_to_netdev *tc)
1355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1356 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1359 case TC_SETUP_MATCHALL:
1360 switch (tc->cls_mall->command) {
1361 case TC_CLSMATCHALL_REPLACE:
1362 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1366 case TC_CLSMATCHALL_DESTROY:
1367 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1373 case TC_SETUP_CLSFLOWER:
1374 switch (tc->cls_flower->command) {
1375 case TC_CLSFLOWER_REPLACE:
1376 return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress,
1377 proto, tc->cls_flower);
1378 case TC_CLSFLOWER_DESTROY:
1379 mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress,
1390 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1391 .ndo_open = mlxsw_sp_port_open,
1392 .ndo_stop = mlxsw_sp_port_stop,
1393 .ndo_start_xmit = mlxsw_sp_port_xmit,
1394 .ndo_setup_tc = mlxsw_sp_setup_tc,
1395 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
1396 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1397 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1398 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1399 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1400 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
1401 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1402 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1403 .ndo_fdb_add = switchdev_port_fdb_add,
1404 .ndo_fdb_del = switchdev_port_fdb_del,
1405 .ndo_fdb_dump = switchdev_port_fdb_dump,
1406 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1407 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1408 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
1409 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
1412 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1413 struct ethtool_drvinfo *drvinfo)
1415 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1416 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1418 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1419 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1420 sizeof(drvinfo->version));
1421 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1423 mlxsw_sp->bus_info->fw_rev.major,
1424 mlxsw_sp->bus_info->fw_rev.minor,
1425 mlxsw_sp->bus_info->fw_rev.subminor);
1426 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1427 sizeof(drvinfo->bus_info));
1430 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1431 struct ethtool_pauseparam *pause)
1433 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1435 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1436 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1439 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1440 struct ethtool_pauseparam *pause)
1442 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1444 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1445 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1446 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1448 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1452 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1453 struct ethtool_pauseparam *pause)
1455 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1456 bool pause_en = pause->tx_pause || pause->rx_pause;
1459 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1460 netdev_err(dev, "PFC already enabled on port\n");
1464 if (pause->autoneg) {
1465 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1469 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1471 netdev_err(dev, "Failed to configure port's headroom\n");
1475 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1477 netdev_err(dev, "Failed to set PAUSE parameters\n");
1478 goto err_port_pause_configure;
1481 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1482 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1486 err_port_pause_configure:
1487 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1488 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1492 struct mlxsw_sp_port_hw_stats {
1493 char str[ETH_GSTRING_LEN];
1494 u64 (*getter)(const char *payload);
1497 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1499 .str = "a_frames_transmitted_ok",
1500 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1503 .str = "a_frames_received_ok",
1504 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1507 .str = "a_frame_check_sequence_errors",
1508 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1511 .str = "a_alignment_errors",
1512 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1515 .str = "a_octets_transmitted_ok",
1516 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1519 .str = "a_octets_received_ok",
1520 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1523 .str = "a_multicast_frames_xmitted_ok",
1524 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1527 .str = "a_broadcast_frames_xmitted_ok",
1528 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1531 .str = "a_multicast_frames_received_ok",
1532 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1535 .str = "a_broadcast_frames_received_ok",
1536 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1539 .str = "a_in_range_length_errors",
1540 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1543 .str = "a_out_of_range_length_field",
1544 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1547 .str = "a_frame_too_long_errors",
1548 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1551 .str = "a_symbol_error_during_carrier",
1552 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1555 .str = "a_mac_control_frames_transmitted",
1556 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1559 .str = "a_mac_control_frames_received",
1560 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1563 .str = "a_unsupported_opcodes_received",
1564 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1567 .str = "a_pause_mac_ctrl_frames_received",
1568 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1571 .str = "a_pause_mac_ctrl_frames_xmitted",
1572 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1576 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1578 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1580 .str = "rx_octets_prio",
1581 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1584 .str = "rx_frames_prio",
1585 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1588 .str = "tx_octets_prio",
1589 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1592 .str = "tx_frames_prio",
1593 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1596 .str = "rx_pause_prio",
1597 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1600 .str = "rx_pause_duration_prio",
1601 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1604 .str = "tx_pause_prio",
1605 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1608 .str = "tx_pause_duration_prio",
1609 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1613 #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1615 static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
1617 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1619 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1622 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1624 .str = "tc_transmit_queue_tc",
1625 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1628 .str = "tc_no_buffer_discard_uc_tc",
1629 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1633 #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1635 #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
1636 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1637 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
1638 IEEE_8021QAZ_MAX_TCS)
1640 static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1644 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1645 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1646 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1647 *p += ETH_GSTRING_LEN;
1651 static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1655 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1656 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1657 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1658 *p += ETH_GSTRING_LEN;
1662 static void mlxsw_sp_port_get_strings(struct net_device *dev,
1663 u32 stringset, u8 *data)
1668 switch (stringset) {
1670 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1671 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1673 p += ETH_GSTRING_LEN;
1676 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1677 mlxsw_sp_port_get_prio_strings(&p, i);
1679 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1680 mlxsw_sp_port_get_tc_strings(&p, i);
1686 static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1687 enum ethtool_phys_id_state state)
1689 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1690 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1691 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1695 case ETHTOOL_ID_ACTIVE:
1698 case ETHTOOL_ID_INACTIVE:
1705 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1706 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1710 mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1711 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1714 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1715 *p_hw_stats = mlxsw_sp_port_hw_stats;
1716 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1718 case MLXSW_REG_PPCNT_PRIO_CNT:
1719 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1720 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1722 case MLXSW_REG_PPCNT_TC_CNT:
1723 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1724 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1733 static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1734 enum mlxsw_reg_ppcnt_grp grp, int prio,
1735 u64 *data, int data_index)
1737 struct mlxsw_sp_port_hw_stats *hw_stats;
1738 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1742 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1745 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
1746 for (i = 0; i < len; i++)
1747 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
1750 static void mlxsw_sp_port_get_stats(struct net_device *dev,
1751 struct ethtool_stats *stats, u64 *data)
1753 int i, data_index = 0;
1755 /* IEEE 802.3 Counters */
1756 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1758 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1760 /* Per-Priority Counters */
1761 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1762 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1764 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1767 /* Per-TC Counters */
1768 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1769 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1771 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1775 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1779 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
1785 struct mlxsw_sp_port_link_mode {
1786 enum ethtool_link_mode_bit_indices mask_ethtool;
1791 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1793 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1794 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1798 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1799 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1800 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1801 .speed = SPEED_1000,
1804 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1805 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1806 .speed = SPEED_10000,
1809 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1810 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1811 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1812 .speed = SPEED_10000,
1815 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1816 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1817 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1818 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1819 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1820 .speed = SPEED_10000,
1823 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1824 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1825 .speed = SPEED_20000,
1828 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1829 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1830 .speed = SPEED_40000,
1833 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1834 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1835 .speed = SPEED_40000,
1838 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1839 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1840 .speed = SPEED_40000,
1843 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1844 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1845 .speed = SPEED_40000,
1848 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1849 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1850 .speed = SPEED_25000,
1853 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1854 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1855 .speed = SPEED_25000,
1858 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1859 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1860 .speed = SPEED_25000,
1863 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1864 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1865 .speed = SPEED_25000,
1868 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1869 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1870 .speed = SPEED_50000,
1873 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1874 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1875 .speed = SPEED_50000,
1878 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1879 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1880 .speed = SPEED_50000,
1883 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1884 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1885 .speed = SPEED_56000,
1888 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1889 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1890 .speed = SPEED_56000,
1893 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1894 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1895 .speed = SPEED_56000,
1898 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1899 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1900 .speed = SPEED_56000,
1903 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1904 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1905 .speed = SPEED_100000,
1908 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1909 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1910 .speed = SPEED_100000,
1913 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1914 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1915 .speed = SPEED_100000,
1918 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1919 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1920 .speed = SPEED_100000,
1924 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1927 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1928 struct ethtool_link_ksettings *cmd)
1930 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1931 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1932 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1933 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1934 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1935 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1936 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
1938 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1939 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1940 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1941 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1942 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1943 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
1946 static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
1950 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1951 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1952 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1957 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1958 struct ethtool_link_ksettings *cmd)
1960 u32 speed = SPEED_UNKNOWN;
1961 u8 duplex = DUPLEX_UNKNOWN;
1967 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1968 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1969 speed = mlxsw_sp_port_link_mode[i].speed;
1970 duplex = DUPLEX_FULL;
1975 cmd->base.speed = speed;
1976 cmd->base.duplex = duplex;
1979 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1981 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1982 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1983 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1984 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1987 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1988 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1989 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1992 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1993 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1994 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1995 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
2002 mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
2007 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2008 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2009 cmd->link_modes.advertising))
2010 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2015 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2020 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2021 if (speed == mlxsw_sp_port_link_mode[i].speed)
2022 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2027 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2032 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2033 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2034 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2039 static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2040 struct ethtool_link_ksettings *cmd)
2042 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2043 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2044 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2046 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2047 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2050 static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2051 struct ethtool_link_ksettings *cmd)
2056 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2057 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2061 mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2062 struct ethtool_link_ksettings *cmd)
2064 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2067 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2068 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2071 static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2072 struct ethtool_link_ksettings *cmd)
2074 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2075 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2076 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2077 char ptys_pl[MLXSW_REG_PTYS_LEN];
2082 autoneg = mlxsw_sp_port->link.autoneg;
2083 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2084 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2087 mlxsw_reg_ptys_eth_unpack(ptys_pl, ð_proto_cap, ð_proto_admin,
2090 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2092 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2094 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2095 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2096 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2098 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2099 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2100 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2107 mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2108 const struct ethtool_link_ksettings *cmd)
2110 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2111 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2112 char ptys_pl[MLXSW_REG_PTYS_LEN];
2113 u32 eth_proto_cap, eth_proto_new;
2117 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2118 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2121 mlxsw_reg_ptys_eth_unpack(ptys_pl, ð_proto_cap, NULL, NULL);
2123 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2124 eth_proto_new = autoneg ?
2125 mlxsw_sp_to_ptys_advert_link(cmd) :
2126 mlxsw_sp_to_ptys_speed(cmd->base.speed);
2128 eth_proto_new = eth_proto_new & eth_proto_cap;
2129 if (!eth_proto_new) {
2130 netdev_err(dev, "No supported speed requested\n");
2134 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2136 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2140 if (!netif_running(dev))
2143 mlxsw_sp_port->link.autoneg = autoneg;
2145 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2146 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
2151 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2152 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2153 .get_link = ethtool_op_get_link,
2154 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2155 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
2156 .get_strings = mlxsw_sp_port_get_strings,
2157 .set_phys_id = mlxsw_sp_port_set_phys_id,
2158 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2159 .get_sset_count = mlxsw_sp_port_get_sset_count,
2160 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2161 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
2165 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2167 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2168 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2169 char ptys_pl[MLXSW_REG_PTYS_LEN];
2170 u32 eth_proto_admin;
2172 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2173 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2175 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2178 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2179 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2180 bool dwrr, u8 dwrr_weight)
2182 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2183 char qeec_pl[MLXSW_REG_QEEC_LEN];
2185 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2187 mlxsw_reg_qeec_de_set(qeec_pl, true);
2188 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2189 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2190 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2193 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2194 enum mlxsw_reg_qeec_hr hr, u8 index,
2195 u8 next_index, u32 maxrate)
2197 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2198 char qeec_pl[MLXSW_REG_QEEC_LEN];
2200 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2202 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2203 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2204 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2207 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2208 u8 switch_prio, u8 tclass)
2210 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2211 char qtct_pl[MLXSW_REG_QTCT_LEN];
2213 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2215 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2218 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2222 /* Setup the elements hierarcy, so that each TC is linked to
2223 * one subgroup, which are all member in the same group.
2225 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2226 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2230 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2231 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2232 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2237 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2238 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2239 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2245 /* Make sure the max shaper is disabled in all hierarcies that
2248 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2249 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2250 MLXSW_REG_QEEC_MAS_DIS);
2253 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2254 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2255 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2257 MLXSW_REG_QEEC_MAS_DIS);
2261 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2262 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2263 MLXSW_REG_QEEC_HIERARCY_TC,
2265 MLXSW_REG_QEEC_MAS_DIS);
2270 /* Map all priorities to traffic class 0. */
2271 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2272 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2280 static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2282 mlxsw_sp_port->pvid = 1;
2284 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2287 static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2289 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2292 static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2293 bool split, u8 module, u8 width, u8 lane)
2295 struct mlxsw_sp_port *mlxsw_sp_port;
2296 struct net_device *dev;
2300 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2303 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
2304 mlxsw_sp_port = netdev_priv(dev);
2305 mlxsw_sp_port->dev = dev;
2306 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2307 mlxsw_sp_port->local_port = local_port;
2308 mlxsw_sp_port->split = split;
2309 mlxsw_sp_port->mapping.module = module;
2310 mlxsw_sp_port->mapping.width = width;
2311 mlxsw_sp_port->mapping.lane = lane;
2312 mlxsw_sp_port->link.autoneg = 1;
2313 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2314 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2315 if (!mlxsw_sp_port->active_vlans) {
2317 goto err_port_active_vlans_alloc;
2319 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2320 if (!mlxsw_sp_port->untagged_vlans) {
2322 goto err_port_untagged_vlans_alloc;
2324 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
2325 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
2327 mlxsw_sp_port->pcpu_stats =
2328 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2329 if (!mlxsw_sp_port->pcpu_stats) {
2331 goto err_alloc_stats;
2334 mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2336 if (!mlxsw_sp_port->sample) {
2338 goto err_alloc_sample;
2341 mlxsw_sp_port->hw_stats.cache =
2342 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2344 if (!mlxsw_sp_port->hw_stats.cache) {
2346 goto err_alloc_hw_stats;
2348 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2349 &update_stats_cache);
2351 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2352 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2354 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2356 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2357 mlxsw_sp_port->local_port);
2358 goto err_port_swid_set;
2361 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2363 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2364 mlxsw_sp_port->local_port);
2365 goto err_dev_addr_init;
2368 netif_carrier_off(dev);
2370 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
2371 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2372 dev->hw_features |= NETIF_F_HW_TC;
2375 dev->max_mtu = ETH_MAX_MTU;
2377 /* Each packet needs to have a Tx header (metadata) on top all other
2380 dev->needed_headroom = MLXSW_TXHDR_LEN;
2382 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2384 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2385 mlxsw_sp_port->local_port);
2386 goto err_port_system_port_mapping_set;
2389 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2391 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2392 mlxsw_sp_port->local_port);
2393 goto err_port_speed_by_width_set;
2396 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2398 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2399 mlxsw_sp_port->local_port);
2400 goto err_port_mtu_set;
2403 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2405 goto err_port_admin_status_set;
2407 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2409 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2410 mlxsw_sp_port->local_port);
2411 goto err_port_buffers_init;
2414 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2416 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2417 mlxsw_sp_port->local_port);
2418 goto err_port_ets_init;
2421 /* ETS and buffers must be initialized before DCB. */
2422 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2424 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2425 mlxsw_sp_port->local_port);
2426 goto err_port_dcb_init;
2429 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2431 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2432 mlxsw_sp_port->local_port);
2433 goto err_port_pvid_vport_create;
2436 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2437 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
2438 err = register_netdev(dev);
2440 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2441 mlxsw_sp_port->local_port);
2442 goto err_register_netdev;
2445 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2446 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2448 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
2451 err_register_netdev:
2452 mlxsw_sp->ports[local_port] = NULL;
2453 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2454 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2455 err_port_pvid_vport_create:
2456 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2459 err_port_buffers_init:
2460 err_port_admin_status_set:
2462 err_port_speed_by_width_set:
2463 err_port_system_port_mapping_set:
2465 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2467 kfree(mlxsw_sp_port->hw_stats.cache);
2469 kfree(mlxsw_sp_port->sample);
2471 free_percpu(mlxsw_sp_port->pcpu_stats);
2473 kfree(mlxsw_sp_port->untagged_vlans);
2474 err_port_untagged_vlans_alloc:
2475 kfree(mlxsw_sp_port->active_vlans);
2476 err_port_active_vlans_alloc:
2481 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2482 bool split, u8 module, u8 width, u8 lane)
2486 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2488 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2492 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
2493 module, width, lane);
2495 goto err_port_create;
2499 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2503 static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2505 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2507 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
2508 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
2509 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
2510 mlxsw_sp->ports[local_port] = NULL;
2511 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2512 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2513 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2514 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2515 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
2516 kfree(mlxsw_sp_port->hw_stats.cache);
2517 kfree(mlxsw_sp_port->sample);
2518 free_percpu(mlxsw_sp_port->pcpu_stats);
2519 kfree(mlxsw_sp_port->untagged_vlans);
2520 kfree(mlxsw_sp_port->active_vlans);
2521 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
2522 free_netdev(mlxsw_sp_port->dev);
2525 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2527 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2528 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2531 static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2533 return mlxsw_sp->ports[local_port] != NULL;
2536 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2540 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2541 if (mlxsw_sp_port_created(mlxsw_sp, i))
2542 mlxsw_sp_port_remove(mlxsw_sp, i);
2543 kfree(mlxsw_sp->ports);
2546 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2548 u8 module, width, lane;
2553 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2554 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2555 if (!mlxsw_sp->ports)
2558 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
2559 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
2562 goto err_port_module_info_get;
2565 mlxsw_sp->port_to_module[i] = module;
2566 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2567 module, width, lane);
2569 goto err_port_create;
2574 err_port_module_info_get:
2575 for (i--; i >= 1; i--)
2576 if (mlxsw_sp_port_created(mlxsw_sp, i))
2577 mlxsw_sp_port_remove(mlxsw_sp, i);
2578 kfree(mlxsw_sp->ports);
2582 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2584 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2586 return local_port - offset;
2589 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2590 u8 module, unsigned int count)
2592 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2595 for (i = 0; i < count; i++) {
2596 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2599 goto err_port_module_map;
2602 for (i = 0; i < count; i++) {
2603 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2605 goto err_port_swid_set;
2608 for (i = 0; i < count; i++) {
2609 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
2610 module, width, i * width);
2612 goto err_port_create;
2618 for (i--; i >= 0; i--)
2619 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2620 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2623 for (i--; i >= 0; i--)
2624 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2625 MLXSW_PORT_SWID_DISABLED_PORT);
2627 err_port_module_map:
2628 for (i--; i >= 0; i--)
2629 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2633 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2634 u8 base_port, unsigned int count)
2636 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2639 /* Split by four means we need to re-create two ports, otherwise
2644 for (i = 0; i < count; i++) {
2645 local_port = base_port + i * 2;
2646 module = mlxsw_sp->port_to_module[local_port];
2648 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2652 for (i = 0; i < count; i++)
2653 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2655 for (i = 0; i < count; i++) {
2656 local_port = base_port + i * 2;
2657 module = mlxsw_sp->port_to_module[local_port];
2659 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
2664 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2667 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2668 struct mlxsw_sp_port *mlxsw_sp_port;
2669 u8 module, cur_width, base_port;
2673 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2674 if (!mlxsw_sp_port) {
2675 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2680 module = mlxsw_sp_port->mapping.module;
2681 cur_width = mlxsw_sp_port->mapping.width;
2683 if (count != 2 && count != 4) {
2684 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2688 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2689 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2693 /* Make sure we have enough slave (even) ports for the split. */
2695 base_port = local_port;
2696 if (mlxsw_sp->ports[base_port + 1]) {
2697 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2701 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2702 if (mlxsw_sp->ports[base_port + 1] ||
2703 mlxsw_sp->ports[base_port + 3]) {
2704 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2709 for (i = 0; i < count; i++)
2710 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2711 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2713 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2715 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2716 goto err_port_split_create;
2721 err_port_split_create:
2722 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2726 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
2728 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2729 struct mlxsw_sp_port *mlxsw_sp_port;
2730 u8 cur_width, base_port;
2734 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2735 if (!mlxsw_sp_port) {
2736 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2741 if (!mlxsw_sp_port->split) {
2742 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2746 cur_width = mlxsw_sp_port->mapping.width;
2747 count = cur_width == 1 ? 4 : 2;
2749 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2751 /* Determine which ports to remove. */
2752 if (count == 2 && local_port >= base_port + 2)
2753 base_port = base_port + 2;
2755 for (i = 0; i < count; i++)
2756 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2757 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2759 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2764 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2765 char *pude_pl, void *priv)
2767 struct mlxsw_sp *mlxsw_sp = priv;
2768 struct mlxsw_sp_port *mlxsw_sp_port;
2769 enum mlxsw_reg_pude_oper_status status;
2772 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2773 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2777 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2778 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2779 netdev_info(mlxsw_sp_port->dev, "link up\n");
2780 netif_carrier_on(mlxsw_sp_port->dev);
2782 netdev_info(mlxsw_sp_port->dev, "link down\n");
2783 netif_carrier_off(mlxsw_sp_port->dev);
2787 static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2788 u8 local_port, void *priv)
2790 struct mlxsw_sp *mlxsw_sp = priv;
2791 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2792 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2794 if (unlikely(!mlxsw_sp_port)) {
2795 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2800 skb->dev = mlxsw_sp_port->dev;
2802 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2803 u64_stats_update_begin(&pcpu_stats->syncp);
2804 pcpu_stats->rx_packets++;
2805 pcpu_stats->rx_bytes += skb->len;
2806 u64_stats_update_end(&pcpu_stats->syncp);
2808 skb->protocol = eth_type_trans(skb, skb->dev);
2809 netif_receive_skb(skb);
2812 static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2815 skb->offload_fwd_mark = 1;
2816 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
2819 static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
2822 struct mlxsw_sp *mlxsw_sp = priv;
2823 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2824 struct psample_group *psample_group;
2827 if (unlikely(!mlxsw_sp_port)) {
2828 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
2832 if (unlikely(!mlxsw_sp_port->sample)) {
2833 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
2838 size = mlxsw_sp_port->sample->truncate ?
2839 mlxsw_sp_port->sample->trunc_size : skb->len;
2842 psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
2845 psample_sample_packet(psample_group, skb, size,
2846 mlxsw_sp_port->dev->ifindex, 0,
2847 mlxsw_sp_port->sample->rate);
2854 #define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
2855 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
2856 _is_ctrl, SP_##_trap_group, DISCARD)
2858 #define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
2859 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
2860 _is_ctrl, SP_##_trap_group, DISCARD)
2862 #define MLXSW_SP_EVENTL(_func, _trap_id) \
2863 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
2865 static const struct mlxsw_listener mlxsw_sp_listener[] = {
2867 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
2869 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2870 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2871 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2872 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2873 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2874 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2875 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2876 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2877 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2878 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2879 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
2881 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2882 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2883 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2884 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2885 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2886 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2887 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2888 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
2889 /* PKT Sample trap */
2890 MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
2891 false, SP_IP2ME, DISCARD)
2894 static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2896 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2897 enum mlxsw_reg_qpcr_ir_units ir_units;
2898 int max_cpu_policers;
2904 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2907 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2909 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2910 for (i = 0; i < max_cpu_policers; i++) {
2913 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2914 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2915 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2916 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2920 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2924 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2925 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2926 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2927 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2928 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2929 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2933 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2942 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2944 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2952 static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
2954 char htgt_pl[MLXSW_REG_HTGT_LEN];
2955 enum mlxsw_reg_htgt_trap_group i;
2956 int max_cpu_policers;
2957 int max_trap_groups;
2962 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2965 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
2966 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2968 for (i = 0; i < max_trap_groups; i++) {
2971 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2972 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2973 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2974 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2978 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2979 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2983 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2984 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2988 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2992 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2993 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2994 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2998 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
2999 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
3000 tc = MLXSW_REG_HTGT_DEFAULT_TC;
3001 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
3007 if (max_cpu_policers <= policer_id &&
3008 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
3011 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
3012 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3020 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3025 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3029 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
3033 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
3034 err = mlxsw_core_trap_register(mlxsw_sp->core,
3035 &mlxsw_sp_listener[i],
3038 goto err_listener_register;
3043 err_listener_register:
3044 for (i--; i >= 0; i--) {
3045 mlxsw_core_trap_unregister(mlxsw_sp->core,
3046 &mlxsw_sp_listener[i],
3052 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3056 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
3057 mlxsw_core_trap_unregister(mlxsw_sp->core,
3058 &mlxsw_sp_listener[i],
3063 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
3064 enum mlxsw_reg_sfgc_type type,
3065 enum mlxsw_reg_sfgc_bridge_type bridge_type)
3067 enum mlxsw_flood_table_type table_type;
3068 enum mlxsw_sp_flood_table flood_table;
3069 char sfgc_pl[MLXSW_REG_SFGC_LEN];
3071 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
3072 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
3074 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3077 case MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST:
3078 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
3080 case MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV4:
3081 flood_table = MLXSW_SP_FLOOD_TABLE_MC;
3084 flood_table = MLXSW_SP_FLOOD_TABLE_BC;
3087 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
3089 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
3092 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
3096 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
3097 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
3100 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3101 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
3105 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3106 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
3114 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3116 char slcr_pl[MLXSW_REG_SLCR_LEN];
3119 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3120 MLXSW_REG_SLCR_LAG_HASH_DMAC |
3121 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3122 MLXSW_REG_SLCR_LAG_HASH_VLANID |
3123 MLXSW_REG_SLCR_LAG_HASH_SIP |
3124 MLXSW_REG_SLCR_LAG_HASH_DIP |
3125 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3126 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3127 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
3128 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3132 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3133 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
3136 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
3137 sizeof(struct mlxsw_sp_upper),
3139 if (!mlxsw_sp->lags)
3145 static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3147 kfree(mlxsw_sp->lags);
3150 static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3152 char htgt_pl[MLXSW_REG_HTGT_LEN];
3154 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3155 MLXSW_REG_HTGT_INVALID_POLICER,
3156 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3157 MLXSW_REG_HTGT_DEFAULT_TC);
3158 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3161 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
3162 const struct mlxsw_bus_info *mlxsw_bus_info)
3164 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3167 mlxsw_sp->core = mlxsw_core;
3168 mlxsw_sp->bus_info = mlxsw_bus_info;
3169 INIT_LIST_HEAD(&mlxsw_sp->fids);
3170 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
3171 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
3173 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3175 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3179 err = mlxsw_sp_traps_init(mlxsw_sp);
3181 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3185 err = mlxsw_sp_flood_init(mlxsw_sp);
3187 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3188 goto err_flood_init;
3191 err = mlxsw_sp_buffers_init(mlxsw_sp);
3193 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3194 goto err_buffers_init;
3197 err = mlxsw_sp_lag_init(mlxsw_sp);
3199 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3203 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3205 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3206 goto err_switchdev_init;
3209 err = mlxsw_sp_router_init(mlxsw_sp);
3211 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3212 goto err_router_init;
3215 err = mlxsw_sp_span_init(mlxsw_sp);
3217 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3221 err = mlxsw_sp_acl_init(mlxsw_sp);
3223 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3227 err = mlxsw_sp_ports_create(mlxsw_sp);
3229 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3230 goto err_ports_create;
3236 mlxsw_sp_acl_fini(mlxsw_sp);
3238 mlxsw_sp_span_fini(mlxsw_sp);
3240 mlxsw_sp_router_fini(mlxsw_sp);
3242 mlxsw_sp_switchdev_fini(mlxsw_sp);
3244 mlxsw_sp_lag_fini(mlxsw_sp);
3246 mlxsw_sp_buffers_fini(mlxsw_sp);
3249 mlxsw_sp_traps_fini(mlxsw_sp);
3253 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
3255 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3257 mlxsw_sp_ports_remove(mlxsw_sp);
3258 mlxsw_sp_acl_fini(mlxsw_sp);
3259 mlxsw_sp_span_fini(mlxsw_sp);
3260 mlxsw_sp_router_fini(mlxsw_sp);
3261 mlxsw_sp_switchdev_fini(mlxsw_sp);
3262 mlxsw_sp_lag_fini(mlxsw_sp);
3263 mlxsw_sp_buffers_fini(mlxsw_sp);
3264 mlxsw_sp_traps_fini(mlxsw_sp);
3265 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
3266 WARN_ON(!list_empty(&mlxsw_sp->fids));
3269 static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3270 .used_max_vepa_channels = 1,
3271 .max_vepa_channels = 0,
3273 .max_mid = MLXSW_SP_MID_MAX,
3276 .used_flood_tables = 1,
3277 .used_flood_mode = 1,
3279 .max_fid_offset_flood_tables = 3,
3280 .fid_offset_flood_table_size = VLAN_N_VID - 1,
3281 .max_fid_flood_tables = 3,
3282 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
3283 .used_max_ib_mc = 1,
3287 .used_kvd_split_data = 1,
3288 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3289 .kvd_hash_single_parts = 2,
3290 .kvd_hash_double_parts = 1,
3291 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
3295 .type = MLXSW_PORT_SWID_TYPE_ETH,
3298 .resource_query_enable = 1,
3301 static struct mlxsw_driver mlxsw_sp_driver = {
3302 .kind = mlxsw_sp_driver_name,
3303 .priv_size = sizeof(struct mlxsw_sp),
3304 .init = mlxsw_sp_init,
3305 .fini = mlxsw_sp_fini,
3306 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
3307 .port_split = mlxsw_sp_port_split,
3308 .port_unsplit = mlxsw_sp_port_unsplit,
3309 .sb_pool_get = mlxsw_sp_sb_pool_get,
3310 .sb_pool_set = mlxsw_sp_sb_pool_set,
3311 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3312 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3313 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3314 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3315 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3316 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3317 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3318 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3319 .txhdr_construct = mlxsw_sp_txhdr_construct,
3320 .txhdr_len = MLXSW_TXHDR_LEN,
3321 .profile = &mlxsw_sp_config_profile,
3324 bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3326 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3329 static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev, void *data)
3331 struct mlxsw_sp_port **p_mlxsw_sp_port = data;
3334 if (mlxsw_sp_port_dev_check(lower_dev)) {
3335 *p_mlxsw_sp_port = netdev_priv(lower_dev);
3342 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3344 struct mlxsw_sp_port *mlxsw_sp_port;
3346 if (mlxsw_sp_port_dev_check(dev))
3347 return netdev_priv(dev);
3349 mlxsw_sp_port = NULL;
3350 netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port);
3352 return mlxsw_sp_port;
3355 static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3357 struct mlxsw_sp_port *mlxsw_sp_port;
3359 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3360 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3363 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3365 struct mlxsw_sp_port *mlxsw_sp_port;
3367 if (mlxsw_sp_port_dev_check(dev))
3368 return netdev_priv(dev);
3370 mlxsw_sp_port = NULL;
3371 netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
3374 return mlxsw_sp_port;
3377 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3379 struct mlxsw_sp_port *mlxsw_sp_port;
3382 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3384 dev_hold(mlxsw_sp_port->dev);
3386 return mlxsw_sp_port;
3389 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3391 dev_put(mlxsw_sp_port->dev);
3394 static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3395 unsigned long event)
3404 if (r && --r->ref_count == 0)
3406 /* It is possible we already removed the RIF ourselves
3407 * if it was assigned to a netdev that is now a bridge
3416 static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3420 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
3421 if (!mlxsw_sp->rifs[i])
3424 return MLXSW_SP_INVALID_RIF;
3427 static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3428 bool *p_lagged, u16 *p_system_port)
3430 u8 local_port = mlxsw_sp_vport->local_port;
3432 *p_lagged = mlxsw_sp_vport->lagged;
3433 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3436 static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3437 struct net_device *l3_dev, u16 rif,
3440 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3441 bool lagged = mlxsw_sp_vport->lagged;
3442 char ritr_pl[MLXSW_REG_RITR_LEN];
3445 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3446 l3_dev->mtu, l3_dev->dev_addr);
3448 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3449 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3450 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3452 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3455 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3457 static struct mlxsw_sp_fid *
3458 mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3460 struct mlxsw_sp_fid *f;
3462 f = kzalloc(sizeof(*f), GFP_KERNEL);
3466 f->leave = mlxsw_sp_vport_rif_sp_leave;
3474 static struct mlxsw_sp_rif *
3475 mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3477 struct mlxsw_sp_rif *r;
3479 r = kzalloc(sizeof(*r), GFP_KERNEL);
3483 INIT_LIST_HEAD(&r->nexthop_list);
3484 INIT_LIST_HEAD(&r->neigh_list);
3485 ether_addr_copy(r->addr, l3_dev->dev_addr);
3486 r->mtu = l3_dev->mtu;
3495 static struct mlxsw_sp_rif *
3496 mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3497 struct net_device *l3_dev)
3499 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3500 struct mlxsw_sp_fid *f;
3501 struct mlxsw_sp_rif *r;
3505 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3506 if (rif == MLXSW_SP_INVALID_RIF)
3507 return ERR_PTR(-ERANGE);
3509 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3511 return ERR_PTR(err);
3513 fid = mlxsw_sp_rif_sp_to_fid(rif);
3514 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3516 goto err_rif_fdb_op;
3518 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3521 goto err_rfid_alloc;
3524 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3531 mlxsw_sp->rifs[rif] = r;
3538 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3540 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3541 return ERR_PTR(err);
3544 static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3545 struct mlxsw_sp_rif *r)
3547 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3548 struct net_device *l3_dev = r->dev;
3549 struct mlxsw_sp_fid *f = r->f;
3553 mlxsw_sp_router_rif_gone_sync(mlxsw_sp, r);
3555 mlxsw_sp->rifs[rif] = NULL;
3562 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3564 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3567 static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3568 struct net_device *l3_dev)
3570 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3571 struct mlxsw_sp_rif *r;
3573 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3575 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3580 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3583 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3588 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3590 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3592 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3594 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3595 if (--f->ref_count == 0)
3596 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3599 static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3600 struct net_device *port_dev,
3601 unsigned long event, u16 vid)
3603 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3604 struct mlxsw_sp_port *mlxsw_sp_vport;
3606 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3607 if (WARN_ON(!mlxsw_sp_vport))
3612 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3614 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3621 static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3622 unsigned long event)
3624 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3627 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3630 static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3631 struct net_device *lag_dev,
3632 unsigned long event, u16 vid)
3634 struct net_device *port_dev;
3635 struct list_head *iter;
3638 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3639 if (mlxsw_sp_port_dev_check(port_dev)) {
3640 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3650 static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3651 unsigned long event)
3653 if (netif_is_bridge_port(lag_dev))
3656 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3659 static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3660 struct net_device *l3_dev)
3664 if (is_vlan_dev(l3_dev))
3665 fid = vlan_dev_vlan_id(l3_dev);
3666 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3669 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3671 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3674 static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3676 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3677 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3680 static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3682 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3685 static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3688 enum mlxsw_flood_table_type table_type;
3693 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3697 table_type = mlxsw_sp_flood_table_type_get(fid);
3698 index = mlxsw_sp_flood_table_index_get(fid);
3699 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BC, index, table_type,
3700 1, MLXSW_PORT_ROUTER_PORT, set);
3701 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3707 static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3709 if (mlxsw_sp_fid_is_vfid(fid))
3710 return MLXSW_REG_RITR_FID_IF;
3712 return MLXSW_REG_RITR_VLAN_IF;
3715 static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3716 struct net_device *l3_dev,
3720 enum mlxsw_reg_ritr_if_type rif_type;
3721 char ritr_pl[MLXSW_REG_RITR_LEN];
3723 rif_type = mlxsw_sp_rif_type_get(fid);
3724 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3726 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3728 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3731 static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3732 struct net_device *l3_dev,
3733 struct mlxsw_sp_fid *f)
3735 struct mlxsw_sp_rif *r;
3739 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3740 if (rif == MLXSW_SP_INVALID_RIF)
3743 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
3747 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3749 goto err_rif_bridge_op;
3751 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3753 goto err_rif_fdb_op;
3755 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3762 mlxsw_sp->rifs[rif] = r;
3764 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3769 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3771 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3773 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3777 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3778 struct mlxsw_sp_rif *r)
3780 struct net_device *l3_dev = r->dev;
3781 struct mlxsw_sp_fid *f = r->f;
3784 mlxsw_sp_router_rif_gone_sync(mlxsw_sp, r);
3786 mlxsw_sp->rifs[rif] = NULL;
3791 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3793 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3795 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3797 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3800 static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3801 struct net_device *br_dev,
3802 unsigned long event)
3804 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3805 struct mlxsw_sp_fid *f;
3807 /* FID can either be an actual FID if the L3 device is the
3808 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3809 * L3 device is a VLAN-unaware bridge and we get a vFID.
3811 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3817 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3819 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3826 static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3827 unsigned long event)
3829 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3830 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
3831 u16 vid = vlan_dev_vlan_id(vlan_dev);
3833 if (mlxsw_sp_port_dev_check(real_dev))
3834 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3836 else if (netif_is_lag_master(real_dev))
3837 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3839 else if (netif_is_bridge_master(real_dev) &&
3840 mlxsw_sp->master_bridge.dev == real_dev)
3841 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3847 static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3848 unsigned long event, void *ptr)
3850 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3851 struct net_device *dev = ifa->ifa_dev->dev;
3852 struct mlxsw_sp *mlxsw_sp;
3853 struct mlxsw_sp_rif *r;
3856 mlxsw_sp = mlxsw_sp_lower_get(dev);
3860 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3861 if (!mlxsw_sp_rif_should_config(r, event))
3864 if (mlxsw_sp_port_dev_check(dev))
3865 err = mlxsw_sp_inetaddr_port_event(dev, event);
3866 else if (netif_is_lag_master(dev))
3867 err = mlxsw_sp_inetaddr_lag_event(dev, event);
3868 else if (netif_is_bridge_master(dev))
3869 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
3870 else if (is_vlan_dev(dev))
3871 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3874 return notifier_from_errno(err);
3877 static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3878 const char *mac, int mtu)
3880 char ritr_pl[MLXSW_REG_RITR_LEN];
3883 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3884 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3888 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3889 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3890 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3891 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3894 static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3896 struct mlxsw_sp *mlxsw_sp;
3897 struct mlxsw_sp_rif *r;
3900 mlxsw_sp = mlxsw_sp_lower_get(dev);
3904 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3908 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3912 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3916 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3918 goto err_rif_fdb_op;
3920 ether_addr_copy(r->addr, dev->dev_addr);
3923 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3928 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3930 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3934 static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3937 if (mlxsw_sp_fid_is_vfid(fid))
3938 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3940 return test_bit(fid, lag_port->active_vlans);
3943 static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3946 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3947 u8 local_port = mlxsw_sp_port->local_port;
3948 u16 lag_id = mlxsw_sp_port->lag_id;
3949 u64 max_lag_members;
3952 if (!mlxsw_sp_port->lagged)
3955 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3957 for (i = 0; i < max_lag_members; i++) {
3958 struct mlxsw_sp_port *lag_port;
3960 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3961 if (!lag_port || lag_port->local_port == local_port)
3963 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3971 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3974 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3975 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3977 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3978 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3979 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3980 mlxsw_sp_port->local_port);
3982 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3983 mlxsw_sp_port->local_port, fid);
3985 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3989 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3992 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3993 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3995 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3996 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3997 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3999 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
4000 mlxsw_sp_port->lag_id, fid);
4002 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
4005 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
4007 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
4010 if (mlxsw_sp_port->lagged)
4011 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
4014 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
4017 static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
4019 struct mlxsw_sp_fid *f, *tmp;
4021 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
4022 if (--f->ref_count == 0)
4023 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4028 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
4029 struct net_device *br_dev)
4031 return !mlxsw_sp->master_bridge.dev ||
4032 mlxsw_sp->master_bridge.dev == br_dev;
4035 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
4036 struct net_device *br_dev)
4038 mlxsw_sp->master_bridge.dev = br_dev;
4039 mlxsw_sp->master_bridge.ref_count++;
4042 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
4044 if (--mlxsw_sp->master_bridge.ref_count == 0) {
4045 mlxsw_sp->master_bridge.dev = NULL;
4046 /* It's possible upper VLAN devices are still holding
4047 * references to underlying FIDs. Drop the reference
4048 * and release the resources if it was the last one.
4049 * If it wasn't, then something bad happened.
4051 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
4055 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
4056 struct net_device *br_dev)
4058 struct net_device *dev = mlxsw_sp_port->dev;
4061 /* When port is not bridged untagged packets are tagged with
4062 * PVID=VID=1, thereby creating an implicit VLAN interface in
4063 * the device. Remove it and let bridge code take care of its
4066 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
4070 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
4072 mlxsw_sp_port->learning = 1;
4073 mlxsw_sp_port->learning_sync = 1;
4074 mlxsw_sp_port->uc_flood = 1;
4075 mlxsw_sp_port->mc_flood = 1;
4076 mlxsw_sp_port->mc_router = 0;
4077 mlxsw_sp_port->mc_disabled = 1;
4078 mlxsw_sp_port->bridged = 1;
4083 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4085 struct net_device *dev = mlxsw_sp_port->dev;
4087 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
4089 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
4091 mlxsw_sp_port->learning = 0;
4092 mlxsw_sp_port->learning_sync = 0;
4093 mlxsw_sp_port->uc_flood = 0;
4094 mlxsw_sp_port->mc_flood = 0;
4095 mlxsw_sp_port->mc_router = 0;
4096 mlxsw_sp_port->bridged = 0;
4098 /* Add implicit VLAN interface in the device, so that untagged
4099 * packets will be classified to the default vFID.
4101 mlxsw_sp_port_add_vid(dev, 0, 1);
4104 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
4106 char sldr_pl[MLXSW_REG_SLDR_LEN];
4108 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
4109 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4112 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
4114 char sldr_pl[MLXSW_REG_SLDR_LEN];
4116 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
4117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4120 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4121 u16 lag_id, u8 port_index)
4123 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4124 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4126 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
4127 lag_id, port_index);
4128 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4131 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4134 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4135 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4137 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
4139 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4142 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
4145 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4146 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4148 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
4150 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4153 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4156 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4157 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4159 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4161 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4164 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4165 struct net_device *lag_dev,
4168 struct mlxsw_sp_upper *lag;
4169 int free_lag_id = -1;
4173 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4174 for (i = 0; i < max_lag; i++) {
4175 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4176 if (lag->ref_count) {
4177 if (lag->dev == lag_dev) {
4181 } else if (free_lag_id < 0) {
4185 if (free_lag_id < 0)
4187 *p_lag_id = free_lag_id;
4192 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4193 struct net_device *lag_dev,
4194 struct netdev_lag_upper_info *lag_upper_info)
4198 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4200 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4205 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4206 u16 lag_id, u8 *p_port_index)
4208 u64 max_lag_members;
4211 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4213 for (i = 0; i < max_lag_members; i++) {
4214 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4223 mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4226 struct mlxsw_sp_port *mlxsw_sp_vport;
4227 struct mlxsw_sp_fid *f;
4229 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4230 if (WARN_ON(!mlxsw_sp_vport))
4233 /* If vPort is assigned a RIF, then leave it since it's no
4236 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4238 f->leave(mlxsw_sp_vport);
4240 mlxsw_sp_vport->lag_id = lag_id;
4241 mlxsw_sp_vport->lagged = 1;
4245 mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4247 struct mlxsw_sp_port *mlxsw_sp_vport;
4248 struct mlxsw_sp_fid *f;
4250 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4251 if (WARN_ON(!mlxsw_sp_vport))
4254 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4256 f->leave(mlxsw_sp_vport);
4258 mlxsw_sp_vport->lagged = 0;
4261 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4262 struct net_device *lag_dev)
4264 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4265 struct mlxsw_sp_upper *lag;
4270 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4273 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4274 if (!lag->ref_count) {
4275 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4281 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4284 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4286 goto err_col_port_add;
4287 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4289 goto err_col_port_enable;
4291 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4292 mlxsw_sp_port->local_port);
4293 mlxsw_sp_port->lag_id = lag_id;
4294 mlxsw_sp_port->lagged = 1;
4297 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4301 err_col_port_enable:
4302 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
4304 if (!lag->ref_count)
4305 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
4309 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4310 struct net_device *lag_dev)
4312 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4313 u16 lag_id = mlxsw_sp_port->lag_id;
4314 struct mlxsw_sp_upper *lag;
4316 if (!mlxsw_sp_port->lagged)
4318 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4319 WARN_ON(lag->ref_count == 0);
4321 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4322 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
4324 if (mlxsw_sp_port->bridged) {
4325 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
4326 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4329 if (lag->ref_count == 1)
4330 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
4332 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4333 mlxsw_sp_port->local_port);
4334 mlxsw_sp_port->lagged = 0;
4337 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
4340 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4343 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4344 char sldr_pl[MLXSW_REG_SLDR_LEN];
4346 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4347 mlxsw_sp_port->local_port);
4348 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4351 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4354 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4355 char sldr_pl[MLXSW_REG_SLDR_LEN];
4357 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4358 mlxsw_sp_port->local_port);
4359 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4362 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4363 bool lag_tx_enabled)
4366 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4367 mlxsw_sp_port->lag_id);
4369 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4370 mlxsw_sp_port->lag_id);
4373 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4374 struct netdev_lag_lower_state_info *info)
4376 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4379 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4380 struct net_device *vlan_dev)
4382 struct mlxsw_sp_port *mlxsw_sp_vport;
4383 u16 vid = vlan_dev_vlan_id(vlan_dev);
4385 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4386 if (WARN_ON(!mlxsw_sp_vport))
4389 mlxsw_sp_vport->dev = vlan_dev;
4394 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4395 struct net_device *vlan_dev)
4397 struct mlxsw_sp_port *mlxsw_sp_vport;
4398 u16 vid = vlan_dev_vlan_id(vlan_dev);
4400 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4401 if (WARN_ON(!mlxsw_sp_vport))
4404 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
4407 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4408 unsigned long event, void *ptr)
4410 struct netdev_notifier_changeupper_info *info;
4411 struct mlxsw_sp_port *mlxsw_sp_port;
4412 struct net_device *upper_dev;
4413 struct mlxsw_sp *mlxsw_sp;
4416 mlxsw_sp_port = netdev_priv(dev);
4417 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4421 case NETDEV_PRECHANGEUPPER:
4422 upper_dev = info->upper_dev;
4423 if (!is_vlan_dev(upper_dev) &&
4424 !netif_is_lag_master(upper_dev) &&
4425 !netif_is_bridge_master(upper_dev))
4429 /* HW limitation forbids to put ports to multiple bridges. */
4430 if (netif_is_bridge_master(upper_dev) &&
4431 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
4433 if (netif_is_lag_master(upper_dev) &&
4434 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4437 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4439 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4440 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4443 case NETDEV_CHANGEUPPER:
4444 upper_dev = info->upper_dev;
4445 if (is_vlan_dev(upper_dev)) {
4447 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4450 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4452 } else if (netif_is_bridge_master(upper_dev)) {
4454 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4457 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4458 } else if (netif_is_lag_master(upper_dev)) {
4460 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4463 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4475 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4476 unsigned long event, void *ptr)
4478 struct netdev_notifier_changelowerstate_info *info;
4479 struct mlxsw_sp_port *mlxsw_sp_port;
4482 mlxsw_sp_port = netdev_priv(dev);
4486 case NETDEV_CHANGELOWERSTATE:
4487 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4488 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4489 info->lower_state_info);
4491 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4499 static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4500 unsigned long event, void *ptr)
4503 case NETDEV_PRECHANGEUPPER:
4504 case NETDEV_CHANGEUPPER:
4505 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4506 case NETDEV_CHANGELOWERSTATE:
4507 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4513 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4514 unsigned long event, void *ptr)
4516 struct net_device *dev;
4517 struct list_head *iter;
4520 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4521 if (mlxsw_sp_port_dev_check(dev)) {
4522 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4531 static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4532 struct net_device *vlan_dev)
4534 u16 fid = vlan_dev_vlan_id(vlan_dev);
4535 struct mlxsw_sp_fid *f;
4537 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4539 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4549 static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4550 struct net_device *vlan_dev)
4552 u16 fid = vlan_dev_vlan_id(vlan_dev);
4553 struct mlxsw_sp_fid *f;
4555 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4557 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4558 if (f && --f->ref_count == 0)
4559 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4562 static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4563 unsigned long event, void *ptr)
4565 struct netdev_notifier_changeupper_info *info;
4566 struct net_device *upper_dev;
4567 struct mlxsw_sp *mlxsw_sp;
4570 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4577 case NETDEV_PRECHANGEUPPER:
4578 upper_dev = info->upper_dev;
4579 if (!is_vlan_dev(upper_dev))
4581 if (is_vlan_dev(upper_dev) &&
4582 br_dev != mlxsw_sp->master_bridge.dev)
4585 case NETDEV_CHANGEUPPER:
4586 upper_dev = info->upper_dev;
4587 if (is_vlan_dev(upper_dev)) {
4589 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4592 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp,
4604 static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
4606 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
4610 static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4612 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4614 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4615 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
4618 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
4620 static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4621 struct net_device *br_dev)
4623 struct device *dev = mlxsw_sp->bus_info->dev;
4624 struct mlxsw_sp_fid *f;
4628 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
4629 if (vfid == MLXSW_SP_VFID_MAX) {
4630 dev_err(dev, "No available vFIDs\n");
4631 return ERR_PTR(-ERANGE);
4634 fid = mlxsw_sp_vfid_to_fid(vfid);
4635 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
4637 dev_err(dev, "Failed to create FID=%d\n", fid);
4638 return ERR_PTR(err);
4641 f = kzalloc(sizeof(*f), GFP_KERNEL);
4643 goto err_allocate_vfid;
4645 f->leave = mlxsw_sp_vport_vfid_leave;
4649 list_add(&f->list, &mlxsw_sp->vfids.list);
4650 set_bit(vfid, mlxsw_sp->vfids.mapped);
4655 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4656 return ERR_PTR(-ENOMEM);
4659 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4660 struct mlxsw_sp_fid *f)
4662 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
4665 clear_bit(vfid, mlxsw_sp->vfids.mapped);
4669 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4673 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4676 static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4679 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4680 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4682 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4686 static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4687 struct net_device *br_dev)
4689 struct mlxsw_sp_fid *f;
4692 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
4694 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
4699 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4701 goto err_vport_flood_set;
4703 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4705 goto err_vport_fid_map;
4707 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
4710 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4715 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4716 err_vport_flood_set:
4718 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4722 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4724 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4726 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4728 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4730 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4732 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4734 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
4735 if (--f->ref_count == 0)
4736 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4739 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4740 struct net_device *br_dev)
4742 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4743 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4744 struct net_device *dev = mlxsw_sp_vport->dev;
4747 if (f && !WARN_ON(!f->leave))
4748 f->leave(mlxsw_sp_vport);
4750 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
4752 netdev_err(dev, "Failed to join vFID\n");
4756 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4758 netdev_err(dev, "Failed to enable learning\n");
4759 goto err_port_vid_learning_set;
4762 mlxsw_sp_vport->learning = 1;
4763 mlxsw_sp_vport->learning_sync = 1;
4764 mlxsw_sp_vport->uc_flood = 1;
4765 mlxsw_sp_vport->mc_flood = 1;
4766 mlxsw_sp_vport->mc_router = 0;
4767 mlxsw_sp_vport->mc_disabled = 1;
4768 mlxsw_sp_vport->bridged = 1;
4772 err_port_vid_learning_set:
4773 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4777 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4779 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4781 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4783 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4785 mlxsw_sp_vport->learning = 0;
4786 mlxsw_sp_vport->learning_sync = 0;
4787 mlxsw_sp_vport->uc_flood = 0;
4788 mlxsw_sp_vport->mc_flood = 0;
4789 mlxsw_sp_vport->mc_router = 0;
4790 mlxsw_sp_vport->bridged = 0;
4794 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4795 const struct net_device *br_dev)
4797 struct mlxsw_sp_port *mlxsw_sp_vport;
4799 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4801 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
4803 if (dev && dev == br_dev)
4810 static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4811 unsigned long event, void *ptr,
4814 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4815 struct netdev_notifier_changeupper_info *info = ptr;
4816 struct mlxsw_sp_port *mlxsw_sp_vport;
4817 struct net_device *upper_dev;
4820 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4821 if (!mlxsw_sp_vport)
4825 case NETDEV_PRECHANGEUPPER:
4826 upper_dev = info->upper_dev;
4827 if (!netif_is_bridge_master(upper_dev))
4831 /* We can't have multiple VLAN interfaces configured on
4832 * the same port and being members in the same bridge.
4834 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4838 case NETDEV_CHANGEUPPER:
4839 upper_dev = info->upper_dev;
4840 if (netif_is_bridge_master(upper_dev)) {
4842 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4845 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
4856 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4857 unsigned long event, void *ptr,
4860 struct net_device *dev;
4861 struct list_head *iter;
4864 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4865 if (mlxsw_sp_port_dev_check(dev)) {
4866 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4876 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4877 unsigned long event, void *ptr)
4879 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4880 u16 vid = vlan_dev_vlan_id(vlan_dev);
4882 if (mlxsw_sp_port_dev_check(real_dev))
4883 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4885 else if (netif_is_lag_master(real_dev))
4886 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4892 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4893 unsigned long event, void *ptr)
4895 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
4898 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4899 err = mlxsw_sp_netdevice_router_port_event(dev);
4900 else if (mlxsw_sp_port_dev_check(dev))
4901 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4902 else if (netif_is_lag_master(dev))
4903 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
4904 else if (netif_is_bridge_master(dev))
4905 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
4906 else if (is_vlan_dev(dev))
4907 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
4909 return notifier_from_errno(err);
4912 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4913 .notifier_call = mlxsw_sp_netdevice_event,
4916 static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4917 .notifier_call = mlxsw_sp_inetaddr_event,
4918 .priority = 10, /* Must be called before FIB notifier block */
4921 static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4922 .notifier_call = mlxsw_sp_router_netevent_event,
4925 static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4926 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4930 static struct pci_driver mlxsw_sp_pci_driver = {
4931 .name = mlxsw_sp_driver_name,
4932 .id_table = mlxsw_sp_pci_id_table,
4935 static int __init mlxsw_sp_module_init(void)
4939 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4940 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4941 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4943 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4945 goto err_core_driver_register;
4947 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4949 goto err_pci_driver_register;
4953 err_pci_driver_register:
4954 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4955 err_core_driver_register:
4956 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4957 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4958 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4962 static void __exit mlxsw_sp_module_exit(void)
4964 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
4965 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4966 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4967 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4968 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4971 module_init(mlxsw_sp_module_init);
4972 module_exit(mlxsw_sp_module_exit);
4974 MODULE_LICENSE("Dual BSD/GPL");
4975 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4976 MODULE_DESCRIPTION("Mellanox Spectrum driver");
4977 MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);