2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/types.h>
40 #include <linux/netdevice.h>
41 #include <linux/etherdevice.h>
42 #include <linux/ethtool.h>
43 #include <linux/slab.h>
44 #include <linux/device.h>
45 #include <linux/skbuff.h>
46 #include <linux/if_vlan.h>
47 #include <linux/if_bridge.h>
48 #include <linux/workqueue.h>
49 #include <linux/jiffies.h>
50 #include <linux/bitops.h>
51 #include <linux/list.h>
52 #include <linux/notifier.h>
53 #include <linux/dcbnl.h>
54 #include <linux/inetdevice.h>
55 #include <net/switchdev.h>
56 #include <generated/utsrelease.h>
57 #include <net/pkt_cls.h>
58 #include <net/tc_act/tc_mirred.h>
67 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
68 static const char mlxsw_sp_driver_version[] = "1.0";
74 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
77 * Packet control type.
78 * 0 - Ethernet control (e.g. EMADs, LACP)
81 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
84 * Packet protocol type. Must be set to 1 (Ethernet).
86 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88 /* tx_hdr_rx_is_router
89 * Packet is sent from the router. Valid for data packets only.
91 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
94 * Indicates if the 'fid' field is valid and should be used for
95 * forwarding lookup. Valid for data packets only.
97 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
100 * Switch partition ID. Must be set to 0.
102 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104 /* tx_hdr_control_tclass
105 * Indicates if the packet should use the control TClass and not one
106 * of the data TClasses.
108 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
111 * Egress TClass to be used on the egress device on the egress port.
113 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
116 * Destination local port for unicast packets.
117 * Destination multicast ID for multicast packets.
119 * Control packets are directed to a specific egress port, while data
120 * packets are transmitted through the CPU port (0) into the switch partition,
121 * where forwarding rules are applied.
123 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
126 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
127 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
128 * Valid for data packets only.
130 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
134 * 6 - Control packets
136 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138 static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
141 const struct mlxsw_tx_info *tx_info)
143 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
148 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
149 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
150 mlxsw_tx_hdr_swid_set(txhdr, 0);
151 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
152 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
153 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
156 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158 char spad_pl[MLXSW_REG_SPAD_LEN];
161 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
164 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
168 static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170 struct mlxsw_resources *resources;
173 resources = mlxsw_core_resources_get(mlxsw_sp->core);
174 if (!resources->max_span_valid)
177 mlxsw_sp->span.entries_count = resources->max_span;
178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
181 if (!mlxsw_sp->span.entries)
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
190 static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 kfree(mlxsw_sp->span.entries);
202 static struct mlxsw_sp_span_entry *
203 mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
213 /* find a free entry to use */
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
218 span_entry = &mlxsw_sp->span.entries[i];
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
231 span_entry->used = true;
232 span_entry->id = index;
233 span_entry->ref_count = 0;
234 span_entry->local_port = local_port;
238 static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
250 struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
252 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
256 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258 if (curr->used && curr->local_port == port->local_port)
264 struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
266 struct mlxsw_sp_span_entry *span_entry;
268 span_entry = mlxsw_sp_span_entry_find(port);
270 span_entry->ref_count++;
274 return mlxsw_sp_span_entry_create(port);
277 static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
278 struct mlxsw_sp_span_entry *span_entry)
280 if (--span_entry->ref_count == 0)
281 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
285 static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
287 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
288 struct mlxsw_sp_span_inspected_port *p;
291 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
292 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
294 list_for_each_entry(p, &curr->bound_ports_list, list)
295 if (p->local_port == port->local_port &&
296 p->type == MLXSW_SP_SPAN_EGRESS)
303 static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
305 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
308 static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
310 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
311 char sbib_pl[MLXSW_REG_SBIB_LEN];
314 /* If port is egress mirrored, the shared buffer size should be
315 * updated according to the mtu value
317 if (mlxsw_sp_span_is_egress_mirror(port)) {
318 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
319 mlxsw_sp_span_mtu_to_buffsize(mtu));
320 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
322 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
330 static struct mlxsw_sp_span_inspected_port *
331 mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
332 struct mlxsw_sp_span_entry *span_entry)
334 struct mlxsw_sp_span_inspected_port *p;
336 list_for_each_entry(p, &span_entry->bound_ports_list, list)
337 if (port->local_port == p->local_port)
343 mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
344 struct mlxsw_sp_span_entry *span_entry,
345 enum mlxsw_sp_span_type type)
347 struct mlxsw_sp_span_inspected_port *inspected_port;
348 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
349 char mpar_pl[MLXSW_REG_MPAR_LEN];
350 char sbib_pl[MLXSW_REG_SBIB_LEN];
351 int pa_id = span_entry->id;
354 /* if it is an egress SPAN, bind a shared buffer to it */
355 if (type == MLXSW_SP_SPAN_EGRESS) {
356 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
357 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
358 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
360 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
365 /* bind the port to the SPAN entry */
366 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
367 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
369 goto err_mpar_reg_write;
371 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
372 if (!inspected_port) {
374 goto err_inspected_port_alloc;
376 inspected_port->local_port = port->local_port;
377 inspected_port->type = type;
378 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
383 err_inspected_port_alloc:
384 if (type == MLXSW_SP_SPAN_EGRESS) {
385 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
386 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
392 mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
393 struct mlxsw_sp_span_entry *span_entry,
394 enum mlxsw_sp_span_type type)
396 struct mlxsw_sp_span_inspected_port *inspected_port;
397 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
398 char mpar_pl[MLXSW_REG_MPAR_LEN];
399 char sbib_pl[MLXSW_REG_SBIB_LEN];
400 int pa_id = span_entry->id;
402 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
406 /* remove the inspected port */
407 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
408 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
410 /* remove the SBIB buffer if it was egress SPAN */
411 if (type == MLXSW_SP_SPAN_EGRESS) {
412 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
416 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
418 list_del(&inspected_port->list);
419 kfree(inspected_port);
422 static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
423 struct mlxsw_sp_port *to,
424 enum mlxsw_sp_span_type type)
426 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
427 struct mlxsw_sp_span_entry *span_entry;
430 span_entry = mlxsw_sp_span_entry_get(to);
434 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
437 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
444 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
448 static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
449 struct mlxsw_sp_port *to,
450 enum mlxsw_sp_span_type type)
452 struct mlxsw_sp_span_entry *span_entry;
454 span_entry = mlxsw_sp_span_entry_find(to);
456 netdev_err(from->dev, "no span entry found\n");
460 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
462 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
465 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
468 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
469 char paos_pl[MLXSW_REG_PAOS_LEN];
471 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
472 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
473 MLXSW_PORT_ADMIN_STATUS_DOWN);
474 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
477 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
480 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
481 char ppad_pl[MLXSW_REG_PPAD_LEN];
483 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
484 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
485 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
488 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
490 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
491 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
493 ether_addr_copy(addr, mlxsw_sp->base_mac);
494 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
495 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
498 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
501 char pmtu_pl[MLXSW_REG_PMTU_LEN];
505 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
506 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
507 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
510 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
515 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
519 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
522 char pspa_pl[MLXSW_REG_PSPA_LEN];
524 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
525 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
528 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
530 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
532 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
536 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
539 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
540 char svpe_pl[MLXSW_REG_SVPE_LEN];
542 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
543 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
546 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
547 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
550 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
551 char svfa_pl[MLXSW_REG_SVFA_LEN];
553 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
555 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
558 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
559 u16 vid, bool learn_enable)
561 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
565 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
568 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
570 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
576 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
579 char sspr_pl[MLXSW_REG_SSPR_LEN];
581 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
582 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
585 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
586 u8 local_port, u8 *p_module,
587 u8 *p_width, u8 *p_lane)
589 char pmlp_pl[MLXSW_REG_PMLP_LEN];
592 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
593 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
596 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
597 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
598 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
602 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
603 u8 module, u8 width, u8 lane)
605 char pmlp_pl[MLXSW_REG_PMLP_LEN];
608 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
609 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
610 for (i = 0; i < width; i++) {
611 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
612 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
615 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
618 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
622 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
623 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
627 static int mlxsw_sp_port_open(struct net_device *dev)
629 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
632 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
635 netif_start_queue(dev);
639 static int mlxsw_sp_port_stop(struct net_device *dev)
641 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
643 netif_stop_queue(dev);
644 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
647 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
648 struct net_device *dev)
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
652 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
653 const struct mlxsw_tx_info tx_info = {
654 .local_port = mlxsw_sp_port->local_port,
660 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
661 return NETDEV_TX_BUSY;
663 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
664 struct sk_buff *skb_orig = skb;
666 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
668 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
669 dev_kfree_skb_any(skb_orig);
674 if (eth_skb_pad(skb)) {
675 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
679 mlxsw_sp_txhdr_construct(skb, &tx_info);
680 /* TX header is consumed by HW on the way so we shouldn't count its
681 * bytes as being sent.
683 len = skb->len - MLXSW_TXHDR_LEN;
685 /* Due to a race we might fail here because of a full queue. In that
686 * unlikely case we simply drop the packet.
688 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
691 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
692 u64_stats_update_begin(&pcpu_stats->syncp);
693 pcpu_stats->tx_packets++;
694 pcpu_stats->tx_bytes += len;
695 u64_stats_update_end(&pcpu_stats->syncp);
697 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
698 dev_kfree_skb_any(skb);
703 static void mlxsw_sp_set_rx_mode(struct net_device *dev)
707 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
709 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
710 struct sockaddr *addr = p;
713 if (!is_valid_ether_addr(addr->sa_data))
714 return -EADDRNOTAVAIL;
716 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
719 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
723 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
724 bool pause_en, bool pfc_en, u16 delay)
726 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
728 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
729 MLXSW_SP_PAUSE_DELAY;
731 if (pause_en || pfc_en)
732 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
733 pg_size + delay, pg_size);
735 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
738 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
739 u8 *prio_tc, bool pause_en,
740 struct ieee_pfc *my_pfc)
742 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
743 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
744 u16 delay = !!my_pfc ? my_pfc->delay : 0;
745 char pbmc_pl[MLXSW_REG_PBMC_LEN];
748 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
749 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
753 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
754 bool configure = false;
757 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
758 if (prio_tc[j] == i) {
759 pfc = pfc_en & BIT(j);
767 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
770 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
773 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
774 int mtu, bool pause_en)
776 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
777 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
778 struct ieee_pfc *my_pfc;
781 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
782 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
784 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
788 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
790 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
791 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
794 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
797 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
799 goto err_span_port_mtu_update;
800 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
802 goto err_port_mtu_set;
807 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
808 err_span_port_mtu_update:
809 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
813 static struct rtnl_link_stats64 *
814 mlxsw_sp_port_get_stats64(struct net_device *dev,
815 struct rtnl_link_stats64 *stats)
817 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
818 struct mlxsw_sp_port_pcpu_stats *p;
819 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
824 for_each_possible_cpu(i) {
825 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
827 start = u64_stats_fetch_begin_irq(&p->syncp);
828 rx_packets = p->rx_packets;
829 rx_bytes = p->rx_bytes;
830 tx_packets = p->tx_packets;
831 tx_bytes = p->tx_bytes;
832 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
834 stats->rx_packets += rx_packets;
835 stats->rx_bytes += rx_bytes;
836 stats->tx_packets += tx_packets;
837 stats->tx_bytes += tx_bytes;
838 /* tx_dropped is u32, updated without syncp protection. */
839 tx_dropped += p->tx_dropped;
841 stats->tx_dropped = tx_dropped;
845 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
846 u16 vid_end, bool is_member, bool untagged)
848 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
852 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
856 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
857 vid_end, is_member, untagged);
858 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
863 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
865 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
866 u16 vid, last_visited_vid;
869 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
870 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
873 last_visited_vid = vid;
874 goto err_port_vid_to_fid_set;
878 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
880 last_visited_vid = VLAN_N_VID;
881 goto err_port_vid_to_fid_set;
886 err_port_vid_to_fid_set:
887 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
888 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
893 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
895 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
899 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
903 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
904 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
913 static struct mlxsw_sp_port *
914 mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
916 struct mlxsw_sp_port *mlxsw_sp_vport;
918 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
922 /* dev will be set correctly after the VLAN device is linked
923 * with the real device. In case of bridge SELF invocation, dev
926 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
927 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
928 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
929 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
930 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
931 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
932 mlxsw_sp_vport->vport.vid = vid;
934 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
936 return mlxsw_sp_vport;
939 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
941 list_del(&mlxsw_sp_vport->vport.list);
942 kfree(mlxsw_sp_vport);
945 int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
948 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
949 struct mlxsw_sp_port *mlxsw_sp_vport;
950 bool untagged = vid == 1;
953 /* VLAN 0 is added to HW filter when device goes up, but it is
954 * reserved in our case, so simply return.
959 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
960 netdev_warn(dev, "VID=%d already configured\n", vid);
964 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
965 if (!mlxsw_sp_vport) {
966 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
970 /* When adding the first VLAN interface on a bridged port we need to
971 * transition all the active 802.1Q bridge VLANs to use explicit
972 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
974 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
975 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
977 netdev_err(dev, "Failed to set to Virtual mode\n");
978 goto err_port_vp_mode_trans;
982 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
984 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
985 goto err_port_vid_learning_set;
988 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
990 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
992 goto err_port_add_vid;
998 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
999 err_port_vid_learning_set:
1000 if (list_is_singular(&mlxsw_sp_port->vports_list))
1001 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1002 err_port_vp_mode_trans:
1003 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1007 static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1008 __be16 __always_unused proto, u16 vid)
1010 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1011 struct mlxsw_sp_port *mlxsw_sp_vport;
1012 struct mlxsw_sp_fid *f;
1015 /* VLAN 0 is removed from HW filter when device goes down, but
1016 * it is reserved in our case, so simply return.
1021 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
1022 if (!mlxsw_sp_vport) {
1023 netdev_warn(dev, "VID=%d does not exist\n", vid);
1027 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
1029 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
1034 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
1036 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
1040 /* Drop FID reference. If this was the last reference the
1041 * resources will be freed.
1043 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1044 if (f && !WARN_ON(!f->leave))
1045 f->leave(mlxsw_sp_vport);
1047 /* When removing the last VLAN interface on a bridged port we need to
1048 * transition all active 802.1Q bridge VLANs to use VID to FID
1049 * mappings and set port's mode to VLAN mode.
1051 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
1052 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1054 netdev_err(dev, "Failed to set to VLAN mode\n");
1059 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1064 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1067 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1068 u8 module = mlxsw_sp_port->mapping.module;
1069 u8 width = mlxsw_sp_port->mapping.width;
1070 u8 lane = mlxsw_sp_port->mapping.lane;
1073 if (!mlxsw_sp_port->split)
1074 err = snprintf(name, len, "p%d", module + 1);
1076 err = snprintf(name, len, "p%ds%d", module + 1,
1085 static struct mlxsw_sp_port_mall_tc_entry *
1086 mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1087 unsigned long cookie) {
1088 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1090 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1091 if (mall_tc_entry->cookie == cookie)
1092 return mall_tc_entry;
1098 mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1099 struct tc_cls_matchall_offload *cls,
1100 const struct tc_action *a,
1103 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1104 struct net *net = dev_net(mlxsw_sp_port->dev);
1105 enum mlxsw_sp_span_type span_type;
1106 struct mlxsw_sp_port *to_port;
1107 struct net_device *to_dev;
1111 ifindex = tcf_mirred_ifindex(a);
1112 to_dev = __dev_get_by_index(net, ifindex);
1114 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1118 if (!mlxsw_sp_port_dev_check(to_dev)) {
1119 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1122 to_port = netdev_priv(to_dev);
1124 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1128 mall_tc_entry->cookie = cls->cookie;
1129 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1130 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1131 mall_tc_entry->mirror.ingress = ingress;
1132 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1134 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1135 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1137 goto err_mirror_add;
1141 list_del(&mall_tc_entry->list);
1142 kfree(mall_tc_entry);
1146 static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1148 struct tc_cls_matchall_offload *cls,
1151 const struct tc_action *a;
1154 if (!tc_single_action(cls->exts)) {
1155 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1159 tc_for_each_action(a, cls->exts) {
1160 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1163 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1172 static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1173 struct tc_cls_matchall_offload *cls)
1175 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1176 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1177 enum mlxsw_sp_span_type span_type;
1178 struct mlxsw_sp_port *to_port;
1180 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1182 if (!mall_tc_entry) {
1183 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1187 switch (mall_tc_entry->type) {
1188 case MLXSW_SP_PORT_MALL_MIRROR:
1189 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1190 span_type = mall_tc_entry->mirror.ingress ?
1191 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1193 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1199 list_del(&mall_tc_entry->list);
1200 kfree(mall_tc_entry);
1203 static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1204 __be16 proto, struct tc_to_netdev *tc)
1206 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1207 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1209 if (tc->type == TC_SETUP_MATCHALL) {
1210 switch (tc->cls_mall->command) {
1211 case TC_CLSMATCHALL_REPLACE:
1212 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1216 case TC_CLSMATCHALL_DESTROY:
1217 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1228 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1229 .ndo_open = mlxsw_sp_port_open,
1230 .ndo_stop = mlxsw_sp_port_stop,
1231 .ndo_start_xmit = mlxsw_sp_port_xmit,
1232 .ndo_setup_tc = mlxsw_sp_setup_tc,
1233 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
1234 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1235 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1236 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1237 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1238 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1239 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1240 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
1241 .ndo_fdb_add = switchdev_port_fdb_add,
1242 .ndo_fdb_del = switchdev_port_fdb_del,
1243 .ndo_fdb_dump = switchdev_port_fdb_dump,
1244 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1245 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1246 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
1247 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
1250 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1251 struct ethtool_drvinfo *drvinfo)
1253 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1254 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1256 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1257 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1258 sizeof(drvinfo->version));
1259 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1261 mlxsw_sp->bus_info->fw_rev.major,
1262 mlxsw_sp->bus_info->fw_rev.minor,
1263 mlxsw_sp->bus_info->fw_rev.subminor);
1264 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1265 sizeof(drvinfo->bus_info));
1268 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1269 struct ethtool_pauseparam *pause)
1271 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1273 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1274 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1277 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1278 struct ethtool_pauseparam *pause)
1280 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1282 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1283 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1284 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1286 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1290 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1291 struct ethtool_pauseparam *pause)
1293 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1294 bool pause_en = pause->tx_pause || pause->rx_pause;
1297 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1298 netdev_err(dev, "PFC already enabled on port\n");
1302 if (pause->autoneg) {
1303 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1307 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1309 netdev_err(dev, "Failed to configure port's headroom\n");
1313 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1315 netdev_err(dev, "Failed to set PAUSE parameters\n");
1316 goto err_port_pause_configure;
1319 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1320 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1324 err_port_pause_configure:
1325 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1326 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1330 struct mlxsw_sp_port_hw_stats {
1331 char str[ETH_GSTRING_LEN];
1332 u64 (*getter)(char *payload);
1335 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1337 .str = "a_frames_transmitted_ok",
1338 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1341 .str = "a_frames_received_ok",
1342 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1345 .str = "a_frame_check_sequence_errors",
1346 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1349 .str = "a_alignment_errors",
1350 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1353 .str = "a_octets_transmitted_ok",
1354 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1357 .str = "a_octets_received_ok",
1358 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1361 .str = "a_multicast_frames_xmitted_ok",
1362 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1365 .str = "a_broadcast_frames_xmitted_ok",
1366 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1369 .str = "a_multicast_frames_received_ok",
1370 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1373 .str = "a_broadcast_frames_received_ok",
1374 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1377 .str = "a_in_range_length_errors",
1378 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1381 .str = "a_out_of_range_length_field",
1382 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1385 .str = "a_frame_too_long_errors",
1386 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1389 .str = "a_symbol_error_during_carrier",
1390 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1393 .str = "a_mac_control_frames_transmitted",
1394 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1397 .str = "a_mac_control_frames_received",
1398 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1401 .str = "a_unsupported_opcodes_received",
1402 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1405 .str = "a_pause_mac_ctrl_frames_received",
1406 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1409 .str = "a_pause_mac_ctrl_frames_xmitted",
1410 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1414 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1416 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1418 .str = "rx_octets_prio",
1419 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1422 .str = "rx_frames_prio",
1423 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1426 .str = "tx_octets_prio",
1427 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1430 .str = "tx_frames_prio",
1431 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1434 .str = "rx_pause_prio",
1435 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1438 .str = "rx_pause_duration_prio",
1439 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1442 .str = "tx_pause_prio",
1443 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1446 .str = "tx_pause_duration_prio",
1447 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1451 #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1453 static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1455 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1457 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1460 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1462 .str = "tc_transmit_queue_tc",
1463 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1466 .str = "tc_no_buffer_discard_uc_tc",
1467 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1471 #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1473 #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
1474 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1475 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
1476 IEEE_8021QAZ_MAX_TCS)
1478 static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1482 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1483 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1484 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1485 *p += ETH_GSTRING_LEN;
1489 static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1493 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1494 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1495 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1496 *p += ETH_GSTRING_LEN;
1500 static void mlxsw_sp_port_get_strings(struct net_device *dev,
1501 u32 stringset, u8 *data)
1506 switch (stringset) {
1508 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1509 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1511 p += ETH_GSTRING_LEN;
1514 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1515 mlxsw_sp_port_get_prio_strings(&p, i);
1517 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1518 mlxsw_sp_port_get_tc_strings(&p, i);
1524 static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1525 enum ethtool_phys_id_state state)
1527 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1528 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1529 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1533 case ETHTOOL_ID_ACTIVE:
1536 case ETHTOOL_ID_INACTIVE:
1543 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1548 mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1549 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1552 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1553 *p_hw_stats = mlxsw_sp_port_hw_stats;
1554 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1556 case MLXSW_REG_PPCNT_PRIO_CNT:
1557 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1558 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1560 case MLXSW_REG_PPCNT_TC_CNT:
1561 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1562 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1571 static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1572 enum mlxsw_reg_ppcnt_grp grp, int prio,
1573 u64 *data, int data_index)
1575 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1576 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1577 struct mlxsw_sp_port_hw_stats *hw_stats;
1578 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1582 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1585 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
1586 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1587 for (i = 0; i < len; i++)
1588 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1591 static void mlxsw_sp_port_get_stats(struct net_device *dev,
1592 struct ethtool_stats *stats, u64 *data)
1594 int i, data_index = 0;
1596 /* IEEE 802.3 Counters */
1597 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1599 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1601 /* Per-Priority Counters */
1602 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1603 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1605 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1608 /* Per-TC Counters */
1609 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1610 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1612 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1616 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1620 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
1626 struct mlxsw_sp_port_link_mode {
1633 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1635 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1636 .supported = SUPPORTED_100baseT_Full,
1637 .advertised = ADVERTISED_100baseT_Full,
1641 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1645 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1646 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1647 .supported = SUPPORTED_1000baseKX_Full,
1648 .advertised = ADVERTISED_1000baseKX_Full,
1652 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1653 .supported = SUPPORTED_10000baseT_Full,
1654 .advertised = ADVERTISED_10000baseT_Full,
1658 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1659 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1660 .supported = SUPPORTED_10000baseKX4_Full,
1661 .advertised = ADVERTISED_10000baseKX4_Full,
1665 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1666 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1667 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1668 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1669 .supported = SUPPORTED_10000baseKR_Full,
1670 .advertised = ADVERTISED_10000baseKR_Full,
1674 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1675 .supported = SUPPORTED_20000baseKR2_Full,
1676 .advertised = ADVERTISED_20000baseKR2_Full,
1680 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1681 .supported = SUPPORTED_40000baseCR4_Full,
1682 .advertised = ADVERTISED_40000baseCR4_Full,
1686 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1687 .supported = SUPPORTED_40000baseKR4_Full,
1688 .advertised = ADVERTISED_40000baseKR4_Full,
1692 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1693 .supported = SUPPORTED_40000baseSR4_Full,
1694 .advertised = ADVERTISED_40000baseSR4_Full,
1698 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1699 .supported = SUPPORTED_40000baseLR4_Full,
1700 .advertised = ADVERTISED_40000baseLR4_Full,
1704 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1705 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1706 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1710 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1711 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1712 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1716 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1717 .supported = SUPPORTED_56000baseKR4_Full,
1718 .advertised = ADVERTISED_56000baseKR4_Full,
1722 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1723 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1724 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1725 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1730 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1732 static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1734 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1735 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1736 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1737 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1738 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1739 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1740 return SUPPORTED_FIBRE;
1742 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1743 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1744 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1745 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1746 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1747 return SUPPORTED_Backplane;
1751 static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1756 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1757 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1758 modes |= mlxsw_sp_port_link_mode[i].supported;
1763 static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1768 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1769 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1770 modes |= mlxsw_sp_port_link_mode[i].advertised;
1775 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1776 struct ethtool_cmd *cmd)
1778 u32 speed = SPEED_UNKNOWN;
1779 u8 duplex = DUPLEX_UNKNOWN;
1785 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1786 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1787 speed = mlxsw_sp_port_link_mode[i].speed;
1788 duplex = DUPLEX_FULL;
1793 ethtool_cmd_speed_set(cmd, speed);
1794 cmd->duplex = duplex;
1797 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1799 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1800 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1801 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1802 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1805 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1806 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1807 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1810 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1811 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1812 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1813 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1819 static int mlxsw_sp_port_get_settings(struct net_device *dev,
1820 struct ethtool_cmd *cmd)
1822 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1823 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1824 char ptys_pl[MLXSW_REG_PTYS_LEN];
1826 u32 eth_proto_admin;
1830 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1831 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1833 netdev_err(dev, "Failed to get proto");
1836 mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap,
1837 ð_proto_admin, ð_proto_oper);
1839 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1840 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1841 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1843 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1844 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1845 eth_proto_oper, cmd);
1847 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1848 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1849 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1851 cmd->transceiver = XCVR_INTERNAL;
1855 static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1860 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1861 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1862 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1867 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1872 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1873 if (speed == mlxsw_sp_port_link_mode[i].speed)
1874 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1879 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1884 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1885 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1886 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1891 static int mlxsw_sp_port_set_settings(struct net_device *dev,
1892 struct ethtool_cmd *cmd)
1894 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1895 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1896 char ptys_pl[MLXSW_REG_PTYS_LEN];
1900 u32 eth_proto_admin;
1903 speed = ethtool_cmd_speed(cmd);
1905 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1906 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1907 mlxsw_sp_to_ptys_speed(speed);
1909 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1910 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1912 netdev_err(dev, "Failed to get proto");
1915 mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap, ð_proto_admin, NULL);
1917 eth_proto_new = eth_proto_new & eth_proto_cap;
1918 if (!eth_proto_new) {
1919 netdev_err(dev, "Not supported proto admin requested");
1922 if (eth_proto_new == eth_proto_admin)
1925 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1926 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1928 netdev_err(dev, "Failed to set proto admin");
1932 if (!netif_running(dev))
1935 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1937 netdev_err(dev, "Failed to set admin status");
1941 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1943 netdev_err(dev, "Failed to set admin status");
1950 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1951 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1952 .get_link = ethtool_op_get_link,
1953 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1954 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
1955 .get_strings = mlxsw_sp_port_get_strings,
1956 .set_phys_id = mlxsw_sp_port_set_phys_id,
1957 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1958 .get_sset_count = mlxsw_sp_port_get_sset_count,
1959 .get_settings = mlxsw_sp_port_get_settings,
1960 .set_settings = mlxsw_sp_port_set_settings,
1964 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1966 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1967 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1968 char ptys_pl[MLXSW_REG_PTYS_LEN];
1969 u32 eth_proto_admin;
1971 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1972 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1974 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1977 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1978 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1979 bool dwrr, u8 dwrr_weight)
1981 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1982 char qeec_pl[MLXSW_REG_QEEC_LEN];
1984 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1986 mlxsw_reg_qeec_de_set(qeec_pl, true);
1987 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1988 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1989 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1992 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1993 enum mlxsw_reg_qeec_hr hr, u8 index,
1994 u8 next_index, u32 maxrate)
1996 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1997 char qeec_pl[MLXSW_REG_QEEC_LEN];
1999 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2001 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2002 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2003 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2006 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2007 u8 switch_prio, u8 tclass)
2009 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2010 char qtct_pl[MLXSW_REG_QTCT_LEN];
2012 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2014 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2017 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2021 /* Setup the elements hierarcy, so that each TC is linked to
2022 * one subgroup, which are all member in the same group.
2024 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2025 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2029 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2030 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2031 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2036 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2037 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2038 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2044 /* Make sure the max shaper is disabled in all hierarcies that
2047 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2048 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2049 MLXSW_REG_QEEC_MAS_DIS);
2052 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2053 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2054 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2056 MLXSW_REG_QEEC_MAS_DIS);
2060 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2061 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2062 MLXSW_REG_QEEC_HIERARCY_TC,
2064 MLXSW_REG_QEEC_MAS_DIS);
2069 /* Map all priorities to traffic class 0. */
2070 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2071 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2079 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2080 bool split, u8 module, u8 width, u8 lane)
2082 struct mlxsw_sp_port *mlxsw_sp_port;
2083 struct net_device *dev;
2087 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2090 mlxsw_sp_port = netdev_priv(dev);
2091 mlxsw_sp_port->dev = dev;
2092 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2093 mlxsw_sp_port->local_port = local_port;
2094 mlxsw_sp_port->split = split;
2095 mlxsw_sp_port->mapping.module = module;
2096 mlxsw_sp_port->mapping.width = width;
2097 mlxsw_sp_port->mapping.lane = lane;
2098 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2099 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2100 if (!mlxsw_sp_port->active_vlans) {
2102 goto err_port_active_vlans_alloc;
2104 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2105 if (!mlxsw_sp_port->untagged_vlans) {
2107 goto err_port_untagged_vlans_alloc;
2109 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
2110 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
2112 mlxsw_sp_port->pcpu_stats =
2113 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2114 if (!mlxsw_sp_port->pcpu_stats) {
2116 goto err_alloc_stats;
2119 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2120 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2122 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2124 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2125 mlxsw_sp_port->local_port);
2126 goto err_dev_addr_init;
2129 netif_carrier_off(dev);
2131 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
2132 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2133 dev->hw_features |= NETIF_F_HW_TC;
2135 /* Each packet needs to have a Tx header (metadata) on top all other
2138 dev->hard_header_len += MLXSW_TXHDR_LEN;
2140 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2142 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2143 mlxsw_sp_port->local_port);
2144 goto err_port_system_port_mapping_set;
2147 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2149 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2150 mlxsw_sp_port->local_port);
2151 goto err_port_swid_set;
2154 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2156 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2157 mlxsw_sp_port->local_port);
2158 goto err_port_speed_by_width_set;
2161 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2163 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2164 mlxsw_sp_port->local_port);
2165 goto err_port_mtu_set;
2168 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2170 goto err_port_admin_status_set;
2172 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2174 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2175 mlxsw_sp_port->local_port);
2176 goto err_port_buffers_init;
2179 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2181 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2182 mlxsw_sp_port->local_port);
2183 goto err_port_ets_init;
2186 /* ETS and buffers must be initialized before DCB. */
2187 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2189 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2190 mlxsw_sp_port->local_port);
2191 goto err_port_dcb_init;
2194 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2195 err = register_netdev(dev);
2197 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2198 mlxsw_sp_port->local_port);
2199 goto err_register_netdev;
2202 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2203 mlxsw_sp_port->local_port, dev,
2204 mlxsw_sp_port->split, module);
2206 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2207 mlxsw_sp_port->local_port);
2208 goto err_core_port_init;
2211 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
2213 goto err_port_vlan_init;
2215 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
2219 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
2221 unregister_netdev(dev);
2222 err_register_netdev:
2223 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2226 err_port_buffers_init:
2227 err_port_admin_status_set:
2229 err_port_speed_by_width_set:
2231 err_port_system_port_mapping_set:
2233 free_percpu(mlxsw_sp_port->pcpu_stats);
2235 kfree(mlxsw_sp_port->untagged_vlans);
2236 err_port_untagged_vlans_alloc:
2237 kfree(mlxsw_sp_port->active_vlans);
2238 err_port_active_vlans_alloc:
2243 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2245 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2249 mlxsw_sp->ports[local_port] = NULL;
2250 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
2251 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
2252 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2253 mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2254 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2255 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2256 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
2257 free_percpu(mlxsw_sp_port->pcpu_stats);
2258 kfree(mlxsw_sp_port->untagged_vlans);
2259 kfree(mlxsw_sp_port->active_vlans);
2260 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
2261 free_netdev(mlxsw_sp_port->dev);
2264 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2268 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2269 mlxsw_sp_port_remove(mlxsw_sp, i);
2270 kfree(mlxsw_sp->ports);
2273 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2275 u8 module, width, lane;
2280 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2281 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2282 if (!mlxsw_sp->ports)
2285 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
2286 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
2289 goto err_port_module_info_get;
2292 mlxsw_sp->port_to_module[i] = module;
2293 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2296 goto err_port_create;
2301 err_port_module_info_get:
2302 for (i--; i >= 1; i--)
2303 mlxsw_sp_port_remove(mlxsw_sp, i);
2304 kfree(mlxsw_sp->ports);
2308 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2310 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2312 return local_port - offset;
2315 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2316 u8 module, unsigned int count)
2318 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2321 for (i = 0; i < count; i++) {
2322 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2325 goto err_port_module_map;
2328 for (i = 0; i < count; i++) {
2329 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2331 goto err_port_swid_set;
2334 for (i = 0; i < count; i++) {
2335 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
2336 module, width, i * width);
2338 goto err_port_create;
2344 for (i--; i >= 0; i--)
2345 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2348 for (i--; i >= 0; i--)
2349 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2350 MLXSW_PORT_SWID_DISABLED_PORT);
2352 err_port_module_map:
2353 for (i--; i >= 0; i--)
2354 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2358 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2359 u8 base_port, unsigned int count)
2361 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2364 /* Split by four means we need to re-create two ports, otherwise
2369 for (i = 0; i < count; i++) {
2370 local_port = base_port + i * 2;
2371 module = mlxsw_sp->port_to_module[local_port];
2373 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2377 for (i = 0; i < count; i++)
2378 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2380 for (i = 0; i < count; i++) {
2381 local_port = base_port + i * 2;
2382 module = mlxsw_sp->port_to_module[local_port];
2384 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
2389 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2392 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2393 struct mlxsw_sp_port *mlxsw_sp_port;
2394 u8 module, cur_width, base_port;
2398 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2399 if (!mlxsw_sp_port) {
2400 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2405 module = mlxsw_sp_port->mapping.module;
2406 cur_width = mlxsw_sp_port->mapping.width;
2408 if (count != 2 && count != 4) {
2409 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2413 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2414 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2418 /* Make sure we have enough slave (even) ports for the split. */
2420 base_port = local_port;
2421 if (mlxsw_sp->ports[base_port + 1]) {
2422 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2426 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2427 if (mlxsw_sp->ports[base_port + 1] ||
2428 mlxsw_sp->ports[base_port + 3]) {
2429 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2434 for (i = 0; i < count; i++)
2435 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2437 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2439 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2440 goto err_port_split_create;
2445 err_port_split_create:
2446 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2450 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
2452 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2453 struct mlxsw_sp_port *mlxsw_sp_port;
2454 u8 cur_width, base_port;
2458 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2459 if (!mlxsw_sp_port) {
2460 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2465 if (!mlxsw_sp_port->split) {
2466 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2470 cur_width = mlxsw_sp_port->mapping.width;
2471 count = cur_width == 1 ? 4 : 2;
2473 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2475 /* Determine which ports to remove. */
2476 if (count == 2 && local_port >= base_port + 2)
2477 base_port = base_port + 2;
2479 for (i = 0; i < count; i++)
2480 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2482 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2487 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2488 char *pude_pl, void *priv)
2490 struct mlxsw_sp *mlxsw_sp = priv;
2491 struct mlxsw_sp_port *mlxsw_sp_port;
2492 enum mlxsw_reg_pude_oper_status status;
2495 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2496 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2500 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2501 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2502 netdev_info(mlxsw_sp_port->dev, "link up\n");
2503 netif_carrier_on(mlxsw_sp_port->dev);
2505 netdev_info(mlxsw_sp_port->dev, "link down\n");
2506 netif_carrier_off(mlxsw_sp_port->dev);
2510 static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2511 .func = mlxsw_sp_pude_event_func,
2512 .trap_id = MLXSW_TRAP_ID_PUDE,
2515 static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2516 enum mlxsw_event_trap_id trap_id)
2518 struct mlxsw_event_listener *el;
2519 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2523 case MLXSW_TRAP_ID_PUDE:
2524 el = &mlxsw_sp_pude_event;
2527 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2531 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2532 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2534 goto err_event_trap_set;
2539 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2543 static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2544 enum mlxsw_event_trap_id trap_id)
2546 struct mlxsw_event_listener *el;
2549 case MLXSW_TRAP_ID_PUDE:
2550 el = &mlxsw_sp_pude_event;
2553 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2556 static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2559 struct mlxsw_sp *mlxsw_sp = priv;
2560 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2561 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2563 if (unlikely(!mlxsw_sp_port)) {
2564 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2569 skb->dev = mlxsw_sp_port->dev;
2571 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2572 u64_stats_update_begin(&pcpu_stats->syncp);
2573 pcpu_stats->rx_packets++;
2574 pcpu_stats->rx_bytes += skb->len;
2575 u64_stats_update_end(&pcpu_stats->syncp);
2577 skb->protocol = eth_type_trans(skb, skb->dev);
2578 netif_receive_skb(skb);
2581 static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2583 .func = mlxsw_sp_rx_listener_func,
2584 .local_port = MLXSW_PORT_DONT_CARE,
2585 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2587 /* Traps for specific L2 packet types, not trapped as FDB MC */
2589 .func = mlxsw_sp_rx_listener_func,
2590 .local_port = MLXSW_PORT_DONT_CARE,
2591 .trap_id = MLXSW_TRAP_ID_STP,
2594 .func = mlxsw_sp_rx_listener_func,
2595 .local_port = MLXSW_PORT_DONT_CARE,
2596 .trap_id = MLXSW_TRAP_ID_LACP,
2599 .func = mlxsw_sp_rx_listener_func,
2600 .local_port = MLXSW_PORT_DONT_CARE,
2601 .trap_id = MLXSW_TRAP_ID_EAPOL,
2604 .func = mlxsw_sp_rx_listener_func,
2605 .local_port = MLXSW_PORT_DONT_CARE,
2606 .trap_id = MLXSW_TRAP_ID_LLDP,
2609 .func = mlxsw_sp_rx_listener_func,
2610 .local_port = MLXSW_PORT_DONT_CARE,
2611 .trap_id = MLXSW_TRAP_ID_MMRP,
2614 .func = mlxsw_sp_rx_listener_func,
2615 .local_port = MLXSW_PORT_DONT_CARE,
2616 .trap_id = MLXSW_TRAP_ID_MVRP,
2619 .func = mlxsw_sp_rx_listener_func,
2620 .local_port = MLXSW_PORT_DONT_CARE,
2621 .trap_id = MLXSW_TRAP_ID_RPVST,
2624 .func = mlxsw_sp_rx_listener_func,
2625 .local_port = MLXSW_PORT_DONT_CARE,
2626 .trap_id = MLXSW_TRAP_ID_DHCP,
2629 .func = mlxsw_sp_rx_listener_func,
2630 .local_port = MLXSW_PORT_DONT_CARE,
2631 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2634 .func = mlxsw_sp_rx_listener_func,
2635 .local_port = MLXSW_PORT_DONT_CARE,
2636 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2639 .func = mlxsw_sp_rx_listener_func,
2640 .local_port = MLXSW_PORT_DONT_CARE,
2641 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2644 .func = mlxsw_sp_rx_listener_func,
2645 .local_port = MLXSW_PORT_DONT_CARE,
2646 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2649 .func = mlxsw_sp_rx_listener_func,
2650 .local_port = MLXSW_PORT_DONT_CARE,
2651 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2654 .func = mlxsw_sp_rx_listener_func,
2655 .local_port = MLXSW_PORT_DONT_CARE,
2656 .trap_id = MLXSW_TRAP_ID_ARPBC,
2659 .func = mlxsw_sp_rx_listener_func,
2660 .local_port = MLXSW_PORT_DONT_CARE,
2661 .trap_id = MLXSW_TRAP_ID_ARPUC,
2664 .func = mlxsw_sp_rx_listener_func,
2665 .local_port = MLXSW_PORT_DONT_CARE,
2666 .trap_id = MLXSW_TRAP_ID_IP2ME,
2669 .func = mlxsw_sp_rx_listener_func,
2670 .local_port = MLXSW_PORT_DONT_CARE,
2671 .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0,
2674 .func = mlxsw_sp_rx_listener_func,
2675 .local_port = MLXSW_PORT_DONT_CARE,
2676 .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4,
2680 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2682 char htgt_pl[MLXSW_REG_HTGT_LEN];
2683 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2687 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2688 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2692 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2693 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2697 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2698 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2699 &mlxsw_sp_rx_listener[i],
2702 goto err_rx_listener_register;
2704 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2705 mlxsw_sp_rx_listener[i].trap_id);
2706 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2708 goto err_rx_trap_set;
2713 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2714 &mlxsw_sp_rx_listener[i],
2716 err_rx_listener_register:
2717 for (i--; i >= 0; i--) {
2718 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
2719 mlxsw_sp_rx_listener[i].trap_id);
2720 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2722 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2723 &mlxsw_sp_rx_listener[i],
2729 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2731 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2734 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2735 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
2736 mlxsw_sp_rx_listener[i].trap_id);
2737 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2739 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2740 &mlxsw_sp_rx_listener[i],
2745 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2746 enum mlxsw_reg_sfgc_type type,
2747 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2749 enum mlxsw_flood_table_type table_type;
2750 enum mlxsw_sp_flood_table flood_table;
2751 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2753 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
2754 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
2756 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
2758 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2759 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2761 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
2763 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2765 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2768 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2772 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2773 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2776 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2777 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2781 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2782 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2790 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2792 char slcr_pl[MLXSW_REG_SLCR_LEN];
2794 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2795 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2796 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2797 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2798 MLXSW_REG_SLCR_LAG_HASH_SIP |
2799 MLXSW_REG_SLCR_LAG_HASH_DIP |
2800 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2801 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2802 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2803 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2806 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
2807 const struct mlxsw_bus_info *mlxsw_bus_info)
2809 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2812 mlxsw_sp->core = mlxsw_core;
2813 mlxsw_sp->bus_info = mlxsw_bus_info;
2814 INIT_LIST_HEAD(&mlxsw_sp->fids);
2815 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
2816 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
2818 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2820 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2824 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2826 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
2830 err = mlxsw_sp_traps_init(mlxsw_sp);
2832 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2833 goto err_rx_listener_register;
2836 err = mlxsw_sp_flood_init(mlxsw_sp);
2838 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2839 goto err_flood_init;
2842 err = mlxsw_sp_buffers_init(mlxsw_sp);
2844 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2845 goto err_buffers_init;
2848 err = mlxsw_sp_lag_init(mlxsw_sp);
2850 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2854 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2856 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2857 goto err_switchdev_init;
2860 err = mlxsw_sp_router_init(mlxsw_sp);
2862 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2863 goto err_router_init;
2866 err = mlxsw_sp_span_init(mlxsw_sp);
2868 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2872 err = mlxsw_sp_ports_create(mlxsw_sp);
2874 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2875 goto err_ports_create;
2881 mlxsw_sp_span_fini(mlxsw_sp);
2883 mlxsw_sp_router_fini(mlxsw_sp);
2885 mlxsw_sp_switchdev_fini(mlxsw_sp);
2888 mlxsw_sp_buffers_fini(mlxsw_sp);
2891 mlxsw_sp_traps_fini(mlxsw_sp);
2892 err_rx_listener_register:
2893 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2897 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
2899 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2902 mlxsw_sp_ports_remove(mlxsw_sp);
2903 mlxsw_sp_span_fini(mlxsw_sp);
2904 mlxsw_sp_router_fini(mlxsw_sp);
2905 mlxsw_sp_switchdev_fini(mlxsw_sp);
2906 mlxsw_sp_buffers_fini(mlxsw_sp);
2907 mlxsw_sp_traps_fini(mlxsw_sp);
2908 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2909 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
2910 WARN_ON(!list_empty(&mlxsw_sp->fids));
2911 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2912 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
2915 static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2916 .used_max_vepa_channels = 1,
2917 .max_vepa_channels = 0,
2919 .max_lag = MLXSW_SP_LAG_MAX,
2920 .used_max_port_per_lag = 1,
2921 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
2923 .max_mid = MLXSW_SP_MID_MAX,
2926 .used_max_system_port = 1,
2927 .max_system_port = 64,
2928 .used_max_vlan_groups = 1,
2929 .max_vlan_groups = 127,
2930 .used_max_regions = 1,
2932 .used_flood_tables = 1,
2933 .used_flood_mode = 1,
2935 .max_fid_offset_flood_tables = 2,
2936 .fid_offset_flood_table_size = VLAN_N_VID - 1,
2937 .max_fid_flood_tables = 2,
2938 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
2939 .used_max_ib_mc = 1,
2943 .used_kvd_sizes = 1,
2944 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2945 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2946 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
2950 .type = MLXSW_PORT_SWID_TYPE_ETH,
2953 .resource_query_enable = 1,
2956 static struct mlxsw_driver mlxsw_sp_driver = {
2957 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2958 .owner = THIS_MODULE,
2959 .priv_size = sizeof(struct mlxsw_sp),
2960 .init = mlxsw_sp_init,
2961 .fini = mlxsw_sp_fini,
2962 .port_split = mlxsw_sp_port_split,
2963 .port_unsplit = mlxsw_sp_port_unsplit,
2964 .sb_pool_get = mlxsw_sp_sb_pool_get,
2965 .sb_pool_set = mlxsw_sp_sb_pool_set,
2966 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2967 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2968 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2969 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2970 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2971 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2972 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2973 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2974 .txhdr_construct = mlxsw_sp_txhdr_construct,
2975 .txhdr_len = MLXSW_TXHDR_LEN,
2976 .profile = &mlxsw_sp_config_profile,
2979 static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2981 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2984 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2986 struct net_device *lower_dev;
2987 struct list_head *iter;
2989 if (mlxsw_sp_port_dev_check(dev))
2990 return netdev_priv(dev);
2992 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2993 if (mlxsw_sp_port_dev_check(lower_dev))
2994 return netdev_priv(lower_dev);
2999 static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3001 struct mlxsw_sp_port *mlxsw_sp_port;
3003 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3004 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3007 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3009 struct net_device *lower_dev;
3010 struct list_head *iter;
3012 if (mlxsw_sp_port_dev_check(dev))
3013 return netdev_priv(dev);
3015 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3016 if (mlxsw_sp_port_dev_check(lower_dev))
3017 return netdev_priv(lower_dev);
3022 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3024 struct mlxsw_sp_port *mlxsw_sp_port;
3027 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3029 dev_hold(mlxsw_sp_port->dev);
3031 return mlxsw_sp_port;
3034 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3036 dev_put(mlxsw_sp_port->dev);
3039 static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3040 unsigned long event)
3049 if (r && --r->ref_count == 0)
3051 /* It is possible we already removed the RIF ourselves
3052 * if it was assigned to a netdev that is now a bridge
3061 static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3065 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3066 if (!mlxsw_sp->rifs[i])
3069 return MLXSW_SP_RIF_MAX;
3072 static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3073 bool *p_lagged, u16 *p_system_port)
3075 u8 local_port = mlxsw_sp_vport->local_port;
3077 *p_lagged = mlxsw_sp_vport->lagged;
3078 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3081 static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3082 struct net_device *l3_dev, u16 rif,
3085 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3086 bool lagged = mlxsw_sp_vport->lagged;
3087 char ritr_pl[MLXSW_REG_RITR_LEN];
3090 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3091 l3_dev->mtu, l3_dev->dev_addr);
3093 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3094 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3095 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3097 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3100 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3102 static struct mlxsw_sp_fid *
3103 mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3105 struct mlxsw_sp_fid *f;
3107 f = kzalloc(sizeof(*f), GFP_KERNEL);
3111 f->leave = mlxsw_sp_vport_rif_sp_leave;
3119 static struct mlxsw_sp_rif *
3120 mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3122 struct mlxsw_sp_rif *r;
3124 r = kzalloc(sizeof(*r), GFP_KERNEL);
3128 ether_addr_copy(r->addr, l3_dev->dev_addr);
3129 r->mtu = l3_dev->mtu;
3138 static struct mlxsw_sp_rif *
3139 mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3140 struct net_device *l3_dev)
3142 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3143 struct mlxsw_sp_fid *f;
3144 struct mlxsw_sp_rif *r;
3148 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3149 if (rif == MLXSW_SP_RIF_MAX)
3150 return ERR_PTR(-ERANGE);
3152 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3154 return ERR_PTR(err);
3156 fid = mlxsw_sp_rif_sp_to_fid(rif);
3157 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3159 goto err_rif_fdb_op;
3161 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3164 goto err_rfid_alloc;
3167 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3174 mlxsw_sp->rifs[rif] = r;
3181 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3183 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3184 return ERR_PTR(err);
3187 static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3188 struct mlxsw_sp_rif *r)
3190 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3191 struct net_device *l3_dev = r->dev;
3192 struct mlxsw_sp_fid *f = r->f;
3196 mlxsw_sp->rifs[rif] = NULL;
3203 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3205 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3208 static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3209 struct net_device *l3_dev)
3211 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3212 struct mlxsw_sp_rif *r;
3214 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3216 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3221 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3224 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3229 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3231 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3233 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3235 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3236 if (--f->ref_count == 0)
3237 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3240 static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3241 struct net_device *port_dev,
3242 unsigned long event, u16 vid)
3244 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3245 struct mlxsw_sp_port *mlxsw_sp_vport;
3247 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3248 if (WARN_ON(!mlxsw_sp_vport))
3253 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3255 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3262 static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3263 unsigned long event)
3265 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3268 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3271 static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3272 struct net_device *lag_dev,
3273 unsigned long event, u16 vid)
3275 struct net_device *port_dev;
3276 struct list_head *iter;
3279 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3280 if (mlxsw_sp_port_dev_check(port_dev)) {
3281 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3291 static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3292 unsigned long event)
3294 if (netif_is_bridge_port(lag_dev))
3297 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3300 static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3301 struct net_device *l3_dev)
3305 if (is_vlan_dev(l3_dev))
3306 fid = vlan_dev_vlan_id(l3_dev);
3307 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3310 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3312 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3315 static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3317 if (mlxsw_sp_fid_is_vfid(fid))
3318 return MLXSW_REG_RITR_FID_IF;
3320 return MLXSW_REG_RITR_VLAN_IF;
3323 static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3324 struct net_device *l3_dev,
3328 enum mlxsw_reg_ritr_if_type rif_type;
3329 char ritr_pl[MLXSW_REG_RITR_LEN];
3331 rif_type = mlxsw_sp_rif_type_get(fid);
3332 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3334 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3336 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3339 static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3340 struct net_device *l3_dev,
3341 struct mlxsw_sp_fid *f)
3343 struct mlxsw_sp_rif *r;
3347 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3348 if (rif == MLXSW_SP_RIF_MAX)
3351 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3355 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3357 goto err_rif_fdb_op;
3359 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3366 mlxsw_sp->rifs[rif] = r;
3368 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3373 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3375 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3379 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3380 struct mlxsw_sp_rif *r)
3382 struct net_device *l3_dev = r->dev;
3383 struct mlxsw_sp_fid *f = r->f;
3386 mlxsw_sp->rifs[rif] = NULL;
3391 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3393 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3395 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3398 static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3399 struct net_device *br_dev,
3400 unsigned long event)
3402 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3403 struct mlxsw_sp_fid *f;
3405 /* FID can either be an actual FID if the L3 device is the
3406 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3407 * L3 device is a VLAN-unaware bridge and we get a vFID.
3409 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3415 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3417 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3424 static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3425 unsigned long event)
3427 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3428 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
3429 u16 vid = vlan_dev_vlan_id(vlan_dev);
3431 if (mlxsw_sp_port_dev_check(real_dev))
3432 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3434 else if (netif_is_lag_master(real_dev))
3435 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3437 else if (netif_is_bridge_master(real_dev) &&
3438 mlxsw_sp->master_bridge.dev == real_dev)
3439 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3445 static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3446 unsigned long event, void *ptr)
3448 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3449 struct net_device *dev = ifa->ifa_dev->dev;
3450 struct mlxsw_sp *mlxsw_sp;
3451 struct mlxsw_sp_rif *r;
3454 mlxsw_sp = mlxsw_sp_lower_get(dev);
3458 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3459 if (!mlxsw_sp_rif_should_config(r, event))
3462 if (mlxsw_sp_port_dev_check(dev))
3463 err = mlxsw_sp_inetaddr_port_event(dev, event);
3464 else if (netif_is_lag_master(dev))
3465 err = mlxsw_sp_inetaddr_lag_event(dev, event);
3466 else if (netif_is_bridge_master(dev))
3467 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
3468 else if (is_vlan_dev(dev))
3469 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3472 return notifier_from_errno(err);
3475 static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3476 const char *mac, int mtu)
3478 char ritr_pl[MLXSW_REG_RITR_LEN];
3481 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3482 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3486 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3487 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3488 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3489 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3492 static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3494 struct mlxsw_sp *mlxsw_sp;
3495 struct mlxsw_sp_rif *r;
3498 mlxsw_sp = mlxsw_sp_lower_get(dev);
3502 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3506 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3510 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3514 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3516 goto err_rif_fdb_op;
3518 ether_addr_copy(r->addr, dev->dev_addr);
3521 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3526 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3528 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3532 static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3535 if (mlxsw_sp_fid_is_vfid(fid))
3536 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3538 return test_bit(fid, lag_port->active_vlans);
3541 static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3544 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3545 u8 local_port = mlxsw_sp_port->local_port;
3546 u16 lag_id = mlxsw_sp_port->lag_id;
3549 if (!mlxsw_sp_port->lagged)
3552 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3553 struct mlxsw_sp_port *lag_port;
3555 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3556 if (!lag_port || lag_port->local_port == local_port)
3558 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3566 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3569 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3570 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3572 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3573 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3574 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3575 mlxsw_sp_port->local_port);
3577 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3578 mlxsw_sp_port->local_port, fid);
3580 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3584 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3588 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3590 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3591 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3592 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3594 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3595 mlxsw_sp_port->lag_id, fid);
3597 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3600 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
3602 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3605 if (mlxsw_sp_port->lagged)
3606 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
3609 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
3612 static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3614 struct mlxsw_sp_fid *f, *tmp;
3616 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3617 if (--f->ref_count == 0)
3618 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3623 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3624 struct net_device *br_dev)
3626 return !mlxsw_sp->master_bridge.dev ||
3627 mlxsw_sp->master_bridge.dev == br_dev;
3630 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3631 struct net_device *br_dev)
3633 mlxsw_sp->master_bridge.dev = br_dev;
3634 mlxsw_sp->master_bridge.ref_count++;
3637 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3639 if (--mlxsw_sp->master_bridge.ref_count == 0) {
3640 mlxsw_sp->master_bridge.dev = NULL;
3641 /* It's possible upper VLAN devices are still holding
3642 * references to underlying FIDs. Drop the reference
3643 * and release the resources if it was the last one.
3644 * If it wasn't, then something bad happened.
3646 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3650 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3651 struct net_device *br_dev)
3653 struct net_device *dev = mlxsw_sp_port->dev;
3656 /* When port is not bridged untagged packets are tagged with
3657 * PVID=VID=1, thereby creating an implicit VLAN interface in
3658 * the device. Remove it and let bridge code take care of its
3661 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
3665 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3667 mlxsw_sp_port->learning = 1;
3668 mlxsw_sp_port->learning_sync = 1;
3669 mlxsw_sp_port->uc_flood = 1;
3670 mlxsw_sp_port->bridged = 1;
3675 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3677 struct net_device *dev = mlxsw_sp_port->dev;
3679 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3681 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3683 mlxsw_sp_port->learning = 0;
3684 mlxsw_sp_port->learning_sync = 0;
3685 mlxsw_sp_port->uc_flood = 0;
3686 mlxsw_sp_port->bridged = 0;
3688 /* Add implicit VLAN interface in the device, so that untagged
3689 * packets will be classified to the default vFID.
3691 mlxsw_sp_port_add_vid(dev, 0, 1);
3694 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3696 char sldr_pl[MLXSW_REG_SLDR_LEN];
3698 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3699 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3702 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3704 char sldr_pl[MLXSW_REG_SLDR_LEN];
3706 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3707 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3710 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3711 u16 lag_id, u8 port_index)
3713 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3714 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3716 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3717 lag_id, port_index);
3718 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3721 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3724 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3725 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3727 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3729 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3732 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3735 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3736 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3738 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3740 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3743 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3746 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3747 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3749 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3751 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3754 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3755 struct net_device *lag_dev,
3758 struct mlxsw_sp_upper *lag;
3759 int free_lag_id = -1;
3762 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3763 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3764 if (lag->ref_count) {
3765 if (lag->dev == lag_dev) {
3769 } else if (free_lag_id < 0) {
3773 if (free_lag_id < 0)
3775 *p_lag_id = free_lag_id;
3780 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3781 struct net_device *lag_dev,
3782 struct netdev_lag_upper_info *lag_upper_info)
3786 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3788 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3793 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3794 u16 lag_id, u8 *p_port_index)
3798 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3799 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3808 mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3811 struct mlxsw_sp_port *mlxsw_sp_vport;
3812 struct mlxsw_sp_fid *f;
3814 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3815 if (WARN_ON(!mlxsw_sp_vport))
3818 /* If vPort is assigned a RIF, then leave it since it's no
3821 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3823 f->leave(mlxsw_sp_vport);
3825 mlxsw_sp_vport->lag_id = lag_id;
3826 mlxsw_sp_vport->lagged = 1;
3830 mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3832 struct mlxsw_sp_port *mlxsw_sp_vport;
3833 struct mlxsw_sp_fid *f;
3835 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3836 if (WARN_ON(!mlxsw_sp_vport))
3839 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3841 f->leave(mlxsw_sp_vport);
3843 mlxsw_sp_vport->lagged = 0;
3846 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3847 struct net_device *lag_dev)
3849 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3850 struct mlxsw_sp_upper *lag;
3855 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3858 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3859 if (!lag->ref_count) {
3860 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3866 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3869 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3871 goto err_col_port_add;
3872 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3874 goto err_col_port_enable;
3876 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3877 mlxsw_sp_port->local_port);
3878 mlxsw_sp_port->lag_id = lag_id;
3879 mlxsw_sp_port->lagged = 1;
3882 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3886 err_col_port_enable:
3887 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3889 if (!lag->ref_count)
3890 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
3894 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3895 struct net_device *lag_dev)
3897 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3898 u16 lag_id = mlxsw_sp_port->lag_id;
3899 struct mlxsw_sp_upper *lag;
3901 if (!mlxsw_sp_port->lagged)
3903 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3904 WARN_ON(lag->ref_count == 0);
3906 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3907 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3909 if (mlxsw_sp_port->bridged) {
3910 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
3911 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
3914 if (lag->ref_count == 1)
3915 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
3917 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3918 mlxsw_sp_port->local_port);
3919 mlxsw_sp_port->lagged = 0;
3922 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
3925 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3928 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3929 char sldr_pl[MLXSW_REG_SLDR_LEN];
3931 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3932 mlxsw_sp_port->local_port);
3933 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3936 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3939 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3940 char sldr_pl[MLXSW_REG_SLDR_LEN];
3942 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3943 mlxsw_sp_port->local_port);
3944 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3947 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3948 bool lag_tx_enabled)
3951 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3952 mlxsw_sp_port->lag_id);
3954 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3955 mlxsw_sp_port->lag_id);
3958 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3959 struct netdev_lag_lower_state_info *info)
3961 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3964 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3965 struct net_device *vlan_dev)
3967 struct mlxsw_sp_port *mlxsw_sp_vport;
3968 u16 vid = vlan_dev_vlan_id(vlan_dev);
3970 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3971 if (WARN_ON(!mlxsw_sp_vport))
3974 mlxsw_sp_vport->dev = vlan_dev;
3979 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3980 struct net_device *vlan_dev)
3982 struct mlxsw_sp_port *mlxsw_sp_vport;
3983 u16 vid = vlan_dev_vlan_id(vlan_dev);
3985 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3986 if (WARN_ON(!mlxsw_sp_vport))
3989 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
3992 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3993 unsigned long event, void *ptr)
3995 struct netdev_notifier_changeupper_info *info;
3996 struct mlxsw_sp_port *mlxsw_sp_port;
3997 struct net_device *upper_dev;
3998 struct mlxsw_sp *mlxsw_sp;
4001 mlxsw_sp_port = netdev_priv(dev);
4002 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4006 case NETDEV_PRECHANGEUPPER:
4007 upper_dev = info->upper_dev;
4008 if (!is_vlan_dev(upper_dev) &&
4009 !netif_is_lag_master(upper_dev) &&
4010 !netif_is_bridge_master(upper_dev))
4014 /* HW limitation forbids to put ports to multiple bridges. */
4015 if (netif_is_bridge_master(upper_dev) &&
4016 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
4018 if (netif_is_lag_master(upper_dev) &&
4019 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4022 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4024 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4025 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4028 case NETDEV_CHANGEUPPER:
4029 upper_dev = info->upper_dev;
4030 if (is_vlan_dev(upper_dev)) {
4032 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4035 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4037 } else if (netif_is_bridge_master(upper_dev)) {
4039 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4042 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4043 } else if (netif_is_lag_master(upper_dev)) {
4045 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4048 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4060 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4061 unsigned long event, void *ptr)
4063 struct netdev_notifier_changelowerstate_info *info;
4064 struct mlxsw_sp_port *mlxsw_sp_port;
4067 mlxsw_sp_port = netdev_priv(dev);
4071 case NETDEV_CHANGELOWERSTATE:
4072 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4073 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4074 info->lower_state_info);
4076 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4084 static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4085 unsigned long event, void *ptr)
4088 case NETDEV_PRECHANGEUPPER:
4089 case NETDEV_CHANGEUPPER:
4090 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4091 case NETDEV_CHANGELOWERSTATE:
4092 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4098 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4099 unsigned long event, void *ptr)
4101 struct net_device *dev;
4102 struct list_head *iter;
4105 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4106 if (mlxsw_sp_port_dev_check(dev)) {
4107 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4116 static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4117 struct net_device *vlan_dev)
4119 u16 fid = vlan_dev_vlan_id(vlan_dev);
4120 struct mlxsw_sp_fid *f;
4122 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4124 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4134 static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4135 struct net_device *vlan_dev)
4137 u16 fid = vlan_dev_vlan_id(vlan_dev);
4138 struct mlxsw_sp_fid *f;
4140 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4142 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4143 if (f && --f->ref_count == 0)
4144 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4147 static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4148 unsigned long event, void *ptr)
4150 struct netdev_notifier_changeupper_info *info;
4151 struct net_device *upper_dev;
4152 struct mlxsw_sp *mlxsw_sp;
4155 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4158 if (br_dev != mlxsw_sp->master_bridge.dev)
4164 case NETDEV_CHANGEUPPER:
4165 upper_dev = info->upper_dev;
4166 if (!is_vlan_dev(upper_dev))
4168 if (info->linking) {
4169 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4174 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4182 static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
4184 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
4188 static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4190 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4192 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
4196 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
4198 static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4199 struct net_device *br_dev)
4201 struct device *dev = mlxsw_sp->bus_info->dev;
4202 struct mlxsw_sp_fid *f;
4206 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
4207 if (vfid == MLXSW_SP_VFID_MAX) {
4208 dev_err(dev, "No available vFIDs\n");
4209 return ERR_PTR(-ERANGE);
4212 fid = mlxsw_sp_vfid_to_fid(vfid);
4213 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
4215 dev_err(dev, "Failed to create FID=%d\n", fid);
4216 return ERR_PTR(err);
4219 f = kzalloc(sizeof(*f), GFP_KERNEL);
4221 goto err_allocate_vfid;
4223 f->leave = mlxsw_sp_vport_vfid_leave;
4227 list_add(&f->list, &mlxsw_sp->vfids.list);
4228 set_bit(vfid, mlxsw_sp->vfids.mapped);
4233 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4234 return ERR_PTR(-ENOMEM);
4237 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4238 struct mlxsw_sp_fid *f)
4240 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
4243 clear_bit(vfid, mlxsw_sp->vfids.mapped);
4247 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4251 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4254 static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4257 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4258 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4260 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4264 static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4265 struct net_device *br_dev)
4267 struct mlxsw_sp_fid *f;
4270 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
4272 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
4277 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4279 goto err_vport_flood_set;
4281 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4283 goto err_vport_fid_map;
4285 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
4288 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4293 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4294 err_vport_flood_set:
4296 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4300 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4302 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4304 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4306 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4308 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4310 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4312 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
4313 if (--f->ref_count == 0)
4314 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4317 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4318 struct net_device *br_dev)
4320 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4321 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4322 struct net_device *dev = mlxsw_sp_vport->dev;
4325 if (f && !WARN_ON(!f->leave))
4326 f->leave(mlxsw_sp_vport);
4328 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
4330 netdev_err(dev, "Failed to join vFID\n");
4334 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4336 netdev_err(dev, "Failed to enable learning\n");
4337 goto err_port_vid_learning_set;
4340 mlxsw_sp_vport->learning = 1;
4341 mlxsw_sp_vport->learning_sync = 1;
4342 mlxsw_sp_vport->uc_flood = 1;
4343 mlxsw_sp_vport->bridged = 1;
4347 err_port_vid_learning_set:
4348 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4352 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4354 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4356 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4358 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4360 mlxsw_sp_vport->learning = 0;
4361 mlxsw_sp_vport->learning_sync = 0;
4362 mlxsw_sp_vport->uc_flood = 0;
4363 mlxsw_sp_vport->bridged = 0;
4367 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4368 const struct net_device *br_dev)
4370 struct mlxsw_sp_port *mlxsw_sp_vport;
4372 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4374 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
4376 if (dev && dev == br_dev)
4383 static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4384 unsigned long event, void *ptr,
4387 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4388 struct netdev_notifier_changeupper_info *info = ptr;
4389 struct mlxsw_sp_port *mlxsw_sp_vport;
4390 struct net_device *upper_dev;
4393 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4396 case NETDEV_PRECHANGEUPPER:
4397 upper_dev = info->upper_dev;
4398 if (!netif_is_bridge_master(upper_dev))
4402 /* We can't have multiple VLAN interfaces configured on
4403 * the same port and being members in the same bridge.
4405 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4409 case NETDEV_CHANGEUPPER:
4410 upper_dev = info->upper_dev;
4411 if (info->linking) {
4412 if (WARN_ON(!mlxsw_sp_vport))
4414 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4417 if (!mlxsw_sp_vport)
4419 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
4426 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4427 unsigned long event, void *ptr,
4430 struct net_device *dev;
4431 struct list_head *iter;
4434 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4435 if (mlxsw_sp_port_dev_check(dev)) {
4436 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4446 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4447 unsigned long event, void *ptr)
4449 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4450 u16 vid = vlan_dev_vlan_id(vlan_dev);
4452 if (mlxsw_sp_port_dev_check(real_dev))
4453 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4455 else if (netif_is_lag_master(real_dev))
4456 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4462 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4463 unsigned long event, void *ptr)
4465 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
4468 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4469 err = mlxsw_sp_netdevice_router_port_event(dev);
4470 else if (mlxsw_sp_port_dev_check(dev))
4471 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4472 else if (netif_is_lag_master(dev))
4473 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
4474 else if (netif_is_bridge_master(dev))
4475 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
4476 else if (is_vlan_dev(dev))
4477 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
4479 return notifier_from_errno(err);
4482 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4483 .notifier_call = mlxsw_sp_netdevice_event,
4486 static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4487 .notifier_call = mlxsw_sp_inetaddr_event,
4488 .priority = 10, /* Must be called before FIB notifier block */
4491 static int __init mlxsw_sp_module_init(void)
4495 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4496 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4497 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4499 goto err_core_driver_register;
4502 err_core_driver_register:
4503 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4507 static void __exit mlxsw_sp_module_exit(void)
4509 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4510 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4511 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4514 module_init(mlxsw_sp_module_init);
4515 module_exit(mlxsw_sp_module_exit);
4517 MODULE_LICENSE("Dual BSD/GPL");
4518 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4519 MODULE_DESCRIPTION("Mellanox Spectrum driver");
4520 MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);