2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
3 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #ifndef _MLXSW_SPECTRUM_H
38 #define _MLXSW_SPECTRUM_H
40 #include <linux/types.h>
41 #include <linux/netdevice.h>
42 #include <linux/rhashtable.h>
43 #include <linux/bitops.h>
44 #include <linux/if_vlan.h>
45 #include <linux/list.h>
46 #include <linux/dcbnl.h>
47 #include <linux/in6.h>
48 #include <linux/notifier.h>
49 #include <net/psample.h>
50 #include <net/pkt_cls.h>
54 #include "core_acl_flex_keys.h"
55 #include "core_acl_flex_actions.h"
57 #define MLXSW_SP_VFID_BASE VLAN_N_VID
58 #define MLXSW_SP_VFID_MAX 1024 /* Bridged VLAN interfaces */
60 #define MLXSW_SP_RFID_BASE 15360
62 #define MLXSW_SP_MID_MAX 7000
64 #define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
66 #define MLXSW_SP_LPM_TREE_MIN 2 /* trees 0 and 1 are reserved */
67 #define MLXSW_SP_LPM_TREE_MAX 22
68 #define MLXSW_SP_LPM_TREE_COUNT (MLXSW_SP_LPM_TREE_MAX - MLXSW_SP_LPM_TREE_MIN)
70 #define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
72 #define MLXSW_SP_BYTES_PER_CELL 96
74 #define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
75 #define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
77 #define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
78 #define MLXSW_SP_KVD_GRANULARITY 128
80 /* Maximum delay buffer needed in case of PAUSE frames, in cells.
81 * Assumes 100m cable and maximum MTU.
83 #define MLXSW_SP_PAUSE_DELAY 612
85 #define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
87 static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
89 delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
90 return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
96 struct mlxsw_sp_upper {
97 struct net_device *dev;
98 unsigned int ref_count;
101 struct mlxsw_sp_fid {
102 void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
103 struct list_head list;
104 unsigned int ref_count;
105 struct net_device *dev;
106 struct mlxsw_sp_rif *r;
110 struct mlxsw_sp_mid {
111 struct list_head list;
112 unsigned char addr[ETH_ALEN];
115 unsigned int ref_count;
118 static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
120 return MLXSW_SP_VFID_BASE + vfid;
123 static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
125 return fid - MLXSW_SP_VFID_BASE;
128 static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
130 return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
133 struct mlxsw_sp_sb_pr {
134 enum mlxsw_reg_sbpr_mode mode;
138 struct mlxsw_cp_sb_occ {
143 struct mlxsw_sp_sb_cm {
147 struct mlxsw_cp_sb_occ occ;
150 struct mlxsw_sp_sb_pm {
153 struct mlxsw_cp_sb_occ occ;
156 #define MLXSW_SP_SB_POOL_COUNT 4
157 #define MLXSW_SP_SB_TC_COUNT 8
160 struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
162 struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
163 struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
164 } ports[MLXSW_PORT_MAX_PORTS];
167 #define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
169 struct mlxsw_sp_prefix_usage {
170 DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
173 enum mlxsw_sp_l3proto {
174 MLXSW_SP_L3_PROTO_IPV4,
175 MLXSW_SP_L3_PROTO_IPV6,
178 struct mlxsw_sp_lpm_tree {
180 unsigned int ref_count;
181 enum mlxsw_sp_l3proto proto;
182 struct mlxsw_sp_prefix_usage prefix_usage;
188 u16 id; /* virtual router ID */
189 u32 tb_id; /* kernel fib table id */
190 unsigned int rif_count;
191 struct mlxsw_sp_fib *fib4;
194 enum mlxsw_sp_span_type {
195 MLXSW_SP_SPAN_EGRESS,
196 MLXSW_SP_SPAN_INGRESS
199 struct mlxsw_sp_span_inspected_port {
200 struct list_head list;
201 enum mlxsw_sp_span_type type;
205 struct mlxsw_sp_span_entry {
208 struct list_head bound_ports_list;
213 enum mlxsw_sp_port_mall_action_type {
214 MLXSW_SP_PORT_MALL_MIRROR,
215 MLXSW_SP_PORT_MALL_SAMPLE,
218 struct mlxsw_sp_port_mall_mirror_tc_entry {
223 struct mlxsw_sp_port_mall_tc_entry {
224 struct list_head list;
225 unsigned long cookie;
226 enum mlxsw_sp_port_mall_action_type type;
228 struct mlxsw_sp_port_mall_mirror_tc_entry mirror;
232 struct mlxsw_sp_router {
233 struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
234 struct mlxsw_sp_vr *vrs;
235 struct rhashtable neigh_ht;
236 struct rhashtable nexthop_group_ht;
237 struct rhashtable nexthop_ht;
239 struct delayed_work dw;
240 unsigned long interval; /* ms */
242 struct delayed_work nexthop_probe_dw;
243 #define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
244 struct list_head nexthop_neighs_list;
252 struct list_head list;
253 DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
256 struct list_head list;
257 DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
259 struct list_head fids; /* VLAN-aware bridge FIDs */
260 struct mlxsw_sp_rif **rifs;
261 struct mlxsw_sp_port **ports;
262 struct mlxsw_core *core;
263 const struct mlxsw_bus_info *bus_info;
264 unsigned char base_mac[ETH_ALEN];
266 struct delayed_work dw;
267 #define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
268 unsigned int interval; /* ms */
270 #define MLXSW_SP_MIN_AGEING_TIME 10
271 #define MLXSW_SP_MAX_AGEING_TIME 1000000
272 #define MLXSW_SP_DEFAULT_AGEING_TIME 300
274 struct mlxsw_sp_upper master_bridge;
275 struct mlxsw_sp_upper *lags;
276 u8 port_to_module[MLXSW_PORT_MAX_PORTS];
277 struct mlxsw_sp_sb sb;
278 struct mlxsw_sp_router router;
279 struct mlxsw_sp_acl *acl;
281 DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
285 struct mlxsw_sp_span_entry *entries;
288 struct notifier_block fib_nb;
291 static inline struct mlxsw_sp_upper *
292 mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
294 return &mlxsw_sp->lags[lag_id];
297 struct mlxsw_sp_port_pcpu_stats {
302 struct u64_stats_sync syncp;
306 struct mlxsw_sp_port_sample {
307 struct psample_group __rcu *psample_group;
313 struct mlxsw_sp_port {
314 struct net_device *dev;
315 struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
316 struct mlxsw_sp *mlxsw_sp;
331 struct list_head list;
332 struct mlxsw_sp_fid *f;
341 struct ieee_ets *ets;
342 struct ieee_maxrate *maxrate;
343 struct ieee_pfc *pfc;
350 /* 802.1Q bridge VLANs */
351 unsigned long *active_vlans;
352 unsigned long *untagged_vlans;
353 /* VLAN interfaces */
354 struct list_head vports_list;
356 struct list_head mall_tc_list;
358 #define MLXSW_HW_STATS_UPDATE_TIME HZ
359 struct rtnl_link_stats64 *cache;
360 struct delayed_work update_dw;
362 struct mlxsw_sp_port_sample *sample;
365 bool mlxsw_sp_port_dev_check(const struct net_device *dev);
366 struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev);
367 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
368 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
371 mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
373 return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
376 static inline struct mlxsw_sp_port *
377 mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
379 struct mlxsw_sp_port *mlxsw_sp_port;
382 local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
384 mlxsw_sp_port = mlxsw_sp->ports[local_port];
385 return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
389 mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
391 return mlxsw_sp_vport->vport.vid;
395 mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
397 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
402 static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
403 struct mlxsw_sp_fid *f)
405 mlxsw_sp_vport->vport.f = f;
408 static inline struct mlxsw_sp_fid *
409 mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
411 return mlxsw_sp_vport->vport.f;
414 static inline struct net_device *
415 mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
417 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
419 return f ? f->dev : NULL;
422 static inline struct mlxsw_sp_port *
423 mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
425 struct mlxsw_sp_port *mlxsw_sp_vport;
427 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
429 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
430 return mlxsw_sp_vport;
436 static inline struct mlxsw_sp_port *
437 mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
440 struct mlxsw_sp_port *mlxsw_sp_vport;
442 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
444 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
446 if (f && f->fid == fid)
447 return mlxsw_sp_vport;
453 static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
456 struct mlxsw_sp_fid *f;
458 list_for_each_entry(f, &mlxsw_sp->fids, list)
465 static inline struct mlxsw_sp_fid *
466 mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
467 const struct net_device *br_dev)
469 struct mlxsw_sp_fid *f;
471 list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
472 if (f->dev == br_dev)
478 enum mlxsw_sp_flood_table {
479 MLXSW_SP_FLOOD_TABLE_UC,
480 MLXSW_SP_FLOOD_TABLE_BC,
481 MLXSW_SP_FLOOD_TABLE_MC,
484 int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
485 void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
486 int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
487 int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
488 unsigned int sb_index, u16 pool_index,
489 struct devlink_sb_pool_info *pool_info);
490 int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
491 unsigned int sb_index, u16 pool_index, u32 size,
492 enum devlink_sb_threshold_type threshold_type);
493 int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
494 unsigned int sb_index, u16 pool_index,
496 int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
497 unsigned int sb_index, u16 pool_index,
499 int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
500 unsigned int sb_index, u16 tc_index,
501 enum devlink_sb_pool_type pool_type,
502 u16 *p_pool_index, u32 *p_threshold);
503 int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
504 unsigned int sb_index, u16 tc_index,
505 enum devlink_sb_pool_type pool_type,
506 u16 pool_index, u32 threshold);
507 int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
508 unsigned int sb_index);
509 int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
510 unsigned int sb_index);
511 int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
512 unsigned int sb_index, u16 pool_index,
513 u32 *p_cur, u32 *p_max);
514 int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
515 unsigned int sb_index, u16 tc_index,
516 enum devlink_sb_pool_type pool_type,
517 u32 *p_cur, u32 *p_max);
519 int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
520 void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
521 int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
522 void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
523 void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
524 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
525 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
527 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
528 u16 vid_end, bool is_member, bool untagged);
529 int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
531 void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
532 int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
533 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
534 int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
536 struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
537 void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
538 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
539 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
540 bool dwrr, u8 dwrr_weight);
541 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
542 u8 switch_prio, u8 tclass);
543 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
544 u8 *prio_tc, bool pause_en,
545 struct ieee_pfc *my_pfc);
546 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
547 enum mlxsw_reg_qeec_hr hr, u8 index,
548 u8 next_index, u32 maxrate);
549 int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
550 u16 vid_begin, u16 vid_end,
553 #ifdef CONFIG_MLXSW_SPECTRUM_DCB
555 int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
556 void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
560 static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
565 static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
570 int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
571 void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
572 int mlxsw_sp_router_netevent_event(struct notifier_block *unused,
573 unsigned long event, void *ptr);
574 int mlxsw_sp_netdevice_router_port_event(struct net_device *dev);
575 int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
576 unsigned long event, void *ptr);
577 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
578 struct mlxsw_sp_rif *r);
580 int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
581 void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
583 struct mlxsw_afk *mlxsw_sp_acl_afk(struct mlxsw_sp_acl *acl);
585 struct mlxsw_sp_acl_rule_info {
586 unsigned int priority;
587 struct mlxsw_afk_element_values values;
588 struct mlxsw_afa_block *act_block;
591 enum mlxsw_sp_acl_profile {
592 MLXSW_SP_ACL_PROFILE_FLOWER,
595 struct mlxsw_sp_acl_profile_ops {
596 size_t ruleset_priv_size;
597 int (*ruleset_add)(struct mlxsw_sp *mlxsw_sp,
598 void *priv, void *ruleset_priv);
599 void (*ruleset_del)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
600 int (*ruleset_bind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv,
601 struct net_device *dev, bool ingress);
602 void (*ruleset_unbind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
603 size_t rule_priv_size;
604 int (*rule_add)(struct mlxsw_sp *mlxsw_sp,
605 void *ruleset_priv, void *rule_priv,
606 struct mlxsw_sp_acl_rule_info *rulei);
607 void (*rule_del)(struct mlxsw_sp *mlxsw_sp, void *rule_priv);
610 struct mlxsw_sp_acl_ops {
612 int (*init)(struct mlxsw_sp *mlxsw_sp, void *priv);
613 void (*fini)(struct mlxsw_sp *mlxsw_sp, void *priv);
614 const struct mlxsw_sp_acl_profile_ops *
615 (*profile_ops)(struct mlxsw_sp *mlxsw_sp,
616 enum mlxsw_sp_acl_profile profile);
619 struct mlxsw_sp_acl_ruleset;
621 struct mlxsw_sp_acl_ruleset *
622 mlxsw_sp_acl_ruleset_get(struct mlxsw_sp *mlxsw_sp,
623 struct net_device *dev, bool ingress,
624 enum mlxsw_sp_acl_profile profile);
625 void mlxsw_sp_acl_ruleset_put(struct mlxsw_sp *mlxsw_sp,
626 struct mlxsw_sp_acl_ruleset *ruleset);
628 struct mlxsw_sp_acl_rule_info *
629 mlxsw_sp_acl_rulei_create(struct mlxsw_sp_acl *acl);
630 void mlxsw_sp_acl_rulei_destroy(struct mlxsw_sp_acl_rule_info *rulei);
631 int mlxsw_sp_acl_rulei_commit(struct mlxsw_sp_acl_rule_info *rulei);
632 void mlxsw_sp_acl_rulei_priority(struct mlxsw_sp_acl_rule_info *rulei,
633 unsigned int priority);
634 void mlxsw_sp_acl_rulei_keymask_u32(struct mlxsw_sp_acl_rule_info *rulei,
635 enum mlxsw_afk_element element,
636 u32 key_value, u32 mask_value);
637 void mlxsw_sp_acl_rulei_keymask_buf(struct mlxsw_sp_acl_rule_info *rulei,
638 enum mlxsw_afk_element element,
639 const char *key_value,
640 const char *mask_value, unsigned int len);
641 void mlxsw_sp_acl_rulei_act_continue(struct mlxsw_sp_acl_rule_info *rulei);
642 void mlxsw_sp_acl_rulei_act_jump(struct mlxsw_sp_acl_rule_info *rulei,
644 int mlxsw_sp_acl_rulei_act_drop(struct mlxsw_sp_acl_rule_info *rulei);
645 int mlxsw_sp_acl_rulei_act_fwd(struct mlxsw_sp *mlxsw_sp,
646 struct mlxsw_sp_acl_rule_info *rulei,
647 struct net_device *out_dev);
648 int mlxsw_sp_acl_rulei_act_vlan(struct mlxsw_sp *mlxsw_sp,
649 struct mlxsw_sp_acl_rule_info *rulei,
650 u32 action, u16 vid, u16 proto, u8 prio);
652 struct mlxsw_sp_acl_rule;
654 struct mlxsw_sp_acl_rule *
655 mlxsw_sp_acl_rule_create(struct mlxsw_sp *mlxsw_sp,
656 struct mlxsw_sp_acl_ruleset *ruleset,
657 unsigned long cookie);
658 void mlxsw_sp_acl_rule_destroy(struct mlxsw_sp *mlxsw_sp,
659 struct mlxsw_sp_acl_rule *rule);
660 int mlxsw_sp_acl_rule_add(struct mlxsw_sp *mlxsw_sp,
661 struct mlxsw_sp_acl_rule *rule);
662 void mlxsw_sp_acl_rule_del(struct mlxsw_sp *mlxsw_sp,
663 struct mlxsw_sp_acl_rule *rule);
664 struct mlxsw_sp_acl_rule *
665 mlxsw_sp_acl_rule_lookup(struct mlxsw_sp *mlxsw_sp,
666 struct mlxsw_sp_acl_ruleset *ruleset,
667 unsigned long cookie);
668 struct mlxsw_sp_acl_rule_info *
669 mlxsw_sp_acl_rule_rulei(struct mlxsw_sp_acl_rule *rule);
671 int mlxsw_sp_acl_init(struct mlxsw_sp *mlxsw_sp);
672 void mlxsw_sp_acl_fini(struct mlxsw_sp *mlxsw_sp);
674 extern const struct mlxsw_sp_acl_ops mlxsw_sp_acl_tcam_ops;
676 int mlxsw_sp_flower_replace(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
677 __be16 protocol, struct tc_cls_flower_offload *f);
678 void mlxsw_sp_flower_destroy(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
679 struct tc_cls_flower_offload *f);