drivers/net/ethernet/pasemi/pasemi_mac.c

   1 /*
   2  * Copyright (C) 2006-2007 PA Semi, Inc
   3  *
   4  * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/init.h>
  21 #include <linux/module.h>
  22 #include <linux/pci.h>
  23 #include <linux/slab.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/dmaengine.h>
  26 #include <linux/delay.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/of_mdio.h>
  29 #include <linux/etherdevice.h>
  30 #include <asm/dma-mapping.h>
  31 #include <linux/in.h>
  32 #include <linux/skbuff.h>
  33
  34 #include <linux/ip.h>
  35 #include <linux/tcp.h>
  36 #include <net/checksum.h>
  37 #include <linux/inet_lro.h>
  38 #include <linux/prefetch.h>
  39
  40 #include <asm/irq.h>
  41 #include <asm/firmware.h>
  42 #include <asm/pasemi_dma.h>
  43
  44 #include "pasemi_mac.h"
  45
  46 /* We have our own align, since ppc64 in general has it at 0 because
  47  * of design flaws in some of the server bridge chips. However, for
  48  * PWRficient doing the unaligned copies is more expensive than doing
  49  * unaligned DMA, so make sure the data is aligned instead.
  50  */
  51 #define LOCAL_SKB_ALIGN 2
  52
  53 /* TODO list
  54  *
  55  * - Multicast support
  56  * - Large MTU support
  57  * - SW LRO
  58  * - Multiqueue RX/TX
  59  */
  60
  61 #define LRO_MAX_AGGR 64
  62
  63 #define PE_MIN_MTU      64
  64 #define PE_MAX_MTU      9000
  65 #define PE_DEF_MTU      ETH_DATA_LEN
  66
  67 #define DEFAULT_MSG_ENABLE        \
  68         (NETIF_MSG_DRV          | \
  69          NETIF_MSG_PROBE        | \
  70          NETIF_MSG_LINK         | \
  71          NETIF_MSG_TIMER        | \
  72          NETIF_MSG_IFDOWN       | \
  73          NETIF_MSG_IFUP         | \
  74          NETIF_MSG_RX_ERR       | \
  75          NETIF_MSG_TX_ERR)
  76
  77 MODULE_LICENSE("GPL");
  78 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  79 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  80
  81 static int debug = -1;  /* -1 == use DEFAULT_MSG_ENABLE as value */
  82 module_param(debug, int, 0);
  83 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  84
  85 extern const struct ethtool_ops pasemi_mac_ethtool_ops;
  86
  87 static int translation_enabled(void)
  88 {
  89 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
  90         return 1;
  91 #else
  92         return firmware_has_feature(FW_FEATURE_LPAR);
  93 #endif
  94 }
  95
  96 static void write_iob_reg(unsigned int reg, unsigned int val)
  97 {
  98         pasemi_write_iob_reg(reg, val);
  99 }
 100
 101 static unsigned int read_mac_reg(const struct pasemi_mac *mac, unsigned int reg)
 102 {
 103         return pasemi_read_mac_reg(mac->dma_if, reg);
 104 }
 105
 106 static void write_mac_reg(const struct pasemi_mac *mac, unsigned int reg,
 107                           unsigned int val)
 108 {
 109         pasemi_write_mac_reg(mac->dma_if, reg, val);
 110 }
 111
 112 static unsigned int read_dma_reg(unsigned int reg)
 113 {
 114         return pasemi_read_dma_reg(reg);
 115 }
 116
 117 static void write_dma_reg(unsigned int reg, unsigned int val)
 118 {
 119         pasemi_write_dma_reg(reg, val);
 120 }
 121
 122 static struct pasemi_mac_rxring *rx_ring(const struct pasemi_mac *mac)
 123 {
 124         return mac->rx;
 125 }
 126
 127 static struct pasemi_mac_txring *tx_ring(const struct pasemi_mac *mac)
 128 {
 129         return mac->tx;
 130 }
 131
 132 static inline void prefetch_skb(const struct sk_buff *skb)
 133 {
 134         const void *d = skb;
 135
 136         prefetch(d);
 137         prefetch(d+64);
 138         prefetch(d+128);
 139         prefetch(d+192);
 140 }
 141
 142 static int mac_to_intf(struct pasemi_mac *mac)
 143 {
 144         struct pci_dev *pdev = mac->pdev;
 145         u32 tmp;
 146         int nintf, off, i, j;
 147         int devfn = pdev->devfn;
 148
 149         tmp = read_dma_reg(PAS_DMA_CAP_IFI);
 150         nintf = (tmp & PAS_DMA_CAP_IFI_NIN_M) >> PAS_DMA_CAP_IFI_NIN_S;
 151         off = (tmp & PAS_DMA_CAP_IFI_IOFF_M) >> PAS_DMA_CAP_IFI_IOFF_S;
 152
 153         /* IOFF contains the offset to the registers containing the
 154          * DMA interface-to-MAC-pci-id mappings, and NIN contains number
 155          * of total interfaces. Each register contains 4 devfns.
 156          * Just do a linear search until we find the devfn of the MAC
 157          * we're trying to look up.
 158          */
 159
 160         for (i = 0; i < (nintf+3)/4; i++) {
 161                 tmp = read_dma_reg(off+4*i);
 162                 for (j = 0; j < 4; j++) {
 163                         if (((tmp >> (8*j)) & 0xff) == devfn)
 164                                 return i*4 + j;
 165                 }
 166         }
 167         return -1;
 168 }
 169
 170 static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
 171 {
 172         unsigned int flags;
 173
 174         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
 175         flags &= ~PAS_MAC_CFG_PCFG_PE;
 176         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
 177 }
 178
 179 static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
 180 {
 181         unsigned int flags;
 182
 183         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
 184         flags |= PAS_MAC_CFG_PCFG_PE;
 185         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
 186 }
 187
 188 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
 189 {
 190         struct pci_dev *pdev = mac->pdev;
 191         struct device_node *dn = pci_device_to_OF_node(pdev);
 192         int len;
 193         const u8 *maddr;
 194         u8 addr[ETH_ALEN];
 195
 196         if (!dn) {
 197                 dev_dbg(&pdev->dev,
 198                           "No device node for mac, not configuring\n");
 199                 return -ENOENT;
 200         }
 201
 202         maddr = of_get_property(dn, "local-mac-address", &len);
 203
 204         if (maddr && len == ETH_ALEN) {
 205                 memcpy(mac->mac_addr, maddr, ETH_ALEN);
 206                 return 0;
 207         }
 208
 209         /* Some old versions of firmware mistakenly uses mac-address
 210          * (and as a string) instead of a byte array in local-mac-address.
 211          */
 212
 213         if (maddr == NULL)
 214                 maddr = of_get_property(dn, "mac-address", NULL);
 215
 216         if (maddr == NULL) {
 217                 dev_warn(&pdev->dev,
 218                          "no mac address in device tree, not configuring\n");
 219                 return -ENOENT;
 220         }
 221
 222         if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx",
 223                    &addr[0], &addr[1], &addr[2], &addr[3], &addr[4], &addr[5])
 224             != ETH_ALEN) {
 225                 dev_warn(&pdev->dev,
 226                          "can't parse mac address, not configuring\n");
 227                 return -EINVAL;
 228         }
 229
 230         memcpy(mac->mac_addr, addr, ETH_ALEN);
 231
 232         return 0;
 233 }
 234
 235 static int pasemi_mac_set_mac_addr(struct net_device *dev, void *p)
 236 {
 237         struct pasemi_mac *mac = netdev_priv(dev);
 238         struct sockaddr *addr = p;
 239         unsigned int adr0, adr1;
 240
 241         if (!is_valid_ether_addr(addr->sa_data))
 242                 return -EADDRNOTAVAIL;
 243
 244         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 245
 246         adr0 = dev->dev_addr[2] << 24 |
 247                dev->dev_addr[3] << 16 |
 248                dev->dev_addr[4] << 8 |
 249                dev->dev_addr[5];
 250         adr1 = read_mac_reg(mac, PAS_MAC_CFG_ADR1);
 251         adr1 &= ~0xffff;
 252         adr1 |= dev->dev_addr[0] << 8 | dev->dev_addr[1];
 253
 254         pasemi_mac_intf_disable(mac);
 255         write_mac_reg(mac, PAS_MAC_CFG_ADR0, adr0);
 256         write_mac_reg(mac, PAS_MAC_CFG_ADR1, adr1);
 257         pasemi_mac_intf_enable(mac);
 258
 259         return 0;
 260 }
 261
 262 static int get_skb_hdr(struct sk_buff *skb, void **iphdr,
 263                        void **tcph, u64 *hdr_flags, void *data)
 264 {
 265         u64 macrx = (u64) data;
 266         unsigned int ip_len;
 267         struct iphdr *iph;
 268
 269         /* IPv4 header checksum failed */
 270         if ((macrx & XCT_MACRX_HTY_M) != XCT_MACRX_HTY_IPV4_OK)
 271                 return -1;
 272
 273         /* non tcp packet */
 274         skb_reset_network_header(skb);
 275         iph = ip_hdr(skb);
 276         if (iph->protocol != IPPROTO_TCP)
 277                 return -1;
 278
 279         ip_len = ip_hdrlen(skb);
 280         skb_set_transport_header(skb, ip_len);
 281         *tcph = tcp_hdr(skb);
 282
 283         /* check if ip header and tcp header are complete */
 284         if (ntohs(iph->tot_len) < ip_len + tcp_hdrlen(skb))
 285                 return -1;
 286
 287         *hdr_flags = LRO_IPV4 | LRO_TCP;
 288         *iphdr = iph;
 289
 290         return 0;
 291 }
 292
 293 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
 294                                     const int nfrags,
 295                                     struct sk_buff *skb,
 296                                     const dma_addr_t *dmas)
 297 {
 298         int f;
 299         struct pci_dev *pdev = mac->dma_pdev;
 300
 301         pci_unmap_single(pdev, dmas[0], skb_headlen(skb), PCI_DMA_TODEVICE);
 302
 303         for (f = 0; f < nfrags; f++) {
 304                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
 305
 306                 pci_unmap_page(pdev, dmas[f+1], skb_frag_size(frag), PCI_DMA_TODEVICE);
 307         }
 308         dev_kfree_skb_irq(skb);
 309
 310         /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
 311          * aligned up to a power of 2
 312          */
 313         return (nfrags + 3) & ~1;
 314 }
 315
 316 static struct pasemi_mac_csring *pasemi_mac_setup_csring(struct pasemi_mac *mac)
 317 {
 318         struct pasemi_mac_csring *ring;
 319         u32 val;
 320         unsigned int cfg;
 321         int chno;
 322
 323         ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_csring),
 324                                        offsetof(struct pasemi_mac_csring, chan));
 325
 326         if (!ring) {
 327                 dev_err(&mac->pdev->dev, "Can't allocate checksum channel\n");
 328                 goto out_chan;
 329         }
 330
 331         chno = ring->chan.chno;
 332
 333         ring->size = CS_RING_SIZE;
 334         ring->next_to_fill = 0;
 335
 336         /* Allocate descriptors */
 337         if (pasemi_dma_alloc_ring(&ring->chan, CS_RING_SIZE))
 338                 goto out_ring_desc;
 339
 340         write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
 341                       PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 342         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
 343         val |= PAS_DMA_TXCHAN_BASEU_SIZ(CS_RING_SIZE >> 3);
 344
 345         write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
 346
 347         ring->events[0] = pasemi_dma_alloc_flag();
 348         ring->events[1] = pasemi_dma_alloc_flag();
 349         if (ring->events[0] < 0 || ring->events[1] < 0)
 350                 goto out_flags;
 351
 352         pasemi_dma_clear_flag(ring->events[0]);
 353         pasemi_dma_clear_flag(ring->events[1]);
 354
 355         ring->fun = pasemi_dma_alloc_fun();
 356         if (ring->fun < 0)
 357                 goto out_fun;
 358
 359         cfg = PAS_DMA_TXCHAN_CFG_TY_FUNC | PAS_DMA_TXCHAN_CFG_UP |
 360               PAS_DMA_TXCHAN_CFG_TATTR(ring->fun) |
 361               PAS_DMA_TXCHAN_CFG_LPSQ | PAS_DMA_TXCHAN_CFG_LPDQ;
 362
 363         if (translation_enabled())
 364                 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
 365
 366         write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
 367
 368         /* enable channel */
 369         pasemi_dma_start_chan(&ring->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
 370                                            PAS_DMA_TXCHAN_TCMDSTA_DB |
 371                                            PAS_DMA_TXCHAN_TCMDSTA_DE |
 372                                            PAS_DMA_TXCHAN_TCMDSTA_DA);
 373
 374         return ring;
 375
 376 out_fun:
 377 out_flags:
 378         if (ring->events[0] >= 0)
 379                 pasemi_dma_free_flag(ring->events[0]);
 380         if (ring->events[1] >= 0)
 381                 pasemi_dma_free_flag(ring->events[1]);
 382         pasemi_dma_free_ring(&ring->chan);
 383 out_ring_desc:
 384         pasemi_dma_free_chan(&ring->chan);
 385 out_chan:
 386
 387         return NULL;
 388 }
 389
 390 static void pasemi_mac_setup_csrings(struct pasemi_mac *mac)
 391 {
 392         int i;
 393         mac->cs[0] = pasemi_mac_setup_csring(mac);
 394         if (mac->type == MAC_TYPE_XAUI)
 395                 mac->cs[1] = pasemi_mac_setup_csring(mac);
 396         else
 397                 mac->cs[1] = 0;
 398
 399         for (i = 0; i < MAX_CS; i++)
 400                 if (mac->cs[i])
 401                         mac->num_cs++;
 402 }
 403
 404 static void pasemi_mac_free_csring(struct pasemi_mac_csring *csring)
 405 {
 406         pasemi_dma_stop_chan(&csring->chan);
 407         pasemi_dma_free_flag(csring->events[0]);
 408         pasemi_dma_free_flag(csring->events[1]);
 409         pasemi_dma_free_ring(&csring->chan);
 410         pasemi_dma_free_chan(&csring->chan);
 411         pasemi_dma_free_fun(csring->fun);
 412 }
 413
 414 static int pasemi_mac_setup_rx_resources(const struct net_device *dev)
 415 {
 416         struct pasemi_mac_rxring *ring;
 417         struct pasemi_mac *mac = netdev_priv(dev);
 418         int chno;
 419         unsigned int cfg;
 420
 421         ring = pasemi_dma_alloc_chan(RXCHAN, sizeof(struct pasemi_mac_rxring),
 422                                      offsetof(struct pasemi_mac_rxring, chan));
 423
 424         if (!ring) {
 425                 dev_err(&mac->pdev->dev, "Can't allocate RX channel\n");
 426                 goto out_chan;
 427         }
 428         chno = ring->chan.chno;
 429
 430         spin_lock_init(&ring->lock);
 431
 432         ring->size = RX_RING_SIZE;
 433         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
 434                                   RX_RING_SIZE, GFP_KERNEL);
 435
 436         if (!ring->ring_info)
 437                 goto out_ring_info;
 438
 439         /* Allocate descriptors */
 440         if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
 441                 goto out_ring_desc;
 442
 443         ring->buffers = dma_zalloc_coherent(&mac->dma_pdev->dev,
 444                                             RX_RING_SIZE * sizeof(u64),
 445                                             &ring->buf_dma, GFP_KERNEL);
 446         if (!ring->buffers)
 447                 goto out_ring_desc;
 448
 449         write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
 450                       PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 451
 452         write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
 453                       PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
 454                       PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
 455
 456         cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
 457
 458         if (translation_enabled())
 459                 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
 460
 461         write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
 462
 463         write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
 464                       PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
 465
 466         write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
 467                       PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
 468                       PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
 469
 470         cfg = PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2 |
 471               PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
 472               PAS_DMA_RXINT_CFG_HEN;
 473
 474         if (translation_enabled())
 475                 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
 476
 477         write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
 478
 479         ring->next_to_fill = 0;
 480         ring->next_to_clean = 0;
 481         ring->mac = mac;
 482         mac->rx = ring;
 483
 484         return 0;
 485
 486 out_ring_desc:
 487         kfree(ring->ring_info);
 488 out_ring_info:
 489         pasemi_dma_free_chan(&ring->chan);
 490 out_chan:
 491         return -ENOMEM;
 492 }
 493
 494 static struct pasemi_mac_txring *
 495 pasemi_mac_setup_tx_resources(const struct net_device *dev)
 496 {
 497         struct pasemi_mac *mac = netdev_priv(dev);
 498         u32 val;
 499         struct pasemi_mac_txring *ring;
 500         unsigned int cfg;
 501         int chno;
 502
 503         ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_txring),
 504                                      offsetof(struct pasemi_mac_txring, chan));
 505
 506         if (!ring) {
 507                 dev_err(&mac->pdev->dev, "Can't allocate TX channel\n");
 508                 goto out_chan;
 509         }
 510
 511         chno = ring->chan.chno;
 512
 513         spin_lock_init(&ring->lock);
 514
 515         ring->size = TX_RING_SIZE;
 516         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
 517                                   TX_RING_SIZE, GFP_KERNEL);
 518         if (!ring->ring_info)
 519                 goto out_ring_info;
 520
 521         /* Allocate descriptors */
 522         if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
 523                 goto out_ring_desc;
 524
 525         write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
 526                       PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 527         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
 528         val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
 529
 530         write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
 531
 532         cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
 533               PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
 534               PAS_DMA_TXCHAN_CFG_UP |
 535               PAS_DMA_TXCHAN_CFG_WT(4);
 536
 537         if (translation_enabled())
 538                 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
 539
 540         write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
 541
 542         ring->next_to_fill = 0;
 543         ring->next_to_clean = 0;
 544         ring->mac = mac;
 545
 546         return ring;
 547
 548 out_ring_desc:
 549         kfree(ring->ring_info);
 550 out_ring_info:
 551         pasemi_dma_free_chan(&ring->chan);
 552 out_chan:
 553         return NULL;
 554 }
 555
 556 static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
 557 {
 558         struct pasemi_mac_txring *txring = tx_ring(mac);
 559         unsigned int i, j;
 560         struct pasemi_mac_buffer *info;
 561         dma_addr_t dmas[MAX_SKB_FRAGS+1];
 562         int freed, nfrags;
 563         int start, limit;
 564
 565         start = txring->next_to_clean;
 566         limit = txring->next_to_fill;
 567
 568         /* Compensate for when fill has wrapped and clean has not */
 569         if (start > limit)
 570                 limit += TX_RING_SIZE;
 571
 572         for (i = start; i < limit; i += freed) {
 573                 info = &txring->ring_info[(i+1) & (TX_RING_SIZE-1)];
 574                 if (info->dma && info->skb) {
 575                         nfrags = skb_shinfo(info->skb)->nr_frags;
 576                         for (j = 0; j <= nfrags; j++)
 577                                 dmas[j] = txring->ring_info[(i+1+j) &
 578                                                 (TX_RING_SIZE-1)].dma;
 579                         freed = pasemi_mac_unmap_tx_skb(mac, nfrags,
 580                                                         info->skb, dmas);
 581                 } else {
 582                         freed = 2;
 583                 }
 584         }
 585
 586         kfree(txring->ring_info);
 587         pasemi_dma_free_chan(&txring->chan);
 588
 589 }
 590
 591 static void pasemi_mac_free_rx_buffers(struct pasemi_mac *mac)
 592 {
 593         struct pasemi_mac_rxring *rx = rx_ring(mac);
 594         unsigned int i;
 595         struct pasemi_mac_buffer *info;
 596
 597         for (i = 0; i < RX_RING_SIZE; i++) {
 598                 info = &RX_DESC_INFO(rx, i);
 599                 if (info->skb && info->dma) {
 600                         pci_unmap_single(mac->dma_pdev,
 601                                          info->dma,
 602                                          info->skb->len,
 603                                          PCI_DMA_FROMDEVICE);
 604                         dev_kfree_skb_any(info->skb);
 605                 }
 606                 info->dma = 0;
 607                 info->skb = NULL;
 608         }
 609
 610         for (i = 0; i < RX_RING_SIZE; i++)
 611                 RX_BUFF(rx, i) = 0;
 612 }
 613
 614 static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
 615 {
 616         pasemi_mac_free_rx_buffers(mac);
 617
 618         dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
 619                           rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
 620
 621         kfree(rx_ring(mac)->ring_info);
 622         pasemi_dma_free_chan(&rx_ring(mac)->chan);
 623         mac->rx = NULL;
 624 }
 625
 626 static void pasemi_mac_replenish_rx_ring(struct net_device *dev,
 627                                          const int limit)
 628 {
 629         const struct pasemi_mac *mac = netdev_priv(dev);
 630         struct pasemi_mac_rxring *rx = rx_ring(mac);
 631         int fill, count;
 632
 633         if (limit <= 0)
 634                 return;
 635
 636         fill = rx_ring(mac)->next_to_fill;
 637         for (count = 0; count < limit; count++) {
 638                 struct pasemi_mac_buffer *info = &RX_DESC_INFO(rx, fill);
 639                 u64 *buff = &RX_BUFF(rx, fill);
 640                 struct sk_buff *skb;
 641                 dma_addr_t dma;
 642
 643                 /* Entry in use? */
 644                 WARN_ON(*buff);
 645
 646                 skb = netdev_alloc_skb(dev, mac->bufsz);
 647                 skb_reserve(skb, LOCAL_SKB_ALIGN);
 648
 649                 if (unlikely(!skb))
 650                         break;
 651
 652                 dma = pci_map_single(mac->dma_pdev, skb->data,
 653                                      mac->bufsz - LOCAL_SKB_ALIGN,
 654                                      PCI_DMA_FROMDEVICE);
 655
 656                 if (unlikely(pci_dma_mapping_error(mac->dma_pdev, dma))) {
 657                         dev_kfree_skb_irq(info->skb);
 658                         break;
 659                 }
 660
 661                 info->skb = skb;
 662                 info->dma = dma;
 663                 *buff = XCT_RXB_LEN(mac->bufsz) | XCT_RXB_ADDR(dma);
 664                 fill++;
 665         }
 666
 667         wmb();
 668
 669         write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
 670
 671         rx_ring(mac)->next_to_fill = (rx_ring(mac)->next_to_fill + count) &
 672                                 (RX_RING_SIZE - 1);
 673 }
 674
 675 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac)
 676 {
 677         struct pasemi_mac_rxring *rx = rx_ring(mac);
 678         unsigned int reg, pcnt;
 679         /* Re-enable packet count interrupts: finally
 680          * ack the packet count interrupt we got in rx_intr.
 681          */
 682
 683         pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
 684
 685         reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
 686
 687         if (*rx->chan.status & PAS_STATUS_TIMER)
 688                 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
 689
 690         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
 691 }
 692
 693 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac *mac)
 694 {
 695         unsigned int reg, pcnt;
 696
 697         /* Re-enable packet count interrupts */
 698         pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
 699
 700         reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
 701
 702         write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
 703 }
 704
 705
 706 static inline void pasemi_mac_rx_error(const struct pasemi_mac *mac,
 707                                        const u64 macrx)
 708 {
 709         unsigned int rcmdsta, ccmdsta;
 710         struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
 711
 712         if (!netif_msg_rx_err(mac))
 713                 return;
 714
 715         rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
 716         ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
 717
 718         printk(KERN_ERR "pasemi_mac: rx error. macrx %016llx, rx status %llx\n",
 719                 macrx, *chan->status);
 720
 721         printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
 722                 rcmdsta, ccmdsta);
 723 }
 724
 725 static inline void pasemi_mac_tx_error(const struct pasemi_mac *mac,
 726                                        const u64 mactx)
 727 {
 728         unsigned int cmdsta;
 729         struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
 730
 731         if (!netif_msg_tx_err(mac))
 732                 return;
 733
 734         cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
 735
 736         printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016llx, "\
 737                 "tx status 0x%016llx\n", mactx, *chan->status);
 738
 739         printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
 740 }
 741
 742 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
 743                                const int limit)
 744 {
 745         const struct pasemi_dmachan *chan = &rx->chan;
 746         struct pasemi_mac *mac = rx->mac;
 747         struct pci_dev *pdev = mac->dma_pdev;
 748         unsigned int n;
 749         int count, buf_index, tot_bytes, packets;
 750         struct pasemi_mac_buffer *info;
 751         struct sk_buff *skb;
 752         unsigned int len;
 753         u64 macrx, eval;
 754         dma_addr_t dma;
 755
 756         tot_bytes = 0;
 757         packets = 0;
 758
 759         spin_lock(&rx->lock);
 760
 761         n = rx->next_to_clean;
 762
 763         prefetch(&RX_DESC(rx, n));
 764
 765         for (count = 0; count < limit; count++) {
 766                 macrx = RX_DESC(rx, n);
 767                 prefetch(&RX_DESC(rx, n+4));
 768
 769                 if ((macrx & XCT_MACRX_E) ||
 770                     (*chan->status & PAS_STATUS_ERROR))
 771                         pasemi_mac_rx_error(mac, macrx);
 772
 773                 if (!(macrx & XCT_MACRX_O))
 774                         break;
 775
 776                 info = NULL;
 777
 778                 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
 779
 780                 eval = (RX_DESC(rx, n+1) & XCT_RXRES_8B_EVAL_M) >>
 781                         XCT_RXRES_8B_EVAL_S;
 782                 buf_index = eval-1;
 783
 784                 dma = (RX_DESC(rx, n+2) & XCT_PTR_ADDR_M);
 785                 info = &RX_DESC_INFO(rx, buf_index);
 786
 787                 skb = info->skb;
 788
 789                 prefetch_skb(skb);
 790
 791                 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
 792
 793                 pci_unmap_single(pdev, dma, mac->bufsz - LOCAL_SKB_ALIGN,
 794                                  PCI_DMA_FROMDEVICE);
 795
 796                 if (macrx & XCT_MACRX_CRC) {
 797                         /* CRC error flagged */
 798                         mac->netdev->stats.rx_errors++;
 799                         mac->netdev->stats.rx_crc_errors++;
 800                         /* No need to free skb, it'll be reused */
 801                         goto next;
 802                 }
 803
 804                 info->skb = NULL;
 805                 info->dma = 0;
 806
 807                 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
 808                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 809                         skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
 810                                            XCT_MACRX_CSUM_S;
 811                 } else {
 812                         skb_checksum_none_assert(skb);
 813                 }
 814
 815                 packets++;
 816                 tot_bytes += len;
 817
 818                 /* Don't include CRC */
 819                 skb_put(skb, len-4);
 820
 821                 skb->protocol = eth_type_trans(skb, mac->netdev);
 822                 lro_receive_skb(&mac->lro_mgr, skb, (void *)macrx);
 823
 824 next:
 825                 RX_DESC(rx, n) = 0;
 826                 RX_DESC(rx, n+1) = 0;
 827
 828                 /* Need to zero it out since hardware doesn't, since the
 829                  * replenish loop uses it to tell when it's done.
 830                  */
 831                 RX_BUFF(rx, buf_index) = 0;
 832
 833                 n += 4;
 834         }
 835
 836         if (n > RX_RING_SIZE) {
 837                 /* Errata 5971 workaround: L2 target of headers */
 838                 write_iob_reg(PAS_IOB_COM_PKTHDRCNT, 0);
 839                 n &= (RX_RING_SIZE-1);
 840         }
 841
 842         rx_ring(mac)->next_to_clean = n;
 843
 844         lro_flush_all(&mac->lro_mgr);
 845
 846         /* Increase is in number of 16-byte entries, and since each descriptor
 847          * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
 848          * count*2.
 849          */
 850         write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
 851
 852         pasemi_mac_replenish_rx_ring(mac->netdev, count);
 853
 854         mac->netdev->stats.rx_bytes += tot_bytes;
 855         mac->netdev->stats.rx_packets += packets;
 856
 857         spin_unlock(&rx_ring(mac)->lock);
 858
 859         return count;
 860 }
 861
 862 /* Can't make this too large or we blow the kernel stack limits */
 863 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
 864
 865 static int pasemi_mac_clean_tx(struct pasemi_mac_txring *txring)
 866 {
 867         struct pasemi_dmachan *chan = &txring->chan;
 868         struct pasemi_mac *mac = txring->mac;
 869         int i, j;
 870         unsigned int start, descr_count, buf_count, batch_limit;
 871         unsigned int ring_limit;
 872         unsigned int total_count;
 873         unsigned long flags;
 874         struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
 875         dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
 876         int nf[TX_CLEAN_BATCHSIZE];
 877         int nr_frags;
 878
 879         total_count = 0;
 880         batch_limit = TX_CLEAN_BATCHSIZE;
 881 restart:
 882         spin_lock_irqsave(&txring->lock, flags);
 883
 884         start = txring->next_to_clean;
 885         ring_limit = txring->next_to_fill;
 886
 887         prefetch(&TX_DESC_INFO(txring, start+1).skb);
 888
 889         /* Compensate for when fill has wrapped but clean has not */
 890         if (start > ring_limit)
 891                 ring_limit += TX_RING_SIZE;
 892
 893         buf_count = 0;
 894         descr_count = 0;
 895
 896         for (i = start;
 897              descr_count < batch_limit && i < ring_limit;
 898              i += buf_count) {
 899                 u64 mactx = TX_DESC(txring, i);
 900                 struct sk_buff *skb;
 901
 902                 if ((mactx  & XCT_MACTX_E) ||
 903                     (*chan->status & PAS_STATUS_ERROR))
 904                         pasemi_mac_tx_error(mac, mactx);
 905
 906                 /* Skip over control descriptors */
 907                 if (!(mactx & XCT_MACTX_LLEN_M)) {
 908                         TX_DESC(txring, i) = 0;
 909                         TX_DESC(txring, i+1) = 0;
 910                         buf_count = 2;
 911                         continue;
 912                 }
 913
 914                 skb = TX_DESC_INFO(txring, i+1).skb;
 915                 nr_frags = TX_DESC_INFO(txring, i).dma;
 916
 917                 if (unlikely(mactx & XCT_MACTX_O))
 918                         /* Not yet transmitted */
 919                         break;
 920
 921                 buf_count = 2 + nr_frags;
 922                 /* Since we always fill with an even number of entries, make
 923                  * sure we skip any unused one at the end as well.
 924                  */
 925                 if (buf_count & 1)
 926                         buf_count++;
 927
 928                 for (j = 0; j <= nr_frags; j++)
 929                         dmas[descr_count][j] = TX_DESC_INFO(txring, i+1+j).dma;
 930
 931                 skbs[descr_count] = skb;
 932                 nf[descr_count] = nr_frags;
 933
 934                 TX_DESC(txring, i) = 0;
 935                 TX_DESC(txring, i+1) = 0;
 936
 937                 descr_count++;
 938         }
 939         txring->next_to_clean = i & (TX_RING_SIZE-1);
 940
 941         spin_unlock_irqrestore(&txring->lock, flags);
 942         netif_wake_queue(mac->netdev);
 943
 944         for (i = 0; i < descr_count; i++)
 945                 pasemi_mac_unmap_tx_skb(mac, nf[i], skbs[i], dmas[i]);
 946
 947         total_count += descr_count;
 948
 949         /* If the batch was full, try to clean more */
 950         if (descr_count == batch_limit)
 951                 goto restart;
 952
 953         return total_count;
 954 }
 955
 956
 957 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
 958 {
 959         const struct pasemi_mac_rxring *rxring = data;
 960         struct pasemi_mac *mac = rxring->mac;
 961         const struct pasemi_dmachan *chan = &rxring->chan;
 962         unsigned int reg;
 963
 964         if (!(*chan->status & PAS_STATUS_CAUSE_M))
 965                 return IRQ_NONE;
 966
 967         /* Don't reset packet count so it won't fire again but clear
 968          * all others.
 969          */
 970
 971         reg = 0;
 972         if (*chan->status & PAS_STATUS_SOFT)
 973                 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
 974         if (*chan->status & PAS_STATUS_ERROR)
 975                 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
 976
 977         napi_schedule(&mac->napi);
 978
 979         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
 980
 981         return IRQ_HANDLED;
 982 }
 983
 984 #define TX_CLEAN_INTERVAL HZ
 985
 986 static void pasemi_mac_tx_timer(unsigned long data)
 987 {
 988         struct pasemi_mac_txring *txring = (struct pasemi_mac_txring *)data;
 989         struct pasemi_mac *mac = txring->mac;
 990
 991         pasemi_mac_clean_tx(txring);
 992
 993         mod_timer(&txring->clean_timer, jiffies + TX_CLEAN_INTERVAL);
 994
 995         pasemi_mac_restart_tx_intr(mac);
 996 }
 997
 998 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
 999 {
1000         struct pasemi_mac_txring *txring = data;
1001         const struct pasemi_dmachan *chan = &txring->chan;
1002         struct pasemi_mac *mac = txring->mac;
1003         unsigned int reg;
1004
1005         if (!(*chan->status & PAS_STATUS_CAUSE_M))
1006                 return IRQ_NONE;
1007
1008         reg = 0;
1009
1010         if (*chan->status & PAS_STATUS_SOFT)
1011                 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
1012         if (*chan->status & PAS_STATUS_ERROR)
1013                 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
1014
1015         mod_timer(&txring->clean_timer, jiffies + (TX_CLEAN_INTERVAL)*2);
1016
1017         napi_schedule(&mac->napi);
1018
1019         if (reg)
1020                 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
1021
1022         return IRQ_HANDLED;
1023 }
1024
1025 static void pasemi_adjust_link(struct net_device *dev)
1026 {
1027         struct pasemi_mac *mac = netdev_priv(dev);
1028         int msg;
1029         unsigned int flags;
1030         unsigned int new_flags;
1031
1032         if (!mac->phydev->link) {
1033                 /* If no link, MAC speed settings don't matter. Just report
1034                  * link down and return.
1035                  */
1036                 if (mac->link && netif_msg_link(mac))
1037                         printk(KERN_INFO "%s: Link is down.\n", dev->name);
1038
1039                 netif_carrier_off(dev);
1040                 pasemi_mac_intf_disable(mac);
1041                 mac->link = 0;
1042
1043                 return;
1044         } else {
1045                 pasemi_mac_intf_enable(mac);
1046                 netif_carrier_on(dev);
1047         }
1048
1049         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1050         new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
1051                               PAS_MAC_CFG_PCFG_TSR_M);
1052
1053         if (!mac->phydev->duplex)
1054                 new_flags |= PAS_MAC_CFG_PCFG_HD;
1055
1056         switch (mac->phydev->speed) {
1057         case 1000:
1058                 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
1059                              PAS_MAC_CFG_PCFG_TSR_1G;
1060                 break;
1061         case 100:
1062                 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
1063                              PAS_MAC_CFG_PCFG_TSR_100M;
1064                 break;
1065         case 10:
1066                 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
1067                              PAS_MAC_CFG_PCFG_TSR_10M;
1068                 break;
1069         default:
1070                 printk("Unsupported speed %d\n", mac->phydev->speed);
1071         }
1072
1073         /* Print on link or speed/duplex change */
1074         msg = mac->link != mac->phydev->link || flags != new_flags;
1075
1076         mac->duplex = mac->phydev->duplex;
1077         mac->speed = mac->phydev->speed;
1078         mac->link = mac->phydev->link;
1079
1080         if (new_flags != flags)
1081                 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
1082
1083         if (msg && netif_msg_link(mac))
1084                 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
1085                        dev->name, mac->speed, mac->duplex ? "full" : "half");
1086 }
1087
1088 static int pasemi_mac_phy_init(struct net_device *dev)
1089 {
1090         struct pasemi_mac *mac = netdev_priv(dev);
1091         struct device_node *dn, *phy_dn;
1092         struct phy_device *phydev;
1093
1094         dn = pci_device_to_OF_node(mac->pdev);
1095         phy_dn = of_parse_phandle(dn, "phy-handle", 0);
1096         of_node_put(phy_dn);
1097
1098         mac->link = 0;
1099         mac->speed = 0;
1100         mac->duplex = -1;
1101
1102         phydev = of_phy_connect(dev, phy_dn, &pasemi_adjust_link, 0,
1103                                 PHY_INTERFACE_MODE_SGMII);
1104
1105         if (!phydev) {
1106                 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
1107                 return -ENODEV;
1108         }
1109
1110         mac->phydev = phydev;
1111
1112         return 0;
1113 }
1114
1115
1116 static int pasemi_mac_open(struct net_device *dev)
1117 {
1118         struct pasemi_mac *mac = netdev_priv(dev);
1119         unsigned int flags;
1120         int i, ret;
1121
1122         flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
1123                 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
1124                 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
1125
1126         write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
1127
1128         ret = pasemi_mac_setup_rx_resources(dev);
1129         if (ret)
1130                 goto out_rx_resources;
1131
1132         mac->tx = pasemi_mac_setup_tx_resources(dev);
1133
1134         if (!mac->tx)
1135                 goto out_tx_ring;
1136
1137         /* We might already have allocated rings in case mtu was changed
1138          * before interface was brought up.
1139          */
1140         if (dev->mtu > 1500 && !mac->num_cs) {
1141                 pasemi_mac_setup_csrings(mac);
1142                 if (!mac->num_cs)
1143                         goto out_tx_ring;
1144         }
1145
1146         /* Zero out rmon counters */
1147         for (i = 0; i < 32; i++)
1148                 write_mac_reg(mac, PAS_MAC_RMON(i), 0);
1149
1150         /* 0x3ff with 33MHz clock is about 31us */
1151         write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG,
1152                       PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
1153
1154         write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
1155                       PAS_IOB_DMA_RXCH_CFG_CNTTH(256));
1156
1157         write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
1158                       PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
1159
1160         write_mac_reg(mac, PAS_MAC_IPC_CHNL,
1161                       PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
1162                       PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
1163
1164         /* enable rx if */
1165         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1166                       PAS_DMA_RXINT_RCMDSTA_EN |
1167                       PAS_DMA_RXINT_RCMDSTA_DROPS_M |
1168                       PAS_DMA_RXINT_RCMDSTA_BP |
1169                       PAS_DMA_RXINT_RCMDSTA_OO |
1170                       PAS_DMA_RXINT_RCMDSTA_BT);
1171
1172         /* enable rx channel */
1173         pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1174                                                    PAS_DMA_RXCHAN_CCMDSTA_OD |
1175                                                    PAS_DMA_RXCHAN_CCMDSTA_FD |
1176                                                    PAS_DMA_RXCHAN_CCMDSTA_DT);
1177
1178         /* enable tx channel */
1179         pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1180                                                    PAS_DMA_TXCHAN_TCMDSTA_DB |
1181                                                    PAS_DMA_TXCHAN_TCMDSTA_DE |
1182                                                    PAS_DMA_TXCHAN_TCMDSTA_DA);
1183
1184         pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
1185
1186         write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1187                       RX_RING_SIZE>>1);
1188
1189         /* Clear out any residual packet count state from firmware */
1190         pasemi_mac_restart_rx_intr(mac);
1191         pasemi_mac_restart_tx_intr(mac);
1192
1193         flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
1194
1195         if (mac->type == MAC_TYPE_GMAC)
1196                 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
1197         else
1198                 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
1199
1200         /* Enable interface in MAC */
1201         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1202
1203         ret = pasemi_mac_phy_init(dev);
1204         if (ret) {
1205                 /* Since we won't get link notification, just enable RX */
1206                 pasemi_mac_intf_enable(mac);
1207                 if (mac->type == MAC_TYPE_GMAC) {
1208                         /* Warn for missing PHY on SGMII (1Gig) ports */
1209                         dev_warn(&mac->pdev->dev,
1210                                  "PHY init failed: %d.\n", ret);
1211                         dev_warn(&mac->pdev->dev,
1212                                  "Defaulting to 1Gbit full duplex\n");
1213                 }
1214         }
1215
1216         netif_start_queue(dev);
1217         napi_enable(&mac->napi);
1218
1219         snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx",
1220                  dev->name);
1221
1222         ret = request_irq(mac->tx->chan.irq, pasemi_mac_tx_intr, 0,
1223                           mac->tx_irq_name, mac->tx);
1224         if (ret) {
1225                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1226                         mac->tx->chan.irq, ret);
1227                 goto out_tx_int;
1228         }
1229
1230         snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx",
1231                  dev->name);
1232
1233         ret = request_irq(mac->rx->chan.irq, pasemi_mac_rx_intr, 0,
1234                           mac->rx_irq_name, mac->rx);
1235         if (ret) {
1236                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1237                         mac->rx->chan.irq, ret);
1238                 goto out_rx_int;
1239         }
1240
1241         if (mac->phydev)
1242                 phy_start(mac->phydev);
1243
1244         init_timer(&mac->tx->clean_timer);
1245         mac->tx->clean_timer.function = pasemi_mac_tx_timer;
1246         mac->tx->clean_timer.data = (unsigned long)mac->tx;
1247         mac->tx->clean_timer.expires = jiffies+HZ;
1248         add_timer(&mac->tx->clean_timer);
1249
1250         return 0;
1251
1252 out_rx_int:
1253         free_irq(mac->tx->chan.irq, mac->tx);
1254 out_tx_int:
1255         napi_disable(&mac->napi);
1256         netif_stop_queue(dev);
1257 out_tx_ring:
1258         if (mac->tx)
1259                 pasemi_mac_free_tx_resources(mac);
1260         pasemi_mac_free_rx_resources(mac);
1261 out_rx_resources:
1262
1263         return ret;
1264 }
1265
1266 #define MAX_RETRIES 5000
1267
1268 static void pasemi_mac_pause_txchan(struct pasemi_mac *mac)
1269 {
1270         unsigned int sta, retries;
1271         int txch = tx_ring(mac)->chan.chno;
1272
1273         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
1274                       PAS_DMA_TXCHAN_TCMDSTA_ST);
1275
1276         for (retries = 0; retries < MAX_RETRIES; retries++) {
1277                 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1278                 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1279                         break;
1280                 cond_resched();
1281         }
1282
1283         if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1284                 dev_err(&mac->dma_pdev->dev,
1285                         "Failed to stop tx channel, tcmdsta %08x\n", sta);
1286
1287         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
1288 }
1289
1290 static void pasemi_mac_pause_rxchan(struct pasemi_mac *mac)
1291 {
1292         unsigned int sta, retries;
1293         int rxch = rx_ring(mac)->chan.chno;
1294
1295         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
1296                       PAS_DMA_RXCHAN_CCMDSTA_ST);
1297         for (retries = 0; retries < MAX_RETRIES; retries++) {
1298                 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1299                 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1300                         break;
1301                 cond_resched();
1302         }
1303
1304         if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1305                 dev_err(&mac->dma_pdev->dev,
1306                         "Failed to stop rx channel, ccmdsta 08%x\n", sta);
1307         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
1308 }
1309
1310 static void pasemi_mac_pause_rxint(struct pasemi_mac *mac)
1311 {
1312         unsigned int sta, retries;
1313
1314         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1315                       PAS_DMA_RXINT_RCMDSTA_ST);
1316         for (retries = 0; retries < MAX_RETRIES; retries++) {
1317                 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1318                 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1319                         break;
1320                 cond_resched();
1321         }
1322
1323         if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1324                 dev_err(&mac->dma_pdev->dev,
1325                         "Failed to stop rx interface, rcmdsta %08x\n", sta);
1326         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1327 }
1328
1329 static int pasemi_mac_close(struct net_device *dev)
1330 {
1331         struct pasemi_mac *mac = netdev_priv(dev);
1332         unsigned int sta;
1333         int rxch, txch, i;
1334
1335         rxch = rx_ring(mac)->chan.chno;
1336         txch = tx_ring(mac)->chan.chno;
1337
1338         if (mac->phydev) {
1339                 phy_stop(mac->phydev);
1340                 phy_disconnect(mac->phydev);
1341         }
1342
1343         del_timer_sync(&mac->tx->clean_timer);
1344
1345         netif_stop_queue(dev);
1346         napi_disable(&mac->napi);
1347
1348         sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1349         if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1350                       PAS_DMA_RXINT_RCMDSTA_OO |
1351                       PAS_DMA_RXINT_RCMDSTA_BT))
1352                 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1353
1354         sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1355         if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1356                      PAS_DMA_RXCHAN_CCMDSTA_OD |
1357                      PAS_DMA_RXCHAN_CCMDSTA_FD |
1358                      PAS_DMA_RXCHAN_CCMDSTA_DT))
1359                 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1360
1361         sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1362         if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ | PAS_DMA_TXCHAN_TCMDSTA_DB |
1363                       PAS_DMA_TXCHAN_TCMDSTA_DE | PAS_DMA_TXCHAN_TCMDSTA_DA))
1364                 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1365
1366         /* Clean out any pending buffers */
1367         pasemi_mac_clean_tx(tx_ring(mac));
1368         pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1369
1370         pasemi_mac_pause_txchan(mac);
1371         pasemi_mac_pause_rxint(mac);
1372         pasemi_mac_pause_rxchan(mac);
1373         pasemi_mac_intf_disable(mac);
1374
1375         free_irq(mac->tx->chan.irq, mac->tx);
1376         free_irq(mac->rx->chan.irq, mac->rx);
1377
1378         for (i = 0; i < mac->num_cs; i++) {
1379                 pasemi_mac_free_csring(mac->cs[i]);
1380                 mac->cs[i] = NULL;
1381         }
1382
1383         mac->num_cs = 0;
1384
1385         /* Free resources */
1386         pasemi_mac_free_rx_resources(mac);
1387         pasemi_mac_free_tx_resources(mac);
1388
1389         return 0;
1390 }
1391
1392 static void pasemi_mac_queue_csdesc(const struct sk_buff *skb,
1393                                     const dma_addr_t *map,
1394                                     const unsigned int *map_size,
1395                                     struct pasemi_mac_txring *txring,
1396                                     struct pasemi_mac_csring *csring)
1397 {
1398         u64 fund;
1399         dma_addr_t cs_dest;
1400         const int nh_off = skb_network_offset(skb);
1401         const int nh_len = skb_network_header_len(skb);
1402         const int nfrags = skb_shinfo(skb)->nr_frags;
1403         int cs_size, i, fill, hdr, cpyhdr, evt;
1404         dma_addr_t csdma;
1405
1406         fund = XCT_FUN_ST | XCT_FUN_RR_8BRES |
1407                XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1408                XCT_FUN_CRM_SIG | XCT_FUN_LLEN(skb->len - nh_off) |
1409                XCT_FUN_SHL(nh_len >> 2) | XCT_FUN_SE;
1410
1411         switch (ip_hdr(skb)->protocol) {
1412         case IPPROTO_TCP:
1413                 fund |= XCT_FUN_SIG_TCP4;
1414                 /* TCP checksum is 16 bytes into the header */
1415                 cs_dest = map[0] + skb_transport_offset(skb) + 16;
1416                 break;
1417         case IPPROTO_UDP:
1418                 fund |= XCT_FUN_SIG_UDP4;
1419                 /* UDP checksum is 6 bytes into the header */
1420                 cs_dest = map[0] + skb_transport_offset(skb) + 6;
1421                 break;
1422         default:
1423                 BUG();
1424         }
1425
1426         /* Do the checksum offloaded */
1427         fill = csring->next_to_fill;
1428         hdr = fill;
1429
1430         CS_DESC(csring, fill++) = fund;
1431         /* Room for 8BRES. Checksum result is really 2 bytes into it */
1432         csdma = csring->chan.ring_dma + (fill & (CS_RING_SIZE-1)) * 8 + 2;
1433         CS_DESC(csring, fill++) = 0;
1434
1435         CS_DESC(csring, fill) = XCT_PTR_LEN(map_size[0]-nh_off) | XCT_PTR_ADDR(map[0]+nh_off);
1436         for (i = 1; i <= nfrags; i++)
1437                 CS_DESC(csring, fill+i) = XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1438
1439         fill += i;
1440         if (fill & 1)
1441                 fill++;
1442
1443         /* Copy the result into the TCP packet */
1444         cpyhdr = fill;
1445         CS_DESC(csring, fill++) = XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1446                                   XCT_FUN_LLEN(2) | XCT_FUN_SE;
1447         CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(cs_dest) | XCT_PTR_T;
1448         CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(csdma);
1449         fill++;
1450
1451         evt = !csring->last_event;
1452         csring->last_event = evt;
1453
1454         /* Event handshaking with MAC TX */
1455         CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1456                                   CTRL_CMD_ETYPE_SET | CTRL_CMD_REG(csring->events[evt]);
1457         CS_DESC(csring, fill++) = 0;
1458         CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1459                                   CTRL_CMD_ETYPE_WCLR | CTRL_CMD_REG(csring->events[!evt]);
1460         CS_DESC(csring, fill++) = 0;
1461         csring->next_to_fill = fill & (CS_RING_SIZE-1);
1462
1463         cs_size = fill - hdr;
1464         write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1);
1465
1466         /* TX-side event handshaking */
1467         fill = txring->next_to_fill;
1468         TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1469                                   CTRL_CMD_ETYPE_WSET | CTRL_CMD_REG(csring->events[evt]);
1470         TX_DESC(txring, fill++) = 0;
1471         TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1472                                   CTRL_CMD_ETYPE_CLR | CTRL_CMD_REG(csring->events[!evt]);
1473         TX_DESC(txring, fill++) = 0;
1474         txring->next_to_fill = fill;
1475
1476         write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2);
1477 }
1478
1479 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1480 {
1481         struct pasemi_mac * const mac = netdev_priv(dev);
1482         struct pasemi_mac_txring * const txring = tx_ring(mac);
1483         struct pasemi_mac_csring *csring;
1484         u64 dflags = 0;
1485         u64 mactx;
1486         dma_addr_t map[MAX_SKB_FRAGS+1];
1487         unsigned int map_size[MAX_SKB_FRAGS+1];
1488         unsigned long flags;
1489         int i, nfrags;
1490         int fill;
1491         const int nh_off = skb_network_offset(skb);
1492         const int nh_len = skb_network_header_len(skb);
1493
1494         prefetch(&txring->ring_info);
1495
1496         dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1497
1498         nfrags = skb_shinfo(skb)->nr_frags;
1499
1500         map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1501                                 PCI_DMA_TODEVICE);
1502         map_size[0] = skb_headlen(skb);
1503         if (pci_dma_mapping_error(mac->dma_pdev, map[0]))
1504                 goto out_err_nolock;
1505
1506         for (i = 0; i < nfrags; i++) {
1507                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1508
1509                 map[i + 1] = skb_frag_dma_map(&mac->dma_pdev->dev, frag, 0,
1510                                               skb_frag_size(frag), DMA_TO_DEVICE);
1511                 map_size[i+1] = skb_frag_size(frag);
1512                 if (dma_mapping_error(&mac->dma_pdev->dev, map[i + 1])) {
1513                         nfrags = i;
1514                         goto out_err_nolock;
1515                 }
1516         }
1517
1518         if (skb->ip_summed == CHECKSUM_PARTIAL && skb->len <= 1540) {
1519                 switch (ip_hdr(skb)->protocol) {
1520                 case IPPROTO_TCP:
1521                         dflags |= XCT_MACTX_CSUM_TCP;
1522                         dflags |= XCT_MACTX_IPH(nh_len >> 2);
1523                         dflags |= XCT_MACTX_IPO(nh_off);
1524                         break;
1525                 case IPPROTO_UDP:
1526                         dflags |= XCT_MACTX_CSUM_UDP;
1527                         dflags |= XCT_MACTX_IPH(nh_len >> 2);
1528                         dflags |= XCT_MACTX_IPO(nh_off);
1529                         break;
1530                 default:
1531                         WARN_ON(1);
1532                 }
1533         }
1534
1535         mactx = dflags | XCT_MACTX_LLEN(skb->len);
1536
1537         spin_lock_irqsave(&txring->lock, flags);
1538
1539         /* Avoid stepping on the same cache line that the DMA controller
1540          * is currently about to send, so leave at least 8 words available.
1541          * Total free space needed is mactx + fragments + 8
1542          */
1543         if (RING_AVAIL(txring) < nfrags + 14) {
1544                 /* no room -- stop the queue and wait for tx intr */
1545                 netif_stop_queue(dev);
1546                 goto out_err;
1547         }
1548
1549         /* Queue up checksum + event descriptors, if needed */
1550         if (mac->num_cs && skb->ip_summed == CHECKSUM_PARTIAL && skb->len > 1540) {
1551                 csring = mac->cs[mac->last_cs];
1552                 mac->last_cs = (mac->last_cs + 1) % mac->num_cs;
1553
1554                 pasemi_mac_queue_csdesc(skb, map, map_size, txring, csring);
1555         }
1556
1557         fill = txring->next_to_fill;
1558         TX_DESC(txring, fill) = mactx;
1559         TX_DESC_INFO(txring, fill).dma = nfrags;
1560         fill++;
1561         TX_DESC_INFO(txring, fill).skb = skb;
1562         for (i = 0; i <= nfrags; i++) {
1563                 TX_DESC(txring, fill+i) =
1564                         XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1565                 TX_DESC_INFO(txring, fill+i).dma = map[i];
1566         }
1567
1568         /* We have to add an even number of 8-byte entries to the ring
1569          * even if the last one is unused. That means always an odd number
1570          * of pointers + one mactx descriptor.
1571          */
1572         if (nfrags & 1)
1573                 nfrags++;
1574
1575         txring->next_to_fill = (fill + nfrags + 1) & (TX_RING_SIZE-1);
1576
1577         dev->stats.tx_packets++;
1578         dev->stats.tx_bytes += skb->len;
1579
1580         spin_unlock_irqrestore(&txring->lock, flags);
1581
1582         write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1583
1584         return NETDEV_TX_OK;
1585
1586 out_err:
1587         spin_unlock_irqrestore(&txring->lock, flags);
1588 out_err_nolock:
1589         while (nfrags--)
1590                 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1591                                  PCI_DMA_TODEVICE);
1592
1593         return NETDEV_TX_BUSY;
1594 }
1595
1596 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1597 {
1598         const struct pasemi_mac *mac = netdev_priv(dev);
1599         unsigned int flags;
1600
1601         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1602
1603         /* Set promiscuous */
1604         if (dev->flags & IFF_PROMISC)
1605                 flags |= PAS_MAC_CFG_PCFG_PR;
1606         else
1607                 flags &= ~PAS_MAC_CFG_PCFG_PR;
1608
1609         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1610 }
1611
1612
1613 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1614 {
1615         struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1616         int pkts;
1617
1618         pasemi_mac_clean_tx(tx_ring(mac));
1619         pkts = pasemi_mac_clean_rx(rx_ring(mac), budget);
1620         if (pkts < budget) {
1621                 /* all done, no more packets present */
1622                 napi_complete(napi);
1623
1624                 pasemi_mac_restart_rx_intr(mac);
1625                 pasemi_mac_restart_tx_intr(mac);
1626         }
1627         return pkts;
1628 }
1629
1630 #ifdef CONFIG_NET_POLL_CONTROLLER
1631 /*
1632  * Polling 'interrupt' - used by things like netconsole to send skbs
1633  * without having to re-enable interrupts. It's not called while
1634  * the interrupt routine is executing.
1635  */
1636 static void pasemi_mac_netpoll(struct net_device *dev)
1637 {
1638         const struct pasemi_mac *mac = netdev_priv(dev);
1639
1640         disable_irq(mac->tx->chan.irq);
1641         pasemi_mac_tx_intr(mac->tx->chan.irq, mac->tx);
1642         enable_irq(mac->tx->chan.irq);
1643
1644         disable_irq(mac->rx->chan.irq);
1645         pasemi_mac_rx_intr(mac->rx->chan.irq, mac->rx);
1646         enable_irq(mac->rx->chan.irq);
1647 }
1648 #endif
1649
1650 static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu)
1651 {
1652         struct pasemi_mac *mac = netdev_priv(dev);
1653         unsigned int reg;
1654         unsigned int rcmdsta = 0;
1655         int running;
1656         int ret = 0;
1657
1658         if (new_mtu < PE_MIN_MTU || new_mtu > PE_MAX_MTU)
1659                 return -EINVAL;
1660
1661         running = netif_running(dev);
1662
1663         if (running) {
1664                 /* Need to stop the interface, clean out all already
1665                  * received buffers, free all unused buffers on the RX
1666                  * interface ring, then finally re-fill the rx ring with
1667                  * the new-size buffers and restart.
1668                  */
1669
1670                 napi_disable(&mac->napi);
1671                 netif_tx_disable(dev);
1672                 pasemi_mac_intf_disable(mac);
1673
1674                 rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1675                 pasemi_mac_pause_rxint(mac);
1676                 pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1677                 pasemi_mac_free_rx_buffers(mac);
1678
1679         }
1680
1681         /* Setup checksum channels if large MTU and none already allocated */
1682         if (new_mtu > 1500 && !mac->num_cs) {
1683                 pasemi_mac_setup_csrings(mac);
1684                 if (!mac->num_cs) {
1685                         ret = -ENOMEM;
1686                         goto out;
1687                 }
1688         }
1689
1690         /* Change maxf, i.e. what size frames are accepted.
1691          * Need room for ethernet header and CRC word
1692          */
1693         reg = read_mac_reg(mac, PAS_MAC_CFG_MACCFG);
1694         reg &= ~PAS_MAC_CFG_MACCFG_MAXF_M;
1695         reg |= PAS_MAC_CFG_MACCFG_MAXF(new_mtu + ETH_HLEN + 4);
1696         write_mac_reg(mac, PAS_MAC_CFG_MACCFG, reg);
1697
1698         dev->mtu = new_mtu;
1699         /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1700         mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1701
1702 out:
1703         if (running) {
1704                 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1705                               rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN);
1706
1707                 rx_ring(mac)->next_to_fill = 0;
1708                 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE-1);
1709
1710                 napi_enable(&mac->napi);
1711                 netif_start_queue(dev);
1712                 pasemi_mac_intf_enable(mac);
1713         }
1714
1715         return ret;
1716 }
1717
1718 static const struct net_device_ops pasemi_netdev_ops = {
1719         .ndo_open               = pasemi_mac_open,
1720         .ndo_stop               = pasemi_mac_close,
1721         .ndo_start_xmit         = pasemi_mac_start_tx,
1722         .ndo_set_rx_mode        = pasemi_mac_set_rx_mode,
1723         .ndo_set_mac_address    = pasemi_mac_set_mac_addr,
1724         .ndo_change_mtu         = pasemi_mac_change_mtu,
1725         .ndo_validate_addr      = eth_validate_addr,
1726 #ifdef CONFIG_NET_POLL_CONTROLLER
1727         .ndo_poll_controller    = pasemi_mac_netpoll,
1728 #endif
1729 };
1730
1731 static int
1732 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1733 {
1734         struct net_device *dev;
1735         struct pasemi_mac *mac;
1736         int err, ret;
1737
1738         err = pci_enable_device(pdev);
1739         if (err)
1740                 return err;
1741
1742         dev = alloc_etherdev(sizeof(struct pasemi_mac));
1743         if (dev == NULL) {
1744                 err = -ENOMEM;
1745                 goto out_disable_device;
1746         }
1747
1748         pci_set_drvdata(pdev, dev);
1749         SET_NETDEV_DEV(dev, &pdev->dev);
1750
1751         mac = netdev_priv(dev);
1752
1753         mac->pdev = pdev;
1754         mac->netdev = dev;
1755
1756         netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1757
1758         dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG |
1759                         NETIF_F_HIGHDMA | NETIF_F_GSO;
1760
1761         mac->lro_mgr.max_aggr = LRO_MAX_AGGR;
1762         mac->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1763         mac->lro_mgr.lro_arr = mac->lro_desc;
1764         mac->lro_mgr.get_skb_header = get_skb_hdr;
1765         mac->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1766         mac->lro_mgr.dev = mac->netdev;
1767         mac->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1768         mac->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1769
1770
1771         mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1772         if (!mac->dma_pdev) {
1773                 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1774                 err = -ENODEV;
1775                 goto out;
1776         }
1777
1778         mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1779         if (!mac->iob_pdev) {
1780                 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1781                 err = -ENODEV;
1782                 goto out;
1783         }
1784
1785         /* get mac addr from device tree */
1786         if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1787                 err = -ENODEV;
1788                 goto out;
1789         }
1790         memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1791
1792         ret = mac_to_intf(mac);
1793         if (ret < 0) {
1794                 dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1795                 err = -ENODEV;
1796                 goto out;
1797         }
1798         mac->dma_if = ret;
1799
1800         switch (pdev->device) {
1801         case 0xa005:
1802                 mac->type = MAC_TYPE_GMAC;
1803                 break;
1804         case 0xa006:
1805                 mac->type = MAC_TYPE_XAUI;
1806                 break;
1807         default:
1808                 err = -ENODEV;
1809                 goto out;
1810         }
1811
1812         dev->netdev_ops = &pasemi_netdev_ops;
1813         dev->mtu = PE_DEF_MTU;
1814         /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1815         mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1816
1817         dev->ethtool_ops = &pasemi_mac_ethtool_ops;
1818
1819         if (err)
1820                 goto out;
1821
1822         mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1823
1824         /* Enable most messages by default */
1825         mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1826
1827         err = register_netdev(dev);
1828
1829         if (err) {
1830                 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1831                         err);
1832                 goto out;
1833         } else if (netif_msg_probe(mac)) {
1834                 printk(KERN_INFO "%s: PA Semi %s: intf %d, hw addr %pM\n",
1835                        dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1836                        mac->dma_if, dev->dev_addr);
1837         }
1838
1839         return err;
1840
1841 out:
1842         if (mac->iob_pdev)
1843                 pci_dev_put(mac->iob_pdev);
1844         if (mac->dma_pdev)
1845                 pci_dev_put(mac->dma_pdev);
1846
1847         free_netdev(dev);
1848 out_disable_device:
1849         pci_disable_device(pdev);
1850         return err;
1851
1852 }
1853
1854 static void pasemi_mac_remove(struct pci_dev *pdev)
1855 {
1856         struct net_device *netdev = pci_get_drvdata(pdev);
1857         struct pasemi_mac *mac;
1858
1859         if (!netdev)
1860                 return;
1861
1862         mac = netdev_priv(netdev);
1863
1864         unregister_netdev(netdev);
1865
1866         pci_disable_device(pdev);
1867         pci_dev_put(mac->dma_pdev);
1868         pci_dev_put(mac->iob_pdev);
1869
1870         pasemi_dma_free_chan(&mac->tx->chan);
1871         pasemi_dma_free_chan(&mac->rx->chan);
1872
1873         pci_set_drvdata(pdev, NULL);
1874         free_netdev(netdev);
1875 }
1876
1877 static DEFINE_PCI_DEVICE_TABLE(pasemi_mac_pci_tbl) = {
1878         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1879         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1880         { },
1881 };
1882
1883 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1884
1885 static struct pci_driver pasemi_mac_driver = {
1886         .name           = "pasemi_mac",
1887         .id_table       = pasemi_mac_pci_tbl,
1888         .probe          = pasemi_mac_probe,
1889         .remove         = pasemi_mac_remove,
1890 };
1891
1892 static void __exit pasemi_mac_cleanup_module(void)
1893 {
1894         pci_unregister_driver(&pasemi_mac_driver);
1895 }
1896
1897 int pasemi_mac_init_module(void)
1898 {
1899         int err;
1900
1901         err = pasemi_dma_init();
1902         if (err)
1903                 return err;
1904
1905         return pci_register_driver(&pasemi_mac_driver);
1906 }
1907
1908 module_init(pasemi_mac_init_module);
1909 module_exit(pasemi_mac_cleanup_module);