1 /* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
9 #include <linux/types.h>
10 #include <asm/byteorder.h>
11 #include <asm/param.h>
12 #include <linux/delay.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/etherdevice.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/slab.h>
20 #include <linux/stddef.h>
21 #include <linux/string.h>
22 #include <linux/version.h>
23 #include <linux/workqueue.h>
24 #include <linux/bitops.h>
25 #include <linux/bug.h>
27 #include <linux/qed/qed_chain.h>
29 #include "qed_dev_api.h"
30 #include <linux/qed/qed_eth_if.h>
34 #include "qed_reg_addr.h"
40 QED_RSS_IPV4_TCP = 0x4,
41 QED_RSS_IPV6_TCP = 0x8,
42 QED_RSS_IPV4_UDP = 0x10,
43 QED_RSS_IPV6_UDP = 0x20,
46 /* Should be the same as ETH_RSS_IND_TABLE_ENTRIES_NUM */
47 #define QED_RSS_IND_TABLE_SIZE 128
48 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */
50 struct qed_rss_params {
54 u8 update_rss_capabilities;
55 u8 update_rss_ind_table;
58 u8 rss_table_size_log;
59 u16 rss_ind_table[QED_RSS_IND_TABLE_SIZE];
60 u32 rss_key[QED_RSS_KEY_SIZE];
63 enum qed_filter_opcode {
67 QED_FILTER_REPLACE, /* Delete all MACs and add new one instead */
68 QED_FILTER_FLUSH, /* Removes all filters */
71 enum qed_filter_ucast_type {
76 QED_FILTER_INNER_VLAN,
77 QED_FILTER_INNER_PAIR,
78 QED_FILTER_INNER_MAC_VNI_PAIR,
79 QED_FILTER_MAC_VNI_PAIR,
83 struct qed_filter_ucast {
84 enum qed_filter_opcode opcode;
85 enum qed_filter_ucast_type type;
89 u8 vport_to_remove_from;
90 unsigned char mac[ETH_ALEN];
96 struct qed_filter_mcast {
97 /* MOVE is not supported for multicast */
98 enum qed_filter_opcode opcode;
100 u8 vport_to_remove_from;
102 #define QED_MAX_MC_ADDRS 64
103 unsigned char mac[QED_MAX_MC_ADDRS][ETH_ALEN];
106 struct qed_filter_accept_flags {
107 u8 update_rx_mode_config;
108 u8 update_tx_mode_config;
111 #define QED_ACCEPT_NONE 0x01
112 #define QED_ACCEPT_UCAST_MATCHED 0x02
113 #define QED_ACCEPT_UCAST_UNMATCHED 0x04
114 #define QED_ACCEPT_MCAST_MATCHED 0x08
115 #define QED_ACCEPT_MCAST_UNMATCHED 0x10
116 #define QED_ACCEPT_BCAST 0x20
119 struct qed_sp_vport_update_params {
122 u8 update_vport_active_rx_flg;
123 u8 vport_active_rx_flg;
124 u8 update_vport_active_tx_flg;
125 u8 vport_active_tx_flg;
126 u8 update_approx_mcast_flg;
127 unsigned long bins[8];
128 struct qed_rss_params *rss_params;
129 struct qed_filter_accept_flags accept_flags;
132 #define QED_MAX_SGES_NUM 16
133 #define CRC32_POLY 0x1edc6f41
135 static int qed_sp_vport_start(struct qed_hwfn *p_hwfn,
141 u8 inner_vlan_removal_en_flg)
143 struct qed_sp_init_request_params params;
144 struct vport_start_ramrod_data *p_ramrod = NULL;
145 struct qed_spq_entry *p_ent = NULL;
150 rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id);
154 memset(¶ms, 0, sizeof(params));
155 params.ramrod_data_size = sizeof(*p_ramrod);
156 params.comp_mode = QED_SPQ_MODE_EBLOCK;
158 rc = qed_sp_init_request(p_hwfn, &p_ent,
159 qed_spq_get_cid(p_hwfn),
161 ETH_RAMROD_VPORT_START,
167 p_ramrod = &p_ent->ramrod.vport_start;
168 p_ramrod->vport_id = abs_vport_id;
170 p_ramrod->mtu = cpu_to_le16(mtu);
171 p_ramrod->inner_vlan_removal_en = inner_vlan_removal_en_flg;
172 p_ramrod->drop_ttl0_en = drop_ttl0_flg;
174 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1);
175 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1);
177 p_ramrod->rx_mode.state = cpu_to_le16(rx_mode);
179 /* TPA related fields */
180 memset(&p_ramrod->tpa_param, 0,
181 sizeof(struct eth_vport_tpa_param));
183 /* Software Function ID in hwfn (PFs are 0 - 15, VFs are 16 - 135) */
184 p_ramrod->sw_fid = qed_concrete_to_sw_fid(p_hwfn->cdev,
187 return qed_spq_post(p_hwfn, p_ent, NULL);
191 qed_sp_vport_update_rss(struct qed_hwfn *p_hwfn,
192 struct vport_update_ramrod_data *p_ramrod,
193 struct qed_rss_params *p_params)
195 struct eth_vport_rss_config *rss = &p_ramrod->rss_config;
196 u16 abs_l2_queue = 0, capabilities = 0;
200 p_ramrod->common.update_rss_flg = 0;
204 BUILD_BUG_ON(QED_RSS_IND_TABLE_SIZE !=
205 ETH_RSS_IND_TABLE_ENTRIES_NUM);
207 rc = qed_fw_rss_eng(p_hwfn, p_params->rss_eng_id, &rss->rss_id);
211 p_ramrod->common.update_rss_flg = p_params->update_rss_config;
212 rss->update_rss_capabilities = p_params->update_rss_capabilities;
213 rss->update_rss_ind_table = p_params->update_rss_ind_table;
214 rss->update_rss_key = p_params->update_rss_key;
216 rss->rss_mode = p_params->rss_enable ?
217 ETH_VPORT_RSS_MODE_REGULAR :
218 ETH_VPORT_RSS_MODE_DISABLED;
220 SET_FIELD(capabilities,
221 ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY,
222 !!(p_params->rss_caps & QED_RSS_IPV4));
223 SET_FIELD(capabilities,
224 ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY,
225 !!(p_params->rss_caps & QED_RSS_IPV6));
226 SET_FIELD(capabilities,
227 ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY,
228 !!(p_params->rss_caps & QED_RSS_IPV4_TCP));
229 SET_FIELD(capabilities,
230 ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY,
231 !!(p_params->rss_caps & QED_RSS_IPV6_TCP));
232 SET_FIELD(capabilities,
233 ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY,
234 !!(p_params->rss_caps & QED_RSS_IPV4_UDP));
235 SET_FIELD(capabilities,
236 ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY,
237 !!(p_params->rss_caps & QED_RSS_IPV6_UDP));
238 rss->tbl_size = p_params->rss_table_size_log;
240 rss->capabilities = cpu_to_le16(capabilities);
242 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP,
243 "update rss flag %d, rss_mode = %d, update_caps = %d, capabilities = %d, update_ind = %d, update_rss_key = %d\n",
244 p_ramrod->common.update_rss_flg,
245 rss->rss_mode, rss->update_rss_capabilities,
246 capabilities, rss->update_rss_ind_table,
247 rss->update_rss_key);
249 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
250 rc = qed_fw_l2_queue(p_hwfn,
251 (u8)p_params->rss_ind_table[i],
256 rss->indirection_table[i] = cpu_to_le16(abs_l2_queue);
257 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP, "i= %d, queue = %d\n",
258 i, rss->indirection_table[i]);
261 for (i = 0; i < 10; i++)
262 rss->rss_key[i] = cpu_to_le32(p_params->rss_key[i]);
268 qed_sp_update_accept_mode(struct qed_hwfn *p_hwfn,
269 struct vport_update_ramrod_data *p_ramrod,
270 struct qed_filter_accept_flags accept_flags)
272 p_ramrod->common.update_rx_mode_flg =
273 accept_flags.update_rx_mode_config;
275 p_ramrod->common.update_tx_mode_flg =
276 accept_flags.update_tx_mode_config;
278 /* Set Rx mode accept flags */
279 if (p_ramrod->common.update_rx_mode_flg) {
280 u8 accept_filter = accept_flags.rx_accept_filter;
283 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL,
284 !(!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) ||
285 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)));
287 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED,
288 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED));
290 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL,
291 !(!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) ||
292 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
294 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL,
295 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
296 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
298 SET_FIELD(state, ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL,
299 !!(accept_filter & QED_ACCEPT_BCAST));
301 p_ramrod->rx_mode.state = cpu_to_le16(state);
302 DP_VERBOSE(p_hwfn, QED_MSG_SP,
303 "p_ramrod->rx_mode.state = 0x%x\n", state);
306 /* Set Tx mode accept flags */
307 if (p_ramrod->common.update_tx_mode_flg) {
308 u8 accept_filter = accept_flags.tx_accept_filter;
311 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL,
312 !!(accept_filter & QED_ACCEPT_NONE));
314 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_ACCEPT_ALL,
315 (!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) &&
316 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)));
318 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL,
319 !!(accept_filter & QED_ACCEPT_NONE));
321 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL,
322 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
323 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
325 SET_FIELD(state, ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL,
326 !!(accept_filter & QED_ACCEPT_BCAST));
328 p_ramrod->tx_mode.state = cpu_to_le16(state);
329 DP_VERBOSE(p_hwfn, QED_MSG_SP,
330 "p_ramrod->tx_mode.state = 0x%x\n", state);
335 qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn,
336 struct vport_update_ramrod_data *p_ramrod,
337 struct qed_sp_vport_update_params *p_params)
341 memset(&p_ramrod->approx_mcast.bins, 0,
342 sizeof(p_ramrod->approx_mcast.bins));
344 if (p_params->update_approx_mcast_flg) {
345 p_ramrod->common.update_approx_mcast_flg = 1;
346 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
347 u32 *p_bins = (u32 *)p_params->bins;
348 __le32 val = cpu_to_le32(p_bins[i]);
350 p_ramrod->approx_mcast.bins[i] = val;
356 qed_sp_vport_update(struct qed_hwfn *p_hwfn,
357 struct qed_sp_vport_update_params *p_params,
358 enum spq_mode comp_mode,
359 struct qed_spq_comp_cb *p_comp_data)
361 struct qed_rss_params *p_rss_params = p_params->rss_params;
362 struct vport_update_ramrod_data_cmn *p_cmn;
363 struct qed_sp_init_request_params sp_params;
364 struct vport_update_ramrod_data *p_ramrod = NULL;
365 struct qed_spq_entry *p_ent = NULL;
369 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
373 memset(&sp_params, 0, sizeof(sp_params));
374 sp_params.ramrod_data_size = sizeof(*p_ramrod);
375 sp_params.comp_mode = comp_mode;
376 sp_params.p_comp_data = p_comp_data;
378 rc = qed_sp_init_request(p_hwfn, &p_ent,
379 qed_spq_get_cid(p_hwfn),
380 p_params->opaque_fid,
381 ETH_RAMROD_VPORT_UPDATE,
387 /* Copy input params to ramrod according to FW struct */
388 p_ramrod = &p_ent->ramrod.vport_update;
389 p_cmn = &p_ramrod->common;
391 p_cmn->vport_id = abs_vport_id;
392 p_cmn->rx_active_flg = p_params->vport_active_rx_flg;
393 p_cmn->update_rx_active_flg = p_params->update_vport_active_rx_flg;
394 p_cmn->tx_active_flg = p_params->vport_active_tx_flg;
395 p_cmn->update_tx_active_flg = p_params->update_vport_active_tx_flg;
397 rc = qed_sp_vport_update_rss(p_hwfn, p_ramrod, p_rss_params);
399 /* Return spq entry which is taken in qed_sp_init_request()*/
400 qed_spq_return_entry(p_hwfn, p_ent);
404 /* Update mcast bins for VFs, PF doesn't use this functionality */
405 qed_sp_update_mcast_bin(p_hwfn, p_ramrod, p_params);
407 qed_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags);
408 return qed_spq_post(p_hwfn, p_ent, NULL);
411 static int qed_sp_vport_stop(struct qed_hwfn *p_hwfn,
415 struct qed_sp_init_request_params sp_params;
416 struct vport_stop_ramrod_data *p_ramrod;
417 struct qed_spq_entry *p_ent;
421 rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id);
425 memset(&sp_params, 0, sizeof(sp_params));
426 sp_params.ramrod_data_size = sizeof(*p_ramrod);
427 sp_params.comp_mode = QED_SPQ_MODE_EBLOCK;
429 rc = qed_sp_init_request(p_hwfn, &p_ent,
430 qed_spq_get_cid(p_hwfn),
432 ETH_RAMROD_VPORT_STOP,
438 p_ramrod = &p_ent->ramrod.vport_stop;
439 p_ramrod->vport_id = abs_vport_id;
441 return qed_spq_post(p_hwfn, p_ent, NULL);
444 static int qed_filter_accept_cmd(struct qed_dev *cdev,
446 struct qed_filter_accept_flags accept_flags,
447 enum spq_mode comp_mode,
448 struct qed_spq_comp_cb *p_comp_data)
450 struct qed_sp_vport_update_params vport_update_params;
453 /* Prepare and send the vport rx_mode change */
454 memset(&vport_update_params, 0, sizeof(vport_update_params));
455 vport_update_params.vport_id = vport;
456 vport_update_params.accept_flags = accept_flags;
458 for_each_hwfn(cdev, i) {
459 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
461 vport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
463 rc = qed_sp_vport_update(p_hwfn, &vport_update_params,
464 comp_mode, p_comp_data);
466 DP_ERR(cdev, "Update rx_mode failed %d\n", rc);
470 DP_VERBOSE(p_hwfn, QED_MSG_SP,
471 "Accept filter configured, flags = [Rx]%x [Tx]%x\n",
472 accept_flags.rx_accept_filter,
473 accept_flags.tx_accept_filter);
479 static int qed_sp_release_queue_cid(
480 struct qed_hwfn *p_hwfn,
481 struct qed_hw_cid_data *p_cid_data)
483 if (!p_cid_data->b_cid_allocated)
486 qed_cxt_release_cid(p_hwfn, p_cid_data->cid);
488 p_cid_data->b_cid_allocated = false;
494 qed_sp_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn,
497 struct qed_queue_start_common_params *params,
500 dma_addr_t bd_chain_phys_addr,
501 dma_addr_t cqe_pbl_addr,
504 struct rx_queue_start_ramrod_data *p_ramrod = NULL;
505 struct qed_sp_init_request_params sp_params;
506 struct qed_spq_entry *p_ent = NULL;
507 struct qed_hw_cid_data *p_rx_cid;
512 /* Store information for the stop */
513 p_rx_cid = &p_hwfn->p_rx_cids[params->queue_id];
515 p_rx_cid->opaque_fid = opaque_fid;
516 p_rx_cid->vport_id = params->vport_id;
518 rc = qed_fw_vport(p_hwfn, params->vport_id, &abs_vport_id);
522 rc = qed_fw_l2_queue(p_hwfn, params->queue_id, &abs_rx_q_id);
526 DP_VERBOSE(p_hwfn, QED_MSG_SP,
527 "opaque_fid=0x%x, cid=0x%x, rx_qid=0x%x, vport_id=0x%x, sb_id=0x%x\n",
528 opaque_fid, cid, params->queue_id, params->vport_id,
531 memset(&sp_params, 0, sizeof(params));
532 sp_params.comp_mode = QED_SPQ_MODE_EBLOCK;
533 sp_params.ramrod_data_size = sizeof(*p_ramrod);
535 rc = qed_sp_init_request(p_hwfn, &p_ent,
537 ETH_RAMROD_RX_QUEUE_START,
543 p_ramrod = &p_ent->ramrod.rx_queue_start;
545 p_ramrod->sb_id = cpu_to_le16(params->sb);
546 p_ramrod->sb_index = params->sb_idx;
547 p_ramrod->vport_id = abs_vport_id;
548 p_ramrod->stats_counter_id = stats_id;
549 p_ramrod->rx_queue_id = cpu_to_le16(abs_rx_q_id);
550 p_ramrod->complete_cqe_flg = 0;
551 p_ramrod->complete_event_flg = 1;
553 p_ramrod->bd_max_bytes = cpu_to_le16(bd_max_bytes);
554 p_ramrod->bd_base.hi = DMA_HI_LE(bd_chain_phys_addr);
555 p_ramrod->bd_base.lo = DMA_LO_LE(bd_chain_phys_addr);
557 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
558 p_ramrod->cqe_pbl_addr.hi = DMA_HI_LE(cqe_pbl_addr);
559 p_ramrod->cqe_pbl_addr.lo = DMA_LO_LE(cqe_pbl_addr);
561 rc = qed_spq_post(p_hwfn, p_ent, NULL);
567 qed_sp_eth_rx_queue_start(struct qed_hwfn *p_hwfn,
569 struct qed_queue_start_common_params *params,
571 dma_addr_t bd_chain_phys_addr,
572 dma_addr_t cqe_pbl_addr,
574 void __iomem **pp_prod)
576 struct qed_hw_cid_data *p_rx_cid;
577 u64 init_prod_val = 0;
578 u16 abs_l2_queue = 0;
582 rc = qed_fw_l2_queue(p_hwfn, params->queue_id, &abs_l2_queue);
586 rc = qed_fw_vport(p_hwfn, params->vport_id, &abs_stats_id);
590 *pp_prod = (u8 __iomem *)p_hwfn->regview +
591 GTT_BAR0_MAP_REG_MSDM_RAM +
592 MSTORM_PRODS_OFFSET(abs_l2_queue);
594 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
595 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u64),
596 (u32 *)(&init_prod_val));
598 /* Allocate a CID for the queue */
599 p_rx_cid = &p_hwfn->p_rx_cids[params->queue_id];
600 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH,
603 DP_NOTICE(p_hwfn, "Failed to acquire cid\n");
606 p_rx_cid->b_cid_allocated = true;
608 rc = qed_sp_eth_rxq_start_ramrod(p_hwfn,
619 qed_sp_release_queue_cid(p_hwfn, p_rx_cid);
624 static int qed_sp_eth_rx_queue_stop(struct qed_hwfn *p_hwfn,
626 bool eq_completion_only,
629 struct qed_hw_cid_data *p_rx_cid = &p_hwfn->p_rx_cids[rx_queue_id];
630 struct rx_queue_stop_ramrod_data *p_ramrod = NULL;
631 struct qed_sp_init_request_params sp_params;
632 struct qed_spq_entry *p_ent = NULL;
636 memset(&sp_params, 0, sizeof(sp_params));
637 sp_params.ramrod_data_size = sizeof(*p_ramrod);
638 sp_params.comp_mode = QED_SPQ_MODE_EBLOCK;
640 rc = qed_sp_init_request(p_hwfn, &p_ent,
642 p_rx_cid->opaque_fid,
643 ETH_RAMROD_RX_QUEUE_STOP,
649 p_ramrod = &p_ent->ramrod.rx_queue_stop;
651 qed_fw_vport(p_hwfn, p_rx_cid->vport_id, &p_ramrod->vport_id);
652 qed_fw_l2_queue(p_hwfn, rx_queue_id, &abs_rx_q_id);
653 p_ramrod->rx_queue_id = cpu_to_le16(abs_rx_q_id);
655 /* Cleaning the queue requires the completion to arrive there.
656 * In addition, VFs require the answer to come as eqe to PF.
658 p_ramrod->complete_cqe_flg =
659 (!!(p_rx_cid->opaque_fid == p_hwfn->hw_info.opaque_fid) &&
660 !eq_completion_only) || cqe_completion;
661 p_ramrod->complete_event_flg =
662 !(p_rx_cid->opaque_fid == p_hwfn->hw_info.opaque_fid) ||
665 rc = qed_spq_post(p_hwfn, p_ent, NULL);
669 return qed_sp_release_queue_cid(p_hwfn, p_rx_cid);
673 qed_sp_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn,
676 struct qed_queue_start_common_params *p_params,
680 union qed_qm_pq_params *p_pq_params)
682 struct tx_queue_start_ramrod_data *p_ramrod = NULL;
683 struct qed_sp_init_request_params sp_params;
684 struct qed_spq_entry *p_ent = NULL;
685 struct qed_hw_cid_data *p_tx_cid;
690 /* Store information for the stop */
691 p_tx_cid = &p_hwfn->p_tx_cids[p_params->queue_id];
693 p_tx_cid->opaque_fid = opaque_fid;
695 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
699 memset(&sp_params, 0, sizeof(sp_params));
700 sp_params.ramrod_data_size = sizeof(*p_ramrod);
701 sp_params.comp_mode = QED_SPQ_MODE_EBLOCK;
703 rc = qed_sp_init_request(p_hwfn, &p_ent, cid,
705 ETH_RAMROD_TX_QUEUE_START,
711 p_ramrod = &p_ent->ramrod.tx_queue_start;
712 p_ramrod->vport_id = abs_vport_id;
714 p_ramrod->sb_id = cpu_to_le16(p_params->sb);
715 p_ramrod->sb_index = p_params->sb_idx;
716 p_ramrod->stats_counter_id = stats_id;
717 p_ramrod->tc = p_pq_params->eth.tc;
719 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
720 p_ramrod->pbl_base_addr.hi = DMA_HI_LE(pbl_addr);
721 p_ramrod->pbl_base_addr.lo = DMA_LO_LE(pbl_addr);
723 pq_id = qed_get_qm_pq(p_hwfn,
726 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
728 return qed_spq_post(p_hwfn, p_ent, NULL);
732 qed_sp_eth_tx_queue_start(struct qed_hwfn *p_hwfn,
734 struct qed_queue_start_common_params *p_params,
737 void __iomem **pp_doorbell)
739 struct qed_hw_cid_data *p_tx_cid;
740 union qed_qm_pq_params pq_params;
744 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_stats_id);
748 p_tx_cid = &p_hwfn->p_tx_cids[p_params->queue_id];
749 memset(p_tx_cid, 0, sizeof(*p_tx_cid));
750 memset(&pq_params, 0, sizeof(pq_params));
752 /* Allocate a CID for the queue */
753 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH,
756 DP_NOTICE(p_hwfn, "Failed to acquire cid\n");
759 p_tx_cid->b_cid_allocated = true;
761 DP_VERBOSE(p_hwfn, QED_MSG_SP,
762 "opaque_fid=0x%x, cid=0x%x, tx_qid=0x%x, vport_id=0x%x, sb_id=0x%x\n",
763 opaque_fid, p_tx_cid->cid,
764 p_params->queue_id, p_params->vport_id, p_params->sb);
766 rc = qed_sp_eth_txq_start_ramrod(p_hwfn,
775 *pp_doorbell = (u8 __iomem *)p_hwfn->doorbells +
776 qed_db_addr(p_tx_cid->cid, DQ_DEMS_LEGACY);
779 qed_sp_release_queue_cid(p_hwfn, p_tx_cid);
784 static int qed_sp_eth_tx_queue_stop(struct qed_hwfn *p_hwfn,
787 struct qed_hw_cid_data *p_tx_cid = &p_hwfn->p_tx_cids[tx_queue_id];
788 struct qed_sp_init_request_params sp_params;
789 struct qed_spq_entry *p_ent = NULL;
792 memset(&sp_params, 0, sizeof(sp_params));
793 sp_params.ramrod_data_size = sizeof(struct tx_queue_stop_ramrod_data);
794 sp_params.comp_mode = QED_SPQ_MODE_EBLOCK;
796 rc = qed_sp_init_request(p_hwfn, &p_ent,
798 p_tx_cid->opaque_fid,
799 ETH_RAMROD_TX_QUEUE_STOP,
805 rc = qed_spq_post(p_hwfn, p_ent, NULL);
809 return qed_sp_release_queue_cid(p_hwfn, p_tx_cid);
812 static enum eth_filter_action
813 qed_filter_action(enum qed_filter_opcode opcode)
815 enum eth_filter_action action = MAX_ETH_FILTER_ACTION;
819 action = ETH_FILTER_ACTION_ADD;
821 case QED_FILTER_REMOVE:
822 action = ETH_FILTER_ACTION_REMOVE;
824 case QED_FILTER_REPLACE:
825 case QED_FILTER_FLUSH:
826 action = ETH_FILTER_ACTION_REPLACE;
829 action = MAX_ETH_FILTER_ACTION;
835 static void qed_set_fw_mac_addr(__le16 *fw_msb,
840 ((u8 *)fw_msb)[0] = mac[1];
841 ((u8 *)fw_msb)[1] = mac[0];
842 ((u8 *)fw_mid)[0] = mac[3];
843 ((u8 *)fw_mid)[1] = mac[2];
844 ((u8 *)fw_lsb)[0] = mac[5];
845 ((u8 *)fw_lsb)[1] = mac[4];
849 qed_filter_ucast_common(struct qed_hwfn *p_hwfn,
851 struct qed_filter_ucast *p_filter_cmd,
852 struct vport_filter_update_ramrod_data **pp_ramrod,
853 struct qed_spq_entry **pp_ent,
854 enum spq_mode comp_mode,
855 struct qed_spq_comp_cb *p_comp_data)
857 u8 vport_to_add_to = 0, vport_to_remove_from = 0;
858 struct vport_filter_update_ramrod_data *p_ramrod;
859 struct qed_sp_init_request_params sp_params;
860 struct eth_filter_cmd *p_first_filter;
861 struct eth_filter_cmd *p_second_filter;
862 enum eth_filter_action action;
865 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
866 &vport_to_remove_from);
870 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
875 memset(&sp_params, 0, sizeof(sp_params));
876 sp_params.ramrod_data_size = sizeof(**pp_ramrod);
877 sp_params.comp_mode = comp_mode;
878 sp_params.p_comp_data = p_comp_data;
880 rc = qed_sp_init_request(p_hwfn, pp_ent,
881 qed_spq_get_cid(p_hwfn),
883 ETH_RAMROD_FILTERS_UPDATE,
889 *pp_ramrod = &(*pp_ent)->ramrod.vport_filter_update;
890 p_ramrod = *pp_ramrod;
891 p_ramrod->filter_cmd_hdr.rx = p_filter_cmd->is_rx_filter ? 1 : 0;
892 p_ramrod->filter_cmd_hdr.tx = p_filter_cmd->is_tx_filter ? 1 : 0;
894 switch (p_filter_cmd->opcode) {
895 case QED_FILTER_FLUSH:
896 p_ramrod->filter_cmd_hdr.cmd_cnt = 0; break;
897 case QED_FILTER_MOVE:
898 p_ramrod->filter_cmd_hdr.cmd_cnt = 2; break;
900 p_ramrod->filter_cmd_hdr.cmd_cnt = 1; break;
903 p_first_filter = &p_ramrod->filter_cmds[0];
904 p_second_filter = &p_ramrod->filter_cmds[1];
906 switch (p_filter_cmd->type) {
908 p_first_filter->type = ETH_FILTER_TYPE_MAC; break;
909 case QED_FILTER_VLAN:
910 p_first_filter->type = ETH_FILTER_TYPE_VLAN; break;
911 case QED_FILTER_MAC_VLAN:
912 p_first_filter->type = ETH_FILTER_TYPE_PAIR; break;
913 case QED_FILTER_INNER_MAC:
914 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC; break;
915 case QED_FILTER_INNER_VLAN:
916 p_first_filter->type = ETH_FILTER_TYPE_INNER_VLAN; break;
917 case QED_FILTER_INNER_PAIR:
918 p_first_filter->type = ETH_FILTER_TYPE_INNER_PAIR; break;
919 case QED_FILTER_INNER_MAC_VNI_PAIR:
920 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR;
922 case QED_FILTER_MAC_VNI_PAIR:
923 p_first_filter->type = ETH_FILTER_TYPE_MAC_VNI_PAIR; break;
925 p_first_filter->type = ETH_FILTER_TYPE_VNI; break;
928 if ((p_first_filter->type == ETH_FILTER_TYPE_MAC) ||
929 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
930 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC) ||
931 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR) ||
932 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
933 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR)) {
934 qed_set_fw_mac_addr(&p_first_filter->mac_msb,
935 &p_first_filter->mac_mid,
936 &p_first_filter->mac_lsb,
937 (u8 *)p_filter_cmd->mac);
940 if ((p_first_filter->type == ETH_FILTER_TYPE_VLAN) ||
941 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
942 (p_first_filter->type == ETH_FILTER_TYPE_INNER_VLAN) ||
943 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR))
944 p_first_filter->vlan_id = cpu_to_le16(p_filter_cmd->vlan);
946 if ((p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
947 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR) ||
948 (p_first_filter->type == ETH_FILTER_TYPE_VNI))
949 p_first_filter->vni = cpu_to_le32(p_filter_cmd->vni);
951 if (p_filter_cmd->opcode == QED_FILTER_MOVE) {
952 p_second_filter->type = p_first_filter->type;
953 p_second_filter->mac_msb = p_first_filter->mac_msb;
954 p_second_filter->mac_mid = p_first_filter->mac_mid;
955 p_second_filter->mac_lsb = p_first_filter->mac_lsb;
956 p_second_filter->vlan_id = p_first_filter->vlan_id;
957 p_second_filter->vni = p_first_filter->vni;
959 p_first_filter->action = ETH_FILTER_ACTION_REMOVE;
961 p_first_filter->vport_id = vport_to_remove_from;
963 p_second_filter->action = ETH_FILTER_ACTION_ADD;
964 p_second_filter->vport_id = vport_to_add_to;
966 action = qed_filter_action(p_filter_cmd->opcode);
968 if (action == MAX_ETH_FILTER_ACTION) {
970 "%d is not supported yet\n",
971 p_filter_cmd->opcode);
975 p_first_filter->action = action;
976 p_first_filter->vport_id = (p_filter_cmd->opcode ==
978 vport_to_remove_from :
985 static int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn,
987 struct qed_filter_ucast *p_filter_cmd,
988 enum spq_mode comp_mode,
989 struct qed_spq_comp_cb *p_comp_data)
991 struct vport_filter_update_ramrod_data *p_ramrod = NULL;
992 struct qed_spq_entry *p_ent = NULL;
993 struct eth_filter_cmd_header *p_header;
996 rc = qed_filter_ucast_common(p_hwfn, opaque_fid, p_filter_cmd,
998 comp_mode, p_comp_data);
1000 DP_ERR(p_hwfn, "Uni. filter command failed %d\n", rc);
1003 p_header = &p_ramrod->filter_cmd_hdr;
1004 p_header->assert_on_error = p_filter_cmd->assert_on_error;
1006 rc = qed_spq_post(p_hwfn, p_ent, NULL);
1009 "Unicast filter ADD command failed %d\n",
1014 DP_VERBOSE(p_hwfn, QED_MSG_SP,
1015 "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n",
1016 (p_filter_cmd->opcode == QED_FILTER_ADD) ? "ADD" :
1017 ((p_filter_cmd->opcode == QED_FILTER_REMOVE) ?
1019 ((p_filter_cmd->opcode == QED_FILTER_MOVE) ?
1020 "MOVE" : "REPLACE")),
1021 (p_filter_cmd->type == QED_FILTER_MAC) ? "MAC" :
1022 ((p_filter_cmd->type == QED_FILTER_VLAN) ?
1023 "VLAN" : "MAC & VLAN"),
1024 p_ramrod->filter_cmd_hdr.cmd_cnt,
1025 p_filter_cmd->is_rx_filter,
1026 p_filter_cmd->is_tx_filter);
1027 DP_VERBOSE(p_hwfn, QED_MSG_SP,
1028 "vport_to_add_to = %d, vport_to_remove_from = %d, mac = %2x:%2x:%2x:%2x:%2x:%2x, vlan = %d\n",
1029 p_filter_cmd->vport_to_add_to,
1030 p_filter_cmd->vport_to_remove_from,
1031 p_filter_cmd->mac[0],
1032 p_filter_cmd->mac[1],
1033 p_filter_cmd->mac[2],
1034 p_filter_cmd->mac[3],
1035 p_filter_cmd->mac[4],
1036 p_filter_cmd->mac[5],
1037 p_filter_cmd->vlan);
1042 /*******************************************************************************
1044 * Calculates crc 32 on a buffer
1045 * Note: crc32_length MUST be aligned to 8
1047 ******************************************************************************/
1048 static u32 qed_calc_crc32c(u8 *crc32_packet,
1056 u8 current_byte = 0;
1057 u32 crc32_result = crc32_seed;
1059 if ((!crc32_packet) ||
1060 (crc32_length == 0) ||
1061 ((crc32_length % 8) != 0))
1062 return crc32_result;
1063 for (byte = 0; byte < crc32_length; byte++) {
1064 current_byte = crc32_packet[byte];
1065 for (bit = 0; bit < 8; bit++) {
1066 msb = (u8)(crc32_result >> 31);
1067 crc32_result = crc32_result << 1;
1068 if (msb != (0x1 & (current_byte >> bit))) {
1069 crc32_result = crc32_result ^ CRC32_POLY;
1070 crc32_result |= 1; /*crc32_result[0] = 1;*/
1074 return crc32_result;
1077 static inline u32 qed_crc32c_le(u32 seed,
1081 u32 packet_buf[2] = { 0 };
1083 memcpy((u8 *)(&packet_buf[0]), &mac[0], 6);
1084 return qed_calc_crc32c((u8 *)packet_buf, 8, seed, 0);
1087 static u8 qed_mcast_bin_from_mac(u8 *mac)
1089 u32 crc = qed_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED,
1096 qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn,
1098 struct qed_filter_mcast *p_filter_cmd,
1099 enum spq_mode comp_mode,
1100 struct qed_spq_comp_cb *p_comp_data)
1102 unsigned long bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
1103 struct vport_update_ramrod_data *p_ramrod = NULL;
1104 struct qed_sp_init_request_params sp_params;
1105 struct qed_spq_entry *p_ent = NULL;
1106 u8 abs_vport_id = 0;
1109 if (p_filter_cmd->opcode == QED_FILTER_ADD) {
1110 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
1115 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
1121 memset(&sp_params, 0, sizeof(sp_params));
1122 sp_params.ramrod_data_size = sizeof(*p_ramrod);
1123 sp_params.comp_mode = comp_mode;
1124 sp_params.p_comp_data = p_comp_data;
1126 rc = qed_sp_init_request(p_hwfn, &p_ent,
1127 qed_spq_get_cid(p_hwfn),
1128 p_hwfn->hw_info.opaque_fid,
1129 ETH_RAMROD_VPORT_UPDATE,
1134 DP_ERR(p_hwfn, "Multi-cast command failed %d\n", rc);
1138 p_ramrod = &p_ent->ramrod.vport_update;
1139 p_ramrod->common.update_approx_mcast_flg = 1;
1141 /* explicitly clear out the entire vector */
1142 memset(&p_ramrod->approx_mcast.bins, 0,
1143 sizeof(p_ramrod->approx_mcast.bins));
1144 memset(bins, 0, sizeof(unsigned long) *
1145 ETH_MULTICAST_MAC_BINS_IN_REGS);
1146 /* filter ADD op is explicit set op and it removes
1147 * any existing filters for the vport
1149 if (p_filter_cmd->opcode == QED_FILTER_ADD) {
1150 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1153 bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1154 __set_bit(bit, bins);
1157 /* Convert to correct endianity */
1158 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
1159 u32 *p_bins = (u32 *)bins;
1160 struct vport_update_ramrod_mcast *approx_mcast;
1162 approx_mcast = &p_ramrod->approx_mcast;
1163 approx_mcast->bins[i] = cpu_to_le32(p_bins[i]);
1167 p_ramrod->common.vport_id = abs_vport_id;
1169 return qed_spq_post(p_hwfn, p_ent, NULL);
1173 qed_filter_mcast_cmd(struct qed_dev *cdev,
1174 struct qed_filter_mcast *p_filter_cmd,
1175 enum spq_mode comp_mode,
1176 struct qed_spq_comp_cb *p_comp_data)
1181 /* only ADD and REMOVE operations are supported for multi-cast */
1182 if ((p_filter_cmd->opcode != QED_FILTER_ADD &&
1183 (p_filter_cmd->opcode != QED_FILTER_REMOVE)) ||
1184 (p_filter_cmd->num_mc_addrs > QED_MAX_MC_ADDRS))
1187 for_each_hwfn(cdev, i) {
1188 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1195 opaque_fid = p_hwfn->hw_info.opaque_fid;
1197 rc = qed_sp_eth_filter_mcast(p_hwfn,
1206 static int qed_filter_ucast_cmd(struct qed_dev *cdev,
1207 struct qed_filter_ucast *p_filter_cmd,
1208 enum spq_mode comp_mode,
1209 struct qed_spq_comp_cb *p_comp_data)
1214 for_each_hwfn(cdev, i) {
1215 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1221 opaque_fid = p_hwfn->hw_info.opaque_fid;
1223 rc = qed_sp_eth_filter_ucast(p_hwfn,
1233 static int qed_fill_eth_dev_info(struct qed_dev *cdev,
1234 struct qed_dev_eth_info *info)
1238 memset(info, 0, sizeof(*info));
1242 if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
1243 for_each_hwfn(cdev, i)
1244 info->num_queues += FEAT_NUM(&cdev->hwfns[i],
1246 if (cdev->int_params.fp_msix_cnt)
1247 info->num_queues = min_t(u8, info->num_queues,
1248 cdev->int_params.fp_msix_cnt);
1250 info->num_queues = cdev->num_hwfns;
1253 info->num_vlan_filters = RESC_NUM(&cdev->hwfns[0], QED_VLAN);
1254 ether_addr_copy(info->port_mac,
1255 cdev->hwfns[0].hw_info.hw_mac_addr);
1257 qed_fill_dev_info(cdev, &info->common);
1262 static void qed_register_eth_ops(struct qed_dev *cdev,
1263 struct qed_eth_cb_ops *ops,
1266 cdev->protocol_ops.eth = ops;
1267 cdev->ops_cookie = cookie;
1270 static int qed_start_vport(struct qed_dev *cdev,
1274 u8 inner_vlan_removal_en_flg)
1278 for_each_hwfn(cdev, i) {
1279 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1281 rc = qed_sp_vport_start(p_hwfn,
1282 p_hwfn->hw_info.concrete_fid,
1283 p_hwfn->hw_info.opaque_fid,
1287 inner_vlan_removal_en_flg);
1290 DP_ERR(cdev, "Failed to start VPORT\n");
1294 qed_hw_start_fastpath(p_hwfn);
1296 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1297 "Started V-PORT %d with MTU %d\n",
1301 qed_reset_vport_stats(cdev);
1306 static int qed_stop_vport(struct qed_dev *cdev,
1311 for_each_hwfn(cdev, i) {
1312 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1314 rc = qed_sp_vport_stop(p_hwfn,
1315 p_hwfn->hw_info.opaque_fid,
1319 DP_ERR(cdev, "Failed to stop VPORT\n");
1326 static int qed_update_vport(struct qed_dev *cdev,
1327 struct qed_update_vport_params *params)
1329 struct qed_sp_vport_update_params sp_params;
1330 struct qed_rss_params sp_rss_params;
1336 memset(&sp_params, 0, sizeof(sp_params));
1337 memset(&sp_rss_params, 0, sizeof(sp_rss_params));
1339 /* Translate protocol params into sp params */
1340 sp_params.vport_id = params->vport_id;
1341 sp_params.update_vport_active_rx_flg =
1342 params->update_vport_active_flg;
1343 sp_params.update_vport_active_tx_flg =
1344 params->update_vport_active_flg;
1345 sp_params.vport_active_rx_flg = params->vport_active_flg;
1346 sp_params.vport_active_tx_flg = params->vport_active_flg;
1348 /* RSS - is a bit tricky, since upper-layer isn't familiar with hwfns.
1349 * We need to re-fix the rss values per engine for CMT.
1351 if (cdev->num_hwfns > 1 && params->update_rss_flg) {
1352 struct qed_update_vport_rss_params *rss =
1353 ¶ms->rss_params;
1356 /* Find largest entry, since it's possible RSS needs to
1357 * be disabled [in case only 1 queue per-hwfn]
1359 for (k = 0; k < QED_RSS_IND_TABLE_SIZE; k++)
1360 max = (max > rss->rss_ind_table[k]) ?
1361 max : rss->rss_ind_table[k];
1363 /* Either fix RSS values or disable RSS */
1364 if (cdev->num_hwfns < max + 1) {
1365 int divisor = (max + cdev->num_hwfns - 1) /
1368 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1369 "CMT - fixing RSS values (modulo %02x)\n",
1372 for (k = 0; k < QED_RSS_IND_TABLE_SIZE; k++)
1373 rss->rss_ind_table[k] =
1374 rss->rss_ind_table[k] % divisor;
1376 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1377 "CMT - 1 queue per-hwfn; Disabling RSS\n");
1378 params->update_rss_flg = 0;
1382 /* Now, update the RSS configuration for actual configuration */
1383 if (params->update_rss_flg) {
1384 sp_rss_params.update_rss_config = 1;
1385 sp_rss_params.rss_enable = 1;
1386 sp_rss_params.update_rss_capabilities = 1;
1387 sp_rss_params.update_rss_ind_table = 1;
1388 sp_rss_params.update_rss_key = 1;
1389 sp_rss_params.rss_caps = QED_RSS_IPV4 |
1391 QED_RSS_IPV4_TCP | QED_RSS_IPV6_TCP;
1392 sp_rss_params.rss_table_size_log = 7; /* 2^7 = 128 */
1393 memcpy(sp_rss_params.rss_ind_table,
1394 params->rss_params.rss_ind_table,
1395 QED_RSS_IND_TABLE_SIZE * sizeof(u16));
1396 memcpy(sp_rss_params.rss_key, params->rss_params.rss_key,
1397 QED_RSS_KEY_SIZE * sizeof(u32));
1399 sp_params.rss_params = &sp_rss_params;
1401 for_each_hwfn(cdev, i) {
1402 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1404 sp_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
1405 rc = qed_sp_vport_update(p_hwfn, &sp_params,
1406 QED_SPQ_MODE_EBLOCK,
1409 DP_ERR(cdev, "Failed to update VPORT\n");
1413 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1414 "Updated V-PORT %d: active_flag %d [update %d]\n",
1415 params->vport_id, params->vport_active_flg,
1416 params->update_vport_active_flg);
1422 static int qed_start_rxq(struct qed_dev *cdev,
1423 struct qed_queue_start_common_params *params,
1425 dma_addr_t bd_chain_phys_addr,
1426 dma_addr_t cqe_pbl_addr,
1428 void __iomem **pp_prod)
1431 struct qed_hwfn *p_hwfn;
1433 hwfn_index = params->rss_id % cdev->num_hwfns;
1434 p_hwfn = &cdev->hwfns[hwfn_index];
1436 /* Fix queue ID in 100g mode */
1437 params->queue_id /= cdev->num_hwfns;
1439 rc = qed_sp_eth_rx_queue_start(p_hwfn,
1440 p_hwfn->hw_info.opaque_fid,
1449 DP_ERR(cdev, "Failed to start RXQ#%d\n", params->queue_id);
1453 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1454 "Started RX-Q %d [rss %d] on V-PORT %d and SB %d\n",
1455 params->queue_id, params->rss_id, params->vport_id,
1461 static int qed_stop_rxq(struct qed_dev *cdev,
1462 struct qed_stop_rxq_params *params)
1465 struct qed_hwfn *p_hwfn;
1467 hwfn_index = params->rss_id % cdev->num_hwfns;
1468 p_hwfn = &cdev->hwfns[hwfn_index];
1470 rc = qed_sp_eth_rx_queue_stop(p_hwfn,
1471 params->rx_queue_id / cdev->num_hwfns,
1472 params->eq_completion_only,
1475 DP_ERR(cdev, "Failed to stop RXQ#%d\n", params->rx_queue_id);
1482 static int qed_start_txq(struct qed_dev *cdev,
1483 struct qed_queue_start_common_params *p_params,
1484 dma_addr_t pbl_addr,
1486 void __iomem **pp_doorbell)
1488 struct qed_hwfn *p_hwfn;
1491 hwfn_index = p_params->rss_id % cdev->num_hwfns;
1492 p_hwfn = &cdev->hwfns[hwfn_index];
1494 /* Fix queue ID in 100g mode */
1495 p_params->queue_id /= cdev->num_hwfns;
1497 rc = qed_sp_eth_tx_queue_start(p_hwfn,
1498 p_hwfn->hw_info.opaque_fid,
1505 DP_ERR(cdev, "Failed to start TXQ#%d\n", p_params->queue_id);
1509 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1510 "Started TX-Q %d [rss %d] on V-PORT %d and SB %d\n",
1511 p_params->queue_id, p_params->rss_id, p_params->vport_id,
1517 #define QED_HW_STOP_RETRY_LIMIT (10)
1518 static int qed_fastpath_stop(struct qed_dev *cdev)
1520 qed_hw_stop_fastpath(cdev);
1525 static int qed_stop_txq(struct qed_dev *cdev,
1526 struct qed_stop_txq_params *params)
1528 struct qed_hwfn *p_hwfn;
1531 hwfn_index = params->rss_id % cdev->num_hwfns;
1532 p_hwfn = &cdev->hwfns[hwfn_index];
1534 rc = qed_sp_eth_tx_queue_stop(p_hwfn,
1535 params->tx_queue_id / cdev->num_hwfns);
1537 DP_ERR(cdev, "Failed to stop TXQ#%d\n", params->tx_queue_id);
1544 static int qed_configure_filter_rx_mode(struct qed_dev *cdev,
1545 enum qed_filter_rx_mode_type type)
1547 struct qed_filter_accept_flags accept_flags;
1549 memset(&accept_flags, 0, sizeof(accept_flags));
1551 accept_flags.update_rx_mode_config = 1;
1552 accept_flags.update_tx_mode_config = 1;
1553 accept_flags.rx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
1554 QED_ACCEPT_MCAST_MATCHED |
1556 accept_flags.tx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
1557 QED_ACCEPT_MCAST_MATCHED |
1560 if (type == QED_FILTER_RX_MODE_TYPE_PROMISC)
1561 accept_flags.rx_accept_filter |= QED_ACCEPT_UCAST_UNMATCHED |
1562 QED_ACCEPT_MCAST_UNMATCHED;
1563 else if (type == QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC)
1564 accept_flags.rx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED;
1566 return qed_filter_accept_cmd(cdev, 0, accept_flags,
1567 QED_SPQ_MODE_CB, NULL);
1570 static int qed_configure_filter_ucast(struct qed_dev *cdev,
1571 struct qed_filter_ucast_params *params)
1573 struct qed_filter_ucast ucast;
1575 if (!params->vlan_valid && !params->mac_valid) {
1578 "Tried configuring a unicast filter, but both MAC and VLAN are not set\n");
1582 memset(&ucast, 0, sizeof(ucast));
1583 switch (params->type) {
1584 case QED_FILTER_XCAST_TYPE_ADD:
1585 ucast.opcode = QED_FILTER_ADD;
1587 case QED_FILTER_XCAST_TYPE_DEL:
1588 ucast.opcode = QED_FILTER_REMOVE;
1590 case QED_FILTER_XCAST_TYPE_REPLACE:
1591 ucast.opcode = QED_FILTER_REPLACE;
1594 DP_NOTICE(cdev, "Unknown unicast filter type %d\n",
1598 if (params->vlan_valid && params->mac_valid) {
1599 ucast.type = QED_FILTER_MAC_VLAN;
1600 ether_addr_copy(ucast.mac, params->mac);
1601 ucast.vlan = params->vlan;
1602 } else if (params->mac_valid) {
1603 ucast.type = QED_FILTER_MAC;
1604 ether_addr_copy(ucast.mac, params->mac);
1606 ucast.type = QED_FILTER_VLAN;
1607 ucast.vlan = params->vlan;
1610 ucast.is_rx_filter = true;
1611 ucast.is_tx_filter = true;
1613 return qed_filter_ucast_cmd(cdev, &ucast, QED_SPQ_MODE_CB, NULL);
1616 static int qed_configure_filter_mcast(struct qed_dev *cdev,
1617 struct qed_filter_mcast_params *params)
1619 struct qed_filter_mcast mcast;
1622 memset(&mcast, 0, sizeof(mcast));
1623 switch (params->type) {
1624 case QED_FILTER_XCAST_TYPE_ADD:
1625 mcast.opcode = QED_FILTER_ADD;
1627 case QED_FILTER_XCAST_TYPE_DEL:
1628 mcast.opcode = QED_FILTER_REMOVE;
1631 DP_NOTICE(cdev, "Unknown multicast filter type %d\n",
1635 mcast.num_mc_addrs = params->num;
1636 for (i = 0; i < mcast.num_mc_addrs; i++)
1637 ether_addr_copy(mcast.mac[i], params->mac[i]);
1639 return qed_filter_mcast_cmd(cdev, &mcast,
1640 QED_SPQ_MODE_CB, NULL);
1643 static int qed_configure_filter(struct qed_dev *cdev,
1644 struct qed_filter_params *params)
1646 enum qed_filter_rx_mode_type accept_flags;
1648 switch (params->type) {
1649 case QED_FILTER_TYPE_UCAST:
1650 return qed_configure_filter_ucast(cdev, ¶ms->filter.ucast);
1651 case QED_FILTER_TYPE_MCAST:
1652 return qed_configure_filter_mcast(cdev, ¶ms->filter.mcast);
1653 case QED_FILTER_TYPE_RX_MODE:
1654 accept_flags = params->filter.accept_flags;
1655 return qed_configure_filter_rx_mode(cdev, accept_flags);
1657 DP_NOTICE(cdev, "Unknown filter type %d\n",
1663 static int qed_fp_cqe_completion(struct qed_dev *dev,
1665 struct eth_slow_path_rx_cqe *cqe)
1667 return qed_eth_cqe_completion(&dev->hwfns[rss_id % dev->num_hwfns],
1671 static const struct qed_eth_ops qed_eth_ops_pass = {
1672 .common = &qed_common_ops_pass,
1673 .fill_dev_info = &qed_fill_eth_dev_info,
1674 .register_ops = &qed_register_eth_ops,
1675 .vport_start = &qed_start_vport,
1676 .vport_stop = &qed_stop_vport,
1677 .vport_update = &qed_update_vport,
1678 .q_rx_start = &qed_start_rxq,
1679 .q_rx_stop = &qed_stop_rxq,
1680 .q_tx_start = &qed_start_txq,
1681 .q_tx_stop = &qed_stop_txq,
1682 .filter_config = &qed_configure_filter,
1683 .fastpath_stop = &qed_fastpath_stop,
1684 .eth_cqe_completion = &qed_fp_cqe_completion,
1685 .get_vport_stats = &qed_get_vport_stats,
1688 const struct qed_eth_ops *qed_get_eth_ops(u32 version)
1690 if (version != QED_ETH_INTERFACE_VERSION) {
1691 pr_notice("Cannot supply ethtool operations [%08x != %08x]\n",
1692 version, QED_ETH_INTERFACE_VERSION);
1696 return &qed_eth_ops_pass;
1698 EXPORT_SYMBOL(qed_get_eth_ops);
1700 void qed_put_eth_ops(void)
1702 /* TODO - reference count for module? */
1704 EXPORT_SYMBOL(qed_put_eth_ops);