drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c)  2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include <linux/types.h>
   9 #include "qlcnic.h"
  10
  11 #define QLC_DCB_NUM_PARAM               3
  12 #define QLC_DCB_LOCAL_IDX               0
  13 #define QLC_DCB_OPER_IDX                1
  14 #define QLC_DCB_PEER_IDX                2
  15
  16 #define QLC_DCB_GET_MAP(V)              (1 << V)
  17
  18 #define QLC_DCB_AEN_BIT                 0x2
  19 #define QLC_DCB_FW_VER                  0x2
  20 #define QLC_DCB_MAX_TC                  0x8
  21 #define QLC_DCB_MAX_APP                 0x8
  22 #define QLC_DCB_MAX_PRIO                QLC_DCB_MAX_TC
  23 #define QLC_DCB_MAX_PG                  QLC_DCB_MAX_TC
  24
  25 #define QLC_DCB_TSA_SUPPORT(V)          (V & 0x1)
  26 #define QLC_DCB_ETS_SUPPORT(V)          ((V >> 1) & 0x1)
  27 #define QLC_DCB_VERSION_SUPPORT(V)      ((V >> 2) & 0xf)
  28 #define QLC_DCB_MAX_NUM_TC(V)           ((V >> 20) & 0xf)
  29 #define QLC_DCB_MAX_NUM_ETS_TC(V)       ((V >> 24) & 0xf)
  30 #define QLC_DCB_MAX_NUM_PFC_TC(V)       ((V >> 28) & 0xf)
  31 #define QLC_DCB_GET_TC_PRIO(X, P)       ((X >> (P * 3)) & 0x7)
  32 #define QLC_DCB_GET_PGID_PRIO(X, P)     ((X >> (P * 8)) & 0xff)
  33 #define QLC_DCB_GET_BWPER_PG(X, P)      ((X >> (P * 8)) & 0xff)
  34 #define QLC_DCB_GET_TSA_PG(X, P)        ((X >> (P * 8)) & 0xff)
  35 #define QLC_DCB_GET_PFC_PRIO(X, P)      (((X >> 24) >> P) & 0x1)
  36 #define QLC_DCB_GET_PROTO_ID_APP(X)     ((X >> 8) & 0xffff)
  37 #define QLC_DCB_GET_SELECTOR_APP(X)     (X & 0xff)
  38
  39 #define QLC_DCB_LOCAL_PARAM_FWID        0x3
  40 #define QLC_DCB_OPER_PARAM_FWID         0x1
  41 #define QLC_DCB_PEER_PARAM_FWID         0x2
  42
  43 #define QLC_83XX_DCB_GET_NUMAPP(X)      ((X >> 2) & 0xf)
  44 #define QLC_83XX_DCB_TSA_VALID(X)       (X & 0x1)
  45 #define QLC_83XX_DCB_PFC_VALID(X)       ((X >> 1) & 0x1)
  46 #define QLC_83XX_DCB_GET_PRIOMAP_APP(X) (X >> 24)
  47
  48 #define QLC_82XX_DCB_GET_NUMAPP(X)      ((X >> 12) & 0xf)
  49 #define QLC_82XX_DCB_TSA_VALID(X)       ((X >> 4) & 0x1)
  50 #define QLC_82XX_DCB_PFC_VALID(X)       ((X >> 5) & 0x1)
  51 #define QLC_82XX_DCB_GET_PRIOVAL_APP(X) ((X >> 24) & 0x7)
  52 #define QLC_82XX_DCB_GET_PRIOMAP_APP(X) (1 << X)
  53 #define QLC_82XX_DCB_PRIO_TC_MAP        (0x76543210)
  54
  55 static const struct dcbnl_rtnl_ops qlcnic_dcbnl_ops;
  56
  57 static void qlcnic_dcb_aen_work(struct work_struct *);
  58 static void qlcnic_dcb_data_cee_param_map(struct qlcnic_adapter *);
  59
  60 static inline void __qlcnic_init_dcbnl_ops(struct qlcnic_dcb *);
  61 static void __qlcnic_dcb_free(struct qlcnic_dcb *);
  62 static int __qlcnic_dcb_attach(struct qlcnic_dcb *);
  63 static int __qlcnic_dcb_query_hw_capability(struct qlcnic_dcb *, char *);
  64 static void __qlcnic_dcb_get_info(struct qlcnic_dcb *);
  65
  66 static int qlcnic_82xx_dcb_get_hw_capability(struct qlcnic_dcb *);
  67 static int qlcnic_82xx_dcb_query_cee_param(struct qlcnic_dcb *, char *, u8);
  68 static int qlcnic_82xx_dcb_get_cee_cfg(struct qlcnic_dcb *);
  69 static void qlcnic_82xx_dcb_aen_handler(struct qlcnic_dcb *, void *);
  70
  71 static int qlcnic_83xx_dcb_get_hw_capability(struct qlcnic_dcb *);
  72 static int qlcnic_83xx_dcb_query_cee_param(struct qlcnic_dcb *, char *, u8);
  73 static int qlcnic_83xx_dcb_get_cee_cfg(struct qlcnic_dcb *);
  74 static int qlcnic_83xx_dcb_register_aen(struct qlcnic_dcb *, bool);
  75 static void qlcnic_83xx_dcb_aen_handler(struct qlcnic_dcb *, void *);
  76
  77 struct qlcnic_dcb_capability {
  78         bool    tsa_capability;
  79         bool    ets_capability;
  80         u8      max_num_tc;
  81         u8      max_ets_tc;
  82         u8      max_pfc_tc;
  83         u8      dcb_capability;
  84 };
  85
  86 struct qlcnic_dcb_param {
  87         u32 hdr_prio_pfc_map[2];
  88         u32 prio_pg_map[2];
  89         u32 pg_bw_map[2];
  90         u32 pg_tsa_map[2];
  91         u32 app[QLC_DCB_MAX_APP];
  92 };
  93
  94 struct qlcnic_dcb_mbx_params {
  95         /* 1st local, 2nd operational 3rd remote */
  96         struct qlcnic_dcb_param type[3];
  97         u32 prio_tc_map;
  98 };
  99
 100 struct qlcnic_82xx_dcb_param_mbx_le {
 101         __le32 hdr_prio_pfc_map[2];
 102         __le32 prio_pg_map[2];
 103         __le32 pg_bw_map[2];
 104         __le32 pg_tsa_map[2];
 105         __le32 app[QLC_DCB_MAX_APP];
 106 };
 107
 108 enum qlcnic_dcb_selector {
 109         QLC_SELECTOR_DEF = 0x0,
 110         QLC_SELECTOR_ETHER,
 111         QLC_SELECTOR_TCP,
 112         QLC_SELECTOR_UDP,
 113 };
 114
 115 enum qlcnic_dcb_prio_type {
 116         QLC_PRIO_NONE = 0,
 117         QLC_PRIO_GROUP,
 118         QLC_PRIO_LINK,
 119 };
 120
 121 enum qlcnic_dcb_pfc_type {
 122         QLC_PFC_DISABLED = 0,
 123         QLC_PFC_FULL,
 124         QLC_PFC_TX,
 125         QLC_PFC_RX
 126 };
 127
 128 struct qlcnic_dcb_prio_cfg {
 129         bool valid;
 130         enum qlcnic_dcb_pfc_type pfc_type;
 131 };
 132
 133 struct qlcnic_dcb_pg_cfg {
 134         bool valid;
 135         u8 total_bw_percent;            /* of Link/ port BW */
 136         u8 prio_count;
 137         u8 tsa_type;
 138 };
 139
 140 struct qlcnic_dcb_tc_cfg {
 141         bool valid;
 142         struct qlcnic_dcb_prio_cfg prio_cfg[QLC_DCB_MAX_PRIO];
 143         enum qlcnic_dcb_prio_type prio_type;    /* always prio_link */
 144         u8 link_percent;                        /* % of link bandwidth */
 145         u8 bwg_percent;                         /* % of BWG's bandwidth */
 146         u8 up_tc_map;
 147         u8 pgid;
 148 };
 149
 150 struct qlcnic_dcb_app {
 151         bool valid;
 152         enum qlcnic_dcb_selector selector;
 153         u16 protocol;
 154         u8 priority;
 155 };
 156
 157 struct qlcnic_dcb_cee {
 158         struct qlcnic_dcb_tc_cfg tc_cfg[QLC_DCB_MAX_TC];
 159         struct qlcnic_dcb_pg_cfg pg_cfg[QLC_DCB_MAX_PG];
 160         struct qlcnic_dcb_app app[QLC_DCB_MAX_APP];
 161         bool tc_param_valid;
 162         bool pfc_mode_enable;
 163 };
 164
 165 struct qlcnic_dcb_cfg {
 166         /* 0 - local, 1 - operational, 2 - remote */
 167         struct qlcnic_dcb_cee type[QLC_DCB_NUM_PARAM];
 168         struct qlcnic_dcb_capability capability;
 169         u32 version;
 170 };
 171
 172 static struct qlcnic_dcb_ops qlcnic_83xx_dcb_ops = {
 173         .init_dcbnl_ops         = __qlcnic_init_dcbnl_ops,
 174         .free                   = __qlcnic_dcb_free,
 175         .attach                 = __qlcnic_dcb_attach,
 176         .query_hw_capability    = __qlcnic_dcb_query_hw_capability,
 177         .get_info               = __qlcnic_dcb_get_info,
 178
 179         .get_hw_capability      = qlcnic_83xx_dcb_get_hw_capability,
 180         .query_cee_param        = qlcnic_83xx_dcb_query_cee_param,
 181         .get_cee_cfg            = qlcnic_83xx_dcb_get_cee_cfg,
 182         .register_aen           = qlcnic_83xx_dcb_register_aen,
 183         .aen_handler            = qlcnic_83xx_dcb_aen_handler,
 184 };
 185
 186 static struct qlcnic_dcb_ops qlcnic_82xx_dcb_ops = {
 187         .init_dcbnl_ops         = __qlcnic_init_dcbnl_ops,
 188         .free                   = __qlcnic_dcb_free,
 189         .attach                 = __qlcnic_dcb_attach,
 190         .query_hw_capability    = __qlcnic_dcb_query_hw_capability,
 191         .get_info               = __qlcnic_dcb_get_info,
 192
 193         .get_hw_capability      = qlcnic_82xx_dcb_get_hw_capability,
 194         .query_cee_param        = qlcnic_82xx_dcb_query_cee_param,
 195         .get_cee_cfg            = qlcnic_82xx_dcb_get_cee_cfg,
 196         .aen_handler            = qlcnic_82xx_dcb_aen_handler,
 197 };
 198
 199 static u8 qlcnic_dcb_get_num_app(struct qlcnic_adapter *adapter, u32 val)
 200 {
 201         if (qlcnic_82xx_check(adapter))
 202                 return QLC_82XX_DCB_GET_NUMAPP(val);
 203         else
 204                 return QLC_83XX_DCB_GET_NUMAPP(val);
 205 }
 206
 207 static inline u8 qlcnic_dcb_pfc_hdr_valid(struct qlcnic_adapter *adapter,
 208                                           u32 val)
 209 {
 210         if (qlcnic_82xx_check(adapter))
 211                 return QLC_82XX_DCB_PFC_VALID(val);
 212         else
 213                 return QLC_83XX_DCB_PFC_VALID(val);
 214 }
 215
 216 static inline u8 qlcnic_dcb_tsa_hdr_valid(struct qlcnic_adapter *adapter,
 217                                           u32 val)
 218 {
 219         if (qlcnic_82xx_check(adapter))
 220                 return QLC_82XX_DCB_TSA_VALID(val);
 221         else
 222                 return QLC_83XX_DCB_TSA_VALID(val);
 223 }
 224
 225 static inline u8 qlcnic_dcb_get_prio_map_app(struct qlcnic_adapter *adapter,
 226                                              u32 val)
 227 {
 228         if (qlcnic_82xx_check(adapter))
 229                 return QLC_82XX_DCB_GET_PRIOMAP_APP(val);
 230         else
 231                 return QLC_83XX_DCB_GET_PRIOMAP_APP(val);
 232 }
 233
 234 static int qlcnic_dcb_prio_count(u8 up_tc_map)
 235 {
 236         int j;
 237
 238         for (j = 0; j < QLC_DCB_MAX_TC; j++)
 239                 if (up_tc_map & QLC_DCB_GET_MAP(j))
 240                         break;
 241
 242         return j;
 243 }
 244
 245 static inline void __qlcnic_init_dcbnl_ops(struct qlcnic_dcb *dcb)
 246 {
 247         if (test_bit(QLCNIC_DCB_STATE, &dcb->state))
 248                 dcb->adapter->netdev->dcbnl_ops = &qlcnic_dcbnl_ops;
 249 }
 250
 251 static void qlcnic_set_dcb_ops(struct qlcnic_adapter *adapter)
 252 {
 253         if (qlcnic_82xx_check(adapter))
 254                 adapter->dcb->ops = &qlcnic_82xx_dcb_ops;
 255         else if (qlcnic_83xx_check(adapter))
 256                 adapter->dcb->ops = &qlcnic_83xx_dcb_ops;
 257 }
 258
 259 int qlcnic_register_dcb(struct qlcnic_adapter *adapter)
 260 {
 261         struct qlcnic_dcb *dcb;
 262
 263         dcb = kzalloc(sizeof(struct qlcnic_dcb), GFP_ATOMIC);
 264         if (!dcb)
 265                 return -ENOMEM;
 266
 267         adapter->dcb = dcb;
 268         dcb->adapter = adapter;
 269         qlcnic_set_dcb_ops(adapter);
 270         dcb->state = 0;
 271
 272         return 0;
 273 }
 274
 275 static void __qlcnic_dcb_free(struct qlcnic_dcb *dcb)
 276 {
 277         struct qlcnic_adapter *adapter;
 278
 279         if (!dcb)
 280                 return;
 281
 282         adapter = dcb->adapter;
 283         qlcnic_dcb_register_aen(dcb, 0);
 284
 285         while (test_bit(QLCNIC_DCB_AEN_MODE, &dcb->state))
 286                 usleep_range(10000, 11000);
 287
 288         cancel_delayed_work_sync(&dcb->aen_work);
 289
 290         if (dcb->wq) {
 291                 destroy_workqueue(dcb->wq);
 292                 dcb->wq = NULL;
 293         }
 294
 295         kfree(dcb->cfg);
 296         dcb->cfg = NULL;
 297         kfree(dcb->param);
 298         dcb->param = NULL;
 299         kfree(dcb);
 300         adapter->dcb = NULL;
 301 }
 302
 303 static void __qlcnic_dcb_get_info(struct qlcnic_dcb *dcb)
 304 {
 305         qlcnic_dcb_get_hw_capability(dcb);
 306         qlcnic_dcb_get_cee_cfg(dcb);
 307         qlcnic_dcb_register_aen(dcb, 1);
 308 }
 309
 310 static int __qlcnic_dcb_attach(struct qlcnic_dcb *dcb)
 311 {
 312         int err = 0;
 313
 314         INIT_DELAYED_WORK(&dcb->aen_work, qlcnic_dcb_aen_work);
 315
 316         dcb->wq = create_singlethread_workqueue("qlcnic-dcb");
 317         if (!dcb->wq) {
 318                 dev_err(&dcb->adapter->pdev->dev,
 319                         "DCB workqueue allocation failed. DCB will be disabled\n");
 320                 return -1;
 321         }
 322
 323         dcb->cfg = kzalloc(sizeof(struct qlcnic_dcb_cfg), GFP_ATOMIC);
 324         if (!dcb->cfg) {
 325                 err = -ENOMEM;
 326                 goto out_free_wq;
 327         }
 328
 329         dcb->param = kzalloc(sizeof(struct qlcnic_dcb_mbx_params), GFP_ATOMIC);
 330         if (!dcb->param) {
 331                 err = -ENOMEM;
 332                 goto out_free_cfg;
 333         }
 334
 335         qlcnic_dcb_get_info(dcb);
 336
 337         return 0;
 338 out_free_cfg:
 339         kfree(dcb->cfg);
 340         dcb->cfg = NULL;
 341
 342 out_free_wq:
 343         destroy_workqueue(dcb->wq);
 344         dcb->wq = NULL;
 345
 346         return err;
 347 }
 348
 349 static int __qlcnic_dcb_query_hw_capability(struct qlcnic_dcb *dcb, char *buf)
 350 {
 351         struct qlcnic_adapter *adapter = dcb->adapter;
 352         struct qlcnic_cmd_args cmd;
 353         u32 mbx_out;
 354         int err;
 355
 356         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_CAP);
 357         if (err)
 358                 return err;
 359
 360         err = qlcnic_issue_cmd(adapter, &cmd);
 361         if (err) {
 362                 dev_err(&adapter->pdev->dev,
 363                         "Failed to query DCBX capability, err %d\n", err);
 364         } else {
 365                 mbx_out = cmd.rsp.arg[1];
 366                 if (buf)
 367                         memcpy(buf, &mbx_out, sizeof(u32));
 368         }
 369
 370         qlcnic_free_mbx_args(&cmd);
 371
 372         return err;
 373 }
 374
 375 static int __qlcnic_dcb_get_capability(struct qlcnic_dcb *dcb, u32 *val)
 376 {
 377         struct qlcnic_dcb_capability *cap = &dcb->cfg->capability;
 378         u32 mbx_out;
 379         int err;
 380
 381         memset(cap, 0, sizeof(struct qlcnic_dcb_capability));
 382
 383         err = qlcnic_dcb_query_hw_capability(dcb, (char *)val);
 384         if (err)
 385                 return err;
 386
 387         mbx_out = *val;
 388         if (QLC_DCB_TSA_SUPPORT(mbx_out))
 389                 cap->tsa_capability = true;
 390
 391         if (QLC_DCB_ETS_SUPPORT(mbx_out))
 392                 cap->ets_capability = true;
 393
 394         cap->max_num_tc = QLC_DCB_MAX_NUM_TC(mbx_out);
 395         cap->max_ets_tc = QLC_DCB_MAX_NUM_ETS_TC(mbx_out);
 396         cap->max_pfc_tc = QLC_DCB_MAX_NUM_PFC_TC(mbx_out);
 397
 398         if (cap->max_num_tc > QLC_DCB_MAX_TC ||
 399             cap->max_ets_tc > cap->max_num_tc ||
 400             cap->max_pfc_tc > cap->max_num_tc) {
 401                 dev_err(&dcb->adapter->pdev->dev, "Invalid DCB configuration\n");
 402                 return -EINVAL;
 403         }
 404
 405         return err;
 406 }
 407
 408 static int qlcnic_82xx_dcb_get_hw_capability(struct qlcnic_dcb *dcb)
 409 {
 410         struct qlcnic_dcb_cfg *cfg = dcb->cfg;
 411         struct qlcnic_dcb_capability *cap;
 412         u32 mbx_out;
 413         int err;
 414
 415         err = __qlcnic_dcb_get_capability(dcb, &mbx_out);
 416         if (err)
 417                 return err;
 418
 419         cap = &cfg->capability;
 420         cap->dcb_capability = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_LLD_MANAGED;
 421
 422         if (cap->dcb_capability && cap->tsa_capability && cap->ets_capability)
 423                 set_bit(QLCNIC_DCB_STATE, &dcb->state);
 424
 425         return err;
 426 }
 427
 428 static int qlcnic_82xx_dcb_query_cee_param(struct qlcnic_dcb *dcb,
 429                                            char *buf, u8 type)
 430 {
 431         u16 size = sizeof(struct qlcnic_82xx_dcb_param_mbx_le);
 432         struct qlcnic_adapter *adapter = dcb->adapter;
 433         struct qlcnic_82xx_dcb_param_mbx_le *prsp_le;
 434         struct device *dev = &adapter->pdev->dev;
 435         dma_addr_t cardrsp_phys_addr;
 436         struct qlcnic_dcb_param rsp;
 437         struct qlcnic_cmd_args cmd;
 438         u64 phys_addr;
 439         void *addr;
 440         int err, i;
 441
 442         switch (type) {
 443         case QLC_DCB_LOCAL_PARAM_FWID:
 444         case QLC_DCB_OPER_PARAM_FWID:
 445         case QLC_DCB_PEER_PARAM_FWID:
 446                 break;
 447         default:
 448                 dev_err(dev, "Invalid parameter type %d\n", type);
 449                 return -EINVAL;
 450         }
 451
 452         addr = dma_alloc_coherent(dev, size, &cardrsp_phys_addr, GFP_KERNEL);
 453         if (addr == NULL)
 454                 return -ENOMEM;
 455
 456         prsp_le = addr;
 457
 458         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_PARAM);
 459         if (err)
 460                 goto out_free_rsp;
 461
 462         phys_addr = cardrsp_phys_addr;
 463         cmd.req.arg[1] = size | (type << 16);
 464         cmd.req.arg[2] = MSD(phys_addr);
 465         cmd.req.arg[3] = LSD(phys_addr);
 466
 467         err = qlcnic_issue_cmd(adapter, &cmd);
 468         if (err) {
 469                 dev_err(dev, "Failed to query DCBX parameter, err %d\n", err);
 470                 goto out;
 471         }
 472
 473         memset(&rsp, 0, sizeof(struct qlcnic_dcb_param));
 474         rsp.hdr_prio_pfc_map[0] = le32_to_cpu(prsp_le->hdr_prio_pfc_map[0]);
 475         rsp.hdr_prio_pfc_map[1] = le32_to_cpu(prsp_le->hdr_prio_pfc_map[1]);
 476         rsp.prio_pg_map[0] = le32_to_cpu(prsp_le->prio_pg_map[0]);
 477         rsp.prio_pg_map[1] = le32_to_cpu(prsp_le->prio_pg_map[1]);
 478         rsp.pg_bw_map[0] = le32_to_cpu(prsp_le->pg_bw_map[0]);
 479         rsp.pg_bw_map[1] = le32_to_cpu(prsp_le->pg_bw_map[1]);
 480         rsp.pg_tsa_map[0] = le32_to_cpu(prsp_le->pg_tsa_map[0]);
 481         rsp.pg_tsa_map[1] = le32_to_cpu(prsp_le->pg_tsa_map[1]);
 482
 483         for (i = 0; i < QLC_DCB_MAX_APP; i++)
 484                 rsp.app[i] = le32_to_cpu(prsp_le->app[i]);
 485
 486         if (buf)
 487                 memcpy(buf, &rsp, size);
 488 out:
 489         qlcnic_free_mbx_args(&cmd);
 490
 491 out_free_rsp:
 492         dma_free_coherent(dev, size, addr, cardrsp_phys_addr);
 493
 494         return err;
 495 }
 496
 497 static int qlcnic_82xx_dcb_get_cee_cfg(struct qlcnic_dcb *dcb)
 498 {
 499         struct qlcnic_dcb_mbx_params *mbx;
 500         int err;
 501
 502         mbx = dcb->param;
 503         if (!mbx)
 504                 return 0;
 505
 506         err = qlcnic_dcb_query_cee_param(dcb, (char *)&mbx->type[0],
 507                                          QLC_DCB_LOCAL_PARAM_FWID);
 508         if (err)
 509                 return err;
 510
 511         err = qlcnic_dcb_query_cee_param(dcb, (char *)&mbx->type[1],
 512                                          QLC_DCB_OPER_PARAM_FWID);
 513         if (err)
 514                 return err;
 515
 516         err = qlcnic_dcb_query_cee_param(dcb, (char *)&mbx->type[2],
 517                                          QLC_DCB_PEER_PARAM_FWID);
 518         if (err)
 519                 return err;
 520
 521         mbx->prio_tc_map = QLC_82XX_DCB_PRIO_TC_MAP;
 522
 523         qlcnic_dcb_data_cee_param_map(dcb->adapter);
 524
 525         return err;
 526 }
 527
 528 static void qlcnic_dcb_aen_work(struct work_struct *work)
 529 {
 530         struct qlcnic_dcb *dcb;
 531
 532         dcb = container_of(work, struct qlcnic_dcb, aen_work.work);
 533
 534         qlcnic_dcb_get_cee_cfg(dcb);
 535         clear_bit(QLCNIC_DCB_AEN_MODE, &dcb->state);
 536 }
 537
 538 static void qlcnic_82xx_dcb_aen_handler(struct qlcnic_dcb *dcb, void *data)
 539 {
 540         if (test_and_set_bit(QLCNIC_DCB_AEN_MODE, &dcb->state))
 541                 return;
 542
 543         queue_delayed_work(dcb->wq, &dcb->aen_work, 0);
 544 }
 545
 546 static int qlcnic_83xx_dcb_get_hw_capability(struct qlcnic_dcb *dcb)
 547 {
 548         struct qlcnic_dcb_capability *cap = &dcb->cfg->capability;
 549         u32 mbx_out;
 550         int err;
 551
 552         err = __qlcnic_dcb_get_capability(dcb, &mbx_out);
 553         if (err)
 554                 return err;
 555
 556         if (mbx_out & BIT_2)
 557                 cap->dcb_capability = DCB_CAP_DCBX_VER_CEE;
 558         if (mbx_out & BIT_3)
 559                 cap->dcb_capability |= DCB_CAP_DCBX_VER_IEEE;
 560         if (cap->dcb_capability)
 561                 cap->dcb_capability |= DCB_CAP_DCBX_LLD_MANAGED;
 562
 563         if (cap->dcb_capability && cap->tsa_capability && cap->ets_capability)
 564                 set_bit(QLCNIC_DCB_STATE, &dcb->state);
 565
 566         return err;
 567 }
 568
 569 static int qlcnic_83xx_dcb_query_cee_param(struct qlcnic_dcb *dcb,
 570                                            char *buf, u8 idx)
 571 {
 572         struct qlcnic_adapter *adapter = dcb->adapter;
 573         struct qlcnic_dcb_mbx_params mbx_out;
 574         int err, i, j, k, max_app, size;
 575         struct qlcnic_dcb_param *each;
 576         struct qlcnic_cmd_args cmd;
 577         u32 val;
 578         char *p;
 579
 580         size = 0;
 581         memset(&mbx_out, 0, sizeof(struct qlcnic_dcb_mbx_params));
 582         memset(buf, 0, sizeof(struct qlcnic_dcb_mbx_params));
 583
 584         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_PARAM);
 585         if (err)
 586                 return err;
 587
 588         cmd.req.arg[0] |= QLC_DCB_FW_VER << 29;
 589         err = qlcnic_issue_cmd(adapter, &cmd);
 590         if (err) {
 591                 dev_err(&adapter->pdev->dev,
 592                         "Failed to query DCBX param, err %d\n", err);
 593                 goto out;
 594         }
 595
 596         mbx_out.prio_tc_map = cmd.rsp.arg[1];
 597         p = memcpy(buf, &mbx_out, sizeof(u32));
 598         k = 2;
 599         p += sizeof(u32);
 600
 601         for (j = 0; j < QLC_DCB_NUM_PARAM; j++) {
 602                 each = &mbx_out.type[j];
 603
 604                 each->hdr_prio_pfc_map[0] = cmd.rsp.arg[k++];
 605                 each->hdr_prio_pfc_map[1] = cmd.rsp.arg[k++];
 606                 each->prio_pg_map[0] = cmd.rsp.arg[k++];
 607                 each->prio_pg_map[1] = cmd.rsp.arg[k++];
 608                 each->pg_bw_map[0] = cmd.rsp.arg[k++];
 609                 each->pg_bw_map[1] = cmd.rsp.arg[k++];
 610                 each->pg_tsa_map[0] = cmd.rsp.arg[k++];
 611                 each->pg_tsa_map[1] = cmd.rsp.arg[k++];
 612                 val = each->hdr_prio_pfc_map[0];
 613
 614                 max_app = qlcnic_dcb_get_num_app(adapter, val);
 615                 for (i = 0; i < max_app; i++)
 616                         each->app[i] = cmd.rsp.arg[i + k];
 617
 618                 size = 16 * sizeof(u32);
 619                 memcpy(p, &each->hdr_prio_pfc_map[0], size);
 620                 p += size;
 621                 if (j == 0)
 622                         k = 18;
 623                 else
 624                         k = 34;
 625         }
 626 out:
 627         qlcnic_free_mbx_args(&cmd);
 628
 629         return err;
 630 }
 631
 632 static int qlcnic_83xx_dcb_get_cee_cfg(struct qlcnic_dcb *dcb)
 633 {
 634         int err;
 635
 636         err = qlcnic_dcb_query_cee_param(dcb, (char *)dcb->param, 0);
 637         if (err)
 638                 return err;
 639
 640         qlcnic_dcb_data_cee_param_map(dcb->adapter);
 641
 642         return err;
 643 }
 644
 645 static int qlcnic_83xx_dcb_register_aen(struct qlcnic_dcb *dcb, bool flag)
 646 {
 647         u8 val = (flag ? QLCNIC_CMD_INIT_NIC_FUNC : QLCNIC_CMD_STOP_NIC_FUNC);
 648         struct qlcnic_adapter *adapter = dcb->adapter;
 649         struct qlcnic_cmd_args cmd;
 650         int err;
 651
 652         err = qlcnic_alloc_mbx_args(&cmd, adapter, val);
 653         if (err)
 654                 return err;
 655
 656         cmd.req.arg[1] = QLC_DCB_AEN_BIT;
 657
 658         err = qlcnic_issue_cmd(adapter, &cmd);
 659         if (err)
 660                 dev_err(&adapter->pdev->dev, "Failed to %s DCBX AEN, err %d\n",
 661                         (flag ? "register" : "unregister"), err);
 662
 663         qlcnic_free_mbx_args(&cmd);
 664
 665         return err;
 666 }
 667
 668 static void qlcnic_83xx_dcb_aen_handler(struct qlcnic_dcb *dcb, void *data)
 669 {
 670         u32 *val = data;
 671
 672         if (test_and_set_bit(QLCNIC_DCB_AEN_MODE, &dcb->state))
 673                 return;
 674
 675         if (*val & BIT_8)
 676                 set_bit(QLCNIC_DCB_STATE, &dcb->state);
 677         else
 678                 clear_bit(QLCNIC_DCB_STATE, &dcb->state);
 679
 680         queue_delayed_work(dcb->wq, &dcb->aen_work, 0);
 681 }
 682
 683 static void qlcnic_dcb_fill_cee_tc_params(struct qlcnic_dcb_mbx_params *mbx,
 684                                           struct qlcnic_dcb_param *each,
 685                                           struct qlcnic_dcb_cee *type)
 686 {
 687         struct qlcnic_dcb_tc_cfg *tc_cfg;
 688         u8 i, tc, pgid;
 689
 690         for (i = 0; i < QLC_DCB_MAX_PRIO; i++) {
 691                 tc = QLC_DCB_GET_TC_PRIO(mbx->prio_tc_map, i);
 692                 tc_cfg = &type->tc_cfg[tc];
 693                 tc_cfg->valid = true;
 694                 tc_cfg->up_tc_map |= QLC_DCB_GET_MAP(i);
 695
 696                 if (QLC_DCB_GET_PFC_PRIO(each->hdr_prio_pfc_map[1], i) &&
 697                     type->pfc_mode_enable) {
 698                         tc_cfg->prio_cfg[i].valid = true;
 699                         tc_cfg->prio_cfg[i].pfc_type = QLC_PFC_FULL;
 700                 }
 701
 702                 if (i < 4)
 703                         pgid = QLC_DCB_GET_PGID_PRIO(each->prio_pg_map[0], i);
 704                 else
 705                         pgid = QLC_DCB_GET_PGID_PRIO(each->prio_pg_map[1], i);
 706
 707                 tc_cfg->pgid = pgid;
 708
 709                 tc_cfg->prio_type = QLC_PRIO_LINK;
 710                 type->pg_cfg[tc_cfg->pgid].prio_count++;
 711         }
 712 }
 713
 714 static void qlcnic_dcb_fill_cee_pg_params(struct qlcnic_dcb_param *each,
 715                                           struct qlcnic_dcb_cee *type)
 716 {
 717         struct qlcnic_dcb_pg_cfg *pg_cfg;
 718         u8 i, tsa, bw_per;
 719
 720         for (i = 0; i < QLC_DCB_MAX_PG; i++) {
 721                 pg_cfg = &type->pg_cfg[i];
 722                 pg_cfg->valid = true;
 723
 724                 if (i < 4) {
 725                         bw_per = QLC_DCB_GET_BWPER_PG(each->pg_bw_map[0], i);
 726                         tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[0], i);
 727                 } else {
 728                         bw_per = QLC_DCB_GET_BWPER_PG(each->pg_bw_map[1], i);
 729                         tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[1], i);
 730                 }
 731
 732                 pg_cfg->total_bw_percent = bw_per;
 733                 pg_cfg->tsa_type = tsa;
 734         }
 735 }
 736
 737 static void
 738 qlcnic_dcb_fill_cee_app_params(struct qlcnic_adapter *adapter, u8 idx,
 739                                struct qlcnic_dcb_param *each,
 740                                struct qlcnic_dcb_cee *type)
 741 {
 742         struct qlcnic_dcb_app *app;
 743         u8 i, num_app, map, cnt;
 744         struct dcb_app new_app;
 745
 746         num_app = qlcnic_dcb_get_num_app(adapter, each->hdr_prio_pfc_map[0]);
 747         for (i = 0; i < num_app; i++) {
 748                 app = &type->app[i];
 749                 app->valid = true;
 750
 751                 /* Only for CEE (-1) */
 752                 app->selector = QLC_DCB_GET_SELECTOR_APP(each->app[i]) - 1;
 753                 new_app.selector = app->selector;
 754                 app->protocol = QLC_DCB_GET_PROTO_ID_APP(each->app[i]);
 755                 new_app.protocol = app->protocol;
 756                 map = qlcnic_dcb_get_prio_map_app(adapter, each->app[i]);
 757                 cnt = qlcnic_dcb_prio_count(map);
 758
 759                 if (cnt >= QLC_DCB_MAX_TC)
 760                         cnt = 0;
 761
 762                 app->priority = cnt;
 763                 new_app.priority = cnt;
 764
 765                 if (idx == QLC_DCB_OPER_IDX && adapter->netdev->dcbnl_ops)
 766                         dcb_setapp(adapter->netdev, &new_app);
 767         }
 768 }
 769
 770 static void qlcnic_dcb_map_cee_params(struct qlcnic_adapter *adapter, u8 idx)
 771 {
 772         struct qlcnic_dcb_mbx_params *mbx = adapter->dcb->param;
 773         struct qlcnic_dcb_param *each = &mbx->type[idx];
 774         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
 775         struct qlcnic_dcb_cee *type = &cfg->type[idx];
 776
 777         type->tc_param_valid = false;
 778         type->pfc_mode_enable = false;
 779         memset(type->tc_cfg, 0,
 780                sizeof(struct qlcnic_dcb_tc_cfg) * QLC_DCB_MAX_TC);
 781         memset(type->pg_cfg, 0,
 782                sizeof(struct qlcnic_dcb_pg_cfg) * QLC_DCB_MAX_TC);
 783
 784         if (qlcnic_dcb_pfc_hdr_valid(adapter, each->hdr_prio_pfc_map[0]) &&
 785             cfg->capability.max_pfc_tc)
 786                 type->pfc_mode_enable = true;
 787
 788         if (qlcnic_dcb_tsa_hdr_valid(adapter, each->hdr_prio_pfc_map[0]) &&
 789             cfg->capability.max_ets_tc)
 790                 type->tc_param_valid = true;
 791
 792         qlcnic_dcb_fill_cee_tc_params(mbx, each, type);
 793         qlcnic_dcb_fill_cee_pg_params(each, type);
 794         qlcnic_dcb_fill_cee_app_params(adapter, idx, each, type);
 795 }
 796
 797 static void qlcnic_dcb_data_cee_param_map(struct qlcnic_adapter *adapter)
 798 {
 799         int i;
 800
 801         for (i = 0; i < QLC_DCB_NUM_PARAM; i++)
 802                 qlcnic_dcb_map_cee_params(adapter, i);
 803
 804         dcbnl_cee_notify(adapter->netdev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
 805 }
 806
 807 static u8 qlcnic_dcb_get_state(struct net_device *netdev)
 808 {
 809         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 810
 811         return test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state);
 812 }
 813
 814 static void qlcnic_dcb_get_perm_hw_addr(struct net_device *netdev, u8 *addr)
 815 {
 816         memcpy(addr, netdev->perm_addr, netdev->addr_len);
 817 }
 818
 819 static void
 820 qlcnic_dcb_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, u8 *prio,
 821                             u8 *pgid, u8 *bw_per, u8 *up_tc_map)
 822 {
 823         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 824         struct qlcnic_dcb_tc_cfg *tc_cfg, *temp;
 825         struct qlcnic_dcb_cee *type;
 826         u8 i, cnt, pg;
 827
 828         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
 829         *prio = *pgid = *bw_per = *up_tc_map = 0;
 830
 831         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state) ||
 832             !type->tc_param_valid)
 833                 return;
 834
 835         if (tc < 0 || (tc > QLC_DCB_MAX_TC))
 836                 return;
 837
 838         tc_cfg = &type->tc_cfg[tc];
 839         if (!tc_cfg->valid)
 840                 return;
 841
 842         *pgid = tc_cfg->pgid;
 843         *prio = tc_cfg->prio_type;
 844         *up_tc_map = tc_cfg->up_tc_map;
 845         pg = *pgid;
 846
 847         for (i = 0, cnt = 0; i < QLC_DCB_MAX_TC; i++) {
 848                 temp = &type->tc_cfg[i];
 849                 if (temp->valid && (pg == temp->pgid))
 850                         cnt++;
 851         }
 852
 853         tc_cfg->bwg_percent = (100 / cnt);
 854         *bw_per = tc_cfg->bwg_percent;
 855 }
 856
 857 static void qlcnic_dcb_get_pg_bwg_cfg_tx(struct net_device *netdev, int pgid,
 858                                          u8 *bw_pct)
 859 {
 860         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 861         struct qlcnic_dcb_pg_cfg *pgcfg;
 862         struct qlcnic_dcb_cee *type;
 863
 864         *bw_pct = 0;
 865         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
 866
 867         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state) ||
 868             !type->tc_param_valid)
 869                 return;
 870
 871         if (pgid < 0 || pgid > QLC_DCB_MAX_PG)
 872                 return;
 873
 874         pgcfg = &type->pg_cfg[pgid];
 875         if (!pgcfg->valid)
 876                 return;
 877
 878         *bw_pct = pgcfg->total_bw_percent;
 879 }
 880
 881 static void qlcnic_dcb_get_pfc_cfg(struct net_device *netdev, int prio,
 882                                    u8 *setting)
 883 {
 884         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 885         struct qlcnic_dcb_tc_cfg *tc_cfg;
 886         u8 val = QLC_DCB_GET_MAP(prio);
 887         struct qlcnic_dcb_cee *type;
 888         u8 i;
 889
 890         *setting = 0;
 891         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
 892
 893         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state) ||
 894             !type->pfc_mode_enable)
 895                 return;
 896
 897         for (i = 0; i < QLC_DCB_MAX_TC; i++) {
 898                 tc_cfg = &type->tc_cfg[i];
 899                 if (!tc_cfg->valid)
 900                         continue;
 901
 902                 if ((val & tc_cfg->up_tc_map) && (tc_cfg->prio_cfg[prio].valid))
 903                         *setting = tc_cfg->prio_cfg[prio].pfc_type;
 904         }
 905 }
 906
 907 static u8 qlcnic_dcb_get_capability(struct net_device *netdev, int capid,
 908                                     u8 *cap)
 909 {
 910         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 911
 912         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
 913                 return 0;
 914
 915         switch (capid) {
 916         case DCB_CAP_ATTR_PG:
 917         case DCB_CAP_ATTR_UP2TC:
 918         case DCB_CAP_ATTR_PFC:
 919         case DCB_CAP_ATTR_GSP:
 920                 *cap = true;
 921                 break;
 922         case DCB_CAP_ATTR_PG_TCS:
 923         case DCB_CAP_ATTR_PFC_TCS:
 924                 *cap = 0x80;    /* 8 priorities for PGs */
 925                 break;
 926         case DCB_CAP_ATTR_DCBX:
 927                 *cap = adapter->dcb->cfg->capability.dcb_capability;
 928                 break;
 929         default:
 930                 *cap = false;
 931         }
 932
 933         return 0;
 934 }
 935
 936 static int qlcnic_dcb_get_num_tcs(struct net_device *netdev, int attr, u8 *num)
 937 {
 938         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 939         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
 940
 941         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
 942                 return -EINVAL;
 943
 944         switch (attr) {
 945         case DCB_NUMTCS_ATTR_PG:
 946                 *num = cfg->capability.max_ets_tc;
 947                 return 0;
 948         case DCB_NUMTCS_ATTR_PFC:
 949                 *num = cfg->capability.max_pfc_tc;
 950                 return 0;
 951         default:
 952                 return -EINVAL;
 953         }
 954 }
 955
 956 static u8 qlcnic_dcb_get_app(struct net_device *netdev, u8 idtype, u16 id)
 957 {
 958         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 959         struct dcb_app app = {
 960                                 .selector = idtype,
 961                                 .protocol = id,
 962                              };
 963
 964         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
 965                 return 0;
 966
 967         return dcb_getapp(netdev, &app);
 968 }
 969
 970 static u8 qlcnic_dcb_get_pfc_state(struct net_device *netdev)
 971 {
 972         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 973         struct qlcnic_dcb *dcb = adapter->dcb;
 974
 975         if (!test_bit(QLCNIC_DCB_STATE, &dcb->state))
 976                 return 0;
 977
 978         return dcb->cfg->type[QLC_DCB_OPER_IDX].pfc_mode_enable;
 979 }
 980
 981 static u8 qlcnic_dcb_get_dcbx(struct net_device *netdev)
 982 {
 983         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 984         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
 985
 986         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
 987                 return 0;
 988
 989         return cfg->capability.dcb_capability;
 990 }
 991
 992 static u8 qlcnic_dcb_get_feat_cfg(struct net_device *netdev, int fid, u8 *flag)
 993 {
 994         struct qlcnic_adapter *adapter = netdev_priv(netdev);
 995         struct qlcnic_dcb_cee *type;
 996
 997         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
 998                 return 1;
 999
1000         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
1001         *flag = 0;
1002
1003         switch (fid) {
1004         case DCB_FEATCFG_ATTR_PG:
1005                 if (type->tc_param_valid)
1006                         *flag |= DCB_FEATCFG_ENABLE;
1007                 else
1008                         *flag |= DCB_FEATCFG_ERROR;
1009                 break;
1010         case DCB_FEATCFG_ATTR_PFC:
1011                 if (type->pfc_mode_enable) {
1012                         if (type->tc_cfg[0].prio_cfg[0].pfc_type)
1013                                 *flag |= DCB_FEATCFG_ENABLE;
1014                 } else {
1015                         *flag |= DCB_FEATCFG_ERROR;
1016                 }
1017                 break;
1018         case DCB_FEATCFG_ATTR_APP:
1019                 *flag |= DCB_FEATCFG_ENABLE;
1020                 break;
1021         default:
1022                 netdev_err(netdev, "Invalid Feature ID %d\n", fid);
1023                 return 1;
1024         }
1025
1026         return 0;
1027 }
1028
1029 static inline void
1030 qlcnic_dcb_get_pg_tc_cfg_rx(struct net_device *netdev, int prio, u8 *prio_type,
1031                             u8 *pgid, u8 *bw_pct, u8 *up_map)
1032 {
1033         *prio_type = *pgid = *bw_pct = *up_map = 0;
1034 }
1035
1036 static inline void
1037 qlcnic_dcb_get_pg_bwg_cfg_rx(struct net_device *netdev, int pgid, u8 *bw_pct)
1038 {
1039         *bw_pct = 0;
1040 }
1041
1042 static int qlcnic_dcb_peer_app_info(struct net_device *netdev,
1043                                     struct dcb_peer_app_info *info,
1044                                     u16 *app_count)
1045 {
1046         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1047         struct qlcnic_dcb_cee *peer;
1048         int i;
1049
1050         *app_count = 0;
1051
1052         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1053                 return 0;
1054
1055         peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1056
1057         for (i = 0; i < QLC_DCB_MAX_APP; i++) {
1058                 if (peer->app[i].valid)
1059                         (*app_count)++;
1060         }
1061
1062         return 0;
1063 }
1064
1065 static int qlcnic_dcb_peer_app_table(struct net_device *netdev,
1066                                      struct dcb_app *table)
1067 {
1068         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1069         struct qlcnic_dcb_cee *peer;
1070         struct qlcnic_dcb_app *app;
1071         int i, j;
1072
1073         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1074                 return 0;
1075
1076         peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1077
1078         for (i = 0, j = 0; i < QLC_DCB_MAX_APP; i++) {
1079                 app = &peer->app[i];
1080                 if (!app->valid)
1081                         continue;
1082
1083                 table[j].selector = app->selector;
1084                 table[j].priority = app->priority;
1085                 table[j++].protocol = app->protocol;
1086         }
1087
1088         return 0;
1089 }
1090
1091 static int qlcnic_dcb_cee_peer_get_pg(struct net_device *netdev,
1092                                       struct cee_pg *pg)
1093 {
1094         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1095         struct qlcnic_dcb_cee *peer;
1096         u8 i, j, k, map;
1097
1098         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1099                 return 0;
1100
1101         peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1102
1103         for (i = 0, j = 0; i < QLC_DCB_MAX_PG; i++) {
1104                 if (!peer->pg_cfg[i].valid)
1105                         continue;
1106
1107                 pg->pg_bw[j] = peer->pg_cfg[i].total_bw_percent;
1108
1109                 for (k = 0; k < QLC_DCB_MAX_TC; k++) {
1110                         if (peer->tc_cfg[i].valid &&
1111                             (peer->tc_cfg[i].pgid == i)) {
1112                                 map = peer->tc_cfg[i].up_tc_map;
1113                                 pg->prio_pg[j++] = map;
1114                                 break;
1115                         }
1116                 }
1117         }
1118
1119         return 0;
1120 }
1121
1122 static int qlcnic_dcb_cee_peer_get_pfc(struct net_device *netdev,
1123                                        struct cee_pfc *pfc)
1124 {
1125         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1126         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
1127         struct qlcnic_dcb_tc_cfg *tc;
1128         struct qlcnic_dcb_cee *peer;
1129         u8 i, setting, prio;
1130
1131         pfc->pfc_en = 0;
1132
1133         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1134                 return 0;
1135
1136         peer = &cfg->type[QLC_DCB_PEER_IDX];
1137
1138         for (i = 0; i < QLC_DCB_MAX_TC; i++) {
1139                 tc = &peer->tc_cfg[i];
1140                 prio = qlcnic_dcb_prio_count(tc->up_tc_map);
1141
1142                 setting = 0;
1143                 qlcnic_dcb_get_pfc_cfg(netdev, prio, &setting);
1144                 if (setting)
1145                         pfc->pfc_en |= QLC_DCB_GET_MAP(i);
1146         }
1147
1148         pfc->tcs_supported = cfg->capability.max_pfc_tc;
1149
1150         return 0;
1151 }
1152
1153 static const struct dcbnl_rtnl_ops qlcnic_dcbnl_ops = {
1154         .getstate               = qlcnic_dcb_get_state,
1155         .getpermhwaddr          = qlcnic_dcb_get_perm_hw_addr,
1156         .getpgtccfgtx           = qlcnic_dcb_get_pg_tc_cfg_tx,
1157         .getpgbwgcfgtx          = qlcnic_dcb_get_pg_bwg_cfg_tx,
1158         .getpfccfg              = qlcnic_dcb_get_pfc_cfg,
1159         .getcap                 = qlcnic_dcb_get_capability,
1160         .getnumtcs              = qlcnic_dcb_get_num_tcs,
1161         .getapp                 = qlcnic_dcb_get_app,
1162         .getpfcstate            = qlcnic_dcb_get_pfc_state,
1163         .getdcbx                = qlcnic_dcb_get_dcbx,
1164         .getfeatcfg             = qlcnic_dcb_get_feat_cfg,
1165
1166         .getpgtccfgrx           = qlcnic_dcb_get_pg_tc_cfg_rx,
1167         .getpgbwgcfgrx          = qlcnic_dcb_get_pg_bwg_cfg_rx,
1168
1169         .peer_getappinfo        = qlcnic_dcb_peer_app_info,
1170         .peer_getapptable       = qlcnic_dcb_peer_app_table,
1171         .cee_peer_getpg         = qlcnic_dcb_cee_peer_get_pg,
1172         .cee_peer_getpfc        = qlcnic_dcb_cee_peer_get_pfc,
1173 };