drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include <linux/types.h>
   9
  10 #include "qlcnic_sriov.h"
  11 #include "qlcnic.h"
  12 #include "qlcnic_83xx_hw.h"
  13
  14 #define QLC_BC_COMMAND  0
  15 #define QLC_BC_RESPONSE 1
  16
  17 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  18 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  19
  20 #define QLC_BC_MSG              0
  21 #define QLC_BC_CFREE            1
  22 #define QLC_BC_FLR              2
  23 #define QLC_BC_HDR_SZ           16
  24 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  25
  26 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  27 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  28
  29 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  30 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  31
  32 static void qlcnic_sriov_handle_async_issue_cmd(struct work_struct *work);
  33 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  34 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  35 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  36 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  37 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  38 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  39                                   struct qlcnic_cmd_args *);
  40 static int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *, u8);
  41 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  42 static int qlcnic_sriov_vf_shutdown(struct pci_dev *);
  43 static int qlcnic_sriov_vf_resume(struct qlcnic_adapter *);
  44 static int qlcnic_sriov_async_issue_cmd(struct qlcnic_adapter *,
  45                                         struct qlcnic_cmd_args *);
  46
  47 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  48         .read_crb                       = qlcnic_83xx_read_crb,
  49         .write_crb                      = qlcnic_83xx_write_crb,
  50         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  51         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  52         .get_mac_address                = qlcnic_83xx_get_mac_address,
  53         .setup_intr                     = qlcnic_83xx_setup_intr,
  54         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  55         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  56         .get_func_no                    = qlcnic_83xx_get_func_no,
  57         .api_lock                       = qlcnic_83xx_cam_lock,
  58         .api_unlock                     = qlcnic_83xx_cam_unlock,
  59         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  60         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  61         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  62         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  63         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  64         .setup_link_event               = qlcnic_83xx_setup_link_event,
  65         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  66         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  67         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  68         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  69         .napi_enable                    = qlcnic_83xx_napi_enable,
  70         .napi_disable                   = qlcnic_83xx_napi_disable,
  71         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  72         .config_rss                     = qlcnic_83xx_config_rss,
  73         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  74         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  75         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  76         .get_board_info                 = qlcnic_83xx_get_port_info,
  77         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  78         .enable_sds_intr                = qlcnic_83xx_enable_sds_intr,
  79         .disable_sds_intr               = qlcnic_83xx_disable_sds_intr,
  80 };
  81
  82 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  83         .config_bridged_mode    = qlcnic_config_bridged_mode,
  84         .config_led             = qlcnic_config_led,
  85         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  86         .napi_add               = qlcnic_83xx_napi_add,
  87         .napi_del               = qlcnic_83xx_napi_del,
  88         .shutdown               = qlcnic_sriov_vf_shutdown,
  89         .resume                 = qlcnic_sriov_vf_resume,
  90         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  91         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  92 };
  93
  94 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  95         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  96         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  97         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  98         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  99 };
 100
 101 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
 102 {
 103         return (val & (1 << QLC_BC_MSG)) ? true : false;
 104 }
 105
 106 static inline bool qlcnic_sriov_channel_free_check(u32 val)
 107 {
 108         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 109 }
 110
 111 static inline bool qlcnic_sriov_flr_check(u32 val)
 112 {
 113         return (val & (1 << QLC_BC_FLR)) ? true : false;
 114 }
 115
 116 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 117 {
 118         return (val >> 4) & 0xff;
 119 }
 120
 121 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 122 {
 123         struct pci_dev *dev = adapter->pdev;
 124         int pos;
 125         u16 stride, offset;
 126
 127         if (qlcnic_sriov_vf_check(adapter))
 128                 return 0;
 129
 130         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 131         if (!pos)
 132                 return 0;
 133         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 134         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 135
 136         return (dev->devfn + offset + stride * vf_id) & 0xff;
 137 }
 138
 139 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 140 {
 141         struct qlcnic_sriov *sriov;
 142         struct qlcnic_back_channel *bc;
 143         struct workqueue_struct *wq;
 144         struct qlcnic_vport *vp;
 145         struct qlcnic_vf_info *vf;
 146         int err, i;
 147
 148         if (!qlcnic_sriov_enable_check(adapter))
 149                 return -EIO;
 150
 151         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 152         if (!sriov)
 153                 return -ENOMEM;
 154
 155         adapter->ahw->sriov = sriov;
 156         sriov->num_vfs = num_vfs;
 157         bc = &sriov->bc;
 158         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 159                                  num_vfs, GFP_KERNEL);
 160         if (!sriov->vf_info) {
 161                 err = -ENOMEM;
 162                 goto qlcnic_free_sriov;
 163         }
 164
 165         wq = create_singlethread_workqueue("bc-trans");
 166         if (wq == NULL) {
 167                 err = -ENOMEM;
 168                 dev_err(&adapter->pdev->dev,
 169                         "Cannot create bc-trans workqueue\n");
 170                 goto qlcnic_free_vf_info;
 171         }
 172
 173         bc->bc_trans_wq = wq;
 174
 175         wq = create_singlethread_workqueue("async");
 176         if (wq == NULL) {
 177                 err = -ENOMEM;
 178                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 179                 goto qlcnic_destroy_trans_wq;
 180         }
 181
 182         bc->bc_async_wq =  wq;
 183         INIT_LIST_HEAD(&bc->async_cmd_list);
 184         INIT_WORK(&bc->vf_async_work, qlcnic_sriov_handle_async_issue_cmd);
 185         spin_lock_init(&bc->queue_lock);
 186         bc->adapter = adapter;
 187
 188         for (i = 0; i < num_vfs; i++) {
 189                 vf = &sriov->vf_info[i];
 190                 vf->adapter = adapter;
 191                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 192                 mutex_init(&vf->send_cmd_lock);
 193                 spin_lock_init(&vf->vlan_list_lock);
 194                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 195                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 196                 spin_lock_init(&vf->rcv_act.lock);
 197                 spin_lock_init(&vf->rcv_pend.lock);
 198                 init_completion(&vf->ch_free_cmpl);
 199
 200                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 201
 202                 if (qlcnic_sriov_pf_check(adapter)) {
 203                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 204                         if (!vp) {
 205                                 err = -ENOMEM;
 206                                 goto qlcnic_destroy_async_wq;
 207                         }
 208                         sriov->vf_info[i].vp = vp;
 209                         vp->vlan_mode = QLC_GUEST_VLAN_MODE;
 210                         vp->max_tx_bw = MAX_BW;
 211                         vp->min_tx_bw = MIN_BW;
 212                         vp->spoofchk = false;
 213                         random_ether_addr(vp->mac);
 214                         dev_info(&adapter->pdev->dev,
 215                                  "MAC Address %pM is configured for VF %d\n",
 216                                  vp->mac, i);
 217                 }
 218         }
 219
 220         return 0;
 221
 222 qlcnic_destroy_async_wq:
 223         destroy_workqueue(bc->bc_async_wq);
 224
 225 qlcnic_destroy_trans_wq:
 226         destroy_workqueue(bc->bc_trans_wq);
 227
 228 qlcnic_free_vf_info:
 229         kfree(sriov->vf_info);
 230
 231 qlcnic_free_sriov:
 232         kfree(adapter->ahw->sriov);
 233         return err;
 234 }
 235
 236 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 237 {
 238         struct qlcnic_bc_trans *trans;
 239         struct qlcnic_cmd_args cmd;
 240         unsigned long flags;
 241
 242         spin_lock_irqsave(&t_list->lock, flags);
 243
 244         while (!list_empty(&t_list->wait_list)) {
 245                 trans = list_first_entry(&t_list->wait_list,
 246                                          struct qlcnic_bc_trans, list);
 247                 list_del(&trans->list);
 248                 t_list->count--;
 249                 cmd.req.arg = (u32 *)trans->req_pay;
 250                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 251                 qlcnic_free_mbx_args(&cmd);
 252                 qlcnic_sriov_cleanup_transaction(trans);
 253         }
 254
 255         spin_unlock_irqrestore(&t_list->lock, flags);
 256 }
 257
 258 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 259 {
 260         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 261         struct qlcnic_back_channel *bc = &sriov->bc;
 262         struct qlcnic_vf_info *vf;
 263         int i;
 264
 265         if (!qlcnic_sriov_enable_check(adapter))
 266                 return;
 267
 268         qlcnic_sriov_cleanup_async_list(bc);
 269         destroy_workqueue(bc->bc_async_wq);
 270
 271         for (i = 0; i < sriov->num_vfs; i++) {
 272                 vf = &sriov->vf_info[i];
 273                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 274                 cancel_work_sync(&vf->trans_work);
 275                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 276         }
 277
 278         destroy_workqueue(bc->bc_trans_wq);
 279
 280         for (i = 0; i < sriov->num_vfs; i++)
 281                 kfree(sriov->vf_info[i].vp);
 282
 283         kfree(sriov->vf_info);
 284         kfree(adapter->ahw->sriov);
 285 }
 286
 287 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 288 {
 289         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 290         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 291         __qlcnic_sriov_cleanup(adapter);
 292 }
 293
 294 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 295 {
 296         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
 297                 return;
 298
 299         qlcnic_sriov_free_vlans(adapter);
 300
 301         if (qlcnic_sriov_pf_check(adapter))
 302                 qlcnic_sriov_pf_cleanup(adapter);
 303
 304         if (qlcnic_sriov_vf_check(adapter))
 305                 qlcnic_sriov_vf_cleanup(adapter);
 306 }
 307
 308 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 309                                     u32 *pay, u8 pci_func, u8 size)
 310 {
 311         struct qlcnic_hardware_context *ahw = adapter->ahw;
 312         struct qlcnic_mailbox *mbx = ahw->mailbox;
 313         struct qlcnic_cmd_args cmd;
 314         unsigned long timeout;
 315         int err;
 316
 317         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 318         cmd.hdr = hdr;
 319         cmd.pay = pay;
 320         cmd.pay_size = size;
 321         cmd.func_num = pci_func;
 322         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 323         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 324
 325         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 326         if (err) {
 327                 dev_err(&adapter->pdev->dev,
 328                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 329                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 330                         ahw->op_mode);
 331                 return err;
 332         }
 333
 334         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 335                 dev_err(&adapter->pdev->dev,
 336                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 337                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 338                         ahw->op_mode);
 339                 flush_workqueue(mbx->work_q);
 340         }
 341
 342         return cmd.rsp_opcode;
 343 }
 344
 345 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 346 {
 347         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 348         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 349         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 350         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 351         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 352         adapter->max_rds_rings = MAX_RDS_RINGS;
 353 }
 354
 355 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 356                                    struct qlcnic_info *npar_info, u16 vport_id)
 357 {
 358         struct device *dev = &adapter->pdev->dev;
 359         struct qlcnic_cmd_args cmd;
 360         int err;
 361         u32 status;
 362
 363         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 364         if (err)
 365                 return err;
 366
 367         cmd.req.arg[1] = vport_id << 16 | 0x1;
 368         err = qlcnic_issue_cmd(adapter, &cmd);
 369         if (err) {
 370                 dev_err(&adapter->pdev->dev,
 371                         "Failed to get vport info, err=%d\n", err);
 372                 qlcnic_free_mbx_args(&cmd);
 373                 return err;
 374         }
 375
 376         status = cmd.rsp.arg[2] & 0xffff;
 377         if (status & BIT_0)
 378                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 379         if (status & BIT_1)
 380                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 381         if (status & BIT_2)
 382                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 383         if (status & BIT_3)
 384                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 385         if (status & BIT_4)
 386                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 387         if (status & BIT_5)
 388                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 389         if (status & BIT_6)
 390                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 391         if (status & BIT_7)
 392                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 393         if (status & BIT_8)
 394                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 395         if (status & BIT_9)
 396                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 397
 398         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 399         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 400         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 401         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 402
 403         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 404                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 405                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 406                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 407                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 408                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 409                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 410                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 411                  npar_info->max_rx_mcast_mac_filters,
 412                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 413                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 414                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 415                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 416                  npar_info->max_remote_ipv6_addrs);
 417
 418         qlcnic_free_mbx_args(&cmd);
 419         return err;
 420 }
 421
 422 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 423                                       struct qlcnic_cmd_args *cmd)
 424 {
 425         adapter->rx_pvid = MSW(cmd->rsp.arg[1]) & 0xffff;
 426         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 427         return 0;
 428 }
 429
 430 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 431                                             struct qlcnic_cmd_args *cmd)
 432 {
 433         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 434         int i, num_vlans;
 435         u16 *vlans;
 436
 437         if (sriov->allowed_vlans)
 438                 return 0;
 439
 440         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 441         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 442         dev_info(&adapter->pdev->dev, "Number of allowed Guest VLANs = %d\n",
 443                  sriov->num_allowed_vlans);
 444
 445         qlcnic_sriov_alloc_vlans(adapter);
 446
 447         if (!sriov->any_vlan)
 448                 return 0;
 449
 450         num_vlans = sriov->num_allowed_vlans;
 451         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 452         if (!sriov->allowed_vlans)
 453                 return -ENOMEM;
 454
 455         vlans = (u16 *)&cmd->rsp.arg[3];
 456         for (i = 0; i < num_vlans; i++)
 457                 sriov->allowed_vlans[i] = vlans[i];
 458
 459         return 0;
 460 }
 461
 462 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
 463 {
 464         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 465         struct qlcnic_cmd_args cmd;
 466         int ret = 0;
 467
 468         memset(&cmd, 0, sizeof(cmd));
 469         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 470         if (ret)
 471                 return ret;
 472
 473         ret = qlcnic_issue_cmd(adapter, &cmd);
 474         if (ret) {
 475                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 476                         ret);
 477         } else {
 478                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 479                 switch (sriov->vlan_mode) {
 480                 case QLC_GUEST_VLAN_MODE:
 481                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 482                         break;
 483                 case QLC_PVID_MODE:
 484                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 485                         break;
 486                 }
 487         }
 488
 489         qlcnic_free_mbx_args(&cmd);
 490         return ret;
 491 }
 492
 493 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 494 {
 495         struct qlcnic_hardware_context *ahw = adapter->ahw;
 496         struct qlcnic_info nic_info;
 497         int err;
 498
 499         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 500         if (err)
 501                 return err;
 502
 503         ahw->max_mc_count = nic_info.max_rx_mcast_mac_filters;
 504
 505         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 506         if (err)
 507                 return -EIO;
 508
 509         if (qlcnic_83xx_get_port_info(adapter))
 510                 return -EIO;
 511
 512         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 513         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 514         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 515                  adapter->ahw->fw_hal_version);
 516
 517         ahw->physical_port = (u8) nic_info.phys_port;
 518         ahw->switch_mode = nic_info.switch_mode;
 519         ahw->max_mtu = nic_info.max_mtu;
 520         ahw->op_mode = nic_info.op_mode;
 521         ahw->capabilities = nic_info.capabilities;
 522         return 0;
 523 }
 524
 525 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 526                                  int pci_using_dac)
 527 {
 528         int err;
 529
 530         adapter->flags |= QLCNIC_VLAN_FILTERING;
 531         adapter->ahw->total_nic_func = 1;
 532         INIT_LIST_HEAD(&adapter->vf_mc_list);
 533         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 534                 dev_warn(&adapter->pdev->dev,
 535                          "Device does not support MSI interrupts\n");
 536
 537         /* compute and set default and max tx/sds rings */
 538         qlcnic_set_tx_ring_count(adapter, QLCNIC_SINGLE_RING);
 539         qlcnic_set_sds_ring_count(adapter, QLCNIC_SINGLE_RING);
 540
 541         err = qlcnic_setup_intr(adapter);
 542         if (err) {
 543                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 544                 goto err_out_disable_msi;
 545         }
 546
 547         err = qlcnic_83xx_setup_mbx_intr(adapter);
 548         if (err)
 549                 goto err_out_disable_msi;
 550
 551         err = qlcnic_sriov_init(adapter, 1);
 552         if (err)
 553                 goto err_out_disable_mbx_intr;
 554
 555         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 556         if (err)
 557                 goto err_out_cleanup_sriov;
 558
 559         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 560         if (err)
 561                 goto err_out_disable_bc_intr;
 562
 563         err = qlcnic_sriov_vf_init_driver(adapter);
 564         if (err)
 565                 goto err_out_send_channel_term;
 566
 567         err = qlcnic_sriov_get_vf_acl(adapter);
 568         if (err)
 569                 goto err_out_send_channel_term;
 570
 571         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 572         if (err)
 573                 goto err_out_send_channel_term;
 574
 575         pci_set_drvdata(adapter->pdev, adapter);
 576         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 577                  adapter->netdev->name);
 578
 579         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 580                              adapter->ahw->idc.delay);
 581         return 0;
 582
 583 err_out_send_channel_term:
 584         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 585
 586 err_out_disable_bc_intr:
 587         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 588
 589 err_out_cleanup_sriov:
 590         __qlcnic_sriov_cleanup(adapter);
 591
 592 err_out_disable_mbx_intr:
 593         qlcnic_83xx_free_mbx_intr(adapter);
 594
 595 err_out_disable_msi:
 596         qlcnic_teardown_intr(adapter);
 597         return err;
 598 }
 599
 600 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 601 {
 602         u32 state;
 603
 604         do {
 605                 msleep(20);
 606                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 607                         return -EIO;
 608                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 609         } while (state != QLC_83XX_IDC_DEV_READY);
 610
 611         return 0;
 612 }
 613
 614 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 615 {
 616         struct qlcnic_hardware_context *ahw = adapter->ahw;
 617         int err;
 618
 619         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 620         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 621         ahw->reset_context = 0;
 622         adapter->fw_fail_cnt = 0;
 623         ahw->msix_supported = 1;
 624         adapter->need_fw_reset = 0;
 625         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 626
 627         err = qlcnic_sriov_check_dev_ready(adapter);
 628         if (err)
 629                 return err;
 630
 631         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 632         if (err)
 633                 return err;
 634
 635         if (qlcnic_read_mac_addr(adapter))
 636                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 637
 638         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 639
 640         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 641         return 0;
 642 }
 643
 644 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 645 {
 646         struct qlcnic_hardware_context *ahw = adapter->ahw;
 647
 648         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 649         dev_info(&adapter->pdev->dev,
 650                  "HAL Version: %d Non Privileged SRIOV function\n",
 651                  ahw->fw_hal_version);
 652         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 653         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 654         return;
 655 }
 656
 657 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 658 {
 659         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 660         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 661         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 662 }
 663
 664 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 665 {
 666         u32 pay_size;
 667
 668         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 669
 670         if (pay_size)
 671                 pay_size = QLC_BC_PAYLOAD_SZ;
 672         else
 673                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 674
 675         return pay_size;
 676 }
 677
 678 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 679 {
 680         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 681         u8 i;
 682
 683         if (qlcnic_sriov_vf_check(adapter))
 684                 return 0;
 685
 686         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 687                 if (vf_info[i].pci_func == pci_func)
 688                         return i;
 689         }
 690
 691         return -EINVAL;
 692 }
 693
 694 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 695 {
 696         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 697         if (!*trans)
 698                 return -ENOMEM;
 699
 700         init_completion(&(*trans)->resp_cmpl);
 701         return 0;
 702 }
 703
 704 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 705                                             u32 size)
 706 {
 707         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 708         if (!*hdr)
 709                 return -ENOMEM;
 710
 711         return 0;
 712 }
 713
 714 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 715 {
 716         const struct qlcnic_mailbox_metadata *mbx_tbl;
 717         int i, size;
 718
 719         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 720         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 721
 722         for (i = 0; i < size; i++) {
 723                 if (type == mbx_tbl[i].cmd) {
 724                         mbx->op_type = QLC_BC_CMD;
 725                         mbx->req.num = mbx_tbl[i].in_args;
 726                         mbx->rsp.num = mbx_tbl[i].out_args;
 727                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 728                                                GFP_ATOMIC);
 729                         if (!mbx->req.arg)
 730                                 return -ENOMEM;
 731                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 732                                                GFP_ATOMIC);
 733                         if (!mbx->rsp.arg) {
 734                                 kfree(mbx->req.arg);
 735                                 mbx->req.arg = NULL;
 736                                 return -ENOMEM;
 737                         }
 738                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 739                                            (3 << 29));
 740                         mbx->rsp.arg[0] = (type & 0xffff) | mbx->rsp.num << 16;
 741                         return 0;
 742                 }
 743         }
 744         return -EINVAL;
 745 }
 746
 747 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 748                                        struct qlcnic_cmd_args *cmd,
 749                                        u16 seq, u8 msg_type)
 750 {
 751         struct qlcnic_bc_hdr *hdr;
 752         int i;
 753         u32 num_regs, bc_pay_sz;
 754         u16 remainder;
 755         u8 cmd_op, num_frags, t_num_frags;
 756
 757         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 758         if (msg_type == QLC_BC_COMMAND) {
 759                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 760                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 761                 num_regs = cmd->req.num;
 762                 trans->req_pay_size = (num_regs * 4);
 763                 num_regs = cmd->rsp.num;
 764                 trans->rsp_pay_size = (num_regs * 4);
 765                 cmd_op = cmd->req.arg[0] & 0xff;
 766                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 767                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 768                 if (remainder)
 769                         num_frags++;
 770                 t_num_frags = num_frags;
 771                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 772                         return -ENOMEM;
 773                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 774                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 775                 if (remainder)
 776                         num_frags++;
 777                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 778                         return -ENOMEM;
 779                 num_frags  = t_num_frags;
 780                 hdr = trans->req_hdr;
 781         }  else {
 782                 cmd->req.arg = (u32 *)trans->req_pay;
 783                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 784                 cmd_op = cmd->req.arg[0] & 0xff;
 785                 cmd->cmd_op = cmd_op;
 786                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 787                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 788                 if (remainder)
 789                         num_frags++;
 790                 cmd->req.num = trans->req_pay_size / 4;
 791                 cmd->rsp.num = trans->rsp_pay_size / 4;
 792                 hdr = trans->rsp_hdr;
 793                 cmd->op_type = trans->req_hdr->op_type;
 794         }
 795
 796         trans->trans_id = seq;
 797         trans->cmd_id = cmd_op;
 798         for (i = 0; i < num_frags; i++) {
 799                 hdr[i].version = 2;
 800                 hdr[i].msg_type = msg_type;
 801                 hdr[i].op_type = cmd->op_type;
 802                 hdr[i].num_cmds = 1;
 803                 hdr[i].num_frags = num_frags;
 804                 hdr[i].frag_num = i + 1;
 805                 hdr[i].cmd_op = cmd_op;
 806                 hdr[i].seq_id = seq;
 807         }
 808         return 0;
 809 }
 810
 811 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 812 {
 813         if (!trans)
 814                 return;
 815         kfree(trans->req_hdr);
 816         kfree(trans->rsp_hdr);
 817         kfree(trans);
 818 }
 819
 820 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 821                                     struct qlcnic_bc_trans *trans, u8 type)
 822 {
 823         struct qlcnic_trans_list *t_list;
 824         unsigned long flags;
 825         int ret = 0;
 826
 827         if (type == QLC_BC_RESPONSE) {
 828                 t_list = &vf->rcv_act;
 829                 spin_lock_irqsave(&t_list->lock, flags);
 830                 t_list->count--;
 831                 list_del(&trans->list);
 832                 if (t_list->count > 0)
 833                         ret = 1;
 834                 spin_unlock_irqrestore(&t_list->lock, flags);
 835         }
 836         if (type == QLC_BC_COMMAND) {
 837                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 838                         msleep(100);
 839                 vf->send_cmd = NULL;
 840                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 841         }
 842         return ret;
 843 }
 844
 845 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 846                                          struct qlcnic_vf_info *vf,
 847                                          work_func_t func)
 848 {
 849         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 850             vf->adapter->need_fw_reset)
 851                 return;
 852
 853         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 854 }
 855
 856 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 857 {
 858         struct completion *cmpl = &trans->resp_cmpl;
 859
 860         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 861                 trans->trans_state = QLC_END;
 862         else
 863                 trans->trans_state = QLC_ABORT;
 864
 865         return;
 866 }
 867
 868 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 869                                             u8 type)
 870 {
 871         if (type == QLC_BC_RESPONSE) {
 872                 trans->curr_rsp_frag++;
 873                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 874                         trans->trans_state = QLC_INIT;
 875                 else
 876                         trans->trans_state = QLC_END;
 877         } else {
 878                 trans->curr_req_frag++;
 879                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 880                         trans->trans_state = QLC_INIT;
 881                 else
 882                         trans->trans_state = QLC_WAIT_FOR_RESP;
 883         }
 884 }
 885
 886 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 887                                                u8 type)
 888 {
 889         struct qlcnic_vf_info *vf = trans->vf;
 890         struct completion *cmpl = &vf->ch_free_cmpl;
 891
 892         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 893                 trans->trans_state = QLC_ABORT;
 894                 return;
 895         }
 896
 897         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 898         qlcnic_sriov_handle_multi_frags(trans, type);
 899 }
 900
 901 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 902                                      u32 *hdr, u32 *pay, u32 size)
 903 {
 904         struct qlcnic_hardware_context *ahw = adapter->ahw;
 905         u32 fw_mbx;
 906         u8 i, max = 2, hdr_size, j;
 907
 908         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 909         max = (size / sizeof(u32)) + hdr_size;
 910
 911         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 912         for (i = 2, j = 0; j < hdr_size; i++, j++)
 913                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 914         for (; j < max; i++, j++)
 915                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 916 }
 917
 918 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 919 {
 920         int ret = -EBUSY;
 921         u32 timeout = 10000;
 922
 923         do {
 924                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 925                         ret = 0;
 926                         break;
 927                 }
 928                 mdelay(1);
 929         } while (--timeout);
 930
 931         return ret;
 932 }
 933
 934 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 935 {
 936         struct qlcnic_vf_info *vf = trans->vf;
 937         u32 pay_size, hdr_size;
 938         u32 *hdr, *pay;
 939         int ret;
 940         u8 pci_func = trans->func_id;
 941
 942         if (__qlcnic_sriov_issue_bc_post(vf))
 943                 return -EBUSY;
 944
 945         if (type == QLC_BC_COMMAND) {
 946                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 947                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 948                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 949                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 950                                                        trans->curr_req_frag);
 951                 pay_size = (pay_size / sizeof(u32));
 952         } else {
 953                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 954                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 955                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 956                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 957                                                        trans->curr_rsp_frag);
 958                 pay_size = (pay_size / sizeof(u32));
 959         }
 960
 961         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 962                                        pci_func, pay_size);
 963         return ret;
 964 }
 965
 966 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 967                                       struct qlcnic_vf_info *vf, u8 type)
 968 {
 969         bool flag = true;
 970         int err = -EIO;
 971
 972         while (flag) {
 973                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 974                     vf->adapter->need_fw_reset)
 975                         trans->trans_state = QLC_ABORT;
 976
 977                 switch (trans->trans_state) {
 978                 case QLC_INIT:
 979                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 980                         if (qlcnic_sriov_issue_bc_post(trans, type))
 981                                 trans->trans_state = QLC_ABORT;
 982                         break;
 983                 case QLC_WAIT_FOR_CHANNEL_FREE:
 984                         qlcnic_sriov_wait_for_channel_free(trans, type);
 985                         break;
 986                 case QLC_WAIT_FOR_RESP:
 987                         qlcnic_sriov_wait_for_resp(trans);
 988                         break;
 989                 case QLC_END:
 990                         err = 0;
 991                         flag = false;
 992                         break;
 993                 case QLC_ABORT:
 994                         err = -EIO;
 995                         flag = false;
 996                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 997                         break;
 998                 default:
 999                         err = -EIO;
1000                         flag = false;
1001                 }
1002         }
1003         return err;
1004 }
1005
1006 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
1007                                     struct qlcnic_bc_trans *trans, int pci_func)
1008 {
1009         struct qlcnic_vf_info *vf;
1010         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
1011
1012         if (index < 0)
1013                 return -EIO;
1014
1015         vf = &adapter->ahw->sriov->vf_info[index];
1016         trans->vf = vf;
1017         trans->func_id = pci_func;
1018
1019         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
1020                 if (qlcnic_sriov_pf_check(adapter))
1021                         return -EIO;
1022                 if (qlcnic_sriov_vf_check(adapter) &&
1023                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
1024                         return -EIO;
1025         }
1026
1027         mutex_lock(&vf->send_cmd_lock);
1028         vf->send_cmd = trans;
1029         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1030         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1031         mutex_unlock(&vf->send_cmd_lock);
1032         return err;
1033 }
1034
1035 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1036                                           struct qlcnic_bc_trans *trans,
1037                                           struct qlcnic_cmd_args *cmd)
1038 {
1039 #ifdef CONFIG_QLCNIC_SRIOV
1040         if (qlcnic_sriov_pf_check(adapter)) {
1041                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1042                 return;
1043         }
1044 #endif
1045         cmd->rsp.arg[0] |= (0x9 << 25);
1046         return;
1047 }
1048
1049 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1050 {
1051         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1052                                                  trans_work);
1053         struct qlcnic_bc_trans *trans = NULL;
1054         struct qlcnic_adapter *adapter  = vf->adapter;
1055         struct qlcnic_cmd_args cmd;
1056         u8 req;
1057
1058         if (adapter->need_fw_reset)
1059                 return;
1060
1061         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1062                 return;
1063
1064         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1065         trans = list_first_entry(&vf->rcv_act.wait_list,
1066                                  struct qlcnic_bc_trans, list);
1067         adapter = vf->adapter;
1068
1069         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1070                                         QLC_BC_RESPONSE))
1071                 goto cleanup_trans;
1072
1073         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1074         trans->trans_state = QLC_INIT;
1075         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1076
1077 cleanup_trans:
1078         qlcnic_free_mbx_args(&cmd);
1079         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1080         qlcnic_sriov_cleanup_transaction(trans);
1081         if (req)
1082                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1083                                              qlcnic_sriov_process_bc_cmd);
1084 }
1085
1086 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1087                                         struct qlcnic_vf_info *vf)
1088 {
1089         struct qlcnic_bc_trans *trans;
1090         u32 pay_size;
1091
1092         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1093                 return;
1094
1095         trans = vf->send_cmd;
1096
1097         if (trans == NULL)
1098                 goto clear_send;
1099
1100         if (trans->trans_id != hdr->seq_id)
1101                 goto clear_send;
1102
1103         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1104                                                trans->curr_rsp_frag);
1105         qlcnic_sriov_pull_bc_msg(vf->adapter,
1106                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1107                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1108                                  pay_size);
1109         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1110                 goto clear_send;
1111
1112         complete(&trans->resp_cmpl);
1113
1114 clear_send:
1115         clear_bit(QLC_BC_VF_SEND, &vf->state);
1116 }
1117
1118 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1119                                 struct qlcnic_vf_info *vf,
1120                                 struct qlcnic_bc_trans *trans)
1121 {
1122         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1123
1124         t_list->count++;
1125         list_add_tail(&trans->list, &t_list->wait_list);
1126         if (t_list->count == 1)
1127                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1128                                              qlcnic_sriov_process_bc_cmd);
1129         return 0;
1130 }
1131
1132 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1133                                      struct qlcnic_vf_info *vf,
1134                                      struct qlcnic_bc_trans *trans)
1135 {
1136         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1137
1138         spin_lock(&t_list->lock);
1139
1140         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1141
1142         spin_unlock(&t_list->lock);
1143         return 0;
1144 }
1145
1146 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1147                                               struct qlcnic_vf_info *vf,
1148                                               struct qlcnic_bc_hdr *hdr)
1149 {
1150         struct qlcnic_bc_trans *trans = NULL;
1151         struct list_head *node;
1152         u32 pay_size, curr_frag;
1153         u8 found = 0, active = 0;
1154
1155         spin_lock(&vf->rcv_pend.lock);
1156         if (vf->rcv_pend.count > 0) {
1157                 list_for_each(node, &vf->rcv_pend.wait_list) {
1158                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1159                         if (trans->trans_id == hdr->seq_id) {
1160                                 found = 1;
1161                                 break;
1162                         }
1163                 }
1164         }
1165
1166         if (found) {
1167                 curr_frag = trans->curr_req_frag;
1168                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1169                                                        curr_frag);
1170                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1171                                          (u32 *)(trans->req_hdr + curr_frag),
1172                                          (u32 *)(trans->req_pay + curr_frag),
1173                                          pay_size);
1174                 trans->curr_req_frag++;
1175                 if (trans->curr_req_frag >= hdr->num_frags) {
1176                         vf->rcv_pend.count--;
1177                         list_del(&trans->list);
1178                         active = 1;
1179                 }
1180         }
1181         spin_unlock(&vf->rcv_pend.lock);
1182
1183         if (active)
1184                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1185                         qlcnic_sriov_cleanup_transaction(trans);
1186
1187         return;
1188 }
1189
1190 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1191                                        struct qlcnic_bc_hdr *hdr,
1192                                        struct qlcnic_vf_info *vf)
1193 {
1194         struct qlcnic_bc_trans *trans;
1195         struct qlcnic_adapter *adapter = vf->adapter;
1196         struct qlcnic_cmd_args cmd;
1197         u32 pay_size;
1198         int err;
1199         u8 cmd_op;
1200
1201         if (adapter->need_fw_reset)
1202                 return;
1203
1204         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1205             hdr->op_type != QLC_BC_CMD &&
1206             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1207                 return;
1208
1209         if (hdr->frag_num > 1) {
1210                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1211                 return;
1212         }
1213
1214         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1215         cmd_op = hdr->cmd_op;
1216         if (qlcnic_sriov_alloc_bc_trans(&trans))
1217                 return;
1218
1219         if (hdr->op_type == QLC_BC_CMD)
1220                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1221         else
1222                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1223
1224         if (err) {
1225                 qlcnic_sriov_cleanup_transaction(trans);
1226                 return;
1227         }
1228
1229         cmd.op_type = hdr->op_type;
1230         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1231                                         QLC_BC_COMMAND)) {
1232                 qlcnic_free_mbx_args(&cmd);
1233                 qlcnic_sriov_cleanup_transaction(trans);
1234                 return;
1235         }
1236
1237         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1238                                          trans->curr_req_frag);
1239         qlcnic_sriov_pull_bc_msg(vf->adapter,
1240                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1241                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1242                                  pay_size);
1243         trans->func_id = vf->pci_func;
1244         trans->vf = vf;
1245         trans->trans_id = hdr->seq_id;
1246         trans->curr_req_frag++;
1247
1248         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1249                 return;
1250
1251         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1252                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1253                         qlcnic_free_mbx_args(&cmd);
1254                         qlcnic_sriov_cleanup_transaction(trans);
1255                 }
1256         } else {
1257                 spin_lock(&vf->rcv_pend.lock);
1258                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1259                 vf->rcv_pend.count++;
1260                 spin_unlock(&vf->rcv_pend.lock);
1261         }
1262 }
1263
1264 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1265                                           struct qlcnic_vf_info *vf)
1266 {
1267         struct qlcnic_bc_hdr hdr;
1268         u32 *ptr = (u32 *)&hdr;
1269         u8 msg_type, i;
1270
1271         for (i = 2; i < 6; i++)
1272                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1273         msg_type = hdr.msg_type;
1274
1275         switch (msg_type) {
1276         case QLC_BC_COMMAND:
1277                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1278                 break;
1279         case QLC_BC_RESPONSE:
1280                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1281                 break;
1282         }
1283 }
1284
1285 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1286                                           struct qlcnic_vf_info *vf)
1287 {
1288         struct qlcnic_adapter *adapter = vf->adapter;
1289
1290         if (qlcnic_sriov_pf_check(adapter))
1291                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1292         else
1293                 dev_err(&adapter->pdev->dev,
1294                         "Invalid event to VF. VF should not get FLR event\n");
1295 }
1296
1297 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1298 {
1299         struct qlcnic_vf_info *vf;
1300         struct qlcnic_sriov *sriov;
1301         int index;
1302         u8 pci_func;
1303
1304         sriov = adapter->ahw->sriov;
1305         pci_func = qlcnic_sriov_target_func_id(event);
1306         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1307
1308         if (index < 0)
1309                 return;
1310
1311         vf = &sriov->vf_info[index];
1312         vf->pci_func = pci_func;
1313
1314         if (qlcnic_sriov_channel_free_check(event))
1315                 complete(&vf->ch_free_cmpl);
1316
1317         if (qlcnic_sriov_flr_check(event)) {
1318                 qlcnic_sriov_handle_flr_event(sriov, vf);
1319                 return;
1320         }
1321
1322         if (qlcnic_sriov_bc_msg_check(event))
1323                 qlcnic_sriov_handle_msg_event(sriov, vf);
1324 }
1325
1326 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1327 {
1328         struct qlcnic_cmd_args cmd;
1329         int err;
1330
1331         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1332                 return 0;
1333
1334         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1335                 return -ENOMEM;
1336
1337         if (enable)
1338                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1339
1340         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1341
1342         if (err != QLCNIC_RCODE_SUCCESS) {
1343                 dev_err(&adapter->pdev->dev,
1344                         "Failed to %s bc events, err=%d\n",
1345                         (enable ? "enable" : "disable"), err);
1346         }
1347
1348         qlcnic_free_mbx_args(&cmd);
1349         return err;
1350 }
1351
1352 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1353                                      struct qlcnic_bc_trans *trans)
1354 {
1355         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1356         u32 state;
1357
1358         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1359         if (state == QLC_83XX_IDC_DEV_READY) {
1360                 msleep(20);
1361                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1362                 trans->trans_state = QLC_INIT;
1363                 if (++adapter->fw_fail_cnt > max)
1364                         return -EIO;
1365                 else
1366                         return 0;
1367         }
1368
1369         return -EIO;
1370 }
1371
1372 static int __qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1373                                   struct qlcnic_cmd_args *cmd)
1374 {
1375         struct qlcnic_hardware_context *ahw = adapter->ahw;
1376         struct qlcnic_mailbox *mbx = ahw->mailbox;
1377         struct device *dev = &adapter->pdev->dev;
1378         struct qlcnic_bc_trans *trans;
1379         int err;
1380         u32 rsp_data, opcode, mbx_err_code, rsp;
1381         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1382         u8 func = ahw->pci_func;
1383
1384         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1385         if (rsp)
1386                 goto free_cmd;
1387
1388         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1389         if (rsp)
1390                 goto cleanup_transaction;
1391
1392 retry:
1393         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1394                 rsp = -EIO;
1395                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1396                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1397                 goto err_out;
1398         }
1399
1400         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1401         if (err) {
1402                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1403                         (cmd->req.arg[0] & 0xffff), func);
1404                 rsp = QLCNIC_RCODE_TIMEOUT;
1405
1406                 /* After adapter reset PF driver may take some time to
1407                  * respond to VF's request. Retry request till maximum retries.
1408                  */
1409                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1410                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1411                         goto retry;
1412
1413                 goto err_out;
1414         }
1415
1416         rsp_data = cmd->rsp.arg[0];
1417         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1418         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1419
1420         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1421             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1422                 rsp = QLCNIC_RCODE_SUCCESS;
1423         } else {
1424                 if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
1425                         rsp = QLCNIC_RCODE_SUCCESS;
1426                 } else {
1427                         rsp = mbx_err_code;
1428                         if (!rsp)
1429                                 rsp = 1;
1430
1431                         dev_err(dev,
1432                                 "MBX command 0x%x failed with err:0x%x for VF %d\n",
1433                                 opcode, mbx_err_code, func);
1434                 }
1435         }
1436
1437 err_out:
1438         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1439                 ahw->reset_context = 1;
1440                 adapter->need_fw_reset = 1;
1441                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1442         }
1443
1444 cleanup_transaction:
1445         qlcnic_sriov_cleanup_transaction(trans);
1446
1447 free_cmd:
1448         if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
1449                 qlcnic_free_mbx_args(cmd);
1450                 kfree(cmd);
1451         }
1452
1453         return rsp;
1454 }
1455
1456
1457 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1458                                   struct qlcnic_cmd_args *cmd)
1459 {
1460         if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT)
1461                 return qlcnic_sriov_async_issue_cmd(adapter, cmd);
1462         else
1463                 return __qlcnic_sriov_issue_cmd(adapter, cmd);
1464 }
1465
1466 static int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1467 {
1468         struct qlcnic_cmd_args cmd;
1469         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1470         int ret;
1471
1472         memset(&cmd, 0, sizeof(cmd));
1473         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1474                 return -ENOMEM;
1475
1476         ret = qlcnic_issue_cmd(adapter, &cmd);
1477         if (ret) {
1478                 dev_err(&adapter->pdev->dev,
1479                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1480                         ret);
1481                 goto out;
1482         }
1483
1484         cmd_op = (cmd.rsp.arg[0] & 0xff);
1485         if (cmd.rsp.arg[0] >> 25 == 2)
1486                 return 2;
1487         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1488                 set_bit(QLC_BC_VF_STATE, &vf->state);
1489         else
1490                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1491
1492 out:
1493         qlcnic_free_mbx_args(&cmd);
1494         return ret;
1495 }
1496
1497 static void qlcnic_vf_add_mc_list(struct net_device *netdev, const u8 *mac,
1498                                   enum qlcnic_mac_type mac_type)
1499 {
1500         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1501         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1502         struct qlcnic_vf_info *vf;
1503         u16 vlan_id;
1504         int i;
1505
1506         vf = &adapter->ahw->sriov->vf_info[0];
1507
1508         if (!qlcnic_sriov_check_any_vlan(vf)) {
1509                 qlcnic_nic_add_mac(adapter, mac, 0, mac_type);
1510         } else {
1511                 spin_lock(&vf->vlan_list_lock);
1512                 for (i = 0; i < sriov->num_allowed_vlans; i++) {
1513                         vlan_id = vf->sriov_vlans[i];
1514                         if (vlan_id)
1515                                 qlcnic_nic_add_mac(adapter, mac, vlan_id,
1516                                                    mac_type);
1517                 }
1518                 spin_unlock(&vf->vlan_list_lock);
1519                 if (qlcnic_84xx_check(adapter))
1520                         qlcnic_nic_add_mac(adapter, mac, 0, mac_type);
1521         }
1522 }
1523
1524 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1525 {
1526         struct list_head *head = &bc->async_cmd_list;
1527         struct qlcnic_async_cmd *entry;
1528
1529         flush_workqueue(bc->bc_async_wq);
1530         cancel_work_sync(&bc->vf_async_work);
1531
1532         spin_lock(&bc->queue_lock);
1533         while (!list_empty(head)) {
1534                 entry = list_entry(head->next, struct qlcnic_async_cmd,
1535                                    list);
1536                 list_del(&entry->list);
1537                 kfree(entry->cmd);
1538                 kfree(entry);
1539         }
1540         spin_unlock(&bc->queue_lock);
1541 }
1542
1543 void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1544 {
1545         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1546         struct qlcnic_hardware_context *ahw = adapter->ahw;
1547         static const u8 bcast_addr[ETH_ALEN] = {
1548                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
1549         };
1550         struct netdev_hw_addr *ha;
1551         u32 mode = VPORT_MISS_MODE_DROP;
1552
1553         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1554                 return;
1555
1556         if (netdev->flags & IFF_PROMISC) {
1557                 if (!(adapter->flags & QLCNIC_PROMISC_DISABLED))
1558                         mode = VPORT_MISS_MODE_ACCEPT_ALL;
1559         } else if ((netdev->flags & IFF_ALLMULTI) ||
1560                    (netdev_mc_count(netdev) > ahw->max_mc_count)) {
1561                 mode = VPORT_MISS_MODE_ACCEPT_MULTI;
1562         } else {
1563                 qlcnic_vf_add_mc_list(netdev, bcast_addr, QLCNIC_BROADCAST_MAC);
1564                 if (!netdev_mc_empty(netdev)) {
1565                         qlcnic_flush_mcast_mac(adapter);
1566                         netdev_for_each_mc_addr(ha, netdev)
1567                                 qlcnic_vf_add_mc_list(netdev, ha->addr,
1568                                                       QLCNIC_MULTICAST_MAC);
1569                 }
1570         }
1571
1572         /* configure unicast MAC address, if there is not sufficient space
1573          * to store all the unicast addresses then enable promiscuous mode
1574          */
1575         if (netdev_uc_count(netdev) > ahw->max_uc_count) {
1576                 mode = VPORT_MISS_MODE_ACCEPT_ALL;
1577         } else if (!netdev_uc_empty(netdev)) {
1578                 netdev_for_each_uc_addr(ha, netdev)
1579                         qlcnic_vf_add_mc_list(netdev, ha->addr,
1580                                               QLCNIC_UNICAST_MAC);
1581         }
1582
1583         if (adapter->pdev->is_virtfn) {
1584                 if (mode == VPORT_MISS_MODE_ACCEPT_ALL &&
1585                     !adapter->fdb_mac_learn) {
1586                         qlcnic_alloc_lb_filters_mem(adapter);
1587                         adapter->drv_mac_learn = 1;
1588                         adapter->rx_mac_learn = true;
1589                 } else {
1590                         adapter->drv_mac_learn = 0;
1591                         adapter->rx_mac_learn = false;
1592                 }
1593         }
1594
1595         qlcnic_nic_set_promisc(adapter, mode);
1596 }
1597
1598 static void qlcnic_sriov_handle_async_issue_cmd(struct work_struct *work)
1599 {
1600         struct qlcnic_async_cmd *entry, *tmp;
1601         struct qlcnic_back_channel *bc;
1602         struct qlcnic_cmd_args *cmd;
1603         struct list_head *head;
1604         LIST_HEAD(del_list);
1605
1606         bc = container_of(work, struct qlcnic_back_channel, vf_async_work);
1607         head = &bc->async_cmd_list;
1608
1609         spin_lock(&bc->queue_lock);
1610         list_splice_init(head, &del_list);
1611         spin_unlock(&bc->queue_lock);
1612
1613         list_for_each_entry_safe(entry, tmp, &del_list, list) {
1614                 list_del(&entry->list);
1615                 cmd = entry->cmd;
1616                 __qlcnic_sriov_issue_cmd(bc->adapter, cmd);
1617                 kfree(entry);
1618         }
1619
1620         if (!list_empty(head))
1621                 queue_work(bc->bc_async_wq, &bc->vf_async_work);
1622
1623         return;
1624 }
1625
1626 static struct qlcnic_async_cmd *
1627 qlcnic_sriov_alloc_async_cmd(struct qlcnic_back_channel *bc,
1628                              struct qlcnic_cmd_args *cmd)
1629 {
1630         struct qlcnic_async_cmd *entry = NULL;
1631
1632         entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
1633         if (!entry)
1634                 return NULL;
1635
1636         entry->cmd = cmd;
1637
1638         spin_lock(&bc->queue_lock);
1639         list_add_tail(&entry->list, &bc->async_cmd_list);
1640         spin_unlock(&bc->queue_lock);
1641
1642         return entry;
1643 }
1644
1645 static void qlcnic_sriov_schedule_async_cmd(struct qlcnic_back_channel *bc,
1646                                             struct qlcnic_cmd_args *cmd)
1647 {
1648         struct qlcnic_async_cmd *entry = NULL;
1649
1650         entry = qlcnic_sriov_alloc_async_cmd(bc, cmd);
1651         if (!entry) {
1652                 qlcnic_free_mbx_args(cmd);
1653                 kfree(cmd);
1654                 return;
1655         }
1656
1657         queue_work(bc->bc_async_wq, &bc->vf_async_work);
1658 }
1659
1660 static int qlcnic_sriov_async_issue_cmd(struct qlcnic_adapter *adapter,
1661                                         struct qlcnic_cmd_args *cmd)
1662 {
1663
1664         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1665
1666         if (adapter->need_fw_reset)
1667                 return -EIO;
1668
1669         qlcnic_sriov_schedule_async_cmd(bc, cmd);
1670
1671         return 0;
1672 }
1673
1674 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1675 {
1676         int err;
1677
1678         adapter->need_fw_reset = 0;
1679         qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
1680         qlcnic_83xx_enable_mbx_interrupt(adapter);
1681
1682         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1683         if (err)
1684                 return err;
1685
1686         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1687         if (err)
1688                 goto err_out_cleanup_bc_intr;
1689
1690         err = qlcnic_sriov_vf_init_driver(adapter);
1691         if (err)
1692                 goto err_out_term_channel;
1693
1694         return 0;
1695
1696 err_out_term_channel:
1697         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1698
1699 err_out_cleanup_bc_intr:
1700         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1701         return err;
1702 }
1703
1704 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1705 {
1706         struct net_device *netdev = adapter->netdev;
1707
1708         if (netif_running(netdev)) {
1709                 if (!qlcnic_up(adapter, netdev))
1710                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1711         }
1712
1713         netif_device_attach(netdev);
1714 }
1715
1716 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1717 {
1718         struct qlcnic_hardware_context *ahw = adapter->ahw;
1719         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1720         struct net_device *netdev = adapter->netdev;
1721         u8 i, max_ints = ahw->num_msix - 1;
1722
1723         netif_device_detach(netdev);
1724         qlcnic_83xx_detach_mailbox_work(adapter);
1725         qlcnic_83xx_disable_mbx_intr(adapter);
1726
1727         if (netif_running(netdev))
1728                 qlcnic_down(adapter, netdev);
1729
1730         for (i = 0; i < max_ints; i++) {
1731                 intr_tbl[i].id = i;
1732                 intr_tbl[i].enabled = 0;
1733                 intr_tbl[i].src = 0;
1734         }
1735         ahw->reset_context = 0;
1736 }
1737
1738 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1739 {
1740         struct qlcnic_hardware_context *ahw = adapter->ahw;
1741         struct device *dev = &adapter->pdev->dev;
1742         struct qlc_83xx_idc *idc = &ahw->idc;
1743         u8 func = ahw->pci_func;
1744         u32 state;
1745
1746         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1747             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1748                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1749                         qlcnic_sriov_vf_attach(adapter);
1750                         adapter->fw_fail_cnt = 0;
1751                         dev_info(dev,
1752                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1753                                  __func__, func);
1754                 } else {
1755                         dev_err(dev,
1756                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1757                                 __func__, func);
1758                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1759                         dev_info(dev, "Current state 0x%x after FW reset\n",
1760                                  state);
1761                 }
1762         }
1763
1764         return 0;
1765 }
1766
1767 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1768 {
1769         struct qlcnic_hardware_context *ahw = adapter->ahw;
1770         struct qlcnic_mailbox *mbx = ahw->mailbox;
1771         struct device *dev = &adapter->pdev->dev;
1772         struct qlc_83xx_idc *idc = &ahw->idc;
1773         u8 func = ahw->pci_func;
1774         u32 state;
1775
1776         adapter->reset_ctx_cnt++;
1777
1778         /* Skip the context reset and check if FW is hung */
1779         if (adapter->reset_ctx_cnt < 3) {
1780                 adapter->need_fw_reset = 1;
1781                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1782                 dev_info(dev,
1783                          "Resetting context, wait here to check if FW is in failed state\n");
1784                 return 0;
1785         }
1786
1787         /* Check if number of resets exceed the threshold.
1788          * If it exceeds the threshold just fail the VF.
1789          */
1790         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1791                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1792                 adapter->tx_timeo_cnt = 0;
1793                 adapter->fw_fail_cnt = 0;
1794                 adapter->reset_ctx_cnt = 0;
1795                 qlcnic_sriov_vf_detach(adapter);
1796                 dev_err(dev,
1797                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1798                 return -EIO;
1799         }
1800
1801         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1802         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1803                  __func__, adapter->reset_ctx_cnt, func);
1804         set_bit(__QLCNIC_RESETTING, &adapter->state);
1805         adapter->need_fw_reset = 1;
1806         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1807         qlcnic_sriov_vf_detach(adapter);
1808         adapter->need_fw_reset = 0;
1809
1810         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1811                 qlcnic_sriov_vf_attach(adapter);
1812                 adapter->tx_timeo_cnt = 0;
1813                 adapter->reset_ctx_cnt = 0;
1814                 adapter->fw_fail_cnt = 0;
1815                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1816         } else {
1817                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1818                         __func__, func);
1819                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1820                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1821         }
1822
1823         return 0;
1824 }
1825
1826 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1827 {
1828         struct qlcnic_hardware_context *ahw = adapter->ahw;
1829         int ret = 0;
1830
1831         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1832                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1833         else if (ahw->reset_context)
1834                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1835
1836         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1837         return ret;
1838 }
1839
1840 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1841 {
1842         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1843
1844         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1845         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1846                 qlcnic_sriov_vf_detach(adapter);
1847
1848         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1849         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1850         return -EIO;
1851 }
1852
1853 static int
1854 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1855 {
1856         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1857         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1858
1859         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1860         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1861                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1862                 adapter->tx_timeo_cnt = 0;
1863                 adapter->reset_ctx_cnt = 0;
1864                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1865                 qlcnic_sriov_vf_detach(adapter);
1866         }
1867
1868         return 0;
1869 }
1870
1871 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1872 {
1873         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1874         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1875         u8 func = adapter->ahw->pci_func;
1876
1877         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1878                 dev_err(&adapter->pdev->dev,
1879                         "Firmware hang detected by VF 0x%x\n", func);
1880                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1881                 adapter->tx_timeo_cnt = 0;
1882                 adapter->reset_ctx_cnt = 0;
1883                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1884                 qlcnic_sriov_vf_detach(adapter);
1885         }
1886         return 0;
1887 }
1888
1889 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1890 {
1891         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1892         return 0;
1893 }
1894
1895 static void qlcnic_sriov_vf_periodic_tasks(struct qlcnic_adapter *adapter)
1896 {
1897         if (adapter->fhash.fnum)
1898                 qlcnic_prune_lb_filters(adapter);
1899 }
1900
1901 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1902 {
1903         struct qlcnic_adapter *adapter;
1904         struct qlc_83xx_idc *idc;
1905         int ret = 0;
1906
1907         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1908         idc = &adapter->ahw->idc;
1909         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1910
1911         switch (idc->curr_state) {
1912         case QLC_83XX_IDC_DEV_READY:
1913                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1914                 break;
1915         case QLC_83XX_IDC_DEV_NEED_RESET:
1916         case QLC_83XX_IDC_DEV_INIT:
1917                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1918                 break;
1919         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1920                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1921                 break;
1922         case QLC_83XX_IDC_DEV_FAILED:
1923                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1924                 break;
1925         case QLC_83XX_IDC_DEV_QUISCENT:
1926                 break;
1927         default:
1928                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1929         }
1930
1931         idc->prev_state = idc->curr_state;
1932         qlcnic_sriov_vf_periodic_tasks(adapter);
1933
1934         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1935                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1936                                      idc->delay);
1937 }
1938
1939 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1940 {
1941         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1942                 msleep(20);
1943
1944         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1945         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1946         cancel_delayed_work_sync(&adapter->fw_work);
1947 }
1948
1949 static int qlcnic_sriov_check_vlan_id(struct qlcnic_sriov *sriov,
1950                                       struct qlcnic_vf_info *vf, u16 vlan_id)
1951 {
1952         int i, err = -EINVAL;
1953
1954         if (!vf->sriov_vlans)
1955                 return err;
1956
1957         spin_lock_bh(&vf->vlan_list_lock);
1958
1959         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1960                 if (vf->sriov_vlans[i] == vlan_id) {
1961                         err = 0;
1962                         break;
1963                 }
1964         }
1965
1966         spin_unlock_bh(&vf->vlan_list_lock);
1967         return err;
1968 }
1969
1970 static int qlcnic_sriov_validate_num_vlans(struct qlcnic_sriov *sriov,
1971                                            struct qlcnic_vf_info *vf)
1972 {
1973         int err = 0;
1974
1975         spin_lock_bh(&vf->vlan_list_lock);
1976
1977         if (vf->num_vlan >= sriov->num_allowed_vlans)
1978                 err = -EINVAL;
1979
1980         spin_unlock_bh(&vf->vlan_list_lock);
1981         return err;
1982 }
1983
1984 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_adapter *adapter,
1985                                           u16 vid, u8 enable)
1986 {
1987         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1988         struct qlcnic_vf_info *vf;
1989         bool vlan_exist;
1990         u8 allowed = 0;
1991         int i;
1992
1993         vf = &adapter->ahw->sriov->vf_info[0];
1994         vlan_exist = qlcnic_sriov_check_any_vlan(vf);
1995         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1996                 return -EINVAL;
1997
1998         if (enable) {
1999                 if (qlcnic_83xx_vf_check(adapter) && vlan_exist)
2000                         return -EINVAL;
2001
2002                 if (qlcnic_sriov_validate_num_vlans(sriov, vf))
2003                         return -EINVAL;
2004
2005                 if (sriov->any_vlan) {
2006                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2007                                 if (sriov->allowed_vlans[i] == vid)
2008                                         allowed = 1;
2009                         }
2010
2011                         if (!allowed)
2012                                 return -EINVAL;
2013                 }
2014         } else {
2015                 if (!vlan_exist || qlcnic_sriov_check_vlan_id(sriov, vf, vid))
2016                         return -EINVAL;
2017         }
2018
2019         return 0;
2020 }
2021
2022 static void qlcnic_sriov_vlan_operation(struct qlcnic_vf_info *vf, u16 vlan_id,
2023                                         enum qlcnic_vlan_operations opcode)
2024 {
2025         struct qlcnic_adapter *adapter = vf->adapter;
2026         struct qlcnic_sriov *sriov;
2027
2028         sriov = adapter->ahw->sriov;
2029
2030         if (!vf->sriov_vlans)
2031                 return;
2032
2033         spin_lock_bh(&vf->vlan_list_lock);
2034
2035         switch (opcode) {
2036         case QLC_VLAN_ADD:
2037                 qlcnic_sriov_add_vlan_id(sriov, vf, vlan_id);
2038                 break;
2039         case QLC_VLAN_DELETE:
2040                 qlcnic_sriov_del_vlan_id(sriov, vf, vlan_id);
2041                 break;
2042         default:
2043                 netdev_err(adapter->netdev, "Invalid VLAN operation\n");
2044         }
2045
2046         spin_unlock_bh(&vf->vlan_list_lock);
2047         return;
2048 }
2049
2050 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
2051                                    u16 vid, u8 enable)
2052 {
2053         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2054         struct net_device *netdev = adapter->netdev;
2055         struct qlcnic_vf_info *vf;
2056         struct qlcnic_cmd_args cmd;
2057         int ret;
2058
2059         memset(&cmd, 0, sizeof(cmd));
2060         if (vid == 0)
2061                 return 0;
2062
2063         vf = &adapter->ahw->sriov->vf_info[0];
2064         ret = qlcnic_sriov_validate_vlan_cfg(adapter, vid, enable);
2065         if (ret)
2066                 return ret;
2067
2068         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
2069                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
2070         if (ret)
2071                 return ret;
2072
2073         cmd.req.arg[1] = (enable & 1) | vid << 16;
2074
2075         qlcnic_sriov_cleanup_async_list(&sriov->bc);
2076         ret = qlcnic_issue_cmd(adapter, &cmd);
2077         if (ret) {
2078                 dev_err(&adapter->pdev->dev,
2079                         "Failed to configure guest VLAN, err=%d\n", ret);
2080         } else {
2081                 netif_addr_lock_bh(netdev);
2082                 qlcnic_free_mac_list(adapter);
2083                 netif_addr_unlock_bh(netdev);
2084
2085                 if (enable)
2086                         qlcnic_sriov_vlan_operation(vf, vid, QLC_VLAN_ADD);
2087                 else
2088                         qlcnic_sriov_vlan_operation(vf, vid, QLC_VLAN_DELETE);
2089
2090                 netif_addr_lock_bh(netdev);
2091                 qlcnic_set_multi(netdev);
2092                 netif_addr_unlock_bh(netdev);
2093         }
2094
2095         qlcnic_free_mbx_args(&cmd);
2096         return ret;
2097 }
2098
2099 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
2100 {
2101         struct list_head *head = &adapter->mac_list;
2102         struct qlcnic_mac_vlan_list *cur;
2103
2104         while (!list_empty(head)) {
2105                 cur = list_entry(head->next, struct qlcnic_mac_vlan_list, list);
2106                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr, cur->vlan_id,
2107                                           QLCNIC_MAC_DEL);
2108                 list_del(&cur->list);
2109                 kfree(cur);
2110         }
2111 }
2112
2113
2114 static int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
2115 {
2116         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
2117         struct net_device *netdev = adapter->netdev;
2118         int retval;
2119
2120         netif_device_detach(netdev);
2121         qlcnic_cancel_idc_work(adapter);
2122
2123         if (netif_running(netdev))
2124                 qlcnic_down(adapter, netdev);
2125
2126         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
2127         qlcnic_sriov_cfg_bc_intr(adapter, 0);
2128         qlcnic_83xx_disable_mbx_intr(adapter);
2129         cancel_delayed_work_sync(&adapter->idc_aen_work);
2130
2131         retval = pci_save_state(pdev);
2132         if (retval)
2133                 return retval;
2134
2135         return 0;
2136 }
2137
2138 static int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
2139 {
2140         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
2141         struct net_device *netdev = adapter->netdev;
2142         int err;
2143
2144         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
2145         qlcnic_83xx_enable_mbx_interrupt(adapter);
2146         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
2147         if (err)
2148                 return err;
2149
2150         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
2151         if (!err) {
2152                 if (netif_running(netdev)) {
2153                         err = qlcnic_up(adapter, netdev);
2154                         if (!err)
2155                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
2156                 }
2157         }
2158
2159         netif_device_attach(netdev);
2160         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
2161                              idc->delay);
2162         return err;
2163 }
2164
2165 void qlcnic_sriov_alloc_vlans(struct qlcnic_adapter *adapter)
2166 {
2167         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2168         struct qlcnic_vf_info *vf;
2169         int i;
2170
2171         for (i = 0; i < sriov->num_vfs; i++) {
2172                 vf = &sriov->vf_info[i];
2173                 vf->sriov_vlans = kcalloc(sriov->num_allowed_vlans,
2174                                           sizeof(*vf->sriov_vlans), GFP_KERNEL);
2175         }
2176 }
2177
2178 void qlcnic_sriov_free_vlans(struct qlcnic_adapter *adapter)
2179 {
2180         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2181         struct qlcnic_vf_info *vf;
2182         int i;
2183
2184         for (i = 0; i < sriov->num_vfs; i++) {
2185                 vf = &sriov->vf_info[i];
2186                 kfree(vf->sriov_vlans);
2187                 vf->sriov_vlans = NULL;
2188         }
2189 }
2190
2191 void qlcnic_sriov_add_vlan_id(struct qlcnic_sriov *sriov,
2192                               struct qlcnic_vf_info *vf, u16 vlan_id)
2193 {
2194         int i;
2195
2196         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2197                 if (!vf->sriov_vlans[i]) {
2198                         vf->sriov_vlans[i] = vlan_id;
2199                         vf->num_vlan++;
2200                         return;
2201                 }
2202         }
2203 }
2204
2205 void qlcnic_sriov_del_vlan_id(struct qlcnic_sriov *sriov,
2206                               struct qlcnic_vf_info *vf, u16 vlan_id)
2207 {
2208         int i;
2209
2210         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2211                 if (vf->sriov_vlans[i] == vlan_id) {
2212                         vf->sriov_vlans[i] = 0;
2213                         vf->num_vlan--;
2214                         return;
2215                 }
2216         }
2217 }
2218
2219 bool qlcnic_sriov_check_any_vlan(struct qlcnic_vf_info *vf)
2220 {
2221         bool err = false;
2222
2223         spin_lock_bh(&vf->vlan_list_lock);
2224
2225         if (vf->num_vlan)
2226                 err = true;
2227
2228         spin_unlock_bh(&vf->vlan_list_lock);
2229         return err;
2230 }