1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/aer.h>
25 #include <linux/interrupt.h>
26 #include "net_driver.h"
32 #include "workarounds.h"
34 /**************************************************************************
38 **************************************************************************
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_DISABLE] = "DISABLE",
81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
82 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
83 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
84 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
85 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
86 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
87 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
90 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
91 * queued onto this work queue. This is not a per-nic work queue, because
92 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
94 static struct workqueue_struct *reset_workqueue;
96 /**************************************************************************
100 *************************************************************************/
103 * Use separate channels for TX and RX events
105 * Set this to 1 to use separate channels for TX and RX. It allows us
106 * to control interrupt affinity separately for TX and RX.
108 * This is only used in MSI-X interrupt mode
110 static bool separate_tx_channels;
111 module_param(separate_tx_channels, bool, 0444);
112 MODULE_PARM_DESC(separate_tx_channels,
113 "Use separate channels for TX and RX");
115 /* This is the weight assigned to each of the (per-channel) virtual
118 static int napi_weight = 64;
120 /* This is the time (in jiffies) between invocations of the hardware
122 * On Falcon-based NICs, this will:
123 * - Check the on-board hardware monitor;
124 * - Poll the link state and reconfigure the hardware as necessary.
125 * On Siena-based NICs for power systems with EEH support, this will give EEH a
128 static unsigned int efx_monitor_interval = 1 * HZ;
130 /* Initial interrupt moderation settings. They can be modified after
131 * module load with ethtool.
133 * The default for RX should strike a balance between increasing the
134 * round-trip latency and reducing overhead.
136 static unsigned int rx_irq_mod_usec = 60;
138 /* Initial interrupt moderation settings. They can be modified after
139 * module load with ethtool.
141 * This default is chosen to ensure that a 10G link does not go idle
142 * while a TX queue is stopped after it has become full. A queue is
143 * restarted when it drops below half full. The time this takes (assuming
144 * worst case 3 descriptors per packet and 1024 descriptors) is
145 * 512 / 3 * 1.2 = 205 usec.
147 static unsigned int tx_irq_mod_usec = 150;
149 /* This is the first interrupt mode to try out of:
154 static unsigned int interrupt_mode;
156 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
157 * i.e. the number of CPUs among which we may distribute simultaneous
158 * interrupt handling.
160 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
161 * The default (0) means to assign an interrupt to each core.
163 static unsigned int rss_cpus;
164 module_param(rss_cpus, uint, 0444);
165 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
167 static bool phy_flash_cfg;
168 module_param(phy_flash_cfg, bool, 0644);
169 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
171 static unsigned irq_adapt_low_thresh = 8000;
172 module_param(irq_adapt_low_thresh, uint, 0644);
173 MODULE_PARM_DESC(irq_adapt_low_thresh,
174 "Threshold score for reducing IRQ moderation");
176 static unsigned irq_adapt_high_thresh = 16000;
177 module_param(irq_adapt_high_thresh, uint, 0644);
178 MODULE_PARM_DESC(irq_adapt_high_thresh,
179 "Threshold score for increasing IRQ moderation");
181 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
182 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
183 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
184 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
185 module_param(debug, uint, 0);
186 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
188 /**************************************************************************
190 * Utility functions and prototypes
192 *************************************************************************/
194 static void efx_soft_enable_interrupts(struct efx_nic *efx);
195 static void efx_soft_disable_interrupts(struct efx_nic *efx);
196 static void efx_remove_channel(struct efx_channel *channel);
197 static void efx_remove_channels(struct efx_nic *efx);
198 static const struct efx_channel_type efx_default_channel_type;
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_init_napi_channel(struct efx_channel *channel);
201 static void efx_fini_napi(struct efx_nic *efx);
202 static void efx_fini_napi_channel(struct efx_channel *channel);
203 static void efx_fini_struct(struct efx_nic *efx);
204 static void efx_start_all(struct efx_nic *efx);
205 static void efx_stop_all(struct efx_nic *efx);
207 #define EFX_ASSERT_RESET_SERIALISED(efx) \
209 if ((efx->state == STATE_READY) || \
210 (efx->state == STATE_RECOVERY) || \
211 (efx->state == STATE_DISABLED)) \
215 static int efx_check_disabled(struct efx_nic *efx)
217 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
218 netif_err(efx, drv, efx->net_dev,
219 "device is disabled due to earlier errors\n");
225 /**************************************************************************
227 * Event queue processing
229 *************************************************************************/
231 /* Process channel's event queue
233 * This function is responsible for processing the event queue of a
234 * single channel. The caller must guarantee that this function will
235 * never be concurrently called more than once on the same channel,
236 * though different channels may be being processed concurrently.
238 static int efx_process_channel(struct efx_channel *channel, int budget)
242 if (unlikely(!channel->enabled))
245 spent = efx_nic_process_eventq(channel, budget);
246 if (spent && efx_channel_has_rx_queue(channel)) {
247 struct efx_rx_queue *rx_queue =
248 efx_channel_get_rx_queue(channel);
250 efx_rx_flush_packet(channel);
251 efx_fast_push_rx_descriptors(rx_queue);
259 * NAPI guarantees serialisation of polls of the same device, which
260 * provides the guarantee required by efx_process_channel().
262 static int efx_poll(struct napi_struct *napi, int budget)
264 struct efx_channel *channel =
265 container_of(napi, struct efx_channel, napi_str);
266 struct efx_nic *efx = channel->efx;
269 netif_vdbg(efx, intr, efx->net_dev,
270 "channel %d NAPI poll executing on CPU %d\n",
271 channel->channel, raw_smp_processor_id());
273 spent = efx_process_channel(channel, budget);
275 if (spent < budget) {
276 if (efx_channel_has_rx_queue(channel) &&
277 efx->irq_rx_adaptive &&
278 unlikely(++channel->irq_count == 1000)) {
279 if (unlikely(channel->irq_mod_score <
280 irq_adapt_low_thresh)) {
281 if (channel->irq_moderation > 1) {
282 channel->irq_moderation -= 1;
283 efx->type->push_irq_moderation(channel);
285 } else if (unlikely(channel->irq_mod_score >
286 irq_adapt_high_thresh)) {
287 if (channel->irq_moderation <
288 efx->irq_rx_moderation) {
289 channel->irq_moderation += 1;
290 efx->type->push_irq_moderation(channel);
293 channel->irq_count = 0;
294 channel->irq_mod_score = 0;
297 efx_filter_rfs_expire(channel);
299 /* There is no race here; although napi_disable() will
300 * only wait for napi_complete(), this isn't a problem
301 * since efx_nic_eventq_read_ack() will have no effect if
302 * interrupts have already been disabled.
305 efx_nic_eventq_read_ack(channel);
311 /* Create event queue
312 * Event queue memory allocations are done only once. If the channel
313 * is reset, the memory buffer will be reused; this guards against
314 * errors during channel reset and also simplifies interrupt handling.
316 static int efx_probe_eventq(struct efx_channel *channel)
318 struct efx_nic *efx = channel->efx;
319 unsigned long entries;
321 netif_dbg(efx, probe, efx->net_dev,
322 "chan %d create event queue\n", channel->channel);
324 /* Build an event queue with room for one event per tx and rx buffer,
325 * plus some extra for link state events and MCDI completions. */
326 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
327 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
328 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
330 return efx_nic_probe_eventq(channel);
333 /* Prepare channel's event queue */
334 static void efx_init_eventq(struct efx_channel *channel)
336 netif_dbg(channel->efx, drv, channel->efx->net_dev,
337 "chan %d init event queue\n", channel->channel);
339 channel->eventq_read_ptr = 0;
341 efx_nic_init_eventq(channel);
344 /* Enable event queue processing and NAPI */
345 static void efx_start_eventq(struct efx_channel *channel)
347 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
348 "chan %d start event queue\n", channel->channel);
350 /* Make sure the NAPI handler sees the enabled flag set */
351 channel->enabled = true;
354 napi_enable(&channel->napi_str);
355 efx_nic_eventq_read_ack(channel);
358 /* Disable event queue processing and NAPI */
359 static void efx_stop_eventq(struct efx_channel *channel)
361 if (!channel->enabled)
364 napi_disable(&channel->napi_str);
365 channel->enabled = false;
368 static void efx_fini_eventq(struct efx_channel *channel)
370 netif_dbg(channel->efx, drv, channel->efx->net_dev,
371 "chan %d fini event queue\n", channel->channel);
373 efx_nic_fini_eventq(channel);
376 static void efx_remove_eventq(struct efx_channel *channel)
378 netif_dbg(channel->efx, drv, channel->efx->net_dev,
379 "chan %d remove event queue\n", channel->channel);
381 efx_nic_remove_eventq(channel);
384 /**************************************************************************
388 *************************************************************************/
390 /* Allocate and initialise a channel structure. */
391 static struct efx_channel *
392 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
394 struct efx_channel *channel;
395 struct efx_rx_queue *rx_queue;
396 struct efx_tx_queue *tx_queue;
399 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
404 channel->channel = i;
405 channel->type = &efx_default_channel_type;
407 for (j = 0; j < EFX_TXQ_TYPES; j++) {
408 tx_queue = &channel->tx_queue[j];
410 tx_queue->queue = i * EFX_TXQ_TYPES + j;
411 tx_queue->channel = channel;
414 rx_queue = &channel->rx_queue;
416 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
417 (unsigned long)rx_queue);
422 /* Allocate and initialise a channel structure, copying parameters
423 * (but not resources) from an old channel structure.
425 static struct efx_channel *
426 efx_copy_channel(const struct efx_channel *old_channel)
428 struct efx_channel *channel;
429 struct efx_rx_queue *rx_queue;
430 struct efx_tx_queue *tx_queue;
433 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
437 *channel = *old_channel;
439 channel->napi_dev = NULL;
440 memset(&channel->eventq, 0, sizeof(channel->eventq));
442 for (j = 0; j < EFX_TXQ_TYPES; j++) {
443 tx_queue = &channel->tx_queue[j];
444 if (tx_queue->channel)
445 tx_queue->channel = channel;
446 tx_queue->buffer = NULL;
447 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
450 rx_queue = &channel->rx_queue;
451 rx_queue->buffer = NULL;
452 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
453 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
454 (unsigned long)rx_queue);
459 static int efx_probe_channel(struct efx_channel *channel)
461 struct efx_tx_queue *tx_queue;
462 struct efx_rx_queue *rx_queue;
465 netif_dbg(channel->efx, probe, channel->efx->net_dev,
466 "creating channel %d\n", channel->channel);
468 rc = channel->type->pre_probe(channel);
472 rc = efx_probe_eventq(channel);
476 efx_for_each_channel_tx_queue(tx_queue, channel) {
477 rc = efx_probe_tx_queue(tx_queue);
482 efx_for_each_channel_rx_queue(rx_queue, channel) {
483 rc = efx_probe_rx_queue(rx_queue);
488 channel->n_rx_frm_trunc = 0;
493 efx_remove_channel(channel);
498 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
500 struct efx_nic *efx = channel->efx;
504 number = channel->channel;
505 if (efx->tx_channel_offset == 0) {
507 } else if (channel->channel < efx->tx_channel_offset) {
511 number -= efx->tx_channel_offset;
513 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
516 static void efx_set_channel_names(struct efx_nic *efx)
518 struct efx_channel *channel;
520 efx_for_each_channel(channel, efx)
521 channel->type->get_name(channel,
522 efx->msi_context[channel->channel].name,
523 sizeof(efx->msi_context[0].name));
526 static int efx_probe_channels(struct efx_nic *efx)
528 struct efx_channel *channel;
531 /* Restart special buffer allocation */
532 efx->next_buffer_table = 0;
534 /* Probe channels in reverse, so that any 'extra' channels
535 * use the start of the buffer table. This allows the traffic
536 * channels to be resized without moving them or wasting the
537 * entries before them.
539 efx_for_each_channel_rev(channel, efx) {
540 rc = efx_probe_channel(channel);
542 netif_err(efx, probe, efx->net_dev,
543 "failed to create channel %d\n",
548 efx_set_channel_names(efx);
553 efx_remove_channels(efx);
557 /* Channels are shutdown and reinitialised whilst the NIC is running
558 * to propagate configuration changes (mtu, checksum offload), or
559 * to clear hardware error conditions
561 static void efx_start_datapath(struct efx_nic *efx)
563 bool old_rx_scatter = efx->rx_scatter;
564 struct efx_tx_queue *tx_queue;
565 struct efx_rx_queue *rx_queue;
566 struct efx_channel *channel;
569 /* Calculate the rx buffer allocation parameters required to
570 * support the current MTU, including padding for header
571 * alignment and overruns.
573 efx->rx_dma_len = (efx->type->rx_buffer_hash_size +
574 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
575 efx->type->rx_buffer_padding);
576 rx_buf_len = (sizeof(struct efx_rx_page_state) +
577 NET_IP_ALIGN + efx->rx_dma_len);
578 if (rx_buf_len <= PAGE_SIZE) {
579 efx->rx_scatter = false;
580 efx->rx_buffer_order = 0;
581 } else if (efx->type->can_rx_scatter) {
582 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
583 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
584 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
585 EFX_RX_BUF_ALIGNMENT) >
587 efx->rx_scatter = true;
588 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
589 efx->rx_buffer_order = 0;
591 efx->rx_scatter = false;
592 efx->rx_buffer_order = get_order(rx_buf_len);
595 efx_rx_config_page_split(efx);
596 if (efx->rx_buffer_order)
597 netif_dbg(efx, drv, efx->net_dev,
598 "RX buf len=%u; page order=%u batch=%u\n",
599 efx->rx_dma_len, efx->rx_buffer_order,
600 efx->rx_pages_per_batch);
602 netif_dbg(efx, drv, efx->net_dev,
603 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
604 efx->rx_dma_len, efx->rx_page_buf_step,
605 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
607 /* RX filters also have scatter-enabled flags */
608 if (efx->rx_scatter != old_rx_scatter)
609 efx_filter_update_rx_scatter(efx);
611 /* We must keep at least one descriptor in a TX ring empty.
612 * We could avoid this when the queue size does not exactly
613 * match the hardware ring size, but it's not that important.
614 * Therefore we stop the queue when one more skb might fill
615 * the ring completely. We wake it when half way back to
618 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
619 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
621 /* Initialise the channels */
622 efx_for_each_channel(channel, efx) {
623 efx_for_each_channel_tx_queue(tx_queue, channel)
624 efx_init_tx_queue(tx_queue);
626 efx_for_each_channel_rx_queue(rx_queue, channel) {
627 efx_init_rx_queue(rx_queue);
628 efx_nic_generate_fill_event(rx_queue);
631 WARN_ON(channel->rx_pkt_n_frags);
634 if (netif_device_present(efx->net_dev))
635 netif_tx_wake_all_queues(efx->net_dev);
638 static void efx_stop_datapath(struct efx_nic *efx)
640 struct efx_channel *channel;
641 struct efx_tx_queue *tx_queue;
642 struct efx_rx_queue *rx_queue;
645 EFX_ASSERT_RESET_SERIALISED(efx);
646 BUG_ON(efx->port_enabled);
649 efx_for_each_channel(channel, efx) {
650 efx_for_each_channel_rx_queue(rx_queue, channel)
651 rx_queue->refill_enabled = false;
654 efx_for_each_channel(channel, efx) {
655 /* RX packet processing is pipelined, so wait for the
656 * NAPI handler to complete. At least event queue 0
657 * might be kept active by non-data events, so don't
658 * use napi_synchronize() but actually disable NAPI
661 if (efx_channel_has_rx_queue(channel)) {
662 efx_stop_eventq(channel);
663 efx_start_eventq(channel);
667 rc = efx->type->fini_dmaq(efx);
668 if (rc && EFX_WORKAROUND_7803(efx)) {
669 /* Schedule a reset to recover from the flush failure. The
670 * descriptor caches reference memory we're about to free,
671 * but falcon_reconfigure_mac_wrapper() won't reconnect
672 * the MACs because of the pending reset.
674 netif_err(efx, drv, efx->net_dev,
675 "Resetting to recover from flush failure\n");
676 efx_schedule_reset(efx, RESET_TYPE_ALL);
678 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
680 netif_dbg(efx, drv, efx->net_dev,
681 "successfully flushed all queues\n");
684 efx_for_each_channel(channel, efx) {
685 efx_for_each_channel_rx_queue(rx_queue, channel)
686 efx_fini_rx_queue(rx_queue);
687 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
688 efx_fini_tx_queue(tx_queue);
692 static void efx_remove_channel(struct efx_channel *channel)
694 struct efx_tx_queue *tx_queue;
695 struct efx_rx_queue *rx_queue;
697 netif_dbg(channel->efx, drv, channel->efx->net_dev,
698 "destroy chan %d\n", channel->channel);
700 efx_for_each_channel_rx_queue(rx_queue, channel)
701 efx_remove_rx_queue(rx_queue);
702 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
703 efx_remove_tx_queue(tx_queue);
704 efx_remove_eventq(channel);
705 channel->type->post_remove(channel);
708 static void efx_remove_channels(struct efx_nic *efx)
710 struct efx_channel *channel;
712 efx_for_each_channel(channel, efx)
713 efx_remove_channel(channel);
717 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
719 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
720 u32 old_rxq_entries, old_txq_entries;
721 unsigned i, next_buffer_table = 0;
724 rc = efx_check_disabled(efx);
728 /* Not all channels should be reallocated. We must avoid
729 * reallocating their buffer table entries.
731 efx_for_each_channel(channel, efx) {
732 struct efx_rx_queue *rx_queue;
733 struct efx_tx_queue *tx_queue;
735 if (channel->type->copy)
737 next_buffer_table = max(next_buffer_table,
738 channel->eventq.index +
739 channel->eventq.entries);
740 efx_for_each_channel_rx_queue(rx_queue, channel)
741 next_buffer_table = max(next_buffer_table,
742 rx_queue->rxd.index +
743 rx_queue->rxd.entries);
744 efx_for_each_channel_tx_queue(tx_queue, channel)
745 next_buffer_table = max(next_buffer_table,
746 tx_queue->txd.index +
747 tx_queue->txd.entries);
750 efx_device_detach_sync(efx);
752 efx_soft_disable_interrupts(efx);
754 /* Clone channels (where possible) */
755 memset(other_channel, 0, sizeof(other_channel));
756 for (i = 0; i < efx->n_channels; i++) {
757 channel = efx->channel[i];
758 if (channel->type->copy)
759 channel = channel->type->copy(channel);
764 other_channel[i] = channel;
767 /* Swap entry counts and channel pointers */
768 old_rxq_entries = efx->rxq_entries;
769 old_txq_entries = efx->txq_entries;
770 efx->rxq_entries = rxq_entries;
771 efx->txq_entries = txq_entries;
772 for (i = 0; i < efx->n_channels; i++) {
773 channel = efx->channel[i];
774 efx->channel[i] = other_channel[i];
775 other_channel[i] = channel;
778 /* Restart buffer table allocation */
779 efx->next_buffer_table = next_buffer_table;
781 for (i = 0; i < efx->n_channels; i++) {
782 channel = efx->channel[i];
783 if (!channel->type->copy)
785 rc = efx_probe_channel(channel);
788 efx_init_napi_channel(efx->channel[i]);
792 /* Destroy unused channel structures */
793 for (i = 0; i < efx->n_channels; i++) {
794 channel = other_channel[i];
795 if (channel && channel->type->copy) {
796 efx_fini_napi_channel(channel);
797 efx_remove_channel(channel);
802 efx_soft_enable_interrupts(efx);
804 netif_device_attach(efx->net_dev);
809 efx->rxq_entries = old_rxq_entries;
810 efx->txq_entries = old_txq_entries;
811 for (i = 0; i < efx->n_channels; i++) {
812 channel = efx->channel[i];
813 efx->channel[i] = other_channel[i];
814 other_channel[i] = channel;
819 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
821 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
824 static const struct efx_channel_type efx_default_channel_type = {
825 .pre_probe = efx_channel_dummy_op_int,
826 .post_remove = efx_channel_dummy_op_void,
827 .get_name = efx_get_channel_name,
828 .copy = efx_copy_channel,
829 .keep_eventq = false,
832 int efx_channel_dummy_op_int(struct efx_channel *channel)
837 void efx_channel_dummy_op_void(struct efx_channel *channel)
841 /**************************************************************************
845 **************************************************************************/
847 /* This ensures that the kernel is kept informed (via
848 * netif_carrier_on/off) of the link status, and also maintains the
849 * link status's stop on the port's TX queue.
851 void efx_link_status_changed(struct efx_nic *efx)
853 struct efx_link_state *link_state = &efx->link_state;
855 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
856 * that no events are triggered between unregister_netdev() and the
857 * driver unloading. A more general condition is that NETDEV_CHANGE
858 * can only be generated between NETDEV_UP and NETDEV_DOWN */
859 if (!netif_running(efx->net_dev))
862 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
863 efx->n_link_state_changes++;
866 netif_carrier_on(efx->net_dev);
868 netif_carrier_off(efx->net_dev);
871 /* Status message for kernel log */
873 netif_info(efx, link, efx->net_dev,
874 "link up at %uMbps %s-duplex (MTU %d)%s\n",
875 link_state->speed, link_state->fd ? "full" : "half",
877 (efx->promiscuous ? " [PROMISC]" : ""));
879 netif_info(efx, link, efx->net_dev, "link down\n");
882 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
884 efx->link_advertising = advertising;
886 if (advertising & ADVERTISED_Pause)
887 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
889 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
890 if (advertising & ADVERTISED_Asym_Pause)
891 efx->wanted_fc ^= EFX_FC_TX;
895 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
897 efx->wanted_fc = wanted_fc;
898 if (efx->link_advertising) {
899 if (wanted_fc & EFX_FC_RX)
900 efx->link_advertising |= (ADVERTISED_Pause |
901 ADVERTISED_Asym_Pause);
903 efx->link_advertising &= ~(ADVERTISED_Pause |
904 ADVERTISED_Asym_Pause);
905 if (wanted_fc & EFX_FC_TX)
906 efx->link_advertising ^= ADVERTISED_Asym_Pause;
910 static void efx_fini_port(struct efx_nic *efx);
912 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
913 * the MAC appropriately. All other PHY configuration changes are pushed
914 * through phy_op->set_settings(), and pushed asynchronously to the MAC
915 * through efx_monitor().
917 * Callers must hold the mac_lock
919 int __efx_reconfigure_port(struct efx_nic *efx)
921 enum efx_phy_mode phy_mode;
924 WARN_ON(!mutex_is_locked(&efx->mac_lock));
926 /* Serialise the promiscuous flag with efx_set_rx_mode. */
927 netif_addr_lock_bh(efx->net_dev);
928 netif_addr_unlock_bh(efx->net_dev);
930 /* Disable PHY transmit in mac level loopbacks */
931 phy_mode = efx->phy_mode;
932 if (LOOPBACK_INTERNAL(efx))
933 efx->phy_mode |= PHY_MODE_TX_DISABLED;
935 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
937 rc = efx->type->reconfigure_port(efx);
940 efx->phy_mode = phy_mode;
945 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
947 int efx_reconfigure_port(struct efx_nic *efx)
951 EFX_ASSERT_RESET_SERIALISED(efx);
953 mutex_lock(&efx->mac_lock);
954 rc = __efx_reconfigure_port(efx);
955 mutex_unlock(&efx->mac_lock);
960 /* Asynchronous work item for changing MAC promiscuity and multicast
961 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
963 static void efx_mac_work(struct work_struct *data)
965 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
967 mutex_lock(&efx->mac_lock);
968 if (efx->port_enabled)
969 efx->type->reconfigure_mac(efx);
970 mutex_unlock(&efx->mac_lock);
973 static int efx_probe_port(struct efx_nic *efx)
977 netif_dbg(efx, probe, efx->net_dev, "create port\n");
980 efx->phy_mode = PHY_MODE_SPECIAL;
982 /* Connect up MAC/PHY operations table */
983 rc = efx->type->probe_port(efx);
987 /* Initialise MAC address to permanent address */
988 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
993 static int efx_init_port(struct efx_nic *efx)
997 netif_dbg(efx, drv, efx->net_dev, "init port\n");
999 mutex_lock(&efx->mac_lock);
1001 rc = efx->phy_op->init(efx);
1005 efx->port_initialized = true;
1007 /* Reconfigure the MAC before creating dma queues (required for
1008 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1009 efx->type->reconfigure_mac(efx);
1011 /* Ensure the PHY advertises the correct flow control settings */
1012 rc = efx->phy_op->reconfigure(efx);
1016 mutex_unlock(&efx->mac_lock);
1020 efx->phy_op->fini(efx);
1022 mutex_unlock(&efx->mac_lock);
1026 static void efx_start_port(struct efx_nic *efx)
1028 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1029 BUG_ON(efx->port_enabled);
1031 mutex_lock(&efx->mac_lock);
1032 efx->port_enabled = true;
1034 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1035 * and then cancelled by efx_flush_all() */
1036 efx->type->reconfigure_mac(efx);
1038 mutex_unlock(&efx->mac_lock);
1041 /* Prevent efx_mac_work() and efx_monitor() from working */
1042 static void efx_stop_port(struct efx_nic *efx)
1044 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1046 mutex_lock(&efx->mac_lock);
1047 efx->port_enabled = false;
1048 mutex_unlock(&efx->mac_lock);
1050 /* Serialise against efx_set_multicast_list() */
1051 netif_addr_lock_bh(efx->net_dev);
1052 netif_addr_unlock_bh(efx->net_dev);
1055 static void efx_fini_port(struct efx_nic *efx)
1057 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1059 if (!efx->port_initialized)
1062 efx->phy_op->fini(efx);
1063 efx->port_initialized = false;
1065 efx->link_state.up = false;
1066 efx_link_status_changed(efx);
1069 static void efx_remove_port(struct efx_nic *efx)
1071 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1073 efx->type->remove_port(efx);
1076 /**************************************************************************
1080 **************************************************************************/
1082 /* This configures the PCI device to enable I/O and DMA. */
1083 static int efx_init_io(struct efx_nic *efx)
1085 struct pci_dev *pci_dev = efx->pci_dev;
1086 dma_addr_t dma_mask = efx->type->max_dma_mask;
1087 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1090 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1092 rc = pci_enable_device(pci_dev);
1094 netif_err(efx, probe, efx->net_dev,
1095 "failed to enable PCI device\n");
1099 pci_set_master(pci_dev);
1101 /* Set the PCI DMA mask. Try all possibilities from our
1102 * genuine mask down to 32 bits, because some architectures
1103 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1104 * masks event though they reject 46 bit masks.
1106 while (dma_mask > 0x7fffffffUL) {
1107 if (dma_supported(&pci_dev->dev, dma_mask)) {
1108 rc = dma_set_mask(&pci_dev->dev, dma_mask);
1115 netif_err(efx, probe, efx->net_dev,
1116 "could not find a suitable DMA mask\n");
1119 netif_dbg(efx, probe, efx->net_dev,
1120 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1121 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask);
1123 /* dma_set_coherent_mask() is not *allowed* to
1124 * fail with a mask that dma_set_mask() accepted,
1125 * but just in case...
1127 netif_err(efx, probe, efx->net_dev,
1128 "failed to set consistent DMA mask\n");
1132 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1133 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1135 netif_err(efx, probe, efx->net_dev,
1136 "request for memory BAR failed\n");
1140 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1141 if (!efx->membase) {
1142 netif_err(efx, probe, efx->net_dev,
1143 "could not map memory BAR at %llx+%x\n",
1144 (unsigned long long)efx->membase_phys, mem_map_size);
1148 netif_dbg(efx, probe, efx->net_dev,
1149 "memory BAR at %llx+%x (virtual %p)\n",
1150 (unsigned long long)efx->membase_phys, mem_map_size,
1156 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1158 efx->membase_phys = 0;
1160 pci_disable_device(efx->pci_dev);
1165 static void efx_fini_io(struct efx_nic *efx)
1167 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1170 iounmap(efx->membase);
1171 efx->membase = NULL;
1174 if (efx->membase_phys) {
1175 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1176 efx->membase_phys = 0;
1179 pci_disable_device(efx->pci_dev);
1182 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1184 cpumask_var_t thread_mask;
1191 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1192 netif_warn(efx, probe, efx->net_dev,
1193 "RSS disabled due to allocation failure\n");
1198 for_each_online_cpu(cpu) {
1199 if (!cpumask_test_cpu(cpu, thread_mask)) {
1201 cpumask_or(thread_mask, thread_mask,
1202 topology_thread_cpumask(cpu));
1206 free_cpumask_var(thread_mask);
1209 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1210 * table entries that are inaccessible to VFs
1212 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1213 count > efx_vf_size(efx)) {
1214 netif_warn(efx, probe, efx->net_dev,
1215 "Reducing number of RSS channels from %u to %u for "
1216 "VF support. Increase vf-msix-limit to use more "
1217 "channels on the PF.\n",
1218 count, efx_vf_size(efx));
1219 count = efx_vf_size(efx);
1225 /* Probe the number and type of interrupts we are able to obtain, and
1226 * the resulting numbers of channels and RX queues.
1228 static int efx_probe_interrupts(struct efx_nic *efx)
1230 unsigned int extra_channels = 0;
1234 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1235 if (efx->extra_channel_type[i])
1238 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1239 struct msix_entry xentries[EFX_MAX_CHANNELS];
1240 unsigned int n_channels;
1242 n_channels = efx_wanted_parallelism(efx);
1243 if (separate_tx_channels)
1245 n_channels += extra_channels;
1246 n_channels = min(n_channels, efx->max_channels);
1248 for (i = 0; i < n_channels; i++)
1249 xentries[i].entry = i;
1250 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1252 netif_err(efx, drv, efx->net_dev,
1253 "WARNING: Insufficient MSI-X vectors"
1254 " available (%d < %u).\n", rc, n_channels);
1255 netif_err(efx, drv, efx->net_dev,
1256 "WARNING: Performance may be reduced.\n");
1257 EFX_BUG_ON_PARANOID(rc >= n_channels);
1259 rc = pci_enable_msix(efx->pci_dev, xentries,
1264 efx->n_channels = n_channels;
1265 if (n_channels > extra_channels)
1266 n_channels -= extra_channels;
1267 if (separate_tx_channels) {
1268 efx->n_tx_channels = max(n_channels / 2, 1U);
1269 efx->n_rx_channels = max(n_channels -
1273 efx->n_tx_channels = n_channels;
1274 efx->n_rx_channels = n_channels;
1276 for (i = 0; i < efx->n_channels; i++)
1277 efx_get_channel(efx, i)->irq =
1280 /* Fall back to single channel MSI */
1281 efx->interrupt_mode = EFX_INT_MODE_MSI;
1282 netif_err(efx, drv, efx->net_dev,
1283 "could not enable MSI-X\n");
1287 /* Try single interrupt MSI */
1288 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1289 efx->n_channels = 1;
1290 efx->n_rx_channels = 1;
1291 efx->n_tx_channels = 1;
1292 rc = pci_enable_msi(efx->pci_dev);
1294 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1296 netif_err(efx, drv, efx->net_dev,
1297 "could not enable MSI\n");
1298 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1302 /* Assume legacy interrupts */
1303 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1304 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1305 efx->n_rx_channels = 1;
1306 efx->n_tx_channels = 1;
1307 efx->legacy_irq = efx->pci_dev->irq;
1310 /* Assign extra channels if possible */
1311 j = efx->n_channels;
1312 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1313 if (!efx->extra_channel_type[i])
1315 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1316 efx->n_channels <= extra_channels) {
1317 efx->extra_channel_type[i]->handle_no_channel(efx);
1320 efx_get_channel(efx, j)->type =
1321 efx->extra_channel_type[i];
1325 /* RSS might be usable on VFs even if it is disabled on the PF */
1326 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1327 efx->n_rx_channels : efx_vf_size(efx));
1332 static void efx_soft_enable_interrupts(struct efx_nic *efx)
1334 struct efx_channel *channel;
1336 BUG_ON(efx->state == STATE_DISABLED);
1338 efx->irq_soft_enabled = true;
1341 efx_for_each_channel(channel, efx) {
1342 if (!channel->type->keep_eventq)
1343 efx_init_eventq(channel);
1344 efx_start_eventq(channel);
1347 efx_mcdi_mode_event(efx);
1350 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1352 struct efx_channel *channel;
1354 if (efx->state == STATE_DISABLED)
1357 efx_mcdi_mode_poll(efx);
1359 efx->irq_soft_enabled = false;
1362 if (efx->legacy_irq)
1363 synchronize_irq(efx->legacy_irq);
1365 efx_for_each_channel(channel, efx) {
1367 synchronize_irq(channel->irq);
1369 efx_stop_eventq(channel);
1370 if (!channel->type->keep_eventq)
1371 efx_fini_eventq(channel);
1375 static void efx_enable_interrupts(struct efx_nic *efx)
1377 struct efx_channel *channel;
1379 BUG_ON(efx->state == STATE_DISABLED);
1381 if (efx->eeh_disabled_legacy_irq) {
1382 enable_irq(efx->legacy_irq);
1383 efx->eeh_disabled_legacy_irq = false;
1386 efx->type->irq_enable_master(efx);
1388 efx_for_each_channel(channel, efx) {
1389 if (channel->type->keep_eventq)
1390 efx_init_eventq(channel);
1393 efx_soft_enable_interrupts(efx);
1396 static void efx_disable_interrupts(struct efx_nic *efx)
1398 struct efx_channel *channel;
1400 efx_soft_disable_interrupts(efx);
1402 efx_for_each_channel(channel, efx) {
1403 if (channel->type->keep_eventq)
1404 efx_fini_eventq(channel);
1407 efx->type->irq_disable_non_ev(efx);
1410 static void efx_remove_interrupts(struct efx_nic *efx)
1412 struct efx_channel *channel;
1414 /* Remove MSI/MSI-X interrupts */
1415 efx_for_each_channel(channel, efx)
1417 pci_disable_msi(efx->pci_dev);
1418 pci_disable_msix(efx->pci_dev);
1420 /* Remove legacy interrupt */
1421 efx->legacy_irq = 0;
1424 static void efx_set_channels(struct efx_nic *efx)
1426 struct efx_channel *channel;
1427 struct efx_tx_queue *tx_queue;
1429 efx->tx_channel_offset =
1430 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1432 /* We need to mark which channels really have RX and TX
1433 * queues, and adjust the TX queue numbers if we have separate
1434 * RX-only and TX-only channels.
1436 efx_for_each_channel(channel, efx) {
1437 if (channel->channel < efx->n_rx_channels)
1438 channel->rx_queue.core_index = channel->channel;
1440 channel->rx_queue.core_index = -1;
1442 efx_for_each_channel_tx_queue(tx_queue, channel)
1443 tx_queue->queue -= (efx->tx_channel_offset *
1448 static int efx_probe_nic(struct efx_nic *efx)
1453 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1455 /* Carry out hardware-type specific initialisation */
1456 rc = efx->type->probe(efx);
1460 /* Determine the number of channels and queues by trying to hook
1461 * in MSI-X interrupts. */
1462 rc = efx_probe_interrupts(efx);
1466 efx->type->dimension_resources(efx);
1468 if (efx->n_channels > 1)
1469 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1470 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1471 efx->rx_indir_table[i] =
1472 ethtool_rxfh_indir_default(i, efx->rss_spread);
1474 efx_set_channels(efx);
1475 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1476 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1478 /* Initialise the interrupt moderation settings */
1479 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1485 efx->type->remove(efx);
1489 static void efx_remove_nic(struct efx_nic *efx)
1491 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1493 efx_remove_interrupts(efx);
1494 efx->type->remove(efx);
1497 /**************************************************************************
1499 * NIC startup/shutdown
1501 *************************************************************************/
1503 static int efx_probe_all(struct efx_nic *efx)
1507 rc = efx_probe_nic(efx);
1509 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1513 rc = efx_probe_port(efx);
1515 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1519 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1520 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1524 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1526 rc = efx_probe_filters(efx);
1528 netif_err(efx, probe, efx->net_dev,
1529 "failed to create filter tables\n");
1533 rc = efx_probe_channels(efx);
1540 efx_remove_filters(efx);
1542 efx_remove_port(efx);
1544 efx_remove_nic(efx);
1549 /* If the interface is supposed to be running but is not, start
1550 * the hardware and software data path, regular activity for the port
1551 * (MAC statistics, link polling, etc.) and schedule the port to be
1552 * reconfigured. Interrupts must already be enabled. This function
1553 * is safe to call multiple times, so long as the NIC is not disabled.
1554 * Requires the RTNL lock.
1556 static void efx_start_all(struct efx_nic *efx)
1558 EFX_ASSERT_RESET_SERIALISED(efx);
1559 BUG_ON(efx->state == STATE_DISABLED);
1561 /* Check that it is appropriate to restart the interface. All
1562 * of these flags are safe to read under just the rtnl lock */
1563 if (efx->port_enabled || !netif_running(efx->net_dev))
1566 efx_start_port(efx);
1567 efx_start_datapath(efx);
1569 /* Start the hardware monitor if there is one */
1570 if (efx->type->monitor != NULL)
1571 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1572 efx_monitor_interval);
1574 /* If link state detection is normally event-driven, we have
1575 * to poll now because we could have missed a change
1577 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1578 mutex_lock(&efx->mac_lock);
1579 if (efx->phy_op->poll(efx))
1580 efx_link_status_changed(efx);
1581 mutex_unlock(&efx->mac_lock);
1584 efx->type->start_stats(efx);
1587 /* Flush all delayed work. Should only be called when no more delayed work
1588 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1589 * since we're holding the rtnl_lock at this point. */
1590 static void efx_flush_all(struct efx_nic *efx)
1592 /* Make sure the hardware monitor and event self-test are stopped */
1593 cancel_delayed_work_sync(&efx->monitor_work);
1594 efx_selftest_async_cancel(efx);
1595 /* Stop scheduled port reconfigurations */
1596 cancel_work_sync(&efx->mac_work);
1599 /* Quiesce the hardware and software data path, and regular activity
1600 * for the port without bringing the link down. Safe to call multiple
1601 * times with the NIC in almost any state, but interrupts should be
1602 * enabled. Requires the RTNL lock.
1604 static void efx_stop_all(struct efx_nic *efx)
1606 EFX_ASSERT_RESET_SERIALISED(efx);
1608 /* port_enabled can be read safely under the rtnl lock */
1609 if (!efx->port_enabled)
1612 efx->type->stop_stats(efx);
1615 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1618 /* Stop the kernel transmit interface. This is only valid if
1619 * the device is stopped or detached; otherwise the watchdog
1620 * may fire immediately.
1622 WARN_ON(netif_running(efx->net_dev) &&
1623 netif_device_present(efx->net_dev));
1624 netif_tx_disable(efx->net_dev);
1626 efx_stop_datapath(efx);
1629 static void efx_remove_all(struct efx_nic *efx)
1631 efx_remove_channels(efx);
1632 efx_remove_filters(efx);
1633 efx_remove_port(efx);
1634 efx_remove_nic(efx);
1637 /**************************************************************************
1639 * Interrupt moderation
1641 **************************************************************************/
1643 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1647 if (usecs * 1000 < quantum_ns)
1648 return 1; /* never round down to 0 */
1649 return usecs * 1000 / quantum_ns;
1652 /* Set interrupt moderation parameters */
1653 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1654 unsigned int rx_usecs, bool rx_adaptive,
1655 bool rx_may_override_tx)
1657 struct efx_channel *channel;
1658 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1659 efx->timer_quantum_ns,
1661 unsigned int tx_ticks;
1662 unsigned int rx_ticks;
1664 EFX_ASSERT_RESET_SERIALISED(efx);
1666 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1669 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1670 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1672 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1673 !rx_may_override_tx) {
1674 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1675 "RX and TX IRQ moderation must be equal\n");
1679 efx->irq_rx_adaptive = rx_adaptive;
1680 efx->irq_rx_moderation = rx_ticks;
1681 efx_for_each_channel(channel, efx) {
1682 if (efx_channel_has_rx_queue(channel))
1683 channel->irq_moderation = rx_ticks;
1684 else if (efx_channel_has_tx_queues(channel))
1685 channel->irq_moderation = tx_ticks;
1691 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1692 unsigned int *rx_usecs, bool *rx_adaptive)
1694 /* We must round up when converting ticks to microseconds
1695 * because we round down when converting the other way.
1698 *rx_adaptive = efx->irq_rx_adaptive;
1699 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1700 efx->timer_quantum_ns,
1703 /* If channels are shared between RX and TX, so is IRQ
1704 * moderation. Otherwise, IRQ moderation is the same for all
1705 * TX channels and is not adaptive.
1707 if (efx->tx_channel_offset == 0)
1708 *tx_usecs = *rx_usecs;
1710 *tx_usecs = DIV_ROUND_UP(
1711 efx->channel[efx->tx_channel_offset]->irq_moderation *
1712 efx->timer_quantum_ns,
1716 /**************************************************************************
1720 **************************************************************************/
1722 /* Run periodically off the general workqueue */
1723 static void efx_monitor(struct work_struct *data)
1725 struct efx_nic *efx = container_of(data, struct efx_nic,
1728 netif_vdbg(efx, timer, efx->net_dev,
1729 "hardware monitor executing on CPU %d\n",
1730 raw_smp_processor_id());
1731 BUG_ON(efx->type->monitor == NULL);
1733 /* If the mac_lock is already held then it is likely a port
1734 * reconfiguration is already in place, which will likely do
1735 * most of the work of monitor() anyway. */
1736 if (mutex_trylock(&efx->mac_lock)) {
1737 if (efx->port_enabled)
1738 efx->type->monitor(efx);
1739 mutex_unlock(&efx->mac_lock);
1742 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1743 efx_monitor_interval);
1746 /**************************************************************************
1750 *************************************************************************/
1753 * Context: process, rtnl_lock() held.
1755 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1757 struct efx_nic *efx = netdev_priv(net_dev);
1758 struct mii_ioctl_data *data = if_mii(ifr);
1760 if (cmd == SIOCSHWTSTAMP)
1761 return efx_ptp_ioctl(efx, ifr, cmd);
1763 /* Convert phy_id from older PRTAD/DEVAD format */
1764 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1765 (data->phy_id & 0xfc00) == 0x0400)
1766 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1768 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1771 /**************************************************************************
1775 **************************************************************************/
1777 static void efx_init_napi_channel(struct efx_channel *channel)
1779 struct efx_nic *efx = channel->efx;
1781 channel->napi_dev = efx->net_dev;
1782 netif_napi_add(channel->napi_dev, &channel->napi_str,
1783 efx_poll, napi_weight);
1786 static void efx_init_napi(struct efx_nic *efx)
1788 struct efx_channel *channel;
1790 efx_for_each_channel(channel, efx)
1791 efx_init_napi_channel(channel);
1794 static void efx_fini_napi_channel(struct efx_channel *channel)
1796 if (channel->napi_dev)
1797 netif_napi_del(&channel->napi_str);
1798 channel->napi_dev = NULL;
1801 static void efx_fini_napi(struct efx_nic *efx)
1803 struct efx_channel *channel;
1805 efx_for_each_channel(channel, efx)
1806 efx_fini_napi_channel(channel);
1809 /**************************************************************************
1811 * Kernel netpoll interface
1813 *************************************************************************/
1815 #ifdef CONFIG_NET_POLL_CONTROLLER
1817 /* Although in the common case interrupts will be disabled, this is not
1818 * guaranteed. However, all our work happens inside the NAPI callback,
1819 * so no locking is required.
1821 static void efx_netpoll(struct net_device *net_dev)
1823 struct efx_nic *efx = netdev_priv(net_dev);
1824 struct efx_channel *channel;
1826 efx_for_each_channel(channel, efx)
1827 efx_schedule_channel(channel);
1832 /**************************************************************************
1834 * Kernel net device interface
1836 *************************************************************************/
1838 /* Context: process, rtnl_lock() held. */
1839 static int efx_net_open(struct net_device *net_dev)
1841 struct efx_nic *efx = netdev_priv(net_dev);
1844 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1845 raw_smp_processor_id());
1847 rc = efx_check_disabled(efx);
1850 if (efx->phy_mode & PHY_MODE_SPECIAL)
1852 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1855 /* Notify the kernel of the link state polled during driver load,
1856 * before the monitor starts running */
1857 efx_link_status_changed(efx);
1860 efx_selftest_async_start(efx);
1864 /* Context: process, rtnl_lock() held.
1865 * Note that the kernel will ignore our return code; this method
1866 * should really be a void.
1868 static int efx_net_stop(struct net_device *net_dev)
1870 struct efx_nic *efx = netdev_priv(net_dev);
1872 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1873 raw_smp_processor_id());
1875 /* Stop the device and flush all the channels */
1881 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1882 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1883 struct rtnl_link_stats64 *stats)
1885 struct efx_nic *efx = netdev_priv(net_dev);
1886 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1888 spin_lock_bh(&efx->stats_lock);
1890 efx->type->update_stats(efx);
1892 stats->rx_packets = mac_stats->rx_packets;
1893 stats->tx_packets = mac_stats->tx_packets;
1894 stats->rx_bytes = mac_stats->rx_bytes;
1895 stats->tx_bytes = mac_stats->tx_bytes;
1896 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1897 stats->multicast = mac_stats->rx_multicast;
1898 stats->collisions = mac_stats->tx_collision;
1899 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1900 mac_stats->rx_length_error);
1901 stats->rx_crc_errors = mac_stats->rx_bad;
1902 stats->rx_frame_errors = mac_stats->rx_align_error;
1903 stats->rx_fifo_errors = mac_stats->rx_overflow;
1904 stats->rx_missed_errors = mac_stats->rx_missed;
1905 stats->tx_window_errors = mac_stats->tx_late_collision;
1907 stats->rx_errors = (stats->rx_length_errors +
1908 stats->rx_crc_errors +
1909 stats->rx_frame_errors +
1910 mac_stats->rx_symbol_error);
1911 stats->tx_errors = (stats->tx_window_errors +
1914 spin_unlock_bh(&efx->stats_lock);
1919 /* Context: netif_tx_lock held, BHs disabled. */
1920 static void efx_watchdog(struct net_device *net_dev)
1922 struct efx_nic *efx = netdev_priv(net_dev);
1924 netif_err(efx, tx_err, efx->net_dev,
1925 "TX stuck with port_enabled=%d: resetting channels\n",
1928 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1932 /* Context: process, rtnl_lock() held. */
1933 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1935 struct efx_nic *efx = netdev_priv(net_dev);
1938 rc = efx_check_disabled(efx);
1941 if (new_mtu > EFX_MAX_MTU)
1944 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1946 efx_device_detach_sync(efx);
1949 mutex_lock(&efx->mac_lock);
1950 net_dev->mtu = new_mtu;
1951 efx->type->reconfigure_mac(efx);
1952 mutex_unlock(&efx->mac_lock);
1955 netif_device_attach(efx->net_dev);
1959 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1961 struct efx_nic *efx = netdev_priv(net_dev);
1962 struct sockaddr *addr = data;
1963 char *new_addr = addr->sa_data;
1965 if (!is_valid_ether_addr(new_addr)) {
1966 netif_err(efx, drv, efx->net_dev,
1967 "invalid ethernet MAC address requested: %pM\n",
1969 return -EADDRNOTAVAIL;
1972 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1973 efx_sriov_mac_address_changed(efx);
1975 /* Reconfigure the MAC */
1976 mutex_lock(&efx->mac_lock);
1977 efx->type->reconfigure_mac(efx);
1978 mutex_unlock(&efx->mac_lock);
1983 /* Context: netif_addr_lock held, BHs disabled. */
1984 static void efx_set_rx_mode(struct net_device *net_dev)
1986 struct efx_nic *efx = netdev_priv(net_dev);
1987 struct netdev_hw_addr *ha;
1988 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1992 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1994 /* Build multicast hash table */
1995 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1996 memset(mc_hash, 0xff, sizeof(*mc_hash));
1998 memset(mc_hash, 0x00, sizeof(*mc_hash));
1999 netdev_for_each_mc_addr(ha, net_dev) {
2000 crc = ether_crc_le(ETH_ALEN, ha->addr);
2001 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
2002 __set_bit_le(bit, mc_hash);
2005 /* Broadcast packets go through the multicast hash filter.
2006 * ether_crc_le() of the broadcast address is 0xbe2612ff
2007 * so we always add bit 0xff to the mask.
2009 __set_bit_le(0xff, mc_hash);
2012 if (efx->port_enabled)
2013 queue_work(efx->workqueue, &efx->mac_work);
2014 /* Otherwise efx_start_port() will do this */
2017 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2019 struct efx_nic *efx = netdev_priv(net_dev);
2021 /* If disabling RX n-tuple filtering, clear existing filters */
2022 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2023 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2028 static const struct net_device_ops efx_netdev_ops = {
2029 .ndo_open = efx_net_open,
2030 .ndo_stop = efx_net_stop,
2031 .ndo_get_stats64 = efx_net_stats,
2032 .ndo_tx_timeout = efx_watchdog,
2033 .ndo_start_xmit = efx_hard_start_xmit,
2034 .ndo_validate_addr = eth_validate_addr,
2035 .ndo_do_ioctl = efx_ioctl,
2036 .ndo_change_mtu = efx_change_mtu,
2037 .ndo_set_mac_address = efx_set_mac_address,
2038 .ndo_set_rx_mode = efx_set_rx_mode,
2039 .ndo_set_features = efx_set_features,
2040 #ifdef CONFIG_SFC_SRIOV
2041 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2042 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2043 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2044 .ndo_get_vf_config = efx_sriov_get_vf_config,
2046 #ifdef CONFIG_NET_POLL_CONTROLLER
2047 .ndo_poll_controller = efx_netpoll,
2049 .ndo_setup_tc = efx_setup_tc,
2050 #ifdef CONFIG_RFS_ACCEL
2051 .ndo_rx_flow_steer = efx_filter_rfs,
2055 static void efx_update_name(struct efx_nic *efx)
2057 strcpy(efx->name, efx->net_dev->name);
2058 efx_mtd_rename(efx);
2059 efx_set_channel_names(efx);
2062 static int efx_netdev_event(struct notifier_block *this,
2063 unsigned long event, void *ptr)
2065 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2067 if (net_dev->netdev_ops == &efx_netdev_ops &&
2068 event == NETDEV_CHANGENAME)
2069 efx_update_name(netdev_priv(net_dev));
2074 static struct notifier_block efx_netdev_notifier = {
2075 .notifier_call = efx_netdev_event,
2079 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2081 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2082 return sprintf(buf, "%d\n", efx->phy_type);
2084 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2086 static int efx_register_netdev(struct efx_nic *efx)
2088 struct net_device *net_dev = efx->net_dev;
2089 struct efx_channel *channel;
2092 net_dev->watchdog_timeo = 5 * HZ;
2093 net_dev->irq = efx->pci_dev->irq;
2094 net_dev->netdev_ops = &efx_netdev_ops;
2095 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2096 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2100 /* Enable resets to be scheduled and check whether any were
2101 * already requested. If so, the NIC is probably hosed so we
2104 efx->state = STATE_READY;
2105 smp_mb(); /* ensure we change state before checking reset_pending */
2106 if (efx->reset_pending) {
2107 netif_err(efx, probe, efx->net_dev,
2108 "aborting probe due to scheduled reset\n");
2113 rc = dev_alloc_name(net_dev, net_dev->name);
2116 efx_update_name(efx);
2118 /* Always start with carrier off; PHY events will detect the link */
2119 netif_carrier_off(net_dev);
2121 rc = register_netdevice(net_dev);
2125 efx_for_each_channel(channel, efx) {
2126 struct efx_tx_queue *tx_queue;
2127 efx_for_each_channel_tx_queue(tx_queue, channel)
2128 efx_init_tx_queue_core_txq(tx_queue);
2133 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2135 netif_err(efx, drv, efx->net_dev,
2136 "failed to init net dev attributes\n");
2137 goto fail_registered;
2144 unregister_netdevice(net_dev);
2146 efx->state = STATE_UNINIT;
2148 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2152 static void efx_unregister_netdev(struct efx_nic *efx)
2157 BUG_ON(netdev_priv(efx->net_dev) != efx);
2159 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2160 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2163 unregister_netdevice(efx->net_dev);
2164 efx->state = STATE_UNINIT;
2168 /**************************************************************************
2170 * Device reset and suspend
2172 **************************************************************************/
2174 /* Tears down the entire software state and most of the hardware state
2176 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2178 EFX_ASSERT_RESET_SERIALISED(efx);
2181 efx_disable_interrupts(efx);
2183 mutex_lock(&efx->mac_lock);
2184 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2185 efx->phy_op->fini(efx);
2186 efx->type->fini(efx);
2189 /* This function will always ensure that the locks acquired in
2190 * efx_reset_down() are released. A failure return code indicates
2191 * that we were unable to reinitialise the hardware, and the
2192 * driver should be disabled. If ok is false, then the rx and tx
2193 * engines are not restarted, pending a RESET_DISABLE. */
2194 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2198 EFX_ASSERT_RESET_SERIALISED(efx);
2200 rc = efx->type->init(efx);
2202 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2209 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2210 rc = efx->phy_op->init(efx);
2213 if (efx->phy_op->reconfigure(efx))
2214 netif_err(efx, drv, efx->net_dev,
2215 "could not restore PHY settings\n");
2218 efx->type->reconfigure_mac(efx);
2220 efx_enable_interrupts(efx);
2221 efx_restore_filters(efx);
2222 efx_sriov_reset(efx);
2224 mutex_unlock(&efx->mac_lock);
2231 efx->port_initialized = false;
2233 mutex_unlock(&efx->mac_lock);
2238 /* Reset the NIC using the specified method. Note that the reset may
2239 * fail, in which case the card will be left in an unusable state.
2241 * Caller must hold the rtnl_lock.
2243 int efx_reset(struct efx_nic *efx, enum reset_type method)
2248 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2249 RESET_TYPE(method));
2251 efx_device_detach_sync(efx);
2252 efx_reset_down(efx, method);
2254 rc = efx->type->reset(efx, method);
2256 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2260 /* Clear flags for the scopes we covered. We assume the NIC and
2261 * driver are now quiescent so that there is no race here.
2263 efx->reset_pending &= -(1 << (method + 1));
2265 /* Reinitialise bus-mastering, which may have been turned off before
2266 * the reset was scheduled. This is still appropriate, even in the
2267 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2268 * can respond to requests. */
2269 pci_set_master(efx->pci_dev);
2272 /* Leave device stopped if necessary */
2274 method == RESET_TYPE_DISABLE ||
2275 method == RESET_TYPE_RECOVER_OR_DISABLE;
2276 rc2 = efx_reset_up(efx, method, !disabled);
2284 dev_close(efx->net_dev);
2285 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2286 efx->state = STATE_DISABLED;
2288 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2289 netif_device_attach(efx->net_dev);
2294 /* Try recovery mechanisms.
2295 * For now only EEH is supported.
2296 * Returns 0 if the recovery mechanisms are unsuccessful.
2297 * Returns a non-zero value otherwise.
2299 int efx_try_recovery(struct efx_nic *efx)
2302 /* A PCI error can occur and not be seen by EEH because nothing
2303 * happens on the PCI bus. In this case the driver may fail and
2304 * schedule a 'recover or reset', leading to this recovery handler.
2305 * Manually call the eeh failure check function.
2307 struct eeh_dev *eehdev =
2308 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2310 if (eeh_dev_check_failure(eehdev)) {
2311 /* The EEH mechanisms will handle the error and reset the
2312 * device if necessary.
2320 /* The worker thread exists so that code that cannot sleep can
2321 * schedule a reset for later.
2323 static void efx_reset_work(struct work_struct *data)
2325 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2326 unsigned long pending;
2327 enum reset_type method;
2329 pending = ACCESS_ONCE(efx->reset_pending);
2330 method = fls(pending) - 1;
2332 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2333 method == RESET_TYPE_RECOVER_OR_ALL) &&
2334 efx_try_recovery(efx))
2342 /* We checked the state in efx_schedule_reset() but it may
2343 * have changed by now. Now that we have the RTNL lock,
2344 * it cannot change again.
2346 if (efx->state == STATE_READY)
2347 (void)efx_reset(efx, method);
2352 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2354 enum reset_type method;
2356 if (efx->state == STATE_RECOVERY) {
2357 netif_dbg(efx, drv, efx->net_dev,
2358 "recovering: skip scheduling %s reset\n",
2364 case RESET_TYPE_INVISIBLE:
2365 case RESET_TYPE_ALL:
2366 case RESET_TYPE_RECOVER_OR_ALL:
2367 case RESET_TYPE_WORLD:
2368 case RESET_TYPE_DISABLE:
2369 case RESET_TYPE_RECOVER_OR_DISABLE:
2371 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2372 RESET_TYPE(method));
2375 method = efx->type->map_reset_reason(type);
2376 netif_dbg(efx, drv, efx->net_dev,
2377 "scheduling %s reset for %s\n",
2378 RESET_TYPE(method), RESET_TYPE(type));
2382 set_bit(method, &efx->reset_pending);
2383 smp_mb(); /* ensure we change reset_pending before checking state */
2385 /* If we're not READY then just leave the flags set as the cue
2386 * to abort probing or reschedule the reset later.
2388 if (ACCESS_ONCE(efx->state) != STATE_READY)
2391 /* efx_process_channel() will no longer read events once a
2392 * reset is scheduled. So switch back to poll'd MCDI completions. */
2393 efx_mcdi_mode_poll(efx);
2395 queue_work(reset_workqueue, &efx->reset_work);
2398 /**************************************************************************
2400 * List of NICs we support
2402 **************************************************************************/
2404 /* PCI device ID table */
2405 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2406 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2407 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2408 .driver_data = (unsigned long) &falcon_a1_nic_type},
2409 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2410 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2411 .driver_data = (unsigned long) &falcon_b0_nic_type},
2412 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2413 .driver_data = (unsigned long) &siena_a0_nic_type},
2414 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2415 .driver_data = (unsigned long) &siena_a0_nic_type},
2416 {0} /* end of list */
2419 /**************************************************************************
2421 * Dummy PHY/MAC operations
2423 * Can be used for some unimplemented operations
2424 * Needed so all function pointers are valid and do not have to be tested
2427 **************************************************************************/
2428 int efx_port_dummy_op_int(struct efx_nic *efx)
2432 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2434 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2439 static const struct efx_phy_operations efx_dummy_phy_operations = {
2440 .init = efx_port_dummy_op_int,
2441 .reconfigure = efx_port_dummy_op_int,
2442 .poll = efx_port_dummy_op_poll,
2443 .fini = efx_port_dummy_op_void,
2446 /**************************************************************************
2450 **************************************************************************/
2452 /* This zeroes out and then fills in the invariants in a struct
2453 * efx_nic (including all sub-structures).
2455 static int efx_init_struct(struct efx_nic *efx,
2456 struct pci_dev *pci_dev, struct net_device *net_dev)
2460 /* Initialise common structures */
2461 spin_lock_init(&efx->biu_lock);
2462 #ifdef CONFIG_SFC_MTD
2463 INIT_LIST_HEAD(&efx->mtd_list);
2465 INIT_WORK(&efx->reset_work, efx_reset_work);
2466 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2467 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2468 efx->pci_dev = pci_dev;
2469 efx->msg_enable = debug;
2470 efx->state = STATE_UNINIT;
2471 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2473 efx->net_dev = net_dev;
2474 spin_lock_init(&efx->stats_lock);
2475 mutex_init(&efx->mac_lock);
2476 efx->phy_op = &efx_dummy_phy_operations;
2477 efx->mdio.dev = net_dev;
2478 INIT_WORK(&efx->mac_work, efx_mac_work);
2479 init_waitqueue_head(&efx->flush_wq);
2481 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2482 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2483 if (!efx->channel[i])
2485 efx->msi_context[i].efx = efx;
2486 efx->msi_context[i].index = i;
2489 /* Higher numbered interrupt modes are less capable! */
2490 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2493 /* Would be good to use the net_dev name, but we're too early */
2494 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2496 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2497 if (!efx->workqueue)
2503 efx_fini_struct(efx);
2507 static void efx_fini_struct(struct efx_nic *efx)
2511 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2512 kfree(efx->channel[i]);
2514 if (efx->workqueue) {
2515 destroy_workqueue(efx->workqueue);
2516 efx->workqueue = NULL;
2520 /**************************************************************************
2524 **************************************************************************/
2526 /* Main body of final NIC shutdown code
2527 * This is called only at module unload (or hotplug removal).
2529 static void efx_pci_remove_main(struct efx_nic *efx)
2531 /* Flush reset_work. It can no longer be scheduled since we
2534 BUG_ON(efx->state == STATE_READY);
2535 cancel_work_sync(&efx->reset_work);
2537 efx_disable_interrupts(efx);
2538 efx_nic_fini_interrupt(efx);
2540 efx->type->fini(efx);
2542 efx_remove_all(efx);
2545 /* Final NIC shutdown
2546 * This is called only at module unload (or hotplug removal).
2548 static void efx_pci_remove(struct pci_dev *pci_dev)
2550 struct efx_nic *efx;
2552 efx = pci_get_drvdata(pci_dev);
2556 /* Mark the NIC as fini, then stop the interface */
2558 dev_close(efx->net_dev);
2559 efx_disable_interrupts(efx);
2562 efx_sriov_fini(efx);
2563 efx_unregister_netdev(efx);
2565 efx_mtd_remove(efx);
2567 efx_pci_remove_main(efx);
2570 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2572 efx_fini_struct(efx);
2573 pci_set_drvdata(pci_dev, NULL);
2574 free_netdev(efx->net_dev);
2576 pci_disable_pcie_error_reporting(pci_dev);
2579 /* NIC VPD information
2580 * Called during probe to display the part number of the
2581 * installed NIC. VPD is potentially very large but this should
2582 * always appear within the first 512 bytes.
2584 #define SFC_VPD_LEN 512
2585 static void efx_print_product_vpd(struct efx_nic *efx)
2587 struct pci_dev *dev = efx->pci_dev;
2588 char vpd_data[SFC_VPD_LEN];
2592 /* Get the vpd data from the device */
2593 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2594 if (vpd_size <= 0) {
2595 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2599 /* Get the Read only section */
2600 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2602 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2606 j = pci_vpd_lrdt_size(&vpd_data[i]);
2607 i += PCI_VPD_LRDT_TAG_SIZE;
2608 if (i + j > vpd_size)
2611 /* Get the Part number */
2612 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2614 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2618 j = pci_vpd_info_field_size(&vpd_data[i]);
2619 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2620 if (i + j > vpd_size) {
2621 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2625 netif_info(efx, drv, efx->net_dev,
2626 "Part Number : %.*s\n", j, &vpd_data[i]);
2630 /* Main body of NIC initialisation
2631 * This is called at module load (or hotplug insertion, theoretically).
2633 static int efx_pci_probe_main(struct efx_nic *efx)
2637 /* Do start-of-day initialisation */
2638 rc = efx_probe_all(efx);
2644 rc = efx->type->init(efx);
2646 netif_err(efx, probe, efx->net_dev,
2647 "failed to initialise NIC\n");
2651 rc = efx_init_port(efx);
2653 netif_err(efx, probe, efx->net_dev,
2654 "failed to initialise port\n");
2658 rc = efx_nic_init_interrupt(efx);
2661 efx_enable_interrupts(efx);
2668 efx->type->fini(efx);
2671 efx_remove_all(efx);
2676 /* NIC initialisation
2678 * This is called at module load (or hotplug insertion,
2679 * theoretically). It sets up PCI mappings, resets the NIC,
2680 * sets up and registers the network devices with the kernel and hooks
2681 * the interrupt service routine. It does not prepare the device for
2682 * transmission; this is left to the first time one of the network
2683 * interfaces is brought up (i.e. efx_net_open).
2685 static int efx_pci_probe(struct pci_dev *pci_dev,
2686 const struct pci_device_id *entry)
2688 struct net_device *net_dev;
2689 struct efx_nic *efx;
2692 /* Allocate and initialise a struct net_device and struct efx_nic */
2693 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2697 efx = netdev_priv(net_dev);
2698 efx->type = (const struct efx_nic_type *) entry->driver_data;
2699 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2700 NETIF_F_HIGHDMA | NETIF_F_TSO |
2702 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2703 net_dev->features |= NETIF_F_TSO6;
2704 /* Mask for features that also apply to VLAN devices */
2705 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2706 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2708 /* All offloads can be toggled */
2709 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2710 pci_set_drvdata(pci_dev, efx);
2711 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2712 rc = efx_init_struct(efx, pci_dev, net_dev);
2716 netif_info(efx, probe, efx->net_dev,
2717 "Solarflare NIC detected\n");
2719 efx_print_product_vpd(efx);
2721 /* Set up basic I/O (BAR mappings etc) */
2722 rc = efx_init_io(efx);
2726 rc = efx_pci_probe_main(efx);
2730 rc = efx_register_netdev(efx);
2734 rc = efx_sriov_init(efx);
2736 netif_err(efx, probe, efx->net_dev,
2737 "SR-IOV can't be enabled rc %d\n", rc);
2739 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2741 /* Try to create MTDs, but allow this to fail */
2743 rc = efx_mtd_probe(efx);
2746 netif_warn(efx, probe, efx->net_dev,
2747 "failed to create MTDs (%d)\n", rc);
2749 rc = pci_enable_pcie_error_reporting(pci_dev);
2750 if (rc && rc != -EINVAL)
2751 netif_warn(efx, probe, efx->net_dev,
2752 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2757 efx_pci_remove_main(efx);
2761 efx_fini_struct(efx);
2763 pci_set_drvdata(pci_dev, NULL);
2765 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2766 free_netdev(net_dev);
2770 static int efx_pm_freeze(struct device *dev)
2772 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2776 if (efx->state != STATE_DISABLED) {
2777 efx->state = STATE_UNINIT;
2779 efx_device_detach_sync(efx);
2782 efx_disable_interrupts(efx);
2790 static int efx_pm_thaw(struct device *dev)
2792 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2796 if (efx->state != STATE_DISABLED) {
2797 efx_enable_interrupts(efx);
2799 mutex_lock(&efx->mac_lock);
2800 efx->phy_op->reconfigure(efx);
2801 mutex_unlock(&efx->mac_lock);
2805 netif_device_attach(efx->net_dev);
2807 efx->state = STATE_READY;
2809 efx->type->resume_wol(efx);
2814 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2815 queue_work(reset_workqueue, &efx->reset_work);
2820 static int efx_pm_poweroff(struct device *dev)
2822 struct pci_dev *pci_dev = to_pci_dev(dev);
2823 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2825 efx->type->fini(efx);
2827 efx->reset_pending = 0;
2829 pci_save_state(pci_dev);
2830 return pci_set_power_state(pci_dev, PCI_D3hot);
2833 /* Used for both resume and restore */
2834 static int efx_pm_resume(struct device *dev)
2836 struct pci_dev *pci_dev = to_pci_dev(dev);
2837 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2840 rc = pci_set_power_state(pci_dev, PCI_D0);
2843 pci_restore_state(pci_dev);
2844 rc = pci_enable_device(pci_dev);
2847 pci_set_master(efx->pci_dev);
2848 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2851 rc = efx->type->init(efx);
2858 static int efx_pm_suspend(struct device *dev)
2863 rc = efx_pm_poweroff(dev);
2869 static const struct dev_pm_ops efx_pm_ops = {
2870 .suspend = efx_pm_suspend,
2871 .resume = efx_pm_resume,
2872 .freeze = efx_pm_freeze,
2873 .thaw = efx_pm_thaw,
2874 .poweroff = efx_pm_poweroff,
2875 .restore = efx_pm_resume,
2878 /* A PCI error affecting this device was detected.
2879 * At this point MMIO and DMA may be disabled.
2880 * Stop the software path and request a slot reset.
2882 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2883 enum pci_channel_state state)
2885 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2886 struct efx_nic *efx = pci_get_drvdata(pdev);
2888 if (state == pci_channel_io_perm_failure)
2889 return PCI_ERS_RESULT_DISCONNECT;
2893 if (efx->state != STATE_DISABLED) {
2894 efx->state = STATE_RECOVERY;
2895 efx->reset_pending = 0;
2897 efx_device_detach_sync(efx);
2900 efx_disable_interrupts(efx);
2902 status = PCI_ERS_RESULT_NEED_RESET;
2904 /* If the interface is disabled we don't want to do anything
2907 status = PCI_ERS_RESULT_RECOVERED;
2912 pci_disable_device(pdev);
2917 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
2918 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
2920 struct efx_nic *efx = pci_get_drvdata(pdev);
2921 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2924 if (pci_enable_device(pdev)) {
2925 netif_err(efx, hw, efx->net_dev,
2926 "Cannot re-enable PCI device after reset.\n");
2927 status = PCI_ERS_RESULT_DISCONNECT;
2930 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
2932 netif_err(efx, hw, efx->net_dev,
2933 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
2934 /* Non-fatal error. Continue. */
2940 /* Perform the actual reset and resume I/O operations. */
2941 static void efx_io_resume(struct pci_dev *pdev)
2943 struct efx_nic *efx = pci_get_drvdata(pdev);
2948 if (efx->state == STATE_DISABLED)
2951 rc = efx_reset(efx, RESET_TYPE_ALL);
2953 netif_err(efx, hw, efx->net_dev,
2954 "efx_reset failed after PCI error (%d)\n", rc);
2956 efx->state = STATE_READY;
2957 netif_dbg(efx, hw, efx->net_dev,
2958 "Done resetting and resuming IO after PCI error.\n");
2965 /* For simplicity and reliability, we always require a slot reset and try to
2966 * reset the hardware when a pci error affecting the device is detected.
2967 * We leave both the link_reset and mmio_enabled callback unimplemented:
2968 * with our request for slot reset the mmio_enabled callback will never be
2969 * called, and the link_reset callback is not used by AER or EEH mechanisms.
2971 static struct pci_error_handlers efx_err_handlers = {
2972 .error_detected = efx_io_error_detected,
2973 .slot_reset = efx_io_slot_reset,
2974 .resume = efx_io_resume,
2977 static struct pci_driver efx_pci_driver = {
2978 .name = KBUILD_MODNAME,
2979 .id_table = efx_pci_table,
2980 .probe = efx_pci_probe,
2981 .remove = efx_pci_remove,
2982 .driver.pm = &efx_pm_ops,
2983 .err_handler = &efx_err_handlers,
2986 /**************************************************************************
2988 * Kernel module interface
2990 *************************************************************************/
2992 module_param(interrupt_mode, uint, 0444);
2993 MODULE_PARM_DESC(interrupt_mode,
2994 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2996 static int __init efx_init_module(void)
3000 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3002 rc = register_netdevice_notifier(&efx_netdev_notifier);
3006 rc = efx_init_sriov();
3010 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3011 if (!reset_workqueue) {
3016 rc = pci_register_driver(&efx_pci_driver);
3023 destroy_workqueue(reset_workqueue);
3027 unregister_netdevice_notifier(&efx_netdev_notifier);
3032 static void __exit efx_exit_module(void)
3034 printk(KERN_INFO "Solarflare NET driver unloading\n");
3036 pci_unregister_driver(&efx_pci_driver);
3037 destroy_workqueue(reset_workqueue);
3039 unregister_netdevice_notifier(&efx_netdev_notifier);
3043 module_init(efx_init_module);
3044 module_exit(efx_exit_module);
3046 MODULE_AUTHOR("Solarflare Communications and "
3047 "Michael Brown <mbrown@fensystems.co.uk>");
3048 MODULE_DESCRIPTION("Solarflare Communications network driver");
3049 MODULE_LICENSE("GPL");
3050 MODULE_DEVICE_TABLE(pci, efx_pci_table);