1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
27 #include <net/udp_tunnel.h>
34 #include "mcdi_pcol.h"
35 #include "workarounds.h"
37 /**************************************************************************
41 **************************************************************************
44 /* Loopback mode names (see LOOPBACK_MODE()) */
45 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
46 const char *const efx_loopback_mode_names[] = {
47 [LOOPBACK_NONE] = "NONE",
48 [LOOPBACK_DATA] = "DATAPATH",
49 [LOOPBACK_GMAC] = "GMAC",
50 [LOOPBACK_XGMII] = "XGMII",
51 [LOOPBACK_XGXS] = "XGXS",
52 [LOOPBACK_XAUI] = "XAUI",
53 [LOOPBACK_GMII] = "GMII",
54 [LOOPBACK_SGMII] = "SGMII",
55 [LOOPBACK_XGBR] = "XGBR",
56 [LOOPBACK_XFI] = "XFI",
57 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
58 [LOOPBACK_GMII_FAR] = "GMII_FAR",
59 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
60 [LOOPBACK_XFI_FAR] = "XFI_FAR",
61 [LOOPBACK_GPHY] = "GPHY",
62 [LOOPBACK_PHYXS] = "PHYXS",
63 [LOOPBACK_PCS] = "PCS",
64 [LOOPBACK_PMAPMD] = "PMA/PMD",
65 [LOOPBACK_XPORT] = "XPORT",
66 [LOOPBACK_XGMII_WS] = "XGMII_WS",
67 [LOOPBACK_XAUI_WS] = "XAUI_WS",
68 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
69 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
70 [LOOPBACK_GMII_WS] = "GMII_WS",
71 [LOOPBACK_XFI_WS] = "XFI_WS",
72 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
73 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
76 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
77 const char *const efx_reset_type_names[] = {
78 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
79 [RESET_TYPE_ALL] = "ALL",
80 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
81 [RESET_TYPE_WORLD] = "WORLD",
82 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
83 [RESET_TYPE_DATAPATH] = "DATAPATH",
84 [RESET_TYPE_MC_BIST] = "MC_BIST",
85 [RESET_TYPE_DISABLE] = "DISABLE",
86 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
87 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
88 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
89 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
90 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
91 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
94 /* UDP tunnel type names */
95 static const char *const efx_udp_tunnel_type_names[] = {
96 [TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN] = "vxlan",
97 [TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE] = "geneve",
100 void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen)
102 if (type < ARRAY_SIZE(efx_udp_tunnel_type_names) &&
103 efx_udp_tunnel_type_names[type] != NULL)
104 snprintf(buf, buflen, "%s", efx_udp_tunnel_type_names[type]);
106 snprintf(buf, buflen, "type %d", type);
109 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
110 * queued onto this work queue. This is not a per-nic work queue, because
111 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
113 static struct workqueue_struct *reset_workqueue;
115 /* How often and how many times to poll for a reset while waiting for a
116 * BIST that another function started to complete.
118 #define BIST_WAIT_DELAY_MS 100
119 #define BIST_WAIT_DELAY_COUNT 100
121 /**************************************************************************
123 * Configurable values
125 *************************************************************************/
128 * Use separate channels for TX and RX events
130 * Set this to 1 to use separate channels for TX and RX. It allows us
131 * to control interrupt affinity separately for TX and RX.
133 * This is only used in MSI-X interrupt mode
135 bool efx_separate_tx_channels;
136 module_param(efx_separate_tx_channels, bool, 0444);
137 MODULE_PARM_DESC(efx_separate_tx_channels,
138 "Use separate channels for TX and RX");
140 /* This is the weight assigned to each of the (per-channel) virtual
143 static int napi_weight = 64;
145 /* This is the time (in jiffies) between invocations of the hardware
147 * On Falcon-based NICs, this will:
148 * - Check the on-board hardware monitor;
149 * - Poll the link state and reconfigure the hardware as necessary.
150 * On Siena-based NICs for power systems with EEH support, this will give EEH a
153 static unsigned int efx_monitor_interval = 1 * HZ;
155 /* Initial interrupt moderation settings. They can be modified after
156 * module load with ethtool.
158 * The default for RX should strike a balance between increasing the
159 * round-trip latency and reducing overhead.
161 static unsigned int rx_irq_mod_usec = 60;
163 /* Initial interrupt moderation settings. They can be modified after
164 * module load with ethtool.
166 * This default is chosen to ensure that a 10G link does not go idle
167 * while a TX queue is stopped after it has become full. A queue is
168 * restarted when it drops below half full. The time this takes (assuming
169 * worst case 3 descriptors per packet and 1024 descriptors) is
170 * 512 / 3 * 1.2 = 205 usec.
172 static unsigned int tx_irq_mod_usec = 150;
174 /* This is the first interrupt mode to try out of:
179 static unsigned int interrupt_mode;
181 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
182 * i.e. the number of CPUs among which we may distribute simultaneous
183 * interrupt handling.
185 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
186 * The default (0) means to assign an interrupt to each core.
188 static unsigned int rss_cpus;
189 module_param(rss_cpus, uint, 0444);
190 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
192 static bool phy_flash_cfg;
193 module_param(phy_flash_cfg, bool, 0644);
194 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
196 static unsigned irq_adapt_low_thresh = 8000;
197 module_param(irq_adapt_low_thresh, uint, 0644);
198 MODULE_PARM_DESC(irq_adapt_low_thresh,
199 "Threshold score for reducing IRQ moderation");
201 static unsigned irq_adapt_high_thresh = 16000;
202 module_param(irq_adapt_high_thresh, uint, 0644);
203 MODULE_PARM_DESC(irq_adapt_high_thresh,
204 "Threshold score for increasing IRQ moderation");
206 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
207 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
208 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
209 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
210 module_param(debug, uint, 0);
211 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
213 /**************************************************************************
215 * Utility functions and prototypes
217 *************************************************************************/
219 static int efx_soft_enable_interrupts(struct efx_nic *efx);
220 static void efx_soft_disable_interrupts(struct efx_nic *efx);
221 static void efx_remove_channel(struct efx_channel *channel);
222 static void efx_remove_channels(struct efx_nic *efx);
223 static const struct efx_channel_type efx_default_channel_type;
224 static void efx_remove_port(struct efx_nic *efx);
225 static void efx_init_napi_channel(struct efx_channel *channel);
226 static void efx_fini_napi(struct efx_nic *efx);
227 static void efx_fini_napi_channel(struct efx_channel *channel);
228 static void efx_fini_struct(struct efx_nic *efx);
229 static void efx_start_all(struct efx_nic *efx);
230 static void efx_stop_all(struct efx_nic *efx);
232 #define EFX_ASSERT_RESET_SERIALISED(efx) \
234 if ((efx->state == STATE_READY) || \
235 (efx->state == STATE_RECOVERY) || \
236 (efx->state == STATE_DISABLED)) \
240 static int efx_check_disabled(struct efx_nic *efx)
242 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
243 netif_err(efx, drv, efx->net_dev,
244 "device is disabled due to earlier errors\n");
250 /**************************************************************************
252 * Event queue processing
254 *************************************************************************/
256 /* Process channel's event queue
258 * This function is responsible for processing the event queue of a
259 * single channel. The caller must guarantee that this function will
260 * never be concurrently called more than once on the same channel,
261 * though different channels may be being processed concurrently.
263 static int efx_process_channel(struct efx_channel *channel, int budget)
265 struct efx_tx_queue *tx_queue;
268 if (unlikely(!channel->enabled))
271 efx_for_each_channel_tx_queue(tx_queue, channel) {
272 tx_queue->pkts_compl = 0;
273 tx_queue->bytes_compl = 0;
276 spent = efx_nic_process_eventq(channel, budget);
277 if (spent && efx_channel_has_rx_queue(channel)) {
278 struct efx_rx_queue *rx_queue =
279 efx_channel_get_rx_queue(channel);
281 efx_rx_flush_packet(channel);
282 efx_fast_push_rx_descriptors(rx_queue, true);
286 efx_for_each_channel_tx_queue(tx_queue, channel) {
287 if (tx_queue->bytes_compl) {
288 netdev_tx_completed_queue(tx_queue->core_txq,
289 tx_queue->pkts_compl, tx_queue->bytes_compl);
298 * NAPI guarantees serialisation of polls of the same device, which
299 * provides the guarantee required by efx_process_channel().
301 static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
303 int step = efx->irq_mod_step_us;
305 if (channel->irq_mod_score < irq_adapt_low_thresh) {
306 if (channel->irq_moderation_us > step) {
307 channel->irq_moderation_us -= step;
308 efx->type->push_irq_moderation(channel);
310 } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
311 if (channel->irq_moderation_us <
312 efx->irq_rx_moderation_us) {
313 channel->irq_moderation_us += step;
314 efx->type->push_irq_moderation(channel);
318 channel->irq_count = 0;
319 channel->irq_mod_score = 0;
322 static int efx_poll(struct napi_struct *napi, int budget)
324 struct efx_channel *channel =
325 container_of(napi, struct efx_channel, napi_str);
326 struct efx_nic *efx = channel->efx;
329 netif_vdbg(efx, intr, efx->net_dev,
330 "channel %d NAPI poll executing on CPU %d\n",
331 channel->channel, raw_smp_processor_id());
333 spent = efx_process_channel(channel, budget);
335 if (spent < budget) {
336 if (efx_channel_has_rx_queue(channel) &&
337 efx->irq_rx_adaptive &&
338 unlikely(++channel->irq_count == 1000)) {
339 efx_update_irq_mod(efx, channel);
342 efx_filter_rfs_expire(channel);
344 /* There is no race here; although napi_disable() will
345 * only wait for napi_complete(), this isn't a problem
346 * since efx_nic_eventq_read_ack() will have no effect if
347 * interrupts have already been disabled.
349 if (napi_complete_done(napi, spent))
350 efx_nic_eventq_read_ack(channel);
356 /* Create event queue
357 * Event queue memory allocations are done only once. If the channel
358 * is reset, the memory buffer will be reused; this guards against
359 * errors during channel reset and also simplifies interrupt handling.
361 static int efx_probe_eventq(struct efx_channel *channel)
363 struct efx_nic *efx = channel->efx;
364 unsigned long entries;
366 netif_dbg(efx, probe, efx->net_dev,
367 "chan %d create event queue\n", channel->channel);
369 /* Build an event queue with room for one event per tx and rx buffer,
370 * plus some extra for link state events and MCDI completions. */
371 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
372 EFX_WARN_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
373 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
375 return efx_nic_probe_eventq(channel);
378 /* Prepare channel's event queue */
379 static int efx_init_eventq(struct efx_channel *channel)
381 struct efx_nic *efx = channel->efx;
384 EFX_WARN_ON_PARANOID(channel->eventq_init);
386 netif_dbg(efx, drv, efx->net_dev,
387 "chan %d init event queue\n", channel->channel);
389 rc = efx_nic_init_eventq(channel);
391 efx->type->push_irq_moderation(channel);
392 channel->eventq_read_ptr = 0;
393 channel->eventq_init = true;
398 /* Enable event queue processing and NAPI */
399 void efx_start_eventq(struct efx_channel *channel)
401 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
402 "chan %d start event queue\n", channel->channel);
404 /* Make sure the NAPI handler sees the enabled flag set */
405 channel->enabled = true;
408 napi_enable(&channel->napi_str);
409 efx_nic_eventq_read_ack(channel);
412 /* Disable event queue processing and NAPI */
413 void efx_stop_eventq(struct efx_channel *channel)
415 if (!channel->enabled)
418 napi_disable(&channel->napi_str);
419 channel->enabled = false;
422 static void efx_fini_eventq(struct efx_channel *channel)
424 if (!channel->eventq_init)
427 netif_dbg(channel->efx, drv, channel->efx->net_dev,
428 "chan %d fini event queue\n", channel->channel);
430 efx_nic_fini_eventq(channel);
431 channel->eventq_init = false;
434 static void efx_remove_eventq(struct efx_channel *channel)
436 netif_dbg(channel->efx, drv, channel->efx->net_dev,
437 "chan %d remove event queue\n", channel->channel);
439 efx_nic_remove_eventq(channel);
442 /**************************************************************************
446 *************************************************************************/
448 /* Allocate and initialise a channel structure. */
449 static struct efx_channel *
450 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
452 struct efx_channel *channel;
453 struct efx_rx_queue *rx_queue;
454 struct efx_tx_queue *tx_queue;
457 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
462 channel->channel = i;
463 channel->type = &efx_default_channel_type;
465 for (j = 0; j < EFX_TXQ_TYPES; j++) {
466 tx_queue = &channel->tx_queue[j];
468 tx_queue->queue = i * EFX_TXQ_TYPES + j;
469 tx_queue->channel = channel;
472 rx_queue = &channel->rx_queue;
474 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
475 (unsigned long)rx_queue);
480 /* Allocate and initialise a channel structure, copying parameters
481 * (but not resources) from an old channel structure.
483 static struct efx_channel *
484 efx_copy_channel(const struct efx_channel *old_channel)
486 struct efx_channel *channel;
487 struct efx_rx_queue *rx_queue;
488 struct efx_tx_queue *tx_queue;
491 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
495 *channel = *old_channel;
497 channel->napi_dev = NULL;
498 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
499 channel->napi_str.napi_id = 0;
500 channel->napi_str.state = 0;
501 memset(&channel->eventq, 0, sizeof(channel->eventq));
503 for (j = 0; j < EFX_TXQ_TYPES; j++) {
504 tx_queue = &channel->tx_queue[j];
505 if (tx_queue->channel)
506 tx_queue->channel = channel;
507 tx_queue->buffer = NULL;
508 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
511 rx_queue = &channel->rx_queue;
512 rx_queue->buffer = NULL;
513 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
514 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
515 (unsigned long)rx_queue);
520 static int efx_probe_channel(struct efx_channel *channel)
522 struct efx_tx_queue *tx_queue;
523 struct efx_rx_queue *rx_queue;
526 netif_dbg(channel->efx, probe, channel->efx->net_dev,
527 "creating channel %d\n", channel->channel);
529 rc = channel->type->pre_probe(channel);
533 rc = efx_probe_eventq(channel);
537 efx_for_each_channel_tx_queue(tx_queue, channel) {
538 rc = efx_probe_tx_queue(tx_queue);
543 efx_for_each_channel_rx_queue(rx_queue, channel) {
544 rc = efx_probe_rx_queue(rx_queue);
552 efx_remove_channel(channel);
557 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
559 struct efx_nic *efx = channel->efx;
563 number = channel->channel;
564 if (efx->tx_channel_offset == 0) {
566 } else if (channel->channel < efx->tx_channel_offset) {
570 number -= efx->tx_channel_offset;
572 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
575 static void efx_set_channel_names(struct efx_nic *efx)
577 struct efx_channel *channel;
579 efx_for_each_channel(channel, efx)
580 channel->type->get_name(channel,
581 efx->msi_context[channel->channel].name,
582 sizeof(efx->msi_context[0].name));
585 static int efx_probe_channels(struct efx_nic *efx)
587 struct efx_channel *channel;
590 /* Restart special buffer allocation */
591 efx->next_buffer_table = 0;
593 /* Probe channels in reverse, so that any 'extra' channels
594 * use the start of the buffer table. This allows the traffic
595 * channels to be resized without moving them or wasting the
596 * entries before them.
598 efx_for_each_channel_rev(channel, efx) {
599 rc = efx_probe_channel(channel);
601 netif_err(efx, probe, efx->net_dev,
602 "failed to create channel %d\n",
607 efx_set_channel_names(efx);
612 efx_remove_channels(efx);
616 /* Channels are shutdown and reinitialised whilst the NIC is running
617 * to propagate configuration changes (mtu, checksum offload), or
618 * to clear hardware error conditions
620 static void efx_start_datapath(struct efx_nic *efx)
622 netdev_features_t old_features = efx->net_dev->features;
623 bool old_rx_scatter = efx->rx_scatter;
624 struct efx_tx_queue *tx_queue;
625 struct efx_rx_queue *rx_queue;
626 struct efx_channel *channel;
629 /* Calculate the rx buffer allocation parameters required to
630 * support the current MTU, including padding for header
631 * alignment and overruns.
633 efx->rx_dma_len = (efx->rx_prefix_size +
634 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
635 efx->type->rx_buffer_padding);
636 rx_buf_len = (sizeof(struct efx_rx_page_state) +
637 efx->rx_ip_align + efx->rx_dma_len);
638 if (rx_buf_len <= PAGE_SIZE) {
639 efx->rx_scatter = efx->type->always_rx_scatter;
640 efx->rx_buffer_order = 0;
641 } else if (efx->type->can_rx_scatter) {
642 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
643 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
644 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
645 EFX_RX_BUF_ALIGNMENT) >
647 efx->rx_scatter = true;
648 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
649 efx->rx_buffer_order = 0;
651 efx->rx_scatter = false;
652 efx->rx_buffer_order = get_order(rx_buf_len);
655 efx_rx_config_page_split(efx);
656 if (efx->rx_buffer_order)
657 netif_dbg(efx, drv, efx->net_dev,
658 "RX buf len=%u; page order=%u batch=%u\n",
659 efx->rx_dma_len, efx->rx_buffer_order,
660 efx->rx_pages_per_batch);
662 netif_dbg(efx, drv, efx->net_dev,
663 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
664 efx->rx_dma_len, efx->rx_page_buf_step,
665 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
667 /* Restore previously fixed features in hw_features and remove
668 * features which are fixed now
670 efx->net_dev->hw_features |= efx->net_dev->features;
671 efx->net_dev->hw_features &= ~efx->fixed_features;
672 efx->net_dev->features |= efx->fixed_features;
673 if (efx->net_dev->features != old_features)
674 netdev_features_change(efx->net_dev);
676 /* RX filters may also have scatter-enabled flags */
677 if (efx->rx_scatter != old_rx_scatter)
678 efx->type->filter_update_rx_scatter(efx);
680 /* We must keep at least one descriptor in a TX ring empty.
681 * We could avoid this when the queue size does not exactly
682 * match the hardware ring size, but it's not that important.
683 * Therefore we stop the queue when one more skb might fill
684 * the ring completely. We wake it when half way back to
687 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
688 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
690 /* Initialise the channels */
691 efx_for_each_channel(channel, efx) {
692 efx_for_each_channel_tx_queue(tx_queue, channel) {
693 efx_init_tx_queue(tx_queue);
694 atomic_inc(&efx->active_queues);
697 efx_for_each_channel_rx_queue(rx_queue, channel) {
698 efx_init_rx_queue(rx_queue);
699 atomic_inc(&efx->active_queues);
700 efx_stop_eventq(channel);
701 efx_fast_push_rx_descriptors(rx_queue, false);
702 efx_start_eventq(channel);
705 WARN_ON(channel->rx_pkt_n_frags);
708 efx_ptp_start_datapath(efx);
710 if (netif_device_present(efx->net_dev))
711 netif_tx_wake_all_queues(efx->net_dev);
714 static void efx_stop_datapath(struct efx_nic *efx)
716 struct efx_channel *channel;
717 struct efx_tx_queue *tx_queue;
718 struct efx_rx_queue *rx_queue;
721 EFX_ASSERT_RESET_SERIALISED(efx);
722 BUG_ON(efx->port_enabled);
724 efx_ptp_stop_datapath(efx);
727 efx_for_each_channel(channel, efx) {
728 efx_for_each_channel_rx_queue(rx_queue, channel)
729 rx_queue->refill_enabled = false;
732 efx_for_each_channel(channel, efx) {
733 /* RX packet processing is pipelined, so wait for the
734 * NAPI handler to complete. At least event queue 0
735 * might be kept active by non-data events, so don't
736 * use napi_synchronize() but actually disable NAPI
739 if (efx_channel_has_rx_queue(channel)) {
740 efx_stop_eventq(channel);
741 efx_start_eventq(channel);
745 rc = efx->type->fini_dmaq(efx);
747 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
749 netif_dbg(efx, drv, efx->net_dev,
750 "successfully flushed all queues\n");
753 efx_for_each_channel(channel, efx) {
754 efx_for_each_channel_rx_queue(rx_queue, channel)
755 efx_fini_rx_queue(rx_queue);
756 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
757 efx_fini_tx_queue(tx_queue);
761 static void efx_remove_channel(struct efx_channel *channel)
763 struct efx_tx_queue *tx_queue;
764 struct efx_rx_queue *rx_queue;
766 netif_dbg(channel->efx, drv, channel->efx->net_dev,
767 "destroy chan %d\n", channel->channel);
769 efx_for_each_channel_rx_queue(rx_queue, channel)
770 efx_remove_rx_queue(rx_queue);
771 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
772 efx_remove_tx_queue(tx_queue);
773 efx_remove_eventq(channel);
774 channel->type->post_remove(channel);
777 static void efx_remove_channels(struct efx_nic *efx)
779 struct efx_channel *channel;
781 efx_for_each_channel(channel, efx)
782 efx_remove_channel(channel);
786 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
788 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
789 u32 old_rxq_entries, old_txq_entries;
790 unsigned i, next_buffer_table = 0;
793 rc = efx_check_disabled(efx);
797 /* Not all channels should be reallocated. We must avoid
798 * reallocating their buffer table entries.
800 efx_for_each_channel(channel, efx) {
801 struct efx_rx_queue *rx_queue;
802 struct efx_tx_queue *tx_queue;
804 if (channel->type->copy)
806 next_buffer_table = max(next_buffer_table,
807 channel->eventq.index +
808 channel->eventq.entries);
809 efx_for_each_channel_rx_queue(rx_queue, channel)
810 next_buffer_table = max(next_buffer_table,
811 rx_queue->rxd.index +
812 rx_queue->rxd.entries);
813 efx_for_each_channel_tx_queue(tx_queue, channel)
814 next_buffer_table = max(next_buffer_table,
815 tx_queue->txd.index +
816 tx_queue->txd.entries);
819 efx_device_detach_sync(efx);
821 efx_soft_disable_interrupts(efx);
823 /* Clone channels (where possible) */
824 memset(other_channel, 0, sizeof(other_channel));
825 for (i = 0; i < efx->n_channels; i++) {
826 channel = efx->channel[i];
827 if (channel->type->copy)
828 channel = channel->type->copy(channel);
833 other_channel[i] = channel;
836 /* Swap entry counts and channel pointers */
837 old_rxq_entries = efx->rxq_entries;
838 old_txq_entries = efx->txq_entries;
839 efx->rxq_entries = rxq_entries;
840 efx->txq_entries = txq_entries;
841 for (i = 0; i < efx->n_channels; i++) {
842 channel = efx->channel[i];
843 efx->channel[i] = other_channel[i];
844 other_channel[i] = channel;
847 /* Restart buffer table allocation */
848 efx->next_buffer_table = next_buffer_table;
850 for (i = 0; i < efx->n_channels; i++) {
851 channel = efx->channel[i];
852 if (!channel->type->copy)
854 rc = efx_probe_channel(channel);
857 efx_init_napi_channel(efx->channel[i]);
861 /* Destroy unused channel structures */
862 for (i = 0; i < efx->n_channels; i++) {
863 channel = other_channel[i];
864 if (channel && channel->type->copy) {
865 efx_fini_napi_channel(channel);
866 efx_remove_channel(channel);
871 rc2 = efx_soft_enable_interrupts(efx);
874 netif_err(efx, drv, efx->net_dev,
875 "unable to restart interrupts on channel reallocation\n");
876 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
879 efx_device_attach_if_not_resetting(efx);
885 efx->rxq_entries = old_rxq_entries;
886 efx->txq_entries = old_txq_entries;
887 for (i = 0; i < efx->n_channels; i++) {
888 channel = efx->channel[i];
889 efx->channel[i] = other_channel[i];
890 other_channel[i] = channel;
895 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
897 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
900 static const struct efx_channel_type efx_default_channel_type = {
901 .pre_probe = efx_channel_dummy_op_int,
902 .post_remove = efx_channel_dummy_op_void,
903 .get_name = efx_get_channel_name,
904 .copy = efx_copy_channel,
905 .keep_eventq = false,
908 int efx_channel_dummy_op_int(struct efx_channel *channel)
913 void efx_channel_dummy_op_void(struct efx_channel *channel)
917 /**************************************************************************
921 **************************************************************************/
923 /* This ensures that the kernel is kept informed (via
924 * netif_carrier_on/off) of the link status, and also maintains the
925 * link status's stop on the port's TX queue.
927 void efx_link_status_changed(struct efx_nic *efx)
929 struct efx_link_state *link_state = &efx->link_state;
931 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
932 * that no events are triggered between unregister_netdev() and the
933 * driver unloading. A more general condition is that NETDEV_CHANGE
934 * can only be generated between NETDEV_UP and NETDEV_DOWN */
935 if (!netif_running(efx->net_dev))
938 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
939 efx->n_link_state_changes++;
942 netif_carrier_on(efx->net_dev);
944 netif_carrier_off(efx->net_dev);
947 /* Status message for kernel log */
949 netif_info(efx, link, efx->net_dev,
950 "link up at %uMbps %s-duplex (MTU %d)\n",
951 link_state->speed, link_state->fd ? "full" : "half",
954 netif_info(efx, link, efx->net_dev, "link down\n");
957 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
959 efx->link_advertising = advertising;
961 if (advertising & ADVERTISED_Pause)
962 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
964 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
965 if (advertising & ADVERTISED_Asym_Pause)
966 efx->wanted_fc ^= EFX_FC_TX;
970 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
972 efx->wanted_fc = wanted_fc;
973 if (efx->link_advertising) {
974 if (wanted_fc & EFX_FC_RX)
975 efx->link_advertising |= (ADVERTISED_Pause |
976 ADVERTISED_Asym_Pause);
978 efx->link_advertising &= ~(ADVERTISED_Pause |
979 ADVERTISED_Asym_Pause);
980 if (wanted_fc & EFX_FC_TX)
981 efx->link_advertising ^= ADVERTISED_Asym_Pause;
985 static void efx_fini_port(struct efx_nic *efx);
987 /* We assume that efx->type->reconfigure_mac will always try to sync RX
988 * filters and therefore needs to read-lock the filter table against freeing
990 void efx_mac_reconfigure(struct efx_nic *efx)
992 down_read(&efx->filter_sem);
993 efx->type->reconfigure_mac(efx);
994 up_read(&efx->filter_sem);
997 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
998 * the MAC appropriately. All other PHY configuration changes are pushed
999 * through phy_op->set_settings(), and pushed asynchronously to the MAC
1000 * through efx_monitor().
1002 * Callers must hold the mac_lock
1004 int __efx_reconfigure_port(struct efx_nic *efx)
1006 enum efx_phy_mode phy_mode;
1009 WARN_ON(!mutex_is_locked(&efx->mac_lock));
1011 /* Disable PHY transmit in mac level loopbacks */
1012 phy_mode = efx->phy_mode;
1013 if (LOOPBACK_INTERNAL(efx))
1014 efx->phy_mode |= PHY_MODE_TX_DISABLED;
1016 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
1018 rc = efx->type->reconfigure_port(efx);
1021 efx->phy_mode = phy_mode;
1026 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1028 int efx_reconfigure_port(struct efx_nic *efx)
1032 EFX_ASSERT_RESET_SERIALISED(efx);
1034 mutex_lock(&efx->mac_lock);
1035 rc = __efx_reconfigure_port(efx);
1036 mutex_unlock(&efx->mac_lock);
1041 /* Asynchronous work item for changing MAC promiscuity and multicast
1042 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1044 static void efx_mac_work(struct work_struct *data)
1046 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1048 mutex_lock(&efx->mac_lock);
1049 if (efx->port_enabled)
1050 efx_mac_reconfigure(efx);
1051 mutex_unlock(&efx->mac_lock);
1054 static int efx_probe_port(struct efx_nic *efx)
1058 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1061 efx->phy_mode = PHY_MODE_SPECIAL;
1063 /* Connect up MAC/PHY operations table */
1064 rc = efx->type->probe_port(efx);
1068 /* Initialise MAC address to permanent address */
1069 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1074 static int efx_init_port(struct efx_nic *efx)
1078 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1080 mutex_lock(&efx->mac_lock);
1082 rc = efx->phy_op->init(efx);
1086 efx->port_initialized = true;
1088 /* Reconfigure the MAC before creating dma queues (required for
1089 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1090 efx_mac_reconfigure(efx);
1092 /* Ensure the PHY advertises the correct flow control settings */
1093 rc = efx->phy_op->reconfigure(efx);
1094 if (rc && rc != -EPERM)
1097 mutex_unlock(&efx->mac_lock);
1101 efx->phy_op->fini(efx);
1103 mutex_unlock(&efx->mac_lock);
1107 static void efx_start_port(struct efx_nic *efx)
1109 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1110 BUG_ON(efx->port_enabled);
1112 mutex_lock(&efx->mac_lock);
1113 efx->port_enabled = true;
1115 /* Ensure MAC ingress/egress is enabled */
1116 efx_mac_reconfigure(efx);
1118 mutex_unlock(&efx->mac_lock);
1121 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1122 * and the async self-test, wait for them to finish and prevent them
1123 * being scheduled again. This doesn't cover online resets, which
1124 * should only be cancelled when removing the device.
1126 static void efx_stop_port(struct efx_nic *efx)
1128 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1130 EFX_ASSERT_RESET_SERIALISED(efx);
1132 mutex_lock(&efx->mac_lock);
1133 efx->port_enabled = false;
1134 mutex_unlock(&efx->mac_lock);
1136 /* Serialise against efx_set_multicast_list() */
1137 netif_addr_lock_bh(efx->net_dev);
1138 netif_addr_unlock_bh(efx->net_dev);
1140 cancel_delayed_work_sync(&efx->monitor_work);
1141 efx_selftest_async_cancel(efx);
1142 cancel_work_sync(&efx->mac_work);
1145 static void efx_fini_port(struct efx_nic *efx)
1147 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1149 if (!efx->port_initialized)
1152 efx->phy_op->fini(efx);
1153 efx->port_initialized = false;
1155 efx->link_state.up = false;
1156 efx_link_status_changed(efx);
1159 static void efx_remove_port(struct efx_nic *efx)
1161 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1163 efx->type->remove_port(efx);
1166 /**************************************************************************
1170 **************************************************************************/
1172 static LIST_HEAD(efx_primary_list);
1173 static LIST_HEAD(efx_unassociated_list);
1175 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1177 return left->type == right->type &&
1178 left->vpd_sn && right->vpd_sn &&
1179 !strcmp(left->vpd_sn, right->vpd_sn);
1182 static void efx_associate(struct efx_nic *efx)
1184 struct efx_nic *other, *next;
1186 if (efx->primary == efx) {
1187 /* Adding primary function; look for secondaries */
1189 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1190 list_add_tail(&efx->node, &efx_primary_list);
1192 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1194 if (efx_same_controller(efx, other)) {
1195 list_del(&other->node);
1196 netif_dbg(other, probe, other->net_dev,
1197 "moving to secondary list of %s %s\n",
1198 pci_name(efx->pci_dev),
1199 efx->net_dev->name);
1200 list_add_tail(&other->node,
1201 &efx->secondary_list);
1202 other->primary = efx;
1206 /* Adding secondary function; look for primary */
1208 list_for_each_entry(other, &efx_primary_list, node) {
1209 if (efx_same_controller(efx, other)) {
1210 netif_dbg(efx, probe, efx->net_dev,
1211 "adding to secondary list of %s %s\n",
1212 pci_name(other->pci_dev),
1213 other->net_dev->name);
1214 list_add_tail(&efx->node,
1215 &other->secondary_list);
1216 efx->primary = other;
1221 netif_dbg(efx, probe, efx->net_dev,
1222 "adding to unassociated list\n");
1223 list_add_tail(&efx->node, &efx_unassociated_list);
1227 static void efx_dissociate(struct efx_nic *efx)
1229 struct efx_nic *other, *next;
1231 list_del(&efx->node);
1232 efx->primary = NULL;
1234 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1235 list_del(&other->node);
1236 netif_dbg(other, probe, other->net_dev,
1237 "moving to unassociated list\n");
1238 list_add_tail(&other->node, &efx_unassociated_list);
1239 other->primary = NULL;
1243 /* This configures the PCI device to enable I/O and DMA. */
1244 static int efx_init_io(struct efx_nic *efx)
1246 struct pci_dev *pci_dev = efx->pci_dev;
1247 dma_addr_t dma_mask = efx->type->max_dma_mask;
1248 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1251 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1253 bar = efx->type->mem_bar;
1255 rc = pci_enable_device(pci_dev);
1257 netif_err(efx, probe, efx->net_dev,
1258 "failed to enable PCI device\n");
1262 pci_set_master(pci_dev);
1264 /* Set the PCI DMA mask. Try all possibilities from our
1265 * genuine mask down to 32 bits, because some architectures
1266 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1267 * masks event though they reject 46 bit masks.
1269 while (dma_mask > 0x7fffffffUL) {
1270 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1276 netif_err(efx, probe, efx->net_dev,
1277 "could not find a suitable DMA mask\n");
1280 netif_dbg(efx, probe, efx->net_dev,
1281 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1283 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1284 rc = pci_request_region(pci_dev, bar, "sfc");
1286 netif_err(efx, probe, efx->net_dev,
1287 "request for memory BAR failed\n");
1291 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1292 if (!efx->membase) {
1293 netif_err(efx, probe, efx->net_dev,
1294 "could not map memory BAR at %llx+%x\n",
1295 (unsigned long long)efx->membase_phys, mem_map_size);
1299 netif_dbg(efx, probe, efx->net_dev,
1300 "memory BAR at %llx+%x (virtual %p)\n",
1301 (unsigned long long)efx->membase_phys, mem_map_size,
1307 pci_release_region(efx->pci_dev, bar);
1309 efx->membase_phys = 0;
1311 pci_disable_device(efx->pci_dev);
1316 static void efx_fini_io(struct efx_nic *efx)
1320 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1323 iounmap(efx->membase);
1324 efx->membase = NULL;
1327 if (efx->membase_phys) {
1328 bar = efx->type->mem_bar;
1329 pci_release_region(efx->pci_dev, bar);
1330 efx->membase_phys = 0;
1333 /* Don't disable bus-mastering if VFs are assigned */
1334 if (!pci_vfs_assigned(efx->pci_dev))
1335 pci_disable_device(efx->pci_dev);
1338 void efx_set_default_rx_indir_table(struct efx_nic *efx)
1342 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1343 efx->rx_indir_table[i] =
1344 ethtool_rxfh_indir_default(i, efx->rss_spread);
1347 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1349 cpumask_var_t thread_mask;
1356 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1357 netif_warn(efx, probe, efx->net_dev,
1358 "RSS disabled due to allocation failure\n");
1363 for_each_online_cpu(cpu) {
1364 if (!cpumask_test_cpu(cpu, thread_mask)) {
1366 cpumask_or(thread_mask, thread_mask,
1367 topology_sibling_cpumask(cpu));
1371 free_cpumask_var(thread_mask);
1374 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1375 * table entries that are inaccessible to VFs
1377 #ifdef CONFIG_SFC_SRIOV
1378 if (efx->type->sriov_wanted) {
1379 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1380 count > efx_vf_size(efx)) {
1381 netif_warn(efx, probe, efx->net_dev,
1382 "Reducing number of RSS channels from %u to %u for "
1383 "VF support. Increase vf-msix-limit to use more "
1384 "channels on the PF.\n",
1385 count, efx_vf_size(efx));
1386 count = efx_vf_size(efx);
1394 /* Probe the number and type of interrupts we are able to obtain, and
1395 * the resulting numbers of channels and RX queues.
1397 static int efx_probe_interrupts(struct efx_nic *efx)
1399 unsigned int extra_channels = 0;
1403 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1404 if (efx->extra_channel_type[i])
1407 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1408 struct msix_entry xentries[EFX_MAX_CHANNELS];
1409 unsigned int n_channels;
1411 n_channels = efx_wanted_parallelism(efx);
1412 if (efx_separate_tx_channels)
1414 n_channels += extra_channels;
1415 n_channels = min(n_channels, efx->max_channels);
1417 for (i = 0; i < n_channels; i++)
1418 xentries[i].entry = i;
1419 rc = pci_enable_msix_range(efx->pci_dev,
1420 xentries, 1, n_channels);
1422 /* Fall back to single channel MSI */
1423 netif_err(efx, drv, efx->net_dev,
1424 "could not enable MSI-X\n");
1425 if (efx->type->min_interrupt_mode >= EFX_INT_MODE_MSI)
1426 efx->interrupt_mode = EFX_INT_MODE_MSI;
1429 } else if (rc < n_channels) {
1430 netif_err(efx, drv, efx->net_dev,
1431 "WARNING: Insufficient MSI-X vectors"
1432 " available (%d < %u).\n", rc, n_channels);
1433 netif_err(efx, drv, efx->net_dev,
1434 "WARNING: Performance may be reduced.\n");
1439 efx->n_channels = n_channels;
1440 if (n_channels > extra_channels)
1441 n_channels -= extra_channels;
1442 if (efx_separate_tx_channels) {
1443 efx->n_tx_channels = min(max(n_channels / 2,
1445 efx->max_tx_channels);
1446 efx->n_rx_channels = max(n_channels -
1450 efx->n_tx_channels = min(n_channels,
1451 efx->max_tx_channels);
1452 efx->n_rx_channels = n_channels;
1454 for (i = 0; i < efx->n_channels; i++)
1455 efx_get_channel(efx, i)->irq =
1460 /* Try single interrupt MSI */
1461 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1462 efx->n_channels = 1;
1463 efx->n_rx_channels = 1;
1464 efx->n_tx_channels = 1;
1465 rc = pci_enable_msi(efx->pci_dev);
1467 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1469 netif_err(efx, drv, efx->net_dev,
1470 "could not enable MSI\n");
1471 if (efx->type->min_interrupt_mode >= EFX_INT_MODE_LEGACY)
1472 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1478 /* Assume legacy interrupts */
1479 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1480 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1481 efx->n_rx_channels = 1;
1482 efx->n_tx_channels = 1;
1483 efx->legacy_irq = efx->pci_dev->irq;
1486 /* Assign extra channels if possible */
1487 j = efx->n_channels;
1488 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1489 if (!efx->extra_channel_type[i])
1491 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1492 efx->n_channels <= extra_channels) {
1493 efx->extra_channel_type[i]->handle_no_channel(efx);
1496 efx_get_channel(efx, j)->type =
1497 efx->extra_channel_type[i];
1501 /* RSS might be usable on VFs even if it is disabled on the PF */
1502 #ifdef CONFIG_SFC_SRIOV
1503 if (efx->type->sriov_wanted) {
1504 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1505 !efx->type->sriov_wanted(efx)) ?
1506 efx->n_rx_channels : efx_vf_size(efx));
1510 efx->rss_spread = efx->n_rx_channels;
1515 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1517 struct efx_channel *channel, *end_channel;
1520 BUG_ON(efx->state == STATE_DISABLED);
1522 efx->irq_soft_enabled = true;
1525 efx_for_each_channel(channel, efx) {
1526 if (!channel->type->keep_eventq) {
1527 rc = efx_init_eventq(channel);
1531 efx_start_eventq(channel);
1534 efx_mcdi_mode_event(efx);
1538 end_channel = channel;
1539 efx_for_each_channel(channel, efx) {
1540 if (channel == end_channel)
1542 efx_stop_eventq(channel);
1543 if (!channel->type->keep_eventq)
1544 efx_fini_eventq(channel);
1550 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1552 struct efx_channel *channel;
1554 if (efx->state == STATE_DISABLED)
1557 efx_mcdi_mode_poll(efx);
1559 efx->irq_soft_enabled = false;
1562 if (efx->legacy_irq)
1563 synchronize_irq(efx->legacy_irq);
1565 efx_for_each_channel(channel, efx) {
1567 synchronize_irq(channel->irq);
1569 efx_stop_eventq(channel);
1570 if (!channel->type->keep_eventq)
1571 efx_fini_eventq(channel);
1574 /* Flush the asynchronous MCDI request queue */
1575 efx_mcdi_flush_async(efx);
1578 static int efx_enable_interrupts(struct efx_nic *efx)
1580 struct efx_channel *channel, *end_channel;
1583 BUG_ON(efx->state == STATE_DISABLED);
1585 if (efx->eeh_disabled_legacy_irq) {
1586 enable_irq(efx->legacy_irq);
1587 efx->eeh_disabled_legacy_irq = false;
1590 efx->type->irq_enable_master(efx);
1592 efx_for_each_channel(channel, efx) {
1593 if (channel->type->keep_eventq) {
1594 rc = efx_init_eventq(channel);
1600 rc = efx_soft_enable_interrupts(efx);
1607 end_channel = channel;
1608 efx_for_each_channel(channel, efx) {
1609 if (channel == end_channel)
1611 if (channel->type->keep_eventq)
1612 efx_fini_eventq(channel);
1615 efx->type->irq_disable_non_ev(efx);
1620 static void efx_disable_interrupts(struct efx_nic *efx)
1622 struct efx_channel *channel;
1624 efx_soft_disable_interrupts(efx);
1626 efx_for_each_channel(channel, efx) {
1627 if (channel->type->keep_eventq)
1628 efx_fini_eventq(channel);
1631 efx->type->irq_disable_non_ev(efx);
1634 static void efx_remove_interrupts(struct efx_nic *efx)
1636 struct efx_channel *channel;
1638 /* Remove MSI/MSI-X interrupts */
1639 efx_for_each_channel(channel, efx)
1641 pci_disable_msi(efx->pci_dev);
1642 pci_disable_msix(efx->pci_dev);
1644 /* Remove legacy interrupt */
1645 efx->legacy_irq = 0;
1648 static void efx_set_channels(struct efx_nic *efx)
1650 struct efx_channel *channel;
1651 struct efx_tx_queue *tx_queue;
1653 efx->tx_channel_offset =
1654 efx_separate_tx_channels ?
1655 efx->n_channels - efx->n_tx_channels : 0;
1657 /* We need to mark which channels really have RX and TX
1658 * queues, and adjust the TX queue numbers if we have separate
1659 * RX-only and TX-only channels.
1661 efx_for_each_channel(channel, efx) {
1662 if (channel->channel < efx->n_rx_channels)
1663 channel->rx_queue.core_index = channel->channel;
1665 channel->rx_queue.core_index = -1;
1667 efx_for_each_channel_tx_queue(tx_queue, channel)
1668 tx_queue->queue -= (efx->tx_channel_offset *
1673 static int efx_probe_nic(struct efx_nic *efx)
1677 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1679 /* Carry out hardware-type specific initialisation */
1680 rc = efx->type->probe(efx);
1685 if (!efx->max_channels || !efx->max_tx_channels) {
1686 netif_err(efx, drv, efx->net_dev,
1687 "Insufficient resources to allocate"
1693 /* Determine the number of channels and queues by trying
1694 * to hook in MSI-X interrupts.
1696 rc = efx_probe_interrupts(efx);
1700 efx_set_channels(efx);
1702 /* dimension_resources can fail with EAGAIN */
1703 rc = efx->type->dimension_resources(efx);
1704 if (rc != 0 && rc != -EAGAIN)
1708 /* try again with new max_channels */
1709 efx_remove_interrupts(efx);
1711 } while (rc == -EAGAIN);
1713 if (efx->n_channels > 1)
1714 netdev_rss_key_fill(&efx->rx_hash_key,
1715 sizeof(efx->rx_hash_key));
1716 efx_set_default_rx_indir_table(efx);
1718 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1719 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1721 /* Initialise the interrupt moderation settings */
1722 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1723 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1729 efx_remove_interrupts(efx);
1731 efx->type->remove(efx);
1735 static void efx_remove_nic(struct efx_nic *efx)
1737 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1739 efx_remove_interrupts(efx);
1740 efx->type->remove(efx);
1743 static int efx_probe_filters(struct efx_nic *efx)
1747 spin_lock_init(&efx->filter_lock);
1748 init_rwsem(&efx->filter_sem);
1749 mutex_lock(&efx->mac_lock);
1750 down_write(&efx->filter_sem);
1751 rc = efx->type->filter_table_probe(efx);
1755 #ifdef CONFIG_RFS_ACCEL
1756 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1757 struct efx_channel *channel;
1760 efx_for_each_channel(channel, efx) {
1761 channel->rps_flow_id =
1762 kcalloc(efx->type->max_rx_ip_filters,
1763 sizeof(*channel->rps_flow_id),
1765 if (!channel->rps_flow_id)
1769 i < efx->type->max_rx_ip_filters;
1771 channel->rps_flow_id[i] =
1772 RPS_FLOW_ID_INVALID;
1776 efx_for_each_channel(channel, efx)
1777 kfree(channel->rps_flow_id);
1778 efx->type->filter_table_remove(efx);
1783 efx->rps_expire_index = efx->rps_expire_channel = 0;
1787 up_write(&efx->filter_sem);
1788 mutex_unlock(&efx->mac_lock);
1792 static void efx_remove_filters(struct efx_nic *efx)
1794 #ifdef CONFIG_RFS_ACCEL
1795 struct efx_channel *channel;
1797 efx_for_each_channel(channel, efx)
1798 kfree(channel->rps_flow_id);
1800 down_write(&efx->filter_sem);
1801 efx->type->filter_table_remove(efx);
1802 up_write(&efx->filter_sem);
1805 static void efx_restore_filters(struct efx_nic *efx)
1807 down_read(&efx->filter_sem);
1808 efx->type->filter_table_restore(efx);
1809 up_read(&efx->filter_sem);
1812 /**************************************************************************
1814 * NIC startup/shutdown
1816 *************************************************************************/
1818 static int efx_probe_all(struct efx_nic *efx)
1822 rc = efx_probe_nic(efx);
1824 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1828 rc = efx_probe_port(efx);
1830 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1834 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1835 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1839 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1841 #ifdef CONFIG_SFC_SRIOV
1842 rc = efx->type->vswitching_probe(efx);
1843 if (rc) /* not fatal; the PF will still work fine */
1844 netif_warn(efx, probe, efx->net_dev,
1845 "failed to setup vswitching rc=%d;"
1846 " VFs may not function\n", rc);
1849 rc = efx_probe_filters(efx);
1851 netif_err(efx, probe, efx->net_dev,
1852 "failed to create filter tables\n");
1856 rc = efx_probe_channels(efx);
1863 efx_remove_filters(efx);
1865 #ifdef CONFIG_SFC_SRIOV
1866 efx->type->vswitching_remove(efx);
1869 efx_remove_port(efx);
1871 efx_remove_nic(efx);
1876 /* If the interface is supposed to be running but is not, start
1877 * the hardware and software data path, regular activity for the port
1878 * (MAC statistics, link polling, etc.) and schedule the port to be
1879 * reconfigured. Interrupts must already be enabled. This function
1880 * is safe to call multiple times, so long as the NIC is not disabled.
1881 * Requires the RTNL lock.
1883 static void efx_start_all(struct efx_nic *efx)
1885 EFX_ASSERT_RESET_SERIALISED(efx);
1886 BUG_ON(efx->state == STATE_DISABLED);
1888 /* Check that it is appropriate to restart the interface. All
1889 * of these flags are safe to read under just the rtnl lock */
1890 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1894 efx_start_port(efx);
1895 efx_start_datapath(efx);
1897 /* Start the hardware monitor if there is one */
1898 if (efx->type->monitor != NULL)
1899 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1900 efx_monitor_interval);
1902 /* Link state detection is normally event-driven; we have
1903 * to poll now because we could have missed a change
1905 mutex_lock(&efx->mac_lock);
1906 if (efx->phy_op->poll(efx))
1907 efx_link_status_changed(efx);
1908 mutex_unlock(&efx->mac_lock);
1910 efx->type->start_stats(efx);
1911 efx->type->pull_stats(efx);
1912 spin_lock_bh(&efx->stats_lock);
1913 efx->type->update_stats(efx, NULL, NULL);
1914 spin_unlock_bh(&efx->stats_lock);
1917 /* Quiesce the hardware and software data path, and regular activity
1918 * for the port without bringing the link down. Safe to call multiple
1919 * times with the NIC in almost any state, but interrupts should be
1920 * enabled. Requires the RTNL lock.
1922 static void efx_stop_all(struct efx_nic *efx)
1924 EFX_ASSERT_RESET_SERIALISED(efx);
1926 /* port_enabled can be read safely under the rtnl lock */
1927 if (!efx->port_enabled)
1930 /* update stats before we go down so we can accurately count
1933 efx->type->pull_stats(efx);
1934 spin_lock_bh(&efx->stats_lock);
1935 efx->type->update_stats(efx, NULL, NULL);
1936 spin_unlock_bh(&efx->stats_lock);
1937 efx->type->stop_stats(efx);
1940 /* Stop the kernel transmit interface. This is only valid if
1941 * the device is stopped or detached; otherwise the watchdog
1942 * may fire immediately.
1944 WARN_ON(netif_running(efx->net_dev) &&
1945 netif_device_present(efx->net_dev));
1946 netif_tx_disable(efx->net_dev);
1948 efx_stop_datapath(efx);
1951 static void efx_remove_all(struct efx_nic *efx)
1953 efx_remove_channels(efx);
1954 efx_remove_filters(efx);
1955 #ifdef CONFIG_SFC_SRIOV
1956 efx->type->vswitching_remove(efx);
1958 efx_remove_port(efx);
1959 efx_remove_nic(efx);
1962 /**************************************************************************
1964 * Interrupt moderation
1966 **************************************************************************/
1967 unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
1971 if (usecs * 1000 < efx->timer_quantum_ns)
1972 return 1; /* never round down to 0 */
1973 return usecs * 1000 / efx->timer_quantum_ns;
1976 unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
1978 /* We must round up when converting ticks to microseconds
1979 * because we round down when converting the other way.
1981 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
1984 /* Set interrupt moderation parameters */
1985 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1986 unsigned int rx_usecs, bool rx_adaptive,
1987 bool rx_may_override_tx)
1989 struct efx_channel *channel;
1990 unsigned int timer_max_us;
1992 EFX_ASSERT_RESET_SERIALISED(efx);
1994 timer_max_us = efx->timer_max_ns / 1000;
1996 if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
1999 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
2000 !rx_may_override_tx) {
2001 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
2002 "RX and TX IRQ moderation must be equal\n");
2006 efx->irq_rx_adaptive = rx_adaptive;
2007 efx->irq_rx_moderation_us = rx_usecs;
2008 efx_for_each_channel(channel, efx) {
2009 if (efx_channel_has_rx_queue(channel))
2010 channel->irq_moderation_us = rx_usecs;
2011 else if (efx_channel_has_tx_queues(channel))
2012 channel->irq_moderation_us = tx_usecs;
2018 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
2019 unsigned int *rx_usecs, bool *rx_adaptive)
2021 *rx_adaptive = efx->irq_rx_adaptive;
2022 *rx_usecs = efx->irq_rx_moderation_us;
2024 /* If channels are shared between RX and TX, so is IRQ
2025 * moderation. Otherwise, IRQ moderation is the same for all
2026 * TX channels and is not adaptive.
2028 if (efx->tx_channel_offset == 0) {
2029 *tx_usecs = *rx_usecs;
2031 struct efx_channel *tx_channel;
2033 tx_channel = efx->channel[efx->tx_channel_offset];
2034 *tx_usecs = tx_channel->irq_moderation_us;
2038 /**************************************************************************
2042 **************************************************************************/
2044 /* Run periodically off the general workqueue */
2045 static void efx_monitor(struct work_struct *data)
2047 struct efx_nic *efx = container_of(data, struct efx_nic,
2050 netif_vdbg(efx, timer, efx->net_dev,
2051 "hardware monitor executing on CPU %d\n",
2052 raw_smp_processor_id());
2053 BUG_ON(efx->type->monitor == NULL);
2055 /* If the mac_lock is already held then it is likely a port
2056 * reconfiguration is already in place, which will likely do
2057 * most of the work of monitor() anyway. */
2058 if (mutex_trylock(&efx->mac_lock)) {
2059 if (efx->port_enabled)
2060 efx->type->monitor(efx);
2061 mutex_unlock(&efx->mac_lock);
2064 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2065 efx_monitor_interval);
2068 /**************************************************************************
2072 *************************************************************************/
2075 * Context: process, rtnl_lock() held.
2077 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2079 struct efx_nic *efx = netdev_priv(net_dev);
2080 struct mii_ioctl_data *data = if_mii(ifr);
2082 if (cmd == SIOCSHWTSTAMP)
2083 return efx_ptp_set_ts_config(efx, ifr);
2084 if (cmd == SIOCGHWTSTAMP)
2085 return efx_ptp_get_ts_config(efx, ifr);
2087 /* Convert phy_id from older PRTAD/DEVAD format */
2088 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2089 (data->phy_id & 0xfc00) == 0x0400)
2090 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2092 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2095 /**************************************************************************
2099 **************************************************************************/
2101 static void efx_init_napi_channel(struct efx_channel *channel)
2103 struct efx_nic *efx = channel->efx;
2105 channel->napi_dev = efx->net_dev;
2106 netif_napi_add(channel->napi_dev, &channel->napi_str,
2107 efx_poll, napi_weight);
2110 static void efx_init_napi(struct efx_nic *efx)
2112 struct efx_channel *channel;
2114 efx_for_each_channel(channel, efx)
2115 efx_init_napi_channel(channel);
2118 static void efx_fini_napi_channel(struct efx_channel *channel)
2120 if (channel->napi_dev)
2121 netif_napi_del(&channel->napi_str);
2123 channel->napi_dev = NULL;
2126 static void efx_fini_napi(struct efx_nic *efx)
2128 struct efx_channel *channel;
2130 efx_for_each_channel(channel, efx)
2131 efx_fini_napi_channel(channel);
2134 /**************************************************************************
2136 * Kernel netpoll interface
2138 *************************************************************************/
2140 #ifdef CONFIG_NET_POLL_CONTROLLER
2142 /* Although in the common case interrupts will be disabled, this is not
2143 * guaranteed. However, all our work happens inside the NAPI callback,
2144 * so no locking is required.
2146 static void efx_netpoll(struct net_device *net_dev)
2148 struct efx_nic *efx = netdev_priv(net_dev);
2149 struct efx_channel *channel;
2151 efx_for_each_channel(channel, efx)
2152 efx_schedule_channel(channel);
2157 /**************************************************************************
2159 * Kernel net device interface
2161 *************************************************************************/
2163 /* Context: process, rtnl_lock() held. */
2164 int efx_net_open(struct net_device *net_dev)
2166 struct efx_nic *efx = netdev_priv(net_dev);
2169 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2170 raw_smp_processor_id());
2172 rc = efx_check_disabled(efx);
2175 if (efx->phy_mode & PHY_MODE_SPECIAL)
2177 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2180 /* Notify the kernel of the link state polled during driver load,
2181 * before the monitor starts running */
2182 efx_link_status_changed(efx);
2185 if (efx->state == STATE_DISABLED || efx->reset_pending)
2186 netif_device_detach(efx->net_dev);
2187 efx_selftest_async_start(efx);
2191 /* Context: process, rtnl_lock() held.
2192 * Note that the kernel will ignore our return code; this method
2193 * should really be a void.
2195 int efx_net_stop(struct net_device *net_dev)
2197 struct efx_nic *efx = netdev_priv(net_dev);
2199 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2200 raw_smp_processor_id());
2202 /* Stop the device and flush all the channels */
2208 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2209 static void efx_net_stats(struct net_device *net_dev,
2210 struct rtnl_link_stats64 *stats)
2212 struct efx_nic *efx = netdev_priv(net_dev);
2214 spin_lock_bh(&efx->stats_lock);
2215 efx->type->update_stats(efx, NULL, stats);
2216 spin_unlock_bh(&efx->stats_lock);
2219 /* Context: netif_tx_lock held, BHs disabled. */
2220 static void efx_watchdog(struct net_device *net_dev)
2222 struct efx_nic *efx = netdev_priv(net_dev);
2224 netif_err(efx, tx_err, efx->net_dev,
2225 "TX stuck with port_enabled=%d: resetting channels\n",
2228 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2232 /* Context: process, rtnl_lock() held. */
2233 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2235 struct efx_nic *efx = netdev_priv(net_dev);
2238 rc = efx_check_disabled(efx);
2242 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2244 efx_device_detach_sync(efx);
2247 mutex_lock(&efx->mac_lock);
2248 net_dev->mtu = new_mtu;
2249 efx_mac_reconfigure(efx);
2250 mutex_unlock(&efx->mac_lock);
2253 efx_device_attach_if_not_resetting(efx);
2257 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2259 struct efx_nic *efx = netdev_priv(net_dev);
2260 struct sockaddr *addr = data;
2261 u8 *new_addr = addr->sa_data;
2265 if (!is_valid_ether_addr(new_addr)) {
2266 netif_err(efx, drv, efx->net_dev,
2267 "invalid ethernet MAC address requested: %pM\n",
2269 return -EADDRNOTAVAIL;
2272 /* save old address */
2273 ether_addr_copy(old_addr, net_dev->dev_addr);
2274 ether_addr_copy(net_dev->dev_addr, new_addr);
2275 if (efx->type->set_mac_address) {
2276 rc = efx->type->set_mac_address(efx);
2278 ether_addr_copy(net_dev->dev_addr, old_addr);
2283 /* Reconfigure the MAC */
2284 mutex_lock(&efx->mac_lock);
2285 efx_mac_reconfigure(efx);
2286 mutex_unlock(&efx->mac_lock);
2291 /* Context: netif_addr_lock held, BHs disabled. */
2292 static void efx_set_rx_mode(struct net_device *net_dev)
2294 struct efx_nic *efx = netdev_priv(net_dev);
2296 if (efx->port_enabled)
2297 queue_work(efx->workqueue, &efx->mac_work);
2298 /* Otherwise efx_start_port() will do this */
2301 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2303 struct efx_nic *efx = netdev_priv(net_dev);
2306 /* If disabling RX n-tuple filtering, clear existing filters */
2307 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2308 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2313 /* If Rx VLAN filter is changed, update filters via mac_reconfigure */
2314 if ((net_dev->features ^ data) & NETIF_F_HW_VLAN_CTAG_FILTER) {
2315 /* efx_set_rx_mode() will schedule MAC work to update filters
2316 * when a new features are finally set in net_dev.
2318 efx_set_rx_mode(net_dev);
2324 static int efx_get_phys_port_id(struct net_device *net_dev,
2325 struct netdev_phys_item_id *ppid)
2327 struct efx_nic *efx = netdev_priv(net_dev);
2329 if (efx->type->get_phys_port_id)
2330 return efx->type->get_phys_port_id(efx, ppid);
2335 static int efx_get_phys_port_name(struct net_device *net_dev,
2336 char *name, size_t len)
2338 struct efx_nic *efx = netdev_priv(net_dev);
2340 if (snprintf(name, len, "p%u", efx->port_num) >= len)
2345 static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2347 struct efx_nic *efx = netdev_priv(net_dev);
2349 if (efx->type->vlan_rx_add_vid)
2350 return efx->type->vlan_rx_add_vid(efx, proto, vid);
2355 static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2357 struct efx_nic *efx = netdev_priv(net_dev);
2359 if (efx->type->vlan_rx_kill_vid)
2360 return efx->type->vlan_rx_kill_vid(efx, proto, vid);
2365 static int efx_udp_tunnel_type_map(enum udp_parsable_tunnel_type in)
2368 case UDP_TUNNEL_TYPE_VXLAN:
2369 return TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN;
2370 case UDP_TUNNEL_TYPE_GENEVE:
2371 return TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE;
2377 static void efx_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti)
2379 struct efx_nic *efx = netdev_priv(dev);
2380 struct efx_udp_tunnel tnl;
2381 int efx_tunnel_type;
2383 efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
2384 if (efx_tunnel_type < 0)
2387 tnl.type = (u16)efx_tunnel_type;
2388 tnl.port = ti->port;
2390 if (efx->type->udp_tnl_add_port)
2391 (void)efx->type->udp_tnl_add_port(efx, tnl);
2394 static void efx_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti)
2396 struct efx_nic *efx = netdev_priv(dev);
2397 struct efx_udp_tunnel tnl;
2398 int efx_tunnel_type;
2400 efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
2401 if (efx_tunnel_type < 0)
2404 tnl.type = (u16)efx_tunnel_type;
2405 tnl.port = ti->port;
2407 if (efx->type->udp_tnl_del_port)
2408 (void)efx->type->udp_tnl_del_port(efx, tnl);
2411 static const struct net_device_ops efx_netdev_ops = {
2412 .ndo_open = efx_net_open,
2413 .ndo_stop = efx_net_stop,
2414 .ndo_get_stats64 = efx_net_stats,
2415 .ndo_tx_timeout = efx_watchdog,
2416 .ndo_start_xmit = efx_hard_start_xmit,
2417 .ndo_validate_addr = eth_validate_addr,
2418 .ndo_do_ioctl = efx_ioctl,
2419 .ndo_change_mtu = efx_change_mtu,
2420 .ndo_set_mac_address = efx_set_mac_address,
2421 .ndo_set_rx_mode = efx_set_rx_mode,
2422 .ndo_set_features = efx_set_features,
2423 .ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid,
2424 .ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid,
2425 #ifdef CONFIG_SFC_SRIOV
2426 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2427 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2428 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2429 .ndo_get_vf_config = efx_sriov_get_vf_config,
2430 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2432 .ndo_get_phys_port_id = efx_get_phys_port_id,
2433 .ndo_get_phys_port_name = efx_get_phys_port_name,
2434 #ifdef CONFIG_NET_POLL_CONTROLLER
2435 .ndo_poll_controller = efx_netpoll,
2437 .ndo_setup_tc = efx_setup_tc,
2438 #ifdef CONFIG_RFS_ACCEL
2439 .ndo_rx_flow_steer = efx_filter_rfs,
2441 .ndo_udp_tunnel_add = efx_udp_tunnel_add,
2442 .ndo_udp_tunnel_del = efx_udp_tunnel_del,
2445 static void efx_update_name(struct efx_nic *efx)
2447 strcpy(efx->name, efx->net_dev->name);
2448 efx_mtd_rename(efx);
2449 efx_set_channel_names(efx);
2452 static int efx_netdev_event(struct notifier_block *this,
2453 unsigned long event, void *ptr)
2455 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2457 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2458 event == NETDEV_CHANGENAME)
2459 efx_update_name(netdev_priv(net_dev));
2464 static struct notifier_block efx_netdev_notifier = {
2465 .notifier_call = efx_netdev_event,
2469 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2471 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2472 return sprintf(buf, "%d\n", efx->phy_type);
2474 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2476 #ifdef CONFIG_SFC_MCDI_LOGGING
2477 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2480 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2481 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2483 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2485 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2486 const char *buf, size_t count)
2488 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2489 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2490 bool enable = count > 0 && *buf != '0';
2492 mcdi->logging_enabled = enable;
2495 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2498 static int efx_register_netdev(struct efx_nic *efx)
2500 struct net_device *net_dev = efx->net_dev;
2501 struct efx_channel *channel;
2504 net_dev->watchdog_timeo = 5 * HZ;
2505 net_dev->irq = efx->pci_dev->irq;
2506 net_dev->netdev_ops = &efx_netdev_ops;
2507 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2508 net_dev->priv_flags |= IFF_UNICAST_FLT;
2509 net_dev->ethtool_ops = &efx_ethtool_ops;
2510 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2511 net_dev->min_mtu = EFX_MIN_MTU;
2512 net_dev->max_mtu = EFX_MAX_MTU;
2516 /* Enable resets to be scheduled and check whether any were
2517 * already requested. If so, the NIC is probably hosed so we
2520 efx->state = STATE_READY;
2521 smp_mb(); /* ensure we change state before checking reset_pending */
2522 if (efx->reset_pending) {
2523 netif_err(efx, probe, efx->net_dev,
2524 "aborting probe due to scheduled reset\n");
2529 rc = dev_alloc_name(net_dev, net_dev->name);
2532 efx_update_name(efx);
2534 /* Always start with carrier off; PHY events will detect the link */
2535 netif_carrier_off(net_dev);
2537 rc = register_netdevice(net_dev);
2541 efx_for_each_channel(channel, efx) {
2542 struct efx_tx_queue *tx_queue;
2543 efx_for_each_channel_tx_queue(tx_queue, channel)
2544 efx_init_tx_queue_core_txq(tx_queue);
2551 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2553 netif_err(efx, drv, efx->net_dev,
2554 "failed to init net dev attributes\n");
2555 goto fail_registered;
2557 #ifdef CONFIG_SFC_MCDI_LOGGING
2558 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2560 netif_err(efx, drv, efx->net_dev,
2561 "failed to init net dev attributes\n");
2562 goto fail_attr_mcdi_logging;
2568 #ifdef CONFIG_SFC_MCDI_LOGGING
2569 fail_attr_mcdi_logging:
2570 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2574 efx_dissociate(efx);
2575 unregister_netdevice(net_dev);
2577 efx->state = STATE_UNINIT;
2579 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2583 static void efx_unregister_netdev(struct efx_nic *efx)
2588 BUG_ON(netdev_priv(efx->net_dev) != efx);
2590 if (efx_dev_registered(efx)) {
2591 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2592 #ifdef CONFIG_SFC_MCDI_LOGGING
2593 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2595 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2596 unregister_netdev(efx->net_dev);
2600 /**************************************************************************
2602 * Device reset and suspend
2604 **************************************************************************/
2606 /* Tears down the entire software state and most of the hardware state
2608 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2610 EFX_ASSERT_RESET_SERIALISED(efx);
2612 if (method == RESET_TYPE_MCDI_TIMEOUT)
2613 efx->type->prepare_flr(efx);
2616 efx_disable_interrupts(efx);
2618 mutex_lock(&efx->mac_lock);
2619 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2620 method != RESET_TYPE_DATAPATH)
2621 efx->phy_op->fini(efx);
2622 efx->type->fini(efx);
2625 /* This function will always ensure that the locks acquired in
2626 * efx_reset_down() are released. A failure return code indicates
2627 * that we were unable to reinitialise the hardware, and the
2628 * driver should be disabled. If ok is false, then the rx and tx
2629 * engines are not restarted, pending a RESET_DISABLE. */
2630 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2634 EFX_ASSERT_RESET_SERIALISED(efx);
2636 if (method == RESET_TYPE_MCDI_TIMEOUT)
2637 efx->type->finish_flr(efx);
2639 /* Ensure that SRAM is initialised even if we're disabling the device */
2640 rc = efx->type->init(efx);
2642 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2649 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2650 method != RESET_TYPE_DATAPATH) {
2651 rc = efx->phy_op->init(efx);
2654 rc = efx->phy_op->reconfigure(efx);
2655 if (rc && rc != -EPERM)
2656 netif_err(efx, drv, efx->net_dev,
2657 "could not restore PHY settings\n");
2660 rc = efx_enable_interrupts(efx);
2664 #ifdef CONFIG_SFC_SRIOV
2665 rc = efx->type->vswitching_restore(efx);
2666 if (rc) /* not fatal; the PF will still work fine */
2667 netif_warn(efx, probe, efx->net_dev,
2668 "failed to restore vswitching rc=%d;"
2669 " VFs may not function\n", rc);
2672 down_read(&efx->filter_sem);
2673 efx_restore_filters(efx);
2674 up_read(&efx->filter_sem);
2675 if (efx->type->sriov_reset)
2676 efx->type->sriov_reset(efx);
2678 mutex_unlock(&efx->mac_lock);
2682 if (efx->type->udp_tnl_push_ports)
2683 efx->type->udp_tnl_push_ports(efx);
2688 efx->port_initialized = false;
2690 mutex_unlock(&efx->mac_lock);
2695 /* Reset the NIC using the specified method. Note that the reset may
2696 * fail, in which case the card will be left in an unusable state.
2698 * Caller must hold the rtnl_lock.
2700 int efx_reset(struct efx_nic *efx, enum reset_type method)
2705 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2706 RESET_TYPE(method));
2708 efx_device_detach_sync(efx);
2709 efx_reset_down(efx, method);
2711 rc = efx->type->reset(efx, method);
2713 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2717 /* Clear flags for the scopes we covered. We assume the NIC and
2718 * driver are now quiescent so that there is no race here.
2720 if (method < RESET_TYPE_MAX_METHOD)
2721 efx->reset_pending &= -(1 << (method + 1));
2722 else /* it doesn't fit into the well-ordered scope hierarchy */
2723 __clear_bit(method, &efx->reset_pending);
2725 /* Reinitialise bus-mastering, which may have been turned off before
2726 * the reset was scheduled. This is still appropriate, even in the
2727 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2728 * can respond to requests. */
2729 pci_set_master(efx->pci_dev);
2732 /* Leave device stopped if necessary */
2734 method == RESET_TYPE_DISABLE ||
2735 method == RESET_TYPE_RECOVER_OR_DISABLE;
2736 rc2 = efx_reset_up(efx, method, !disabled);
2744 dev_close(efx->net_dev);
2745 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2746 efx->state = STATE_DISABLED;
2748 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2749 efx_device_attach_if_not_resetting(efx);
2754 /* Try recovery mechanisms.
2755 * For now only EEH is supported.
2756 * Returns 0 if the recovery mechanisms are unsuccessful.
2757 * Returns a non-zero value otherwise.
2759 int efx_try_recovery(struct efx_nic *efx)
2762 /* A PCI error can occur and not be seen by EEH because nothing
2763 * happens on the PCI bus. In this case the driver may fail and
2764 * schedule a 'recover or reset', leading to this recovery handler.
2765 * Manually call the eeh failure check function.
2767 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2768 if (eeh_dev_check_failure(eehdev)) {
2769 /* The EEH mechanisms will handle the error and reset the
2770 * device if necessary.
2778 static void efx_wait_for_bist_end(struct efx_nic *efx)
2782 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2783 if (efx_mcdi_poll_reboot(efx))
2785 msleep(BIST_WAIT_DELAY_MS);
2788 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2790 /* Either way unset the BIST flag. If we found no reboot we probably
2791 * won't recover, but we should try.
2793 efx->mc_bist_for_other_fn = false;
2796 /* The worker thread exists so that code that cannot sleep can
2797 * schedule a reset for later.
2799 static void efx_reset_work(struct work_struct *data)
2801 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2802 unsigned long pending;
2803 enum reset_type method;
2805 pending = ACCESS_ONCE(efx->reset_pending);
2806 method = fls(pending) - 1;
2808 if (method == RESET_TYPE_MC_BIST)
2809 efx_wait_for_bist_end(efx);
2811 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2812 method == RESET_TYPE_RECOVER_OR_ALL) &&
2813 efx_try_recovery(efx))
2821 /* We checked the state in efx_schedule_reset() but it may
2822 * have changed by now. Now that we have the RTNL lock,
2823 * it cannot change again.
2825 if (efx->state == STATE_READY)
2826 (void)efx_reset(efx, method);
2831 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2833 enum reset_type method;
2835 if (efx->state == STATE_RECOVERY) {
2836 netif_dbg(efx, drv, efx->net_dev,
2837 "recovering: skip scheduling %s reset\n",
2843 case RESET_TYPE_INVISIBLE:
2844 case RESET_TYPE_ALL:
2845 case RESET_TYPE_RECOVER_OR_ALL:
2846 case RESET_TYPE_WORLD:
2847 case RESET_TYPE_DISABLE:
2848 case RESET_TYPE_RECOVER_OR_DISABLE:
2849 case RESET_TYPE_DATAPATH:
2850 case RESET_TYPE_MC_BIST:
2851 case RESET_TYPE_MCDI_TIMEOUT:
2853 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2854 RESET_TYPE(method));
2857 method = efx->type->map_reset_reason(type);
2858 netif_dbg(efx, drv, efx->net_dev,
2859 "scheduling %s reset for %s\n",
2860 RESET_TYPE(method), RESET_TYPE(type));
2864 set_bit(method, &efx->reset_pending);
2865 smp_mb(); /* ensure we change reset_pending before checking state */
2867 /* If we're not READY then just leave the flags set as the cue
2868 * to abort probing or reschedule the reset later.
2870 if (ACCESS_ONCE(efx->state) != STATE_READY)
2873 /* efx_process_channel() will no longer read events once a
2874 * reset is scheduled. So switch back to poll'd MCDI completions. */
2875 efx_mcdi_mode_poll(efx);
2877 queue_work(reset_workqueue, &efx->reset_work);
2880 /**************************************************************************
2882 * List of NICs we support
2884 **************************************************************************/
2886 /* PCI device ID table */
2887 static const struct pci_device_id efx_pci_table[] = {
2888 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2889 .driver_data = (unsigned long) &siena_a0_nic_type},
2890 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2891 .driver_data = (unsigned long) &siena_a0_nic_type},
2892 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2893 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2894 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2895 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2896 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2897 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2898 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */
2899 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2900 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */
2901 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2902 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */
2903 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2904 {0} /* end of list */
2907 /**************************************************************************
2909 * Dummy PHY/MAC operations
2911 * Can be used for some unimplemented operations
2912 * Needed so all function pointers are valid and do not have to be tested
2915 **************************************************************************/
2916 int efx_port_dummy_op_int(struct efx_nic *efx)
2920 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2922 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2927 static const struct efx_phy_operations efx_dummy_phy_operations = {
2928 .init = efx_port_dummy_op_int,
2929 .reconfigure = efx_port_dummy_op_int,
2930 .poll = efx_port_dummy_op_poll,
2931 .fini = efx_port_dummy_op_void,
2934 /**************************************************************************
2938 **************************************************************************/
2940 /* This zeroes out and then fills in the invariants in a struct
2941 * efx_nic (including all sub-structures).
2943 static int efx_init_struct(struct efx_nic *efx,
2944 struct pci_dev *pci_dev, struct net_device *net_dev)
2946 int rc = -ENOMEM, i;
2948 /* Initialise common structures */
2949 INIT_LIST_HEAD(&efx->node);
2950 INIT_LIST_HEAD(&efx->secondary_list);
2951 spin_lock_init(&efx->biu_lock);
2952 #ifdef CONFIG_SFC_MTD
2953 INIT_LIST_HEAD(&efx->mtd_list);
2955 INIT_WORK(&efx->reset_work, efx_reset_work);
2956 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2957 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2958 efx->pci_dev = pci_dev;
2959 efx->msg_enable = debug;
2960 efx->state = STATE_UNINIT;
2961 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2963 efx->net_dev = net_dev;
2964 efx->rx_prefix_size = efx->type->rx_prefix_size;
2966 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2967 efx->rx_packet_hash_offset =
2968 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2969 efx->rx_packet_ts_offset =
2970 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2971 spin_lock_init(&efx->stats_lock);
2972 mutex_init(&efx->mac_lock);
2973 efx->phy_op = &efx_dummy_phy_operations;
2974 efx->mdio.dev = net_dev;
2975 INIT_WORK(&efx->mac_work, efx_mac_work);
2976 init_waitqueue_head(&efx->flush_wq);
2978 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2979 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2980 if (!efx->channel[i])
2982 efx->msi_context[i].efx = efx;
2983 efx->msi_context[i].index = i;
2986 /* Higher numbered interrupt modes are less capable! */
2987 if (WARN_ON_ONCE(efx->type->max_interrupt_mode >
2988 efx->type->min_interrupt_mode)) {
2992 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2994 efx->interrupt_mode = min(efx->type->min_interrupt_mode,
2997 /* Would be good to use the net_dev name, but we're too early */
2998 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
3000 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
3001 if (!efx->workqueue)
3007 efx_fini_struct(efx);
3011 static void efx_fini_struct(struct efx_nic *efx)
3015 for (i = 0; i < EFX_MAX_CHANNELS; i++)
3016 kfree(efx->channel[i]);
3020 if (efx->workqueue) {
3021 destroy_workqueue(efx->workqueue);
3022 efx->workqueue = NULL;
3026 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
3028 u64 n_rx_nodesc_trunc = 0;
3029 struct efx_channel *channel;
3031 efx_for_each_channel(channel, efx)
3032 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
3033 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
3034 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
3037 /**************************************************************************
3041 **************************************************************************/
3043 /* Main body of final NIC shutdown code
3044 * This is called only at module unload (or hotplug removal).
3046 static void efx_pci_remove_main(struct efx_nic *efx)
3048 /* Flush reset_work. It can no longer be scheduled since we
3051 BUG_ON(efx->state == STATE_READY);
3052 cancel_work_sync(&efx->reset_work);
3054 efx_disable_interrupts(efx);
3055 efx_nic_fini_interrupt(efx);
3057 efx->type->fini(efx);
3059 efx_remove_all(efx);
3062 /* Final NIC shutdown
3063 * This is called only at module unload (or hotplug removal). A PF can call
3064 * this on its VFs to ensure they are unbound first.
3066 static void efx_pci_remove(struct pci_dev *pci_dev)
3068 struct efx_nic *efx;
3070 efx = pci_get_drvdata(pci_dev);
3074 /* Mark the NIC as fini, then stop the interface */
3076 efx_dissociate(efx);
3077 dev_close(efx->net_dev);
3078 efx_disable_interrupts(efx);
3079 efx->state = STATE_UNINIT;
3082 if (efx->type->sriov_fini)
3083 efx->type->sriov_fini(efx);
3085 efx_unregister_netdev(efx);
3087 efx_mtd_remove(efx);
3089 efx_pci_remove_main(efx);
3092 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
3094 efx_fini_struct(efx);
3095 free_netdev(efx->net_dev);
3097 pci_disable_pcie_error_reporting(pci_dev);
3100 /* NIC VPD information
3101 * Called during probe to display the part number of the
3102 * installed NIC. VPD is potentially very large but this should
3103 * always appear within the first 512 bytes.
3105 #define SFC_VPD_LEN 512
3106 static void efx_probe_vpd_strings(struct efx_nic *efx)
3108 struct pci_dev *dev = efx->pci_dev;
3109 char vpd_data[SFC_VPD_LEN];
3111 int ro_start, ro_size, i, j;
3113 /* Get the vpd data from the device */
3114 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
3115 if (vpd_size <= 0) {
3116 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
3120 /* Get the Read only section */
3121 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3123 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3127 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3129 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3130 if (i + j > vpd_size)
3133 /* Get the Part number */
3134 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3136 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3140 j = pci_vpd_info_field_size(&vpd_data[i]);
3141 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3142 if (i + j > vpd_size) {
3143 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3147 netif_info(efx, drv, efx->net_dev,
3148 "Part Number : %.*s\n", j, &vpd_data[i]);
3150 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3152 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3154 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3158 j = pci_vpd_info_field_size(&vpd_data[i]);
3159 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3160 if (i + j > vpd_size) {
3161 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3165 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3169 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3173 /* Main body of NIC initialisation
3174 * This is called at module load (or hotplug insertion, theoretically).
3176 static int efx_pci_probe_main(struct efx_nic *efx)
3180 /* Do start-of-day initialisation */
3181 rc = efx_probe_all(efx);
3187 rc = efx->type->init(efx);
3189 netif_err(efx, probe, efx->net_dev,
3190 "failed to initialise NIC\n");
3194 rc = efx_init_port(efx);
3196 netif_err(efx, probe, efx->net_dev,
3197 "failed to initialise port\n");
3201 rc = efx_nic_init_interrupt(efx);
3204 rc = efx_enable_interrupts(efx);
3211 efx_nic_fini_interrupt(efx);
3215 efx->type->fini(efx);
3218 efx_remove_all(efx);
3223 static int efx_pci_probe_post_io(struct efx_nic *efx)
3225 struct net_device *net_dev = efx->net_dev;
3226 int rc = efx_pci_probe_main(efx);
3231 if (efx->type->sriov_init) {
3232 rc = efx->type->sriov_init(efx);
3234 netif_err(efx, probe, efx->net_dev,
3235 "SR-IOV can't be enabled rc %d\n", rc);
3238 /* Determine netdevice features */
3239 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3240 NETIF_F_TSO | NETIF_F_RXCSUM);
3241 if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM))
3242 net_dev->features |= NETIF_F_TSO6;
3243 /* Check whether device supports TSO */
3244 if (!efx->type->tso_versions || !efx->type->tso_versions(efx))
3245 net_dev->features &= ~NETIF_F_ALL_TSO;
3246 /* Mask for features that also apply to VLAN devices */
3247 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
3248 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3251 net_dev->hw_features = net_dev->features & ~efx->fixed_features;
3253 /* Disable VLAN filtering by default. It may be enforced if
3254 * the feature is fixed (i.e. VLAN filters are required to
3255 * receive VLAN tagged packets due to vPort restrictions).
3257 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
3258 net_dev->features |= efx->fixed_features;
3260 rc = efx_register_netdev(efx);
3264 efx_pci_remove_main(efx);
3268 /* NIC initialisation
3270 * This is called at module load (or hotplug insertion,
3271 * theoretically). It sets up PCI mappings, resets the NIC,
3272 * sets up and registers the network devices with the kernel and hooks
3273 * the interrupt service routine. It does not prepare the device for
3274 * transmission; this is left to the first time one of the network
3275 * interfaces is brought up (i.e. efx_net_open).
3277 static int efx_pci_probe(struct pci_dev *pci_dev,
3278 const struct pci_device_id *entry)
3280 struct net_device *net_dev;
3281 struct efx_nic *efx;
3284 /* Allocate and initialise a struct net_device and struct efx_nic */
3285 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3289 efx = netdev_priv(net_dev);
3290 efx->type = (const struct efx_nic_type *) entry->driver_data;
3291 efx->fixed_features |= NETIF_F_HIGHDMA;
3293 pci_set_drvdata(pci_dev, efx);
3294 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3295 rc = efx_init_struct(efx, pci_dev, net_dev);
3299 netif_info(efx, probe, efx->net_dev,
3300 "Solarflare NIC detected\n");
3302 if (!efx->type->is_vf)
3303 efx_probe_vpd_strings(efx);
3305 /* Set up basic I/O (BAR mappings etc) */
3306 rc = efx_init_io(efx);
3310 rc = efx_pci_probe_post_io(efx);
3312 /* On failure, retry once immediately.
3313 * If we aborted probe due to a scheduled reset, dismiss it.
3315 efx->reset_pending = 0;
3316 rc = efx_pci_probe_post_io(efx);
3318 /* On another failure, retry once more
3319 * after a 50-305ms delay.
3323 get_random_bytes(&r, 1);
3324 msleep((unsigned int)r + 50);
3325 efx->reset_pending = 0;
3326 rc = efx_pci_probe_post_io(efx);
3332 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3334 /* Try to create MTDs, but allow this to fail */
3336 rc = efx_mtd_probe(efx);
3338 if (rc && rc != -EPERM)
3339 netif_warn(efx, probe, efx->net_dev,
3340 "failed to create MTDs (%d)\n", rc);
3342 rc = pci_enable_pcie_error_reporting(pci_dev);
3343 if (rc && rc != -EINVAL)
3344 netif_notice(efx, probe, efx->net_dev,
3345 "PCIE error reporting unavailable (%d).\n",
3348 if (efx->type->udp_tnl_push_ports)
3349 efx->type->udp_tnl_push_ports(efx);
3356 efx_fini_struct(efx);
3359 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3360 free_netdev(net_dev);
3364 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3365 * enabled on success
3367 #ifdef CONFIG_SFC_SRIOV
3368 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3371 struct efx_nic *efx = pci_get_drvdata(dev);
3373 if (efx->type->sriov_configure) {
3374 rc = efx->type->sriov_configure(efx, num_vfs);
3384 static int efx_pm_freeze(struct device *dev)
3386 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3390 if (efx->state != STATE_DISABLED) {
3391 efx->state = STATE_UNINIT;
3393 efx_device_detach_sync(efx);
3396 efx_disable_interrupts(efx);
3404 static int efx_pm_thaw(struct device *dev)
3407 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3411 if (efx->state != STATE_DISABLED) {
3412 rc = efx_enable_interrupts(efx);
3416 mutex_lock(&efx->mac_lock);
3417 efx->phy_op->reconfigure(efx);
3418 mutex_unlock(&efx->mac_lock);
3422 efx_device_attach_if_not_resetting(efx);
3424 efx->state = STATE_READY;
3426 efx->type->resume_wol(efx);
3431 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3432 queue_work(reset_workqueue, &efx->reset_work);
3442 static int efx_pm_poweroff(struct device *dev)
3444 struct pci_dev *pci_dev = to_pci_dev(dev);
3445 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3447 efx->type->fini(efx);
3449 efx->reset_pending = 0;
3451 pci_save_state(pci_dev);
3452 return pci_set_power_state(pci_dev, PCI_D3hot);
3455 /* Used for both resume and restore */
3456 static int efx_pm_resume(struct device *dev)
3458 struct pci_dev *pci_dev = to_pci_dev(dev);
3459 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3462 rc = pci_set_power_state(pci_dev, PCI_D0);
3465 pci_restore_state(pci_dev);
3466 rc = pci_enable_device(pci_dev);
3469 pci_set_master(efx->pci_dev);
3470 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3473 rc = efx->type->init(efx);
3476 rc = efx_pm_thaw(dev);
3480 static int efx_pm_suspend(struct device *dev)
3485 rc = efx_pm_poweroff(dev);
3491 static const struct dev_pm_ops efx_pm_ops = {
3492 .suspend = efx_pm_suspend,
3493 .resume = efx_pm_resume,
3494 .freeze = efx_pm_freeze,
3495 .thaw = efx_pm_thaw,
3496 .poweroff = efx_pm_poweroff,
3497 .restore = efx_pm_resume,
3500 /* A PCI error affecting this device was detected.
3501 * At this point MMIO and DMA may be disabled.
3502 * Stop the software path and request a slot reset.
3504 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3505 enum pci_channel_state state)
3507 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3508 struct efx_nic *efx = pci_get_drvdata(pdev);
3510 if (state == pci_channel_io_perm_failure)
3511 return PCI_ERS_RESULT_DISCONNECT;
3515 if (efx->state != STATE_DISABLED) {
3516 efx->state = STATE_RECOVERY;
3517 efx->reset_pending = 0;
3519 efx_device_detach_sync(efx);
3522 efx_disable_interrupts(efx);
3524 status = PCI_ERS_RESULT_NEED_RESET;
3526 /* If the interface is disabled we don't want to do anything
3529 status = PCI_ERS_RESULT_RECOVERED;
3534 pci_disable_device(pdev);
3539 /* Fake a successful reset, which will be performed later in efx_io_resume. */
3540 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3542 struct efx_nic *efx = pci_get_drvdata(pdev);
3543 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3546 if (pci_enable_device(pdev)) {
3547 netif_err(efx, hw, efx->net_dev,
3548 "Cannot re-enable PCI device after reset.\n");
3549 status = PCI_ERS_RESULT_DISCONNECT;
3552 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3554 netif_err(efx, hw, efx->net_dev,
3555 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3556 /* Non-fatal error. Continue. */
3562 /* Perform the actual reset and resume I/O operations. */
3563 static void efx_io_resume(struct pci_dev *pdev)
3565 struct efx_nic *efx = pci_get_drvdata(pdev);
3570 if (efx->state == STATE_DISABLED)
3573 rc = efx_reset(efx, RESET_TYPE_ALL);
3575 netif_err(efx, hw, efx->net_dev,
3576 "efx_reset failed after PCI error (%d)\n", rc);
3578 efx->state = STATE_READY;
3579 netif_dbg(efx, hw, efx->net_dev,
3580 "Done resetting and resuming IO after PCI error.\n");
3587 /* For simplicity and reliability, we always require a slot reset and try to
3588 * reset the hardware when a pci error affecting the device is detected.
3589 * We leave both the link_reset and mmio_enabled callback unimplemented:
3590 * with our request for slot reset the mmio_enabled callback will never be
3591 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3593 static const struct pci_error_handlers efx_err_handlers = {
3594 .error_detected = efx_io_error_detected,
3595 .slot_reset = efx_io_slot_reset,
3596 .resume = efx_io_resume,
3599 static struct pci_driver efx_pci_driver = {
3600 .name = KBUILD_MODNAME,
3601 .id_table = efx_pci_table,
3602 .probe = efx_pci_probe,
3603 .remove = efx_pci_remove,
3604 .driver.pm = &efx_pm_ops,
3605 .err_handler = &efx_err_handlers,
3606 #ifdef CONFIG_SFC_SRIOV
3607 .sriov_configure = efx_pci_sriov_configure,
3611 /**************************************************************************
3613 * Kernel module interface
3615 *************************************************************************/
3617 module_param(interrupt_mode, uint, 0444);
3618 MODULE_PARM_DESC(interrupt_mode,
3619 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3621 static int __init efx_init_module(void)
3625 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3627 rc = register_netdevice_notifier(&efx_netdev_notifier);
3631 #ifdef CONFIG_SFC_SRIOV
3632 rc = efx_init_sriov();
3637 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3638 if (!reset_workqueue) {
3643 rc = pci_register_driver(&efx_pci_driver);
3650 destroy_workqueue(reset_workqueue);
3652 #ifdef CONFIG_SFC_SRIOV
3656 unregister_netdevice_notifier(&efx_netdev_notifier);
3661 static void __exit efx_exit_module(void)
3663 printk(KERN_INFO "Solarflare NET driver unloading\n");
3665 pci_unregister_driver(&efx_pci_driver);
3666 destroy_workqueue(reset_workqueue);
3667 #ifdef CONFIG_SFC_SRIOV
3670 unregister_netdevice_notifier(&efx_netdev_notifier);
3674 module_init(efx_init_module);
3675 module_exit(efx_exit_module);
3677 MODULE_AUTHOR("Solarflare Communications and "
3678 "Michael Brown <mbrown@fensystems.co.uk>");
3679 MODULE_DESCRIPTION("Solarflare network driver");
3680 MODULE_LICENSE("GPL");
3681 MODULE_DEVICE_TABLE(pci, efx_pci_table);
3682 MODULE_VERSION(EFX_DRIVER_VERSION);