1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 [RESET_TYPE_MC_BIST] = "MC_BIST",
89 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
90 * queued onto this work queue. This is not a per-nic work queue, because
91 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
93 static struct workqueue_struct *reset_workqueue;
95 /* How often and how many times to poll for a reset while waiting for a
96 * BIST that another function started to complete.
98 #define BIST_WAIT_DELAY_MS 100
99 #define BIST_WAIT_DELAY_COUNT 100
101 /**************************************************************************
103 * Configurable values
105 *************************************************************************/
108 * Use separate channels for TX and RX events
110 * Set this to 1 to use separate channels for TX and RX. It allows us
111 * to control interrupt affinity separately for TX and RX.
113 * This is only used in MSI-X interrupt mode
115 static bool separate_tx_channels;
116 module_param(separate_tx_channels, bool, 0444);
117 MODULE_PARM_DESC(separate_tx_channels,
118 "Use separate channels for TX and RX");
120 /* This is the weight assigned to each of the (per-channel) virtual
123 static int napi_weight = 64;
125 /* This is the time (in jiffies) between invocations of the hardware
127 * On Falcon-based NICs, this will:
128 * - Check the on-board hardware monitor;
129 * - Poll the link state and reconfigure the hardware as necessary.
130 * On Siena-based NICs for power systems with EEH support, this will give EEH a
133 static unsigned int efx_monitor_interval = 1 * HZ;
135 /* Initial interrupt moderation settings. They can be modified after
136 * module load with ethtool.
138 * The default for RX should strike a balance between increasing the
139 * round-trip latency and reducing overhead.
141 static unsigned int rx_irq_mod_usec = 60;
143 /* Initial interrupt moderation settings. They can be modified after
144 * module load with ethtool.
146 * This default is chosen to ensure that a 10G link does not go idle
147 * while a TX queue is stopped after it has become full. A queue is
148 * restarted when it drops below half full. The time this takes (assuming
149 * worst case 3 descriptors per packet and 1024 descriptors) is
150 * 512 / 3 * 1.2 = 205 usec.
152 static unsigned int tx_irq_mod_usec = 150;
154 /* This is the first interrupt mode to try out of:
159 static unsigned int interrupt_mode;
161 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
162 * i.e. the number of CPUs among which we may distribute simultaneous
163 * interrupt handling.
165 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
166 * The default (0) means to assign an interrupt to each core.
168 static unsigned int rss_cpus;
169 module_param(rss_cpus, uint, 0444);
170 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
172 static bool phy_flash_cfg;
173 module_param(phy_flash_cfg, bool, 0644);
174 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
176 static unsigned irq_adapt_low_thresh = 8000;
177 module_param(irq_adapt_low_thresh, uint, 0644);
178 MODULE_PARM_DESC(irq_adapt_low_thresh,
179 "Threshold score for reducing IRQ moderation");
181 static unsigned irq_adapt_high_thresh = 16000;
182 module_param(irq_adapt_high_thresh, uint, 0644);
183 MODULE_PARM_DESC(irq_adapt_high_thresh,
184 "Threshold score for increasing IRQ moderation");
186 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
187 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
188 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
189 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
190 module_param(debug, uint, 0);
191 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
193 /**************************************************************************
195 * Utility functions and prototypes
197 *************************************************************************/
199 static int efx_soft_enable_interrupts(struct efx_nic *efx);
200 static void efx_soft_disable_interrupts(struct efx_nic *efx);
201 static void efx_remove_channel(struct efx_channel *channel);
202 static void efx_remove_channels(struct efx_nic *efx);
203 static const struct efx_channel_type efx_default_channel_type;
204 static void efx_remove_port(struct efx_nic *efx);
205 static void efx_init_napi_channel(struct efx_channel *channel);
206 static void efx_fini_napi(struct efx_nic *efx);
207 static void efx_fini_napi_channel(struct efx_channel *channel);
208 static void efx_fini_struct(struct efx_nic *efx);
209 static void efx_start_all(struct efx_nic *efx);
210 static void efx_stop_all(struct efx_nic *efx);
212 #define EFX_ASSERT_RESET_SERIALISED(efx) \
214 if ((efx->state == STATE_READY) || \
215 (efx->state == STATE_RECOVERY) || \
216 (efx->state == STATE_DISABLED)) \
220 static int efx_check_disabled(struct efx_nic *efx)
222 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
223 netif_err(efx, drv, efx->net_dev,
224 "device is disabled due to earlier errors\n");
230 /**************************************************************************
232 * Event queue processing
234 *************************************************************************/
236 /* Process channel's event queue
238 * This function is responsible for processing the event queue of a
239 * single channel. The caller must guarantee that this function will
240 * never be concurrently called more than once on the same channel,
241 * though different channels may be being processed concurrently.
243 static int efx_process_channel(struct efx_channel *channel, int budget)
247 if (unlikely(!channel->enabled))
250 spent = efx_nic_process_eventq(channel, budget);
251 if (spent && efx_channel_has_rx_queue(channel)) {
252 struct efx_rx_queue *rx_queue =
253 efx_channel_get_rx_queue(channel);
255 efx_rx_flush_packet(channel);
256 efx_fast_push_rx_descriptors(rx_queue, true);
264 * NAPI guarantees serialisation of polls of the same device, which
265 * provides the guarantee required by efx_process_channel().
267 static int efx_poll(struct napi_struct *napi, int budget)
269 struct efx_channel *channel =
270 container_of(napi, struct efx_channel, napi_str);
271 struct efx_nic *efx = channel->efx;
274 netif_vdbg(efx, intr, efx->net_dev,
275 "channel %d NAPI poll executing on CPU %d\n",
276 channel->channel, raw_smp_processor_id());
278 spent = efx_process_channel(channel, budget);
280 if (spent < budget) {
281 if (efx_channel_has_rx_queue(channel) &&
282 efx->irq_rx_adaptive &&
283 unlikely(++channel->irq_count == 1000)) {
284 if (unlikely(channel->irq_mod_score <
285 irq_adapt_low_thresh)) {
286 if (channel->irq_moderation > 1) {
287 channel->irq_moderation -= 1;
288 efx->type->push_irq_moderation(channel);
290 } else if (unlikely(channel->irq_mod_score >
291 irq_adapt_high_thresh)) {
292 if (channel->irq_moderation <
293 efx->irq_rx_moderation) {
294 channel->irq_moderation += 1;
295 efx->type->push_irq_moderation(channel);
298 channel->irq_count = 0;
299 channel->irq_mod_score = 0;
302 efx_filter_rfs_expire(channel);
304 /* There is no race here; although napi_disable() will
305 * only wait for napi_complete(), this isn't a problem
306 * since efx_nic_eventq_read_ack() will have no effect if
307 * interrupts have already been disabled.
310 efx_nic_eventq_read_ack(channel);
316 /* Create event queue
317 * Event queue memory allocations are done only once. If the channel
318 * is reset, the memory buffer will be reused; this guards against
319 * errors during channel reset and also simplifies interrupt handling.
321 static int efx_probe_eventq(struct efx_channel *channel)
323 struct efx_nic *efx = channel->efx;
324 unsigned long entries;
326 netif_dbg(efx, probe, efx->net_dev,
327 "chan %d create event queue\n", channel->channel);
329 /* Build an event queue with room for one event per tx and rx buffer,
330 * plus some extra for link state events and MCDI completions. */
331 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
332 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
333 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
335 return efx_nic_probe_eventq(channel);
338 /* Prepare channel's event queue */
339 static int efx_init_eventq(struct efx_channel *channel)
341 struct efx_nic *efx = channel->efx;
344 EFX_WARN_ON_PARANOID(channel->eventq_init);
346 netif_dbg(efx, drv, efx->net_dev,
347 "chan %d init event queue\n", channel->channel);
349 rc = efx_nic_init_eventq(channel);
351 efx->type->push_irq_moderation(channel);
352 channel->eventq_read_ptr = 0;
353 channel->eventq_init = true;
358 /* Enable event queue processing and NAPI */
359 static void efx_start_eventq(struct efx_channel *channel)
361 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
362 "chan %d start event queue\n", channel->channel);
364 /* Make sure the NAPI handler sees the enabled flag set */
365 channel->enabled = true;
368 napi_enable(&channel->napi_str);
369 efx_nic_eventq_read_ack(channel);
372 /* Disable event queue processing and NAPI */
373 static void efx_stop_eventq(struct efx_channel *channel)
375 if (!channel->enabled)
378 napi_disable(&channel->napi_str);
379 channel->enabled = false;
382 static void efx_fini_eventq(struct efx_channel *channel)
384 if (!channel->eventq_init)
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d fini event queue\n", channel->channel);
390 efx_nic_fini_eventq(channel);
391 channel->eventq_init = false;
394 static void efx_remove_eventq(struct efx_channel *channel)
396 netif_dbg(channel->efx, drv, channel->efx->net_dev,
397 "chan %d remove event queue\n", channel->channel);
399 efx_nic_remove_eventq(channel);
402 /**************************************************************************
406 *************************************************************************/
408 /* Allocate and initialise a channel structure. */
409 static struct efx_channel *
410 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
412 struct efx_channel *channel;
413 struct efx_rx_queue *rx_queue;
414 struct efx_tx_queue *tx_queue;
417 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
422 channel->channel = i;
423 channel->type = &efx_default_channel_type;
425 for (j = 0; j < EFX_TXQ_TYPES; j++) {
426 tx_queue = &channel->tx_queue[j];
428 tx_queue->queue = i * EFX_TXQ_TYPES + j;
429 tx_queue->channel = channel;
432 rx_queue = &channel->rx_queue;
434 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
435 (unsigned long)rx_queue);
440 /* Allocate and initialise a channel structure, copying parameters
441 * (but not resources) from an old channel structure.
443 static struct efx_channel *
444 efx_copy_channel(const struct efx_channel *old_channel)
446 struct efx_channel *channel;
447 struct efx_rx_queue *rx_queue;
448 struct efx_tx_queue *tx_queue;
451 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
455 *channel = *old_channel;
457 channel->napi_dev = NULL;
458 memset(&channel->eventq, 0, sizeof(channel->eventq));
460 for (j = 0; j < EFX_TXQ_TYPES; j++) {
461 tx_queue = &channel->tx_queue[j];
462 if (tx_queue->channel)
463 tx_queue->channel = channel;
464 tx_queue->buffer = NULL;
465 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
468 rx_queue = &channel->rx_queue;
469 rx_queue->buffer = NULL;
470 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
477 static int efx_probe_channel(struct efx_channel *channel)
479 struct efx_tx_queue *tx_queue;
480 struct efx_rx_queue *rx_queue;
483 netif_dbg(channel->efx, probe, channel->efx->net_dev,
484 "creating channel %d\n", channel->channel);
486 rc = channel->type->pre_probe(channel);
490 rc = efx_probe_eventq(channel);
494 efx_for_each_channel_tx_queue(tx_queue, channel) {
495 rc = efx_probe_tx_queue(tx_queue);
500 efx_for_each_channel_rx_queue(rx_queue, channel) {
501 rc = efx_probe_rx_queue(rx_queue);
506 channel->n_rx_frm_trunc = 0;
511 efx_remove_channel(channel);
516 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
518 struct efx_nic *efx = channel->efx;
522 number = channel->channel;
523 if (efx->tx_channel_offset == 0) {
525 } else if (channel->channel < efx->tx_channel_offset) {
529 number -= efx->tx_channel_offset;
531 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
534 static void efx_set_channel_names(struct efx_nic *efx)
536 struct efx_channel *channel;
538 efx_for_each_channel(channel, efx)
539 channel->type->get_name(channel,
540 efx->msi_context[channel->channel].name,
541 sizeof(efx->msi_context[0].name));
544 static int efx_probe_channels(struct efx_nic *efx)
546 struct efx_channel *channel;
549 /* Restart special buffer allocation */
550 efx->next_buffer_table = 0;
552 /* Probe channels in reverse, so that any 'extra' channels
553 * use the start of the buffer table. This allows the traffic
554 * channels to be resized without moving them or wasting the
555 * entries before them.
557 efx_for_each_channel_rev(channel, efx) {
558 rc = efx_probe_channel(channel);
560 netif_err(efx, probe, efx->net_dev,
561 "failed to create channel %d\n",
566 efx_set_channel_names(efx);
571 efx_remove_channels(efx);
575 /* Channels are shutdown and reinitialised whilst the NIC is running
576 * to propagate configuration changes (mtu, checksum offload), or
577 * to clear hardware error conditions
579 static void efx_start_datapath(struct efx_nic *efx)
581 bool old_rx_scatter = efx->rx_scatter;
582 struct efx_tx_queue *tx_queue;
583 struct efx_rx_queue *rx_queue;
584 struct efx_channel *channel;
587 /* Calculate the rx buffer allocation parameters required to
588 * support the current MTU, including padding for header
589 * alignment and overruns.
591 efx->rx_dma_len = (efx->rx_prefix_size +
592 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
593 efx->type->rx_buffer_padding);
594 rx_buf_len = (sizeof(struct efx_rx_page_state) +
595 efx->rx_ip_align + efx->rx_dma_len);
596 if (rx_buf_len <= PAGE_SIZE) {
597 efx->rx_scatter = efx->type->always_rx_scatter;
598 efx->rx_buffer_order = 0;
599 } else if (efx->type->can_rx_scatter) {
600 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
601 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
602 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
603 EFX_RX_BUF_ALIGNMENT) >
605 efx->rx_scatter = true;
606 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
607 efx->rx_buffer_order = 0;
609 efx->rx_scatter = false;
610 efx->rx_buffer_order = get_order(rx_buf_len);
613 efx_rx_config_page_split(efx);
614 if (efx->rx_buffer_order)
615 netif_dbg(efx, drv, efx->net_dev,
616 "RX buf len=%u; page order=%u batch=%u\n",
617 efx->rx_dma_len, efx->rx_buffer_order,
618 efx->rx_pages_per_batch);
620 netif_dbg(efx, drv, efx->net_dev,
621 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
622 efx->rx_dma_len, efx->rx_page_buf_step,
623 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
625 /* RX filters may also have scatter-enabled flags */
626 if (efx->rx_scatter != old_rx_scatter)
627 efx->type->filter_update_rx_scatter(efx);
629 /* We must keep at least one descriptor in a TX ring empty.
630 * We could avoid this when the queue size does not exactly
631 * match the hardware ring size, but it's not that important.
632 * Therefore we stop the queue when one more skb might fill
633 * the ring completely. We wake it when half way back to
636 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
637 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
639 /* Initialise the channels */
640 efx_for_each_channel(channel, efx) {
641 efx_for_each_channel_tx_queue(tx_queue, channel) {
642 efx_init_tx_queue(tx_queue);
643 atomic_inc(&efx->active_queues);
646 efx_for_each_channel_rx_queue(rx_queue, channel) {
647 efx_init_rx_queue(rx_queue);
648 atomic_inc(&efx->active_queues);
649 efx_stop_eventq(channel);
650 efx_fast_push_rx_descriptors(rx_queue, false);
651 efx_start_eventq(channel);
654 WARN_ON(channel->rx_pkt_n_frags);
657 efx_ptp_start_datapath(efx);
659 if (netif_device_present(efx->net_dev))
660 netif_tx_wake_all_queues(efx->net_dev);
663 static void efx_stop_datapath(struct efx_nic *efx)
665 struct efx_channel *channel;
666 struct efx_tx_queue *tx_queue;
667 struct efx_rx_queue *rx_queue;
670 EFX_ASSERT_RESET_SERIALISED(efx);
671 BUG_ON(efx->port_enabled);
673 efx_ptp_stop_datapath(efx);
676 efx_for_each_channel(channel, efx) {
677 efx_for_each_channel_rx_queue(rx_queue, channel)
678 rx_queue->refill_enabled = false;
681 efx_for_each_channel(channel, efx) {
682 /* RX packet processing is pipelined, so wait for the
683 * NAPI handler to complete. At least event queue 0
684 * might be kept active by non-data events, so don't
685 * use napi_synchronize() but actually disable NAPI
688 if (efx_channel_has_rx_queue(channel)) {
689 efx_stop_eventq(channel);
690 efx_start_eventq(channel);
694 rc = efx->type->fini_dmaq(efx);
695 if (rc && EFX_WORKAROUND_7803(efx)) {
696 /* Schedule a reset to recover from the flush failure. The
697 * descriptor caches reference memory we're about to free,
698 * but falcon_reconfigure_mac_wrapper() won't reconnect
699 * the MACs because of the pending reset.
701 netif_err(efx, drv, efx->net_dev,
702 "Resetting to recover from flush failure\n");
703 efx_schedule_reset(efx, RESET_TYPE_ALL);
705 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
707 netif_dbg(efx, drv, efx->net_dev,
708 "successfully flushed all queues\n");
711 efx_for_each_channel(channel, efx) {
712 efx_for_each_channel_rx_queue(rx_queue, channel)
713 efx_fini_rx_queue(rx_queue);
714 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
715 efx_fini_tx_queue(tx_queue);
719 static void efx_remove_channel(struct efx_channel *channel)
721 struct efx_tx_queue *tx_queue;
722 struct efx_rx_queue *rx_queue;
724 netif_dbg(channel->efx, drv, channel->efx->net_dev,
725 "destroy chan %d\n", channel->channel);
727 efx_for_each_channel_rx_queue(rx_queue, channel)
728 efx_remove_rx_queue(rx_queue);
729 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
730 efx_remove_tx_queue(tx_queue);
731 efx_remove_eventq(channel);
732 channel->type->post_remove(channel);
735 static void efx_remove_channels(struct efx_nic *efx)
737 struct efx_channel *channel;
739 efx_for_each_channel(channel, efx)
740 efx_remove_channel(channel);
744 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
746 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
747 u32 old_rxq_entries, old_txq_entries;
748 unsigned i, next_buffer_table = 0;
751 rc = efx_check_disabled(efx);
755 /* Not all channels should be reallocated. We must avoid
756 * reallocating their buffer table entries.
758 efx_for_each_channel(channel, efx) {
759 struct efx_rx_queue *rx_queue;
760 struct efx_tx_queue *tx_queue;
762 if (channel->type->copy)
764 next_buffer_table = max(next_buffer_table,
765 channel->eventq.index +
766 channel->eventq.entries);
767 efx_for_each_channel_rx_queue(rx_queue, channel)
768 next_buffer_table = max(next_buffer_table,
769 rx_queue->rxd.index +
770 rx_queue->rxd.entries);
771 efx_for_each_channel_tx_queue(tx_queue, channel)
772 next_buffer_table = max(next_buffer_table,
773 tx_queue->txd.index +
774 tx_queue->txd.entries);
777 efx_device_detach_sync(efx);
779 efx_soft_disable_interrupts(efx);
781 /* Clone channels (where possible) */
782 memset(other_channel, 0, sizeof(other_channel));
783 for (i = 0; i < efx->n_channels; i++) {
784 channel = efx->channel[i];
785 if (channel->type->copy)
786 channel = channel->type->copy(channel);
791 other_channel[i] = channel;
794 /* Swap entry counts and channel pointers */
795 old_rxq_entries = efx->rxq_entries;
796 old_txq_entries = efx->txq_entries;
797 efx->rxq_entries = rxq_entries;
798 efx->txq_entries = txq_entries;
799 for (i = 0; i < efx->n_channels; i++) {
800 channel = efx->channel[i];
801 efx->channel[i] = other_channel[i];
802 other_channel[i] = channel;
805 /* Restart buffer table allocation */
806 efx->next_buffer_table = next_buffer_table;
808 for (i = 0; i < efx->n_channels; i++) {
809 channel = efx->channel[i];
810 if (!channel->type->copy)
812 rc = efx_probe_channel(channel);
815 efx_init_napi_channel(efx->channel[i]);
819 /* Destroy unused channel structures */
820 for (i = 0; i < efx->n_channels; i++) {
821 channel = other_channel[i];
822 if (channel && channel->type->copy) {
823 efx_fini_napi_channel(channel);
824 efx_remove_channel(channel);
829 rc2 = efx_soft_enable_interrupts(efx);
832 netif_err(efx, drv, efx->net_dev,
833 "unable to restart interrupts on channel reallocation\n");
834 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
837 netif_device_attach(efx->net_dev);
843 efx->rxq_entries = old_rxq_entries;
844 efx->txq_entries = old_txq_entries;
845 for (i = 0; i < efx->n_channels; i++) {
846 channel = efx->channel[i];
847 efx->channel[i] = other_channel[i];
848 other_channel[i] = channel;
853 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
855 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
858 static const struct efx_channel_type efx_default_channel_type = {
859 .pre_probe = efx_channel_dummy_op_int,
860 .post_remove = efx_channel_dummy_op_void,
861 .get_name = efx_get_channel_name,
862 .copy = efx_copy_channel,
863 .keep_eventq = false,
866 int efx_channel_dummy_op_int(struct efx_channel *channel)
871 void efx_channel_dummy_op_void(struct efx_channel *channel)
875 /**************************************************************************
879 **************************************************************************/
881 /* This ensures that the kernel is kept informed (via
882 * netif_carrier_on/off) of the link status, and also maintains the
883 * link status's stop on the port's TX queue.
885 void efx_link_status_changed(struct efx_nic *efx)
887 struct efx_link_state *link_state = &efx->link_state;
889 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
890 * that no events are triggered between unregister_netdev() and the
891 * driver unloading. A more general condition is that NETDEV_CHANGE
892 * can only be generated between NETDEV_UP and NETDEV_DOWN */
893 if (!netif_running(efx->net_dev))
896 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
897 efx->n_link_state_changes++;
900 netif_carrier_on(efx->net_dev);
902 netif_carrier_off(efx->net_dev);
905 /* Status message for kernel log */
907 netif_info(efx, link, efx->net_dev,
908 "link up at %uMbps %s-duplex (MTU %d)\n",
909 link_state->speed, link_state->fd ? "full" : "half",
912 netif_info(efx, link, efx->net_dev, "link down\n");
915 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
917 efx->link_advertising = advertising;
919 if (advertising & ADVERTISED_Pause)
920 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
922 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
923 if (advertising & ADVERTISED_Asym_Pause)
924 efx->wanted_fc ^= EFX_FC_TX;
928 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
930 efx->wanted_fc = wanted_fc;
931 if (efx->link_advertising) {
932 if (wanted_fc & EFX_FC_RX)
933 efx->link_advertising |= (ADVERTISED_Pause |
934 ADVERTISED_Asym_Pause);
936 efx->link_advertising &= ~(ADVERTISED_Pause |
937 ADVERTISED_Asym_Pause);
938 if (wanted_fc & EFX_FC_TX)
939 efx->link_advertising ^= ADVERTISED_Asym_Pause;
943 static void efx_fini_port(struct efx_nic *efx);
945 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
946 * the MAC appropriately. All other PHY configuration changes are pushed
947 * through phy_op->set_settings(), and pushed asynchronously to the MAC
948 * through efx_monitor().
950 * Callers must hold the mac_lock
952 int __efx_reconfigure_port(struct efx_nic *efx)
954 enum efx_phy_mode phy_mode;
957 WARN_ON(!mutex_is_locked(&efx->mac_lock));
959 /* Disable PHY transmit in mac level loopbacks */
960 phy_mode = efx->phy_mode;
961 if (LOOPBACK_INTERNAL(efx))
962 efx->phy_mode |= PHY_MODE_TX_DISABLED;
964 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
966 rc = efx->type->reconfigure_port(efx);
969 efx->phy_mode = phy_mode;
974 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
976 int efx_reconfigure_port(struct efx_nic *efx)
980 EFX_ASSERT_RESET_SERIALISED(efx);
982 mutex_lock(&efx->mac_lock);
983 rc = __efx_reconfigure_port(efx);
984 mutex_unlock(&efx->mac_lock);
989 /* Asynchronous work item for changing MAC promiscuity and multicast
990 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
992 static void efx_mac_work(struct work_struct *data)
994 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
996 mutex_lock(&efx->mac_lock);
997 if (efx->port_enabled)
998 efx->type->reconfigure_mac(efx);
999 mutex_unlock(&efx->mac_lock);
1002 static int efx_probe_port(struct efx_nic *efx)
1006 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1009 efx->phy_mode = PHY_MODE_SPECIAL;
1011 /* Connect up MAC/PHY operations table */
1012 rc = efx->type->probe_port(efx);
1016 /* Initialise MAC address to permanent address */
1017 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1022 static int efx_init_port(struct efx_nic *efx)
1026 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1028 mutex_lock(&efx->mac_lock);
1030 rc = efx->phy_op->init(efx);
1034 efx->port_initialized = true;
1036 /* Reconfigure the MAC before creating dma queues (required for
1037 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1038 efx->type->reconfigure_mac(efx);
1040 /* Ensure the PHY advertises the correct flow control settings */
1041 rc = efx->phy_op->reconfigure(efx);
1045 mutex_unlock(&efx->mac_lock);
1049 efx->phy_op->fini(efx);
1051 mutex_unlock(&efx->mac_lock);
1055 static void efx_start_port(struct efx_nic *efx)
1057 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1058 BUG_ON(efx->port_enabled);
1060 mutex_lock(&efx->mac_lock);
1061 efx->port_enabled = true;
1063 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1064 * and then cancelled by efx_flush_all() */
1065 efx->type->reconfigure_mac(efx);
1067 mutex_unlock(&efx->mac_lock);
1070 /* Prevent efx_mac_work() and efx_monitor() from working */
1071 static void efx_stop_port(struct efx_nic *efx)
1073 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1075 mutex_lock(&efx->mac_lock);
1076 efx->port_enabled = false;
1077 mutex_unlock(&efx->mac_lock);
1079 /* Serialise against efx_set_multicast_list() */
1080 netif_addr_lock_bh(efx->net_dev);
1081 netif_addr_unlock_bh(efx->net_dev);
1084 static void efx_fini_port(struct efx_nic *efx)
1086 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1088 if (!efx->port_initialized)
1091 efx->phy_op->fini(efx);
1092 efx->port_initialized = false;
1094 efx->link_state.up = false;
1095 efx_link_status_changed(efx);
1098 static void efx_remove_port(struct efx_nic *efx)
1100 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1102 efx->type->remove_port(efx);
1105 /**************************************************************************
1109 **************************************************************************/
1111 /* This configures the PCI device to enable I/O and DMA. */
1112 static int efx_init_io(struct efx_nic *efx)
1114 struct pci_dev *pci_dev = efx->pci_dev;
1115 dma_addr_t dma_mask = efx->type->max_dma_mask;
1116 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1119 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1121 rc = pci_enable_device(pci_dev);
1123 netif_err(efx, probe, efx->net_dev,
1124 "failed to enable PCI device\n");
1128 pci_set_master(pci_dev);
1130 /* Set the PCI DMA mask. Try all possibilities from our
1131 * genuine mask down to 32 bits, because some architectures
1132 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1133 * masks event though they reject 46 bit masks.
1135 while (dma_mask > 0x7fffffffUL) {
1136 if (dma_supported(&pci_dev->dev, dma_mask)) {
1137 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1144 netif_err(efx, probe, efx->net_dev,
1145 "could not find a suitable DMA mask\n");
1148 netif_dbg(efx, probe, efx->net_dev,
1149 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1151 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1152 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1154 netif_err(efx, probe, efx->net_dev,
1155 "request for memory BAR failed\n");
1159 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1160 if (!efx->membase) {
1161 netif_err(efx, probe, efx->net_dev,
1162 "could not map memory BAR at %llx+%x\n",
1163 (unsigned long long)efx->membase_phys, mem_map_size);
1167 netif_dbg(efx, probe, efx->net_dev,
1168 "memory BAR at %llx+%x (virtual %p)\n",
1169 (unsigned long long)efx->membase_phys, mem_map_size,
1175 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1177 efx->membase_phys = 0;
1179 pci_disable_device(efx->pci_dev);
1184 static void efx_fini_io(struct efx_nic *efx)
1186 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1189 iounmap(efx->membase);
1190 efx->membase = NULL;
1193 if (efx->membase_phys) {
1194 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1195 efx->membase_phys = 0;
1198 pci_disable_device(efx->pci_dev);
1201 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1203 cpumask_var_t thread_mask;
1210 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1211 netif_warn(efx, probe, efx->net_dev,
1212 "RSS disabled due to allocation failure\n");
1217 for_each_online_cpu(cpu) {
1218 if (!cpumask_test_cpu(cpu, thread_mask)) {
1220 cpumask_or(thread_mask, thread_mask,
1221 topology_thread_cpumask(cpu));
1225 free_cpumask_var(thread_mask);
1228 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1229 * table entries that are inaccessible to VFs
1231 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1232 count > efx_vf_size(efx)) {
1233 netif_warn(efx, probe, efx->net_dev,
1234 "Reducing number of RSS channels from %u to %u for "
1235 "VF support. Increase vf-msix-limit to use more "
1236 "channels on the PF.\n",
1237 count, efx_vf_size(efx));
1238 count = efx_vf_size(efx);
1244 /* Probe the number and type of interrupts we are able to obtain, and
1245 * the resulting numbers of channels and RX queues.
1247 static int efx_probe_interrupts(struct efx_nic *efx)
1249 unsigned int extra_channels = 0;
1253 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1254 if (efx->extra_channel_type[i])
1257 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1258 struct msix_entry xentries[EFX_MAX_CHANNELS];
1259 unsigned int n_channels;
1261 n_channels = efx_wanted_parallelism(efx);
1262 if (separate_tx_channels)
1264 n_channels += extra_channels;
1265 n_channels = min(n_channels, efx->max_channels);
1267 for (i = 0; i < n_channels; i++)
1268 xentries[i].entry = i;
1269 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1271 netif_err(efx, drv, efx->net_dev,
1272 "WARNING: Insufficient MSI-X vectors"
1273 " available (%d < %u).\n", rc, n_channels);
1274 netif_err(efx, drv, efx->net_dev,
1275 "WARNING: Performance may be reduced.\n");
1276 EFX_BUG_ON_PARANOID(rc >= n_channels);
1278 rc = pci_enable_msix(efx->pci_dev, xentries,
1283 efx->n_channels = n_channels;
1284 if (n_channels > extra_channels)
1285 n_channels -= extra_channels;
1286 if (separate_tx_channels) {
1287 efx->n_tx_channels = max(n_channels / 2, 1U);
1288 efx->n_rx_channels = max(n_channels -
1292 efx->n_tx_channels = n_channels;
1293 efx->n_rx_channels = n_channels;
1295 for (i = 0; i < efx->n_channels; i++)
1296 efx_get_channel(efx, i)->irq =
1299 /* Fall back to single channel MSI */
1300 efx->interrupt_mode = EFX_INT_MODE_MSI;
1301 netif_err(efx, drv, efx->net_dev,
1302 "could not enable MSI-X\n");
1306 /* Try single interrupt MSI */
1307 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1308 efx->n_channels = 1;
1309 efx->n_rx_channels = 1;
1310 efx->n_tx_channels = 1;
1311 rc = pci_enable_msi(efx->pci_dev);
1313 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1315 netif_err(efx, drv, efx->net_dev,
1316 "could not enable MSI\n");
1317 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1321 /* Assume legacy interrupts */
1322 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1323 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1324 efx->n_rx_channels = 1;
1325 efx->n_tx_channels = 1;
1326 efx->legacy_irq = efx->pci_dev->irq;
1329 /* Assign extra channels if possible */
1330 j = efx->n_channels;
1331 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1332 if (!efx->extra_channel_type[i])
1334 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1335 efx->n_channels <= extra_channels) {
1336 efx->extra_channel_type[i]->handle_no_channel(efx);
1339 efx_get_channel(efx, j)->type =
1340 efx->extra_channel_type[i];
1344 /* RSS might be usable on VFs even if it is disabled on the PF */
1345 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1346 efx->n_rx_channels : efx_vf_size(efx));
1351 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1353 struct efx_channel *channel, *end_channel;
1356 BUG_ON(efx->state == STATE_DISABLED);
1358 efx->irq_soft_enabled = true;
1361 efx_for_each_channel(channel, efx) {
1362 if (!channel->type->keep_eventq) {
1363 rc = efx_init_eventq(channel);
1367 efx_start_eventq(channel);
1370 efx_mcdi_mode_event(efx);
1374 end_channel = channel;
1375 efx_for_each_channel(channel, efx) {
1376 if (channel == end_channel)
1378 efx_stop_eventq(channel);
1379 if (!channel->type->keep_eventq)
1380 efx_fini_eventq(channel);
1386 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1388 struct efx_channel *channel;
1390 if (efx->state == STATE_DISABLED)
1393 efx_mcdi_mode_poll(efx);
1395 efx->irq_soft_enabled = false;
1398 if (efx->legacy_irq)
1399 synchronize_irq(efx->legacy_irq);
1401 efx_for_each_channel(channel, efx) {
1403 synchronize_irq(channel->irq);
1405 efx_stop_eventq(channel);
1406 if (!channel->type->keep_eventq)
1407 efx_fini_eventq(channel);
1410 /* Flush the asynchronous MCDI request queue */
1411 efx_mcdi_flush_async(efx);
1414 static int efx_enable_interrupts(struct efx_nic *efx)
1416 struct efx_channel *channel, *end_channel;
1419 BUG_ON(efx->state == STATE_DISABLED);
1421 if (efx->eeh_disabled_legacy_irq) {
1422 enable_irq(efx->legacy_irq);
1423 efx->eeh_disabled_legacy_irq = false;
1426 efx->type->irq_enable_master(efx);
1428 efx_for_each_channel(channel, efx) {
1429 if (channel->type->keep_eventq) {
1430 rc = efx_init_eventq(channel);
1436 rc = efx_soft_enable_interrupts(efx);
1443 end_channel = channel;
1444 efx_for_each_channel(channel, efx) {
1445 if (channel == end_channel)
1447 if (channel->type->keep_eventq)
1448 efx_fini_eventq(channel);
1451 efx->type->irq_disable_non_ev(efx);
1456 static void efx_disable_interrupts(struct efx_nic *efx)
1458 struct efx_channel *channel;
1460 efx_soft_disable_interrupts(efx);
1462 efx_for_each_channel(channel, efx) {
1463 if (channel->type->keep_eventq)
1464 efx_fini_eventq(channel);
1467 efx->type->irq_disable_non_ev(efx);
1470 static void efx_remove_interrupts(struct efx_nic *efx)
1472 struct efx_channel *channel;
1474 /* Remove MSI/MSI-X interrupts */
1475 efx_for_each_channel(channel, efx)
1477 pci_disable_msi(efx->pci_dev);
1478 pci_disable_msix(efx->pci_dev);
1480 /* Remove legacy interrupt */
1481 efx->legacy_irq = 0;
1484 static void efx_set_channels(struct efx_nic *efx)
1486 struct efx_channel *channel;
1487 struct efx_tx_queue *tx_queue;
1489 efx->tx_channel_offset =
1490 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1492 /* We need to mark which channels really have RX and TX
1493 * queues, and adjust the TX queue numbers if we have separate
1494 * RX-only and TX-only channels.
1496 efx_for_each_channel(channel, efx) {
1497 if (channel->channel < efx->n_rx_channels)
1498 channel->rx_queue.core_index = channel->channel;
1500 channel->rx_queue.core_index = -1;
1502 efx_for_each_channel_tx_queue(tx_queue, channel)
1503 tx_queue->queue -= (efx->tx_channel_offset *
1508 static int efx_probe_nic(struct efx_nic *efx)
1513 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1515 /* Carry out hardware-type specific initialisation */
1516 rc = efx->type->probe(efx);
1520 /* Determine the number of channels and queues by trying to hook
1521 * in MSI-X interrupts. */
1522 rc = efx_probe_interrupts(efx);
1526 rc = efx->type->dimension_resources(efx);
1530 if (efx->n_channels > 1)
1531 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1532 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1533 efx->rx_indir_table[i] =
1534 ethtool_rxfh_indir_default(i, efx->rss_spread);
1536 efx_set_channels(efx);
1537 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1538 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1540 /* Initialise the interrupt moderation settings */
1541 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1547 efx_remove_interrupts(efx);
1549 efx->type->remove(efx);
1553 static void efx_remove_nic(struct efx_nic *efx)
1555 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1557 efx_remove_interrupts(efx);
1558 efx->type->remove(efx);
1561 static int efx_probe_filters(struct efx_nic *efx)
1565 spin_lock_init(&efx->filter_lock);
1567 rc = efx->type->filter_table_probe(efx);
1571 #ifdef CONFIG_RFS_ACCEL
1572 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1573 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1574 sizeof(*efx->rps_flow_id),
1576 if (!efx->rps_flow_id) {
1577 efx->type->filter_table_remove(efx);
1586 static void efx_remove_filters(struct efx_nic *efx)
1588 #ifdef CONFIG_RFS_ACCEL
1589 kfree(efx->rps_flow_id);
1591 efx->type->filter_table_remove(efx);
1594 static void efx_restore_filters(struct efx_nic *efx)
1596 efx->type->filter_table_restore(efx);
1599 /**************************************************************************
1601 * NIC startup/shutdown
1603 *************************************************************************/
1605 static int efx_probe_all(struct efx_nic *efx)
1609 rc = efx_probe_nic(efx);
1611 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1615 rc = efx_probe_port(efx);
1617 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1621 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1622 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1626 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1628 rc = efx_probe_filters(efx);
1630 netif_err(efx, probe, efx->net_dev,
1631 "failed to create filter tables\n");
1635 rc = efx_probe_channels(efx);
1642 efx_remove_filters(efx);
1644 efx_remove_port(efx);
1646 efx_remove_nic(efx);
1651 /* If the interface is supposed to be running but is not, start
1652 * the hardware and software data path, regular activity for the port
1653 * (MAC statistics, link polling, etc.) and schedule the port to be
1654 * reconfigured. Interrupts must already be enabled. This function
1655 * is safe to call multiple times, so long as the NIC is not disabled.
1656 * Requires the RTNL lock.
1658 static void efx_start_all(struct efx_nic *efx)
1660 EFX_ASSERT_RESET_SERIALISED(efx);
1661 BUG_ON(efx->state == STATE_DISABLED);
1663 /* Check that it is appropriate to restart the interface. All
1664 * of these flags are safe to read under just the rtnl lock */
1665 if (efx->port_enabled || !netif_running(efx->net_dev))
1668 efx_start_port(efx);
1669 efx_start_datapath(efx);
1671 /* Start the hardware monitor if there is one */
1672 if (efx->type->monitor != NULL)
1673 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1674 efx_monitor_interval);
1676 /* If link state detection is normally event-driven, we have
1677 * to poll now because we could have missed a change
1679 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1680 mutex_lock(&efx->mac_lock);
1681 if (efx->phy_op->poll(efx))
1682 efx_link_status_changed(efx);
1683 mutex_unlock(&efx->mac_lock);
1686 efx->type->start_stats(efx);
1689 /* Flush all delayed work. Should only be called when no more delayed work
1690 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1691 * since we're holding the rtnl_lock at this point. */
1692 static void efx_flush_all(struct efx_nic *efx)
1694 /* Make sure the hardware monitor and event self-test are stopped */
1695 cancel_delayed_work_sync(&efx->monitor_work);
1696 efx_selftest_async_cancel(efx);
1697 /* Stop scheduled port reconfigurations */
1698 cancel_work_sync(&efx->mac_work);
1701 /* Quiesce the hardware and software data path, and regular activity
1702 * for the port without bringing the link down. Safe to call multiple
1703 * times with the NIC in almost any state, but interrupts should be
1704 * enabled. Requires the RTNL lock.
1706 static void efx_stop_all(struct efx_nic *efx)
1708 EFX_ASSERT_RESET_SERIALISED(efx);
1710 /* port_enabled can be read safely under the rtnl lock */
1711 if (!efx->port_enabled)
1714 efx->type->stop_stats(efx);
1717 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1720 /* Stop the kernel transmit interface. This is only valid if
1721 * the device is stopped or detached; otherwise the watchdog
1722 * may fire immediately.
1724 WARN_ON(netif_running(efx->net_dev) &&
1725 netif_device_present(efx->net_dev));
1726 netif_tx_disable(efx->net_dev);
1728 efx_stop_datapath(efx);
1731 static void efx_remove_all(struct efx_nic *efx)
1733 efx_remove_channels(efx);
1734 efx_remove_filters(efx);
1735 efx_remove_port(efx);
1736 efx_remove_nic(efx);
1739 /**************************************************************************
1741 * Interrupt moderation
1743 **************************************************************************/
1745 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1749 if (usecs * 1000 < quantum_ns)
1750 return 1; /* never round down to 0 */
1751 return usecs * 1000 / quantum_ns;
1754 /* Set interrupt moderation parameters */
1755 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1756 unsigned int rx_usecs, bool rx_adaptive,
1757 bool rx_may_override_tx)
1759 struct efx_channel *channel;
1760 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1761 efx->timer_quantum_ns,
1763 unsigned int tx_ticks;
1764 unsigned int rx_ticks;
1766 EFX_ASSERT_RESET_SERIALISED(efx);
1768 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1771 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1772 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1774 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1775 !rx_may_override_tx) {
1776 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1777 "RX and TX IRQ moderation must be equal\n");
1781 efx->irq_rx_adaptive = rx_adaptive;
1782 efx->irq_rx_moderation = rx_ticks;
1783 efx_for_each_channel(channel, efx) {
1784 if (efx_channel_has_rx_queue(channel))
1785 channel->irq_moderation = rx_ticks;
1786 else if (efx_channel_has_tx_queues(channel))
1787 channel->irq_moderation = tx_ticks;
1793 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1794 unsigned int *rx_usecs, bool *rx_adaptive)
1796 /* We must round up when converting ticks to microseconds
1797 * because we round down when converting the other way.
1800 *rx_adaptive = efx->irq_rx_adaptive;
1801 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1802 efx->timer_quantum_ns,
1805 /* If channels are shared between RX and TX, so is IRQ
1806 * moderation. Otherwise, IRQ moderation is the same for all
1807 * TX channels and is not adaptive.
1809 if (efx->tx_channel_offset == 0)
1810 *tx_usecs = *rx_usecs;
1812 *tx_usecs = DIV_ROUND_UP(
1813 efx->channel[efx->tx_channel_offset]->irq_moderation *
1814 efx->timer_quantum_ns,
1818 /**************************************************************************
1822 **************************************************************************/
1824 /* Run periodically off the general workqueue */
1825 static void efx_monitor(struct work_struct *data)
1827 struct efx_nic *efx = container_of(data, struct efx_nic,
1830 netif_vdbg(efx, timer, efx->net_dev,
1831 "hardware monitor executing on CPU %d\n",
1832 raw_smp_processor_id());
1833 BUG_ON(efx->type->monitor == NULL);
1835 /* If the mac_lock is already held then it is likely a port
1836 * reconfiguration is already in place, which will likely do
1837 * most of the work of monitor() anyway. */
1838 if (mutex_trylock(&efx->mac_lock)) {
1839 if (efx->port_enabled)
1840 efx->type->monitor(efx);
1841 mutex_unlock(&efx->mac_lock);
1844 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1845 efx_monitor_interval);
1848 /**************************************************************************
1852 *************************************************************************/
1855 * Context: process, rtnl_lock() held.
1857 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1859 struct efx_nic *efx = netdev_priv(net_dev);
1860 struct mii_ioctl_data *data = if_mii(ifr);
1862 if (cmd == SIOCSHWTSTAMP)
1863 return efx_ptp_set_ts_config(efx, ifr);
1864 if (cmd == SIOCGHWTSTAMP)
1865 return efx_ptp_get_ts_config(efx, ifr);
1867 /* Convert phy_id from older PRTAD/DEVAD format */
1868 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1869 (data->phy_id & 0xfc00) == 0x0400)
1870 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1872 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1875 /**************************************************************************
1879 **************************************************************************/
1881 static void efx_init_napi_channel(struct efx_channel *channel)
1883 struct efx_nic *efx = channel->efx;
1885 channel->napi_dev = efx->net_dev;
1886 netif_napi_add(channel->napi_dev, &channel->napi_str,
1887 efx_poll, napi_weight);
1890 static void efx_init_napi(struct efx_nic *efx)
1892 struct efx_channel *channel;
1894 efx_for_each_channel(channel, efx)
1895 efx_init_napi_channel(channel);
1898 static void efx_fini_napi_channel(struct efx_channel *channel)
1900 if (channel->napi_dev)
1901 netif_napi_del(&channel->napi_str);
1902 channel->napi_dev = NULL;
1905 static void efx_fini_napi(struct efx_nic *efx)
1907 struct efx_channel *channel;
1909 efx_for_each_channel(channel, efx)
1910 efx_fini_napi_channel(channel);
1913 /**************************************************************************
1915 * Kernel netpoll interface
1917 *************************************************************************/
1919 #ifdef CONFIG_NET_POLL_CONTROLLER
1921 /* Although in the common case interrupts will be disabled, this is not
1922 * guaranteed. However, all our work happens inside the NAPI callback,
1923 * so no locking is required.
1925 static void efx_netpoll(struct net_device *net_dev)
1927 struct efx_nic *efx = netdev_priv(net_dev);
1928 struct efx_channel *channel;
1930 efx_for_each_channel(channel, efx)
1931 efx_schedule_channel(channel);
1936 /**************************************************************************
1938 * Kernel net device interface
1940 *************************************************************************/
1942 /* Context: process, rtnl_lock() held. */
1943 static int efx_net_open(struct net_device *net_dev)
1945 struct efx_nic *efx = netdev_priv(net_dev);
1948 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1949 raw_smp_processor_id());
1951 rc = efx_check_disabled(efx);
1954 if (efx->phy_mode & PHY_MODE_SPECIAL)
1956 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1959 /* Notify the kernel of the link state polled during driver load,
1960 * before the monitor starts running */
1961 efx_link_status_changed(efx);
1964 efx_selftest_async_start(efx);
1968 /* Context: process, rtnl_lock() held.
1969 * Note that the kernel will ignore our return code; this method
1970 * should really be a void.
1972 static int efx_net_stop(struct net_device *net_dev)
1974 struct efx_nic *efx = netdev_priv(net_dev);
1976 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1977 raw_smp_processor_id());
1979 /* Stop the device and flush all the channels */
1985 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1986 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1987 struct rtnl_link_stats64 *stats)
1989 struct efx_nic *efx = netdev_priv(net_dev);
1991 spin_lock_bh(&efx->stats_lock);
1992 efx->type->update_stats(efx, NULL, stats);
1993 spin_unlock_bh(&efx->stats_lock);
1998 /* Context: netif_tx_lock held, BHs disabled. */
1999 static void efx_watchdog(struct net_device *net_dev)
2001 struct efx_nic *efx = netdev_priv(net_dev);
2003 netif_err(efx, tx_err, efx->net_dev,
2004 "TX stuck with port_enabled=%d: resetting channels\n",
2007 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2011 /* Context: process, rtnl_lock() held. */
2012 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2014 struct efx_nic *efx = netdev_priv(net_dev);
2017 rc = efx_check_disabled(efx);
2020 if (new_mtu > EFX_MAX_MTU)
2023 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2025 efx_device_detach_sync(efx);
2028 mutex_lock(&efx->mac_lock);
2029 net_dev->mtu = new_mtu;
2030 efx->type->reconfigure_mac(efx);
2031 mutex_unlock(&efx->mac_lock);
2034 netif_device_attach(efx->net_dev);
2038 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2040 struct efx_nic *efx = netdev_priv(net_dev);
2041 struct sockaddr *addr = data;
2042 char *new_addr = addr->sa_data;
2044 if (!is_valid_ether_addr(new_addr)) {
2045 netif_err(efx, drv, efx->net_dev,
2046 "invalid ethernet MAC address requested: %pM\n",
2048 return -EADDRNOTAVAIL;
2051 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2052 efx_sriov_mac_address_changed(efx);
2054 /* Reconfigure the MAC */
2055 mutex_lock(&efx->mac_lock);
2056 efx->type->reconfigure_mac(efx);
2057 mutex_unlock(&efx->mac_lock);
2062 /* Context: netif_addr_lock held, BHs disabled. */
2063 static void efx_set_rx_mode(struct net_device *net_dev)
2065 struct efx_nic *efx = netdev_priv(net_dev);
2067 if (efx->port_enabled)
2068 queue_work(efx->workqueue, &efx->mac_work);
2069 /* Otherwise efx_start_port() will do this */
2072 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2074 struct efx_nic *efx = netdev_priv(net_dev);
2076 /* If disabling RX n-tuple filtering, clear existing filters */
2077 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2078 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2083 static const struct net_device_ops efx_farch_netdev_ops = {
2084 .ndo_open = efx_net_open,
2085 .ndo_stop = efx_net_stop,
2086 .ndo_get_stats64 = efx_net_stats,
2087 .ndo_tx_timeout = efx_watchdog,
2088 .ndo_start_xmit = efx_hard_start_xmit,
2089 .ndo_validate_addr = eth_validate_addr,
2090 .ndo_do_ioctl = efx_ioctl,
2091 .ndo_change_mtu = efx_change_mtu,
2092 .ndo_set_mac_address = efx_set_mac_address,
2093 .ndo_set_rx_mode = efx_set_rx_mode,
2094 .ndo_set_features = efx_set_features,
2095 #ifdef CONFIG_SFC_SRIOV
2096 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2097 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2098 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2099 .ndo_get_vf_config = efx_sriov_get_vf_config,
2101 #ifdef CONFIG_NET_POLL_CONTROLLER
2102 .ndo_poll_controller = efx_netpoll,
2104 .ndo_setup_tc = efx_setup_tc,
2105 #ifdef CONFIG_RFS_ACCEL
2106 .ndo_rx_flow_steer = efx_filter_rfs,
2110 static const struct net_device_ops efx_ef10_netdev_ops = {
2111 .ndo_open = efx_net_open,
2112 .ndo_stop = efx_net_stop,
2113 .ndo_get_stats64 = efx_net_stats,
2114 .ndo_tx_timeout = efx_watchdog,
2115 .ndo_start_xmit = efx_hard_start_xmit,
2116 .ndo_validate_addr = eth_validate_addr,
2117 .ndo_do_ioctl = efx_ioctl,
2118 .ndo_change_mtu = efx_change_mtu,
2119 .ndo_set_mac_address = efx_set_mac_address,
2120 .ndo_set_rx_mode = efx_set_rx_mode,
2121 .ndo_set_features = efx_set_features,
2122 #ifdef CONFIG_NET_POLL_CONTROLLER
2123 .ndo_poll_controller = efx_netpoll,
2125 #ifdef CONFIG_RFS_ACCEL
2126 .ndo_rx_flow_steer = efx_filter_rfs,
2130 static void efx_update_name(struct efx_nic *efx)
2132 strcpy(efx->name, efx->net_dev->name);
2133 efx_mtd_rename(efx);
2134 efx_set_channel_names(efx);
2137 static int efx_netdev_event(struct notifier_block *this,
2138 unsigned long event, void *ptr)
2140 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2142 if ((net_dev->netdev_ops == &efx_farch_netdev_ops ||
2143 net_dev->netdev_ops == &efx_ef10_netdev_ops) &&
2144 event == NETDEV_CHANGENAME)
2145 efx_update_name(netdev_priv(net_dev));
2150 static struct notifier_block efx_netdev_notifier = {
2151 .notifier_call = efx_netdev_event,
2155 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2157 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2158 return sprintf(buf, "%d\n", efx->phy_type);
2160 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2162 static int efx_register_netdev(struct efx_nic *efx)
2164 struct net_device *net_dev = efx->net_dev;
2165 struct efx_channel *channel;
2168 net_dev->watchdog_timeo = 5 * HZ;
2169 net_dev->irq = efx->pci_dev->irq;
2170 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
2171 net_dev->netdev_ops = &efx_ef10_netdev_ops;
2172 net_dev->priv_flags |= IFF_UNICAST_FLT;
2174 net_dev->netdev_ops = &efx_farch_netdev_ops;
2176 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2177 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2181 /* Enable resets to be scheduled and check whether any were
2182 * already requested. If so, the NIC is probably hosed so we
2185 efx->state = STATE_READY;
2186 smp_mb(); /* ensure we change state before checking reset_pending */
2187 if (efx->reset_pending) {
2188 netif_err(efx, probe, efx->net_dev,
2189 "aborting probe due to scheduled reset\n");
2194 rc = dev_alloc_name(net_dev, net_dev->name);
2197 efx_update_name(efx);
2199 /* Always start with carrier off; PHY events will detect the link */
2200 netif_carrier_off(net_dev);
2202 rc = register_netdevice(net_dev);
2206 efx_for_each_channel(channel, efx) {
2207 struct efx_tx_queue *tx_queue;
2208 efx_for_each_channel_tx_queue(tx_queue, channel)
2209 efx_init_tx_queue_core_txq(tx_queue);
2214 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2216 netif_err(efx, drv, efx->net_dev,
2217 "failed to init net dev attributes\n");
2218 goto fail_registered;
2225 unregister_netdevice(net_dev);
2227 efx->state = STATE_UNINIT;
2229 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2233 static void efx_unregister_netdev(struct efx_nic *efx)
2238 BUG_ON(netdev_priv(efx->net_dev) != efx);
2240 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2241 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2244 unregister_netdevice(efx->net_dev);
2245 efx->state = STATE_UNINIT;
2249 /**************************************************************************
2251 * Device reset and suspend
2253 **************************************************************************/
2255 /* Tears down the entire software state and most of the hardware state
2257 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2259 EFX_ASSERT_RESET_SERIALISED(efx);
2262 efx_disable_interrupts(efx);
2264 mutex_lock(&efx->mac_lock);
2265 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2266 efx->phy_op->fini(efx);
2267 efx->type->fini(efx);
2270 /* This function will always ensure that the locks acquired in
2271 * efx_reset_down() are released. A failure return code indicates
2272 * that we were unable to reinitialise the hardware, and the
2273 * driver should be disabled. If ok is false, then the rx and tx
2274 * engines are not restarted, pending a RESET_DISABLE. */
2275 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2279 EFX_ASSERT_RESET_SERIALISED(efx);
2281 rc = efx->type->init(efx);
2283 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2290 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2291 rc = efx->phy_op->init(efx);
2294 if (efx->phy_op->reconfigure(efx))
2295 netif_err(efx, drv, efx->net_dev,
2296 "could not restore PHY settings\n");
2299 rc = efx_enable_interrupts(efx);
2302 efx_restore_filters(efx);
2303 efx_sriov_reset(efx);
2305 mutex_unlock(&efx->mac_lock);
2312 efx->port_initialized = false;
2314 mutex_unlock(&efx->mac_lock);
2319 /* Reset the NIC using the specified method. Note that the reset may
2320 * fail, in which case the card will be left in an unusable state.
2322 * Caller must hold the rtnl_lock.
2324 int efx_reset(struct efx_nic *efx, enum reset_type method)
2329 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2330 RESET_TYPE(method));
2332 efx_device_detach_sync(efx);
2333 efx_reset_down(efx, method);
2335 rc = efx->type->reset(efx, method);
2337 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2341 /* Clear flags for the scopes we covered. We assume the NIC and
2342 * driver are now quiescent so that there is no race here.
2344 efx->reset_pending &= -(1 << (method + 1));
2346 /* Reinitialise bus-mastering, which may have been turned off before
2347 * the reset was scheduled. This is still appropriate, even in the
2348 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2349 * can respond to requests. */
2350 pci_set_master(efx->pci_dev);
2353 /* Leave device stopped if necessary */
2355 method == RESET_TYPE_DISABLE ||
2356 method == RESET_TYPE_RECOVER_OR_DISABLE;
2357 rc2 = efx_reset_up(efx, method, !disabled);
2365 dev_close(efx->net_dev);
2366 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2367 efx->state = STATE_DISABLED;
2369 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2370 netif_device_attach(efx->net_dev);
2375 /* Try recovery mechanisms.
2376 * For now only EEH is supported.
2377 * Returns 0 if the recovery mechanisms are unsuccessful.
2378 * Returns a non-zero value otherwise.
2380 int efx_try_recovery(struct efx_nic *efx)
2383 /* A PCI error can occur and not be seen by EEH because nothing
2384 * happens on the PCI bus. In this case the driver may fail and
2385 * schedule a 'recover or reset', leading to this recovery handler.
2386 * Manually call the eeh failure check function.
2388 struct eeh_dev *eehdev =
2389 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2391 if (eeh_dev_check_failure(eehdev)) {
2392 /* The EEH mechanisms will handle the error and reset the
2393 * device if necessary.
2401 static void efx_wait_for_bist_end(struct efx_nic *efx)
2405 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2406 if (efx_mcdi_poll_reboot(efx))
2408 msleep(BIST_WAIT_DELAY_MS);
2411 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2413 /* Either way unset the BIST flag. If we found no reboot we probably
2414 * won't recover, but we should try.
2416 efx->mc_bist_for_other_fn = false;
2419 /* The worker thread exists so that code that cannot sleep can
2420 * schedule a reset for later.
2422 static void efx_reset_work(struct work_struct *data)
2424 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2425 unsigned long pending;
2426 enum reset_type method;
2428 pending = ACCESS_ONCE(efx->reset_pending);
2429 method = fls(pending) - 1;
2431 if (method == RESET_TYPE_MC_BIST)
2432 efx_wait_for_bist_end(efx);
2434 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2435 method == RESET_TYPE_RECOVER_OR_ALL) &&
2436 efx_try_recovery(efx))
2444 /* We checked the state in efx_schedule_reset() but it may
2445 * have changed by now. Now that we have the RTNL lock,
2446 * it cannot change again.
2448 if (efx->state == STATE_READY)
2449 (void)efx_reset(efx, method);
2454 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2456 enum reset_type method;
2458 if (efx->state == STATE_RECOVERY) {
2459 netif_dbg(efx, drv, efx->net_dev,
2460 "recovering: skip scheduling %s reset\n",
2466 case RESET_TYPE_INVISIBLE:
2467 case RESET_TYPE_ALL:
2468 case RESET_TYPE_RECOVER_OR_ALL:
2469 case RESET_TYPE_WORLD:
2470 case RESET_TYPE_DISABLE:
2471 case RESET_TYPE_RECOVER_OR_DISABLE:
2472 case RESET_TYPE_MC_BIST:
2474 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2475 RESET_TYPE(method));
2478 method = efx->type->map_reset_reason(type);
2479 netif_dbg(efx, drv, efx->net_dev,
2480 "scheduling %s reset for %s\n",
2481 RESET_TYPE(method), RESET_TYPE(type));
2485 set_bit(method, &efx->reset_pending);
2486 smp_mb(); /* ensure we change reset_pending before checking state */
2488 /* If we're not READY then just leave the flags set as the cue
2489 * to abort probing or reschedule the reset later.
2491 if (ACCESS_ONCE(efx->state) != STATE_READY)
2494 /* efx_process_channel() will no longer read events once a
2495 * reset is scheduled. So switch back to poll'd MCDI completions. */
2496 efx_mcdi_mode_poll(efx);
2498 queue_work(reset_workqueue, &efx->reset_work);
2501 /**************************************************************************
2503 * List of NICs we support
2505 **************************************************************************/
2507 /* PCI device ID table */
2508 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2509 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2510 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2511 .driver_data = (unsigned long) &falcon_a1_nic_type},
2512 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2513 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2514 .driver_data = (unsigned long) &falcon_b0_nic_type},
2515 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2516 .driver_data = (unsigned long) &siena_a0_nic_type},
2517 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2518 .driver_data = (unsigned long) &siena_a0_nic_type},
2519 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2520 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2521 {0} /* end of list */
2524 /**************************************************************************
2526 * Dummy PHY/MAC operations
2528 * Can be used for some unimplemented operations
2529 * Needed so all function pointers are valid and do not have to be tested
2532 **************************************************************************/
2533 int efx_port_dummy_op_int(struct efx_nic *efx)
2537 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2539 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2544 static const struct efx_phy_operations efx_dummy_phy_operations = {
2545 .init = efx_port_dummy_op_int,
2546 .reconfigure = efx_port_dummy_op_int,
2547 .poll = efx_port_dummy_op_poll,
2548 .fini = efx_port_dummy_op_void,
2551 /**************************************************************************
2555 **************************************************************************/
2557 /* This zeroes out and then fills in the invariants in a struct
2558 * efx_nic (including all sub-structures).
2560 static int efx_init_struct(struct efx_nic *efx,
2561 struct pci_dev *pci_dev, struct net_device *net_dev)
2565 /* Initialise common structures */
2566 spin_lock_init(&efx->biu_lock);
2567 #ifdef CONFIG_SFC_MTD
2568 INIT_LIST_HEAD(&efx->mtd_list);
2570 INIT_WORK(&efx->reset_work, efx_reset_work);
2571 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2572 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2573 efx->pci_dev = pci_dev;
2574 efx->msg_enable = debug;
2575 efx->state = STATE_UNINIT;
2576 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2578 efx->net_dev = net_dev;
2579 efx->rx_prefix_size = efx->type->rx_prefix_size;
2581 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2582 efx->rx_packet_hash_offset =
2583 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2584 spin_lock_init(&efx->stats_lock);
2585 mutex_init(&efx->mac_lock);
2586 efx->phy_op = &efx_dummy_phy_operations;
2587 efx->mdio.dev = net_dev;
2588 INIT_WORK(&efx->mac_work, efx_mac_work);
2589 init_waitqueue_head(&efx->flush_wq);
2591 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2592 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2593 if (!efx->channel[i])
2595 efx->msi_context[i].efx = efx;
2596 efx->msi_context[i].index = i;
2599 /* Higher numbered interrupt modes are less capable! */
2600 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2603 /* Would be good to use the net_dev name, but we're too early */
2604 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2606 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2607 if (!efx->workqueue)
2613 efx_fini_struct(efx);
2617 static void efx_fini_struct(struct efx_nic *efx)
2621 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2622 kfree(efx->channel[i]);
2624 if (efx->workqueue) {
2625 destroy_workqueue(efx->workqueue);
2626 efx->workqueue = NULL;
2630 /**************************************************************************
2634 **************************************************************************/
2636 /* Main body of final NIC shutdown code
2637 * This is called only at module unload (or hotplug removal).
2639 static void efx_pci_remove_main(struct efx_nic *efx)
2641 /* Flush reset_work. It can no longer be scheduled since we
2644 BUG_ON(efx->state == STATE_READY);
2645 cancel_work_sync(&efx->reset_work);
2647 efx_disable_interrupts(efx);
2648 efx_nic_fini_interrupt(efx);
2650 efx->type->fini(efx);
2652 efx_remove_all(efx);
2655 /* Final NIC shutdown
2656 * This is called only at module unload (or hotplug removal).
2658 static void efx_pci_remove(struct pci_dev *pci_dev)
2660 struct efx_nic *efx;
2662 efx = pci_get_drvdata(pci_dev);
2666 /* Mark the NIC as fini, then stop the interface */
2668 dev_close(efx->net_dev);
2669 efx_disable_interrupts(efx);
2672 efx_sriov_fini(efx);
2673 efx_unregister_netdev(efx);
2675 efx_mtd_remove(efx);
2677 efx_pci_remove_main(efx);
2680 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2682 efx_fini_struct(efx);
2683 pci_set_drvdata(pci_dev, NULL);
2684 free_netdev(efx->net_dev);
2686 pci_disable_pcie_error_reporting(pci_dev);
2689 /* NIC VPD information
2690 * Called during probe to display the part number of the
2691 * installed NIC. VPD is potentially very large but this should
2692 * always appear within the first 512 bytes.
2694 #define SFC_VPD_LEN 512
2695 static void efx_print_product_vpd(struct efx_nic *efx)
2697 struct pci_dev *dev = efx->pci_dev;
2698 char vpd_data[SFC_VPD_LEN];
2702 /* Get the vpd data from the device */
2703 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2704 if (vpd_size <= 0) {
2705 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2709 /* Get the Read only section */
2710 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2712 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2716 j = pci_vpd_lrdt_size(&vpd_data[i]);
2717 i += PCI_VPD_LRDT_TAG_SIZE;
2718 if (i + j > vpd_size)
2721 /* Get the Part number */
2722 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2724 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2728 j = pci_vpd_info_field_size(&vpd_data[i]);
2729 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2730 if (i + j > vpd_size) {
2731 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2735 netif_info(efx, drv, efx->net_dev,
2736 "Part Number : %.*s\n", j, &vpd_data[i]);
2740 /* Main body of NIC initialisation
2741 * This is called at module load (or hotplug insertion, theoretically).
2743 static int efx_pci_probe_main(struct efx_nic *efx)
2747 /* Do start-of-day initialisation */
2748 rc = efx_probe_all(efx);
2754 rc = efx->type->init(efx);
2756 netif_err(efx, probe, efx->net_dev,
2757 "failed to initialise NIC\n");
2761 rc = efx_init_port(efx);
2763 netif_err(efx, probe, efx->net_dev,
2764 "failed to initialise port\n");
2768 rc = efx_nic_init_interrupt(efx);
2771 rc = efx_enable_interrupts(efx);
2778 efx_nic_fini_interrupt(efx);
2782 efx->type->fini(efx);
2785 efx_remove_all(efx);
2790 /* NIC initialisation
2792 * This is called at module load (or hotplug insertion,
2793 * theoretically). It sets up PCI mappings, resets the NIC,
2794 * sets up and registers the network devices with the kernel and hooks
2795 * the interrupt service routine. It does not prepare the device for
2796 * transmission; this is left to the first time one of the network
2797 * interfaces is brought up (i.e. efx_net_open).
2799 static int efx_pci_probe(struct pci_dev *pci_dev,
2800 const struct pci_device_id *entry)
2802 struct net_device *net_dev;
2803 struct efx_nic *efx;
2806 /* Allocate and initialise a struct net_device and struct efx_nic */
2807 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2811 efx = netdev_priv(net_dev);
2812 efx->type = (const struct efx_nic_type *) entry->driver_data;
2813 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2814 NETIF_F_HIGHDMA | NETIF_F_TSO |
2816 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2817 net_dev->features |= NETIF_F_TSO6;
2818 /* Mask for features that also apply to VLAN devices */
2819 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2820 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2822 /* All offloads can be toggled */
2823 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2824 pci_set_drvdata(pci_dev, efx);
2825 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2826 rc = efx_init_struct(efx, pci_dev, net_dev);
2830 netif_info(efx, probe, efx->net_dev,
2831 "Solarflare NIC detected\n");
2833 efx_print_product_vpd(efx);
2835 /* Set up basic I/O (BAR mappings etc) */
2836 rc = efx_init_io(efx);
2840 rc = efx_pci_probe_main(efx);
2844 rc = efx_register_netdev(efx);
2848 rc = efx_sriov_init(efx);
2850 netif_err(efx, probe, efx->net_dev,
2851 "SR-IOV can't be enabled rc %d\n", rc);
2853 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2855 /* Try to create MTDs, but allow this to fail */
2857 rc = efx_mtd_probe(efx);
2860 netif_warn(efx, probe, efx->net_dev,
2861 "failed to create MTDs (%d)\n", rc);
2863 rc = pci_enable_pcie_error_reporting(pci_dev);
2864 if (rc && rc != -EINVAL)
2865 netif_warn(efx, probe, efx->net_dev,
2866 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2871 efx_pci_remove_main(efx);
2875 efx_fini_struct(efx);
2877 pci_set_drvdata(pci_dev, NULL);
2879 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2880 free_netdev(net_dev);
2884 static int efx_pm_freeze(struct device *dev)
2886 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2890 if (efx->state != STATE_DISABLED) {
2891 efx->state = STATE_UNINIT;
2893 efx_device_detach_sync(efx);
2896 efx_disable_interrupts(efx);
2904 static int efx_pm_thaw(struct device *dev)
2907 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2911 if (efx->state != STATE_DISABLED) {
2912 rc = efx_enable_interrupts(efx);
2916 mutex_lock(&efx->mac_lock);
2917 efx->phy_op->reconfigure(efx);
2918 mutex_unlock(&efx->mac_lock);
2922 netif_device_attach(efx->net_dev);
2924 efx->state = STATE_READY;
2926 efx->type->resume_wol(efx);
2931 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2932 queue_work(reset_workqueue, &efx->reset_work);
2942 static int efx_pm_poweroff(struct device *dev)
2944 struct pci_dev *pci_dev = to_pci_dev(dev);
2945 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2947 efx->type->fini(efx);
2949 efx->reset_pending = 0;
2951 pci_save_state(pci_dev);
2952 return pci_set_power_state(pci_dev, PCI_D3hot);
2955 /* Used for both resume and restore */
2956 static int efx_pm_resume(struct device *dev)
2958 struct pci_dev *pci_dev = to_pci_dev(dev);
2959 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2962 rc = pci_set_power_state(pci_dev, PCI_D0);
2965 pci_restore_state(pci_dev);
2966 rc = pci_enable_device(pci_dev);
2969 pci_set_master(efx->pci_dev);
2970 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2973 rc = efx->type->init(efx);
2976 rc = efx_pm_thaw(dev);
2980 static int efx_pm_suspend(struct device *dev)
2985 rc = efx_pm_poweroff(dev);
2991 static const struct dev_pm_ops efx_pm_ops = {
2992 .suspend = efx_pm_suspend,
2993 .resume = efx_pm_resume,
2994 .freeze = efx_pm_freeze,
2995 .thaw = efx_pm_thaw,
2996 .poweroff = efx_pm_poweroff,
2997 .restore = efx_pm_resume,
3000 /* A PCI error affecting this device was detected.
3001 * At this point MMIO and DMA may be disabled.
3002 * Stop the software path and request a slot reset.
3004 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3005 enum pci_channel_state state)
3007 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3008 struct efx_nic *efx = pci_get_drvdata(pdev);
3010 if (state == pci_channel_io_perm_failure)
3011 return PCI_ERS_RESULT_DISCONNECT;
3015 if (efx->state != STATE_DISABLED) {
3016 efx->state = STATE_RECOVERY;
3017 efx->reset_pending = 0;
3019 efx_device_detach_sync(efx);
3022 efx_disable_interrupts(efx);
3024 status = PCI_ERS_RESULT_NEED_RESET;
3026 /* If the interface is disabled we don't want to do anything
3029 status = PCI_ERS_RESULT_RECOVERED;
3034 pci_disable_device(pdev);
3039 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
3040 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3042 struct efx_nic *efx = pci_get_drvdata(pdev);
3043 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3046 if (pci_enable_device(pdev)) {
3047 netif_err(efx, hw, efx->net_dev,
3048 "Cannot re-enable PCI device after reset.\n");
3049 status = PCI_ERS_RESULT_DISCONNECT;
3052 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3054 netif_err(efx, hw, efx->net_dev,
3055 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3056 /* Non-fatal error. Continue. */
3062 /* Perform the actual reset and resume I/O operations. */
3063 static void efx_io_resume(struct pci_dev *pdev)
3065 struct efx_nic *efx = pci_get_drvdata(pdev);
3070 if (efx->state == STATE_DISABLED)
3073 rc = efx_reset(efx, RESET_TYPE_ALL);
3075 netif_err(efx, hw, efx->net_dev,
3076 "efx_reset failed after PCI error (%d)\n", rc);
3078 efx->state = STATE_READY;
3079 netif_dbg(efx, hw, efx->net_dev,
3080 "Done resetting and resuming IO after PCI error.\n");
3087 /* For simplicity and reliability, we always require a slot reset and try to
3088 * reset the hardware when a pci error affecting the device is detected.
3089 * We leave both the link_reset and mmio_enabled callback unimplemented:
3090 * with our request for slot reset the mmio_enabled callback will never be
3091 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3093 static struct pci_error_handlers efx_err_handlers = {
3094 .error_detected = efx_io_error_detected,
3095 .slot_reset = efx_io_slot_reset,
3096 .resume = efx_io_resume,
3099 static struct pci_driver efx_pci_driver = {
3100 .name = KBUILD_MODNAME,
3101 .id_table = efx_pci_table,
3102 .probe = efx_pci_probe,
3103 .remove = efx_pci_remove,
3104 .driver.pm = &efx_pm_ops,
3105 .err_handler = &efx_err_handlers,
3108 /**************************************************************************
3110 * Kernel module interface
3112 *************************************************************************/
3114 module_param(interrupt_mode, uint, 0444);
3115 MODULE_PARM_DESC(interrupt_mode,
3116 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3118 static int __init efx_init_module(void)
3122 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3124 rc = register_netdevice_notifier(&efx_netdev_notifier);
3128 rc = efx_init_sriov();
3132 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3133 if (!reset_workqueue) {
3138 rc = pci_register_driver(&efx_pci_driver);
3145 destroy_workqueue(reset_workqueue);
3149 unregister_netdevice_notifier(&efx_netdev_notifier);
3154 static void __exit efx_exit_module(void)
3156 printk(KERN_INFO "Solarflare NET driver unloading\n");
3158 pci_unregister_driver(&efx_pci_driver);
3159 destroy_workqueue(reset_workqueue);
3161 unregister_netdevice_notifier(&efx_netdev_notifier);
3165 module_init(efx_init_module);
3166 module_exit(efx_exit_module);
3168 MODULE_AUTHOR("Solarflare Communications and "
3169 "Michael Brown <mbrown@fensystems.co.uk>");
3170 MODULE_DESCRIPTION("Solarflare Communications network driver");
3171 MODULE_LICENSE("GPL");
3172 MODULE_DEVICE_TABLE(pci, efx_pci_table);