1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 [RESET_TYPE_MC_BIST] = "MC_BIST",
89 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
90 * queued onto this work queue. This is not a per-nic work queue, because
91 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
93 static struct workqueue_struct *reset_workqueue;
95 /* How often and how many times to poll for a reset while waiting for a
96 * BIST that another function started to complete.
98 #define BIST_WAIT_DELAY_MS 100
99 #define BIST_WAIT_DELAY_COUNT 100
101 /**************************************************************************
103 * Configurable values
105 *************************************************************************/
108 * Use separate channels for TX and RX events
110 * Set this to 1 to use separate channels for TX and RX. It allows us
111 * to control interrupt affinity separately for TX and RX.
113 * This is only used in MSI-X interrupt mode
115 static bool separate_tx_channels;
116 module_param(separate_tx_channels, bool, 0444);
117 MODULE_PARM_DESC(separate_tx_channels,
118 "Use separate channels for TX and RX");
120 /* This is the weight assigned to each of the (per-channel) virtual
123 static int napi_weight = 64;
125 /* This is the time (in jiffies) between invocations of the hardware
127 * On Falcon-based NICs, this will:
128 * - Check the on-board hardware monitor;
129 * - Poll the link state and reconfigure the hardware as necessary.
130 * On Siena-based NICs for power systems with EEH support, this will give EEH a
133 static unsigned int efx_monitor_interval = 1 * HZ;
135 /* Initial interrupt moderation settings. They can be modified after
136 * module load with ethtool.
138 * The default for RX should strike a balance between increasing the
139 * round-trip latency and reducing overhead.
141 static unsigned int rx_irq_mod_usec = 60;
143 /* Initial interrupt moderation settings. They can be modified after
144 * module load with ethtool.
146 * This default is chosen to ensure that a 10G link does not go idle
147 * while a TX queue is stopped after it has become full. A queue is
148 * restarted when it drops below half full. The time this takes (assuming
149 * worst case 3 descriptors per packet and 1024 descriptors) is
150 * 512 / 3 * 1.2 = 205 usec.
152 static unsigned int tx_irq_mod_usec = 150;
154 /* This is the first interrupt mode to try out of:
159 static unsigned int interrupt_mode;
161 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
162 * i.e. the number of CPUs among which we may distribute simultaneous
163 * interrupt handling.
165 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
166 * The default (0) means to assign an interrupt to each core.
168 static unsigned int rss_cpus;
169 module_param(rss_cpus, uint, 0444);
170 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
172 static bool phy_flash_cfg;
173 module_param(phy_flash_cfg, bool, 0644);
174 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
176 static unsigned irq_adapt_low_thresh = 8000;
177 module_param(irq_adapt_low_thresh, uint, 0644);
178 MODULE_PARM_DESC(irq_adapt_low_thresh,
179 "Threshold score for reducing IRQ moderation");
181 static unsigned irq_adapt_high_thresh = 16000;
182 module_param(irq_adapt_high_thresh, uint, 0644);
183 MODULE_PARM_DESC(irq_adapt_high_thresh,
184 "Threshold score for increasing IRQ moderation");
186 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
187 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
188 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
189 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
190 module_param(debug, uint, 0);
191 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
193 /**************************************************************************
195 * Utility functions and prototypes
197 *************************************************************************/
199 static int efx_soft_enable_interrupts(struct efx_nic *efx);
200 static void efx_soft_disable_interrupts(struct efx_nic *efx);
201 static void efx_remove_channel(struct efx_channel *channel);
202 static void efx_remove_channels(struct efx_nic *efx);
203 static const struct efx_channel_type efx_default_channel_type;
204 static void efx_remove_port(struct efx_nic *efx);
205 static void efx_init_napi_channel(struct efx_channel *channel);
206 static void efx_fini_napi(struct efx_nic *efx);
207 static void efx_fini_napi_channel(struct efx_channel *channel);
208 static void efx_fini_struct(struct efx_nic *efx);
209 static void efx_start_all(struct efx_nic *efx);
210 static void efx_stop_all(struct efx_nic *efx);
212 #define EFX_ASSERT_RESET_SERIALISED(efx) \
214 if ((efx->state == STATE_READY) || \
215 (efx->state == STATE_RECOVERY) || \
216 (efx->state == STATE_DISABLED)) \
220 static int efx_check_disabled(struct efx_nic *efx)
222 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
223 netif_err(efx, drv, efx->net_dev,
224 "device is disabled due to earlier errors\n");
230 /**************************************************************************
232 * Event queue processing
234 *************************************************************************/
236 /* Process channel's event queue
238 * This function is responsible for processing the event queue of a
239 * single channel. The caller must guarantee that this function will
240 * never be concurrently called more than once on the same channel,
241 * though different channels may be being processed concurrently.
243 static int efx_process_channel(struct efx_channel *channel, int budget)
247 if (unlikely(!channel->enabled))
250 spent = efx_nic_process_eventq(channel, budget);
251 if (spent && efx_channel_has_rx_queue(channel)) {
252 struct efx_rx_queue *rx_queue =
253 efx_channel_get_rx_queue(channel);
255 efx_rx_flush_packet(channel);
256 efx_fast_push_rx_descriptors(rx_queue);
264 * NAPI guarantees serialisation of polls of the same device, which
265 * provides the guarantee required by efx_process_channel().
267 static int efx_poll(struct napi_struct *napi, int budget)
269 struct efx_channel *channel =
270 container_of(napi, struct efx_channel, napi_str);
271 struct efx_nic *efx = channel->efx;
274 netif_vdbg(efx, intr, efx->net_dev,
275 "channel %d NAPI poll executing on CPU %d\n",
276 channel->channel, raw_smp_processor_id());
278 spent = efx_process_channel(channel, budget);
280 if (spent < budget) {
281 if (efx_channel_has_rx_queue(channel) &&
282 efx->irq_rx_adaptive &&
283 unlikely(++channel->irq_count == 1000)) {
284 if (unlikely(channel->irq_mod_score <
285 irq_adapt_low_thresh)) {
286 if (channel->irq_moderation > 1) {
287 channel->irq_moderation -= 1;
288 efx->type->push_irq_moderation(channel);
290 } else if (unlikely(channel->irq_mod_score >
291 irq_adapt_high_thresh)) {
292 if (channel->irq_moderation <
293 efx->irq_rx_moderation) {
294 channel->irq_moderation += 1;
295 efx->type->push_irq_moderation(channel);
298 channel->irq_count = 0;
299 channel->irq_mod_score = 0;
302 efx_filter_rfs_expire(channel);
304 /* There is no race here; although napi_disable() will
305 * only wait for napi_complete(), this isn't a problem
306 * since efx_nic_eventq_read_ack() will have no effect if
307 * interrupts have already been disabled.
310 efx_nic_eventq_read_ack(channel);
316 /* Create event queue
317 * Event queue memory allocations are done only once. If the channel
318 * is reset, the memory buffer will be reused; this guards against
319 * errors during channel reset and also simplifies interrupt handling.
321 static int efx_probe_eventq(struct efx_channel *channel)
323 struct efx_nic *efx = channel->efx;
324 unsigned long entries;
326 netif_dbg(efx, probe, efx->net_dev,
327 "chan %d create event queue\n", channel->channel);
329 /* Build an event queue with room for one event per tx and rx buffer,
330 * plus some extra for link state events and MCDI completions. */
331 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
332 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
333 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
335 return efx_nic_probe_eventq(channel);
338 /* Prepare channel's event queue */
339 static int efx_init_eventq(struct efx_channel *channel)
341 struct efx_nic *efx = channel->efx;
344 EFX_WARN_ON_PARANOID(channel->eventq_init);
346 netif_dbg(efx, drv, efx->net_dev,
347 "chan %d init event queue\n", channel->channel);
349 rc = efx_nic_init_eventq(channel);
351 efx->type->push_irq_moderation(channel);
352 channel->eventq_read_ptr = 0;
353 channel->eventq_init = true;
358 /* Enable event queue processing and NAPI */
359 static void efx_start_eventq(struct efx_channel *channel)
361 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
362 "chan %d start event queue\n", channel->channel);
364 /* Make sure the NAPI handler sees the enabled flag set */
365 channel->enabled = true;
368 napi_enable(&channel->napi_str);
369 efx_nic_eventq_read_ack(channel);
372 /* Disable event queue processing and NAPI */
373 static void efx_stop_eventq(struct efx_channel *channel)
375 if (!channel->enabled)
378 napi_disable(&channel->napi_str);
379 channel->enabled = false;
382 static void efx_fini_eventq(struct efx_channel *channel)
384 if (!channel->eventq_init)
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d fini event queue\n", channel->channel);
390 efx_nic_fini_eventq(channel);
391 channel->eventq_init = false;
394 static void efx_remove_eventq(struct efx_channel *channel)
396 netif_dbg(channel->efx, drv, channel->efx->net_dev,
397 "chan %d remove event queue\n", channel->channel);
399 efx_nic_remove_eventq(channel);
402 /**************************************************************************
406 *************************************************************************/
408 /* Allocate and initialise a channel structure. */
409 static struct efx_channel *
410 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
412 struct efx_channel *channel;
413 struct efx_rx_queue *rx_queue;
414 struct efx_tx_queue *tx_queue;
417 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
422 channel->channel = i;
423 channel->type = &efx_default_channel_type;
425 for (j = 0; j < EFX_TXQ_TYPES; j++) {
426 tx_queue = &channel->tx_queue[j];
428 tx_queue->queue = i * EFX_TXQ_TYPES + j;
429 tx_queue->channel = channel;
432 rx_queue = &channel->rx_queue;
434 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
435 (unsigned long)rx_queue);
440 /* Allocate and initialise a channel structure, copying parameters
441 * (but not resources) from an old channel structure.
443 static struct efx_channel *
444 efx_copy_channel(const struct efx_channel *old_channel)
446 struct efx_channel *channel;
447 struct efx_rx_queue *rx_queue;
448 struct efx_tx_queue *tx_queue;
451 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
455 *channel = *old_channel;
457 channel->napi_dev = NULL;
458 memset(&channel->eventq, 0, sizeof(channel->eventq));
460 for (j = 0; j < EFX_TXQ_TYPES; j++) {
461 tx_queue = &channel->tx_queue[j];
462 if (tx_queue->channel)
463 tx_queue->channel = channel;
464 tx_queue->buffer = NULL;
465 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
468 rx_queue = &channel->rx_queue;
469 rx_queue->buffer = NULL;
470 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
477 static int efx_probe_channel(struct efx_channel *channel)
479 struct efx_tx_queue *tx_queue;
480 struct efx_rx_queue *rx_queue;
483 netif_dbg(channel->efx, probe, channel->efx->net_dev,
484 "creating channel %d\n", channel->channel);
486 rc = channel->type->pre_probe(channel);
490 rc = efx_probe_eventq(channel);
494 efx_for_each_channel_tx_queue(tx_queue, channel) {
495 rc = efx_probe_tx_queue(tx_queue);
500 efx_for_each_channel_rx_queue(rx_queue, channel) {
501 rc = efx_probe_rx_queue(rx_queue);
506 channel->n_rx_frm_trunc = 0;
511 efx_remove_channel(channel);
516 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
518 struct efx_nic *efx = channel->efx;
522 number = channel->channel;
523 if (efx->tx_channel_offset == 0) {
525 } else if (channel->channel < efx->tx_channel_offset) {
529 number -= efx->tx_channel_offset;
531 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
534 static void efx_set_channel_names(struct efx_nic *efx)
536 struct efx_channel *channel;
538 efx_for_each_channel(channel, efx)
539 channel->type->get_name(channel,
540 efx->msi_context[channel->channel].name,
541 sizeof(efx->msi_context[0].name));
544 static int efx_probe_channels(struct efx_nic *efx)
546 struct efx_channel *channel;
549 /* Restart special buffer allocation */
550 efx->next_buffer_table = 0;
552 /* Probe channels in reverse, so that any 'extra' channels
553 * use the start of the buffer table. This allows the traffic
554 * channels to be resized without moving them or wasting the
555 * entries before them.
557 efx_for_each_channel_rev(channel, efx) {
558 rc = efx_probe_channel(channel);
560 netif_err(efx, probe, efx->net_dev,
561 "failed to create channel %d\n",
566 efx_set_channel_names(efx);
571 efx_remove_channels(efx);
575 /* Channels are shutdown and reinitialised whilst the NIC is running
576 * to propagate configuration changes (mtu, checksum offload), or
577 * to clear hardware error conditions
579 static void efx_start_datapath(struct efx_nic *efx)
581 bool old_rx_scatter = efx->rx_scatter;
582 struct efx_tx_queue *tx_queue;
583 struct efx_rx_queue *rx_queue;
584 struct efx_channel *channel;
587 /* Calculate the rx buffer allocation parameters required to
588 * support the current MTU, including padding for header
589 * alignment and overruns.
591 efx->rx_dma_len = (efx->rx_prefix_size +
592 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
593 efx->type->rx_buffer_padding);
594 rx_buf_len = (sizeof(struct efx_rx_page_state) +
595 efx->rx_ip_align + efx->rx_dma_len);
596 if (rx_buf_len <= PAGE_SIZE) {
597 efx->rx_scatter = efx->type->always_rx_scatter;
598 efx->rx_buffer_order = 0;
599 } else if (efx->type->can_rx_scatter) {
600 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
601 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
602 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
603 EFX_RX_BUF_ALIGNMENT) >
605 efx->rx_scatter = true;
606 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
607 efx->rx_buffer_order = 0;
609 efx->rx_scatter = false;
610 efx->rx_buffer_order = get_order(rx_buf_len);
613 efx_rx_config_page_split(efx);
614 if (efx->rx_buffer_order)
615 netif_dbg(efx, drv, efx->net_dev,
616 "RX buf len=%u; page order=%u batch=%u\n",
617 efx->rx_dma_len, efx->rx_buffer_order,
618 efx->rx_pages_per_batch);
620 netif_dbg(efx, drv, efx->net_dev,
621 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
622 efx->rx_dma_len, efx->rx_page_buf_step,
623 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
625 /* RX filters may also have scatter-enabled flags */
626 if (efx->rx_scatter != old_rx_scatter)
627 efx->type->filter_update_rx_scatter(efx);
629 /* We must keep at least one descriptor in a TX ring empty.
630 * We could avoid this when the queue size does not exactly
631 * match the hardware ring size, but it's not that important.
632 * Therefore we stop the queue when one more skb might fill
633 * the ring completely. We wake it when half way back to
636 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
637 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
639 /* Initialise the channels */
640 efx_for_each_channel(channel, efx) {
641 efx_for_each_channel_tx_queue(tx_queue, channel) {
642 efx_init_tx_queue(tx_queue);
643 atomic_inc(&efx->active_queues);
646 efx_for_each_channel_rx_queue(rx_queue, channel) {
647 efx_init_rx_queue(rx_queue);
648 atomic_inc(&efx->active_queues);
649 efx_nic_generate_fill_event(rx_queue);
652 WARN_ON(channel->rx_pkt_n_frags);
655 efx_ptp_start_datapath(efx);
657 if (netif_device_present(efx->net_dev))
658 netif_tx_wake_all_queues(efx->net_dev);
661 static void efx_stop_datapath(struct efx_nic *efx)
663 struct efx_channel *channel;
664 struct efx_tx_queue *tx_queue;
665 struct efx_rx_queue *rx_queue;
668 EFX_ASSERT_RESET_SERIALISED(efx);
669 BUG_ON(efx->port_enabled);
671 efx_ptp_stop_datapath(efx);
674 efx_for_each_channel(channel, efx) {
675 efx_for_each_channel_rx_queue(rx_queue, channel)
676 rx_queue->refill_enabled = false;
679 efx_for_each_channel(channel, efx) {
680 /* RX packet processing is pipelined, so wait for the
681 * NAPI handler to complete. At least event queue 0
682 * might be kept active by non-data events, so don't
683 * use napi_synchronize() but actually disable NAPI
686 if (efx_channel_has_rx_queue(channel)) {
687 efx_stop_eventq(channel);
688 efx_start_eventq(channel);
692 rc = efx->type->fini_dmaq(efx);
693 if (rc && EFX_WORKAROUND_7803(efx)) {
694 /* Schedule a reset to recover from the flush failure. The
695 * descriptor caches reference memory we're about to free,
696 * but falcon_reconfigure_mac_wrapper() won't reconnect
697 * the MACs because of the pending reset.
699 netif_err(efx, drv, efx->net_dev,
700 "Resetting to recover from flush failure\n");
701 efx_schedule_reset(efx, RESET_TYPE_ALL);
703 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
705 netif_dbg(efx, drv, efx->net_dev,
706 "successfully flushed all queues\n");
709 efx_for_each_channel(channel, efx) {
710 efx_for_each_channel_rx_queue(rx_queue, channel)
711 efx_fini_rx_queue(rx_queue);
712 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
713 efx_fini_tx_queue(tx_queue);
717 static void efx_remove_channel(struct efx_channel *channel)
719 struct efx_tx_queue *tx_queue;
720 struct efx_rx_queue *rx_queue;
722 netif_dbg(channel->efx, drv, channel->efx->net_dev,
723 "destroy chan %d\n", channel->channel);
725 efx_for_each_channel_rx_queue(rx_queue, channel)
726 efx_remove_rx_queue(rx_queue);
727 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
728 efx_remove_tx_queue(tx_queue);
729 efx_remove_eventq(channel);
730 channel->type->post_remove(channel);
733 static void efx_remove_channels(struct efx_nic *efx)
735 struct efx_channel *channel;
737 efx_for_each_channel(channel, efx)
738 efx_remove_channel(channel);
742 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
744 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
745 u32 old_rxq_entries, old_txq_entries;
746 unsigned i, next_buffer_table = 0;
749 rc = efx_check_disabled(efx);
753 /* Not all channels should be reallocated. We must avoid
754 * reallocating their buffer table entries.
756 efx_for_each_channel(channel, efx) {
757 struct efx_rx_queue *rx_queue;
758 struct efx_tx_queue *tx_queue;
760 if (channel->type->copy)
762 next_buffer_table = max(next_buffer_table,
763 channel->eventq.index +
764 channel->eventq.entries);
765 efx_for_each_channel_rx_queue(rx_queue, channel)
766 next_buffer_table = max(next_buffer_table,
767 rx_queue->rxd.index +
768 rx_queue->rxd.entries);
769 efx_for_each_channel_tx_queue(tx_queue, channel)
770 next_buffer_table = max(next_buffer_table,
771 tx_queue->txd.index +
772 tx_queue->txd.entries);
775 efx_device_detach_sync(efx);
777 efx_soft_disable_interrupts(efx);
779 /* Clone channels (where possible) */
780 memset(other_channel, 0, sizeof(other_channel));
781 for (i = 0; i < efx->n_channels; i++) {
782 channel = efx->channel[i];
783 if (channel->type->copy)
784 channel = channel->type->copy(channel);
789 other_channel[i] = channel;
792 /* Swap entry counts and channel pointers */
793 old_rxq_entries = efx->rxq_entries;
794 old_txq_entries = efx->txq_entries;
795 efx->rxq_entries = rxq_entries;
796 efx->txq_entries = txq_entries;
797 for (i = 0; i < efx->n_channels; i++) {
798 channel = efx->channel[i];
799 efx->channel[i] = other_channel[i];
800 other_channel[i] = channel;
803 /* Restart buffer table allocation */
804 efx->next_buffer_table = next_buffer_table;
806 for (i = 0; i < efx->n_channels; i++) {
807 channel = efx->channel[i];
808 if (!channel->type->copy)
810 rc = efx_probe_channel(channel);
813 efx_init_napi_channel(efx->channel[i]);
817 /* Destroy unused channel structures */
818 for (i = 0; i < efx->n_channels; i++) {
819 channel = other_channel[i];
820 if (channel && channel->type->copy) {
821 efx_fini_napi_channel(channel);
822 efx_remove_channel(channel);
827 rc2 = efx_soft_enable_interrupts(efx);
830 netif_err(efx, drv, efx->net_dev,
831 "unable to restart interrupts on channel reallocation\n");
832 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
835 netif_device_attach(efx->net_dev);
841 efx->rxq_entries = old_rxq_entries;
842 efx->txq_entries = old_txq_entries;
843 for (i = 0; i < efx->n_channels; i++) {
844 channel = efx->channel[i];
845 efx->channel[i] = other_channel[i];
846 other_channel[i] = channel;
851 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
853 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
856 static const struct efx_channel_type efx_default_channel_type = {
857 .pre_probe = efx_channel_dummy_op_int,
858 .post_remove = efx_channel_dummy_op_void,
859 .get_name = efx_get_channel_name,
860 .copy = efx_copy_channel,
861 .keep_eventq = false,
864 int efx_channel_dummy_op_int(struct efx_channel *channel)
869 void efx_channel_dummy_op_void(struct efx_channel *channel)
873 /**************************************************************************
877 **************************************************************************/
879 /* This ensures that the kernel is kept informed (via
880 * netif_carrier_on/off) of the link status, and also maintains the
881 * link status's stop on the port's TX queue.
883 void efx_link_status_changed(struct efx_nic *efx)
885 struct efx_link_state *link_state = &efx->link_state;
887 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
888 * that no events are triggered between unregister_netdev() and the
889 * driver unloading. A more general condition is that NETDEV_CHANGE
890 * can only be generated between NETDEV_UP and NETDEV_DOWN */
891 if (!netif_running(efx->net_dev))
894 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
895 efx->n_link_state_changes++;
898 netif_carrier_on(efx->net_dev);
900 netif_carrier_off(efx->net_dev);
903 /* Status message for kernel log */
905 netif_info(efx, link, efx->net_dev,
906 "link up at %uMbps %s-duplex (MTU %d)\n",
907 link_state->speed, link_state->fd ? "full" : "half",
910 netif_info(efx, link, efx->net_dev, "link down\n");
913 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
915 efx->link_advertising = advertising;
917 if (advertising & ADVERTISED_Pause)
918 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
920 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
921 if (advertising & ADVERTISED_Asym_Pause)
922 efx->wanted_fc ^= EFX_FC_TX;
926 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
928 efx->wanted_fc = wanted_fc;
929 if (efx->link_advertising) {
930 if (wanted_fc & EFX_FC_RX)
931 efx->link_advertising |= (ADVERTISED_Pause |
932 ADVERTISED_Asym_Pause);
934 efx->link_advertising &= ~(ADVERTISED_Pause |
935 ADVERTISED_Asym_Pause);
936 if (wanted_fc & EFX_FC_TX)
937 efx->link_advertising ^= ADVERTISED_Asym_Pause;
941 static void efx_fini_port(struct efx_nic *efx);
943 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
944 * the MAC appropriately. All other PHY configuration changes are pushed
945 * through phy_op->set_settings(), and pushed asynchronously to the MAC
946 * through efx_monitor().
948 * Callers must hold the mac_lock
950 int __efx_reconfigure_port(struct efx_nic *efx)
952 enum efx_phy_mode phy_mode;
955 WARN_ON(!mutex_is_locked(&efx->mac_lock));
957 /* Disable PHY transmit in mac level loopbacks */
958 phy_mode = efx->phy_mode;
959 if (LOOPBACK_INTERNAL(efx))
960 efx->phy_mode |= PHY_MODE_TX_DISABLED;
962 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
964 rc = efx->type->reconfigure_port(efx);
967 efx->phy_mode = phy_mode;
972 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
974 int efx_reconfigure_port(struct efx_nic *efx)
978 EFX_ASSERT_RESET_SERIALISED(efx);
980 mutex_lock(&efx->mac_lock);
981 rc = __efx_reconfigure_port(efx);
982 mutex_unlock(&efx->mac_lock);
987 /* Asynchronous work item for changing MAC promiscuity and multicast
988 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
990 static void efx_mac_work(struct work_struct *data)
992 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
994 mutex_lock(&efx->mac_lock);
995 if (efx->port_enabled)
996 efx->type->reconfigure_mac(efx);
997 mutex_unlock(&efx->mac_lock);
1000 static int efx_probe_port(struct efx_nic *efx)
1004 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1007 efx->phy_mode = PHY_MODE_SPECIAL;
1009 /* Connect up MAC/PHY operations table */
1010 rc = efx->type->probe_port(efx);
1014 /* Initialise MAC address to permanent address */
1015 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1020 static int efx_init_port(struct efx_nic *efx)
1024 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1026 mutex_lock(&efx->mac_lock);
1028 rc = efx->phy_op->init(efx);
1032 efx->port_initialized = true;
1034 /* Reconfigure the MAC before creating dma queues (required for
1035 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1036 efx->type->reconfigure_mac(efx);
1038 /* Ensure the PHY advertises the correct flow control settings */
1039 rc = efx->phy_op->reconfigure(efx);
1043 mutex_unlock(&efx->mac_lock);
1047 efx->phy_op->fini(efx);
1049 mutex_unlock(&efx->mac_lock);
1053 static void efx_start_port(struct efx_nic *efx)
1055 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1056 BUG_ON(efx->port_enabled);
1058 mutex_lock(&efx->mac_lock);
1059 efx->port_enabled = true;
1061 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1062 * and then cancelled by efx_flush_all() */
1063 efx->type->reconfigure_mac(efx);
1065 mutex_unlock(&efx->mac_lock);
1068 /* Prevent efx_mac_work() and efx_monitor() from working */
1069 static void efx_stop_port(struct efx_nic *efx)
1071 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1073 mutex_lock(&efx->mac_lock);
1074 efx->port_enabled = false;
1075 mutex_unlock(&efx->mac_lock);
1077 /* Serialise against efx_set_multicast_list() */
1078 netif_addr_lock_bh(efx->net_dev);
1079 netif_addr_unlock_bh(efx->net_dev);
1082 static void efx_fini_port(struct efx_nic *efx)
1084 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1086 if (!efx->port_initialized)
1089 efx->phy_op->fini(efx);
1090 efx->port_initialized = false;
1092 efx->link_state.up = false;
1093 efx_link_status_changed(efx);
1096 static void efx_remove_port(struct efx_nic *efx)
1098 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1100 efx->type->remove_port(efx);
1103 /**************************************************************************
1107 **************************************************************************/
1109 /* This configures the PCI device to enable I/O and DMA. */
1110 static int efx_init_io(struct efx_nic *efx)
1112 struct pci_dev *pci_dev = efx->pci_dev;
1113 dma_addr_t dma_mask = efx->type->max_dma_mask;
1114 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1117 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1119 rc = pci_enable_device(pci_dev);
1121 netif_err(efx, probe, efx->net_dev,
1122 "failed to enable PCI device\n");
1126 pci_set_master(pci_dev);
1128 /* Set the PCI DMA mask. Try all possibilities from our
1129 * genuine mask down to 32 bits, because some architectures
1130 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1131 * masks event though they reject 46 bit masks.
1133 while (dma_mask > 0x7fffffffUL) {
1134 if (dma_supported(&pci_dev->dev, dma_mask)) {
1135 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1142 netif_err(efx, probe, efx->net_dev,
1143 "could not find a suitable DMA mask\n");
1146 netif_dbg(efx, probe, efx->net_dev,
1147 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1149 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1150 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1152 netif_err(efx, probe, efx->net_dev,
1153 "request for memory BAR failed\n");
1157 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1158 if (!efx->membase) {
1159 netif_err(efx, probe, efx->net_dev,
1160 "could not map memory BAR at %llx+%x\n",
1161 (unsigned long long)efx->membase_phys, mem_map_size);
1165 netif_dbg(efx, probe, efx->net_dev,
1166 "memory BAR at %llx+%x (virtual %p)\n",
1167 (unsigned long long)efx->membase_phys, mem_map_size,
1173 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1175 efx->membase_phys = 0;
1177 pci_disable_device(efx->pci_dev);
1182 static void efx_fini_io(struct efx_nic *efx)
1184 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1187 iounmap(efx->membase);
1188 efx->membase = NULL;
1191 if (efx->membase_phys) {
1192 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1193 efx->membase_phys = 0;
1196 pci_disable_device(efx->pci_dev);
1199 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1201 cpumask_var_t thread_mask;
1208 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1209 netif_warn(efx, probe, efx->net_dev,
1210 "RSS disabled due to allocation failure\n");
1215 for_each_online_cpu(cpu) {
1216 if (!cpumask_test_cpu(cpu, thread_mask)) {
1218 cpumask_or(thread_mask, thread_mask,
1219 topology_thread_cpumask(cpu));
1223 free_cpumask_var(thread_mask);
1226 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1227 * table entries that are inaccessible to VFs
1229 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1230 count > efx_vf_size(efx)) {
1231 netif_warn(efx, probe, efx->net_dev,
1232 "Reducing number of RSS channels from %u to %u for "
1233 "VF support. Increase vf-msix-limit to use more "
1234 "channels on the PF.\n",
1235 count, efx_vf_size(efx));
1236 count = efx_vf_size(efx);
1242 /* Probe the number and type of interrupts we are able to obtain, and
1243 * the resulting numbers of channels and RX queues.
1245 static int efx_probe_interrupts(struct efx_nic *efx)
1247 unsigned int extra_channels = 0;
1251 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1252 if (efx->extra_channel_type[i])
1255 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1256 struct msix_entry xentries[EFX_MAX_CHANNELS];
1257 unsigned int n_channels;
1259 n_channels = efx_wanted_parallelism(efx);
1260 if (separate_tx_channels)
1262 n_channels += extra_channels;
1263 n_channels = min(n_channels, efx->max_channels);
1265 for (i = 0; i < n_channels; i++)
1266 xentries[i].entry = i;
1267 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1269 netif_err(efx, drv, efx->net_dev,
1270 "WARNING: Insufficient MSI-X vectors"
1271 " available (%d < %u).\n", rc, n_channels);
1272 netif_err(efx, drv, efx->net_dev,
1273 "WARNING: Performance may be reduced.\n");
1274 EFX_BUG_ON_PARANOID(rc >= n_channels);
1276 rc = pci_enable_msix(efx->pci_dev, xentries,
1281 efx->n_channels = n_channels;
1282 if (n_channels > extra_channels)
1283 n_channels -= extra_channels;
1284 if (separate_tx_channels) {
1285 efx->n_tx_channels = max(n_channels / 2, 1U);
1286 efx->n_rx_channels = max(n_channels -
1290 efx->n_tx_channels = n_channels;
1291 efx->n_rx_channels = n_channels;
1293 for (i = 0; i < efx->n_channels; i++)
1294 efx_get_channel(efx, i)->irq =
1297 /* Fall back to single channel MSI */
1298 efx->interrupt_mode = EFX_INT_MODE_MSI;
1299 netif_err(efx, drv, efx->net_dev,
1300 "could not enable MSI-X\n");
1304 /* Try single interrupt MSI */
1305 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1306 efx->n_channels = 1;
1307 efx->n_rx_channels = 1;
1308 efx->n_tx_channels = 1;
1309 rc = pci_enable_msi(efx->pci_dev);
1311 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1313 netif_err(efx, drv, efx->net_dev,
1314 "could not enable MSI\n");
1315 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1319 /* Assume legacy interrupts */
1320 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1321 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1322 efx->n_rx_channels = 1;
1323 efx->n_tx_channels = 1;
1324 efx->legacy_irq = efx->pci_dev->irq;
1327 /* Assign extra channels if possible */
1328 j = efx->n_channels;
1329 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1330 if (!efx->extra_channel_type[i])
1332 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1333 efx->n_channels <= extra_channels) {
1334 efx->extra_channel_type[i]->handle_no_channel(efx);
1337 efx_get_channel(efx, j)->type =
1338 efx->extra_channel_type[i];
1342 /* RSS might be usable on VFs even if it is disabled on the PF */
1343 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1344 efx->n_rx_channels : efx_vf_size(efx));
1349 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1351 struct efx_channel *channel, *end_channel;
1354 BUG_ON(efx->state == STATE_DISABLED);
1356 efx->irq_soft_enabled = true;
1359 efx_for_each_channel(channel, efx) {
1360 if (!channel->type->keep_eventq) {
1361 rc = efx_init_eventq(channel);
1365 efx_start_eventq(channel);
1368 efx_mcdi_mode_event(efx);
1372 end_channel = channel;
1373 efx_for_each_channel(channel, efx) {
1374 if (channel == end_channel)
1376 efx_stop_eventq(channel);
1377 if (!channel->type->keep_eventq)
1378 efx_fini_eventq(channel);
1384 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1386 struct efx_channel *channel;
1388 if (efx->state == STATE_DISABLED)
1391 efx_mcdi_mode_poll(efx);
1393 efx->irq_soft_enabled = false;
1396 if (efx->legacy_irq)
1397 synchronize_irq(efx->legacy_irq);
1399 efx_for_each_channel(channel, efx) {
1401 synchronize_irq(channel->irq);
1403 efx_stop_eventq(channel);
1404 if (!channel->type->keep_eventq)
1405 efx_fini_eventq(channel);
1408 /* Flush the asynchronous MCDI request queue */
1409 efx_mcdi_flush_async(efx);
1412 static int efx_enable_interrupts(struct efx_nic *efx)
1414 struct efx_channel *channel, *end_channel;
1417 BUG_ON(efx->state == STATE_DISABLED);
1419 if (efx->eeh_disabled_legacy_irq) {
1420 enable_irq(efx->legacy_irq);
1421 efx->eeh_disabled_legacy_irq = false;
1424 efx->type->irq_enable_master(efx);
1426 efx_for_each_channel(channel, efx) {
1427 if (channel->type->keep_eventq) {
1428 rc = efx_init_eventq(channel);
1434 rc = efx_soft_enable_interrupts(efx);
1441 end_channel = channel;
1442 efx_for_each_channel(channel, efx) {
1443 if (channel == end_channel)
1445 if (channel->type->keep_eventq)
1446 efx_fini_eventq(channel);
1449 efx->type->irq_disable_non_ev(efx);
1454 static void efx_disable_interrupts(struct efx_nic *efx)
1456 struct efx_channel *channel;
1458 efx_soft_disable_interrupts(efx);
1460 efx_for_each_channel(channel, efx) {
1461 if (channel->type->keep_eventq)
1462 efx_fini_eventq(channel);
1465 efx->type->irq_disable_non_ev(efx);
1468 static void efx_remove_interrupts(struct efx_nic *efx)
1470 struct efx_channel *channel;
1472 /* Remove MSI/MSI-X interrupts */
1473 efx_for_each_channel(channel, efx)
1475 pci_disable_msi(efx->pci_dev);
1476 pci_disable_msix(efx->pci_dev);
1478 /* Remove legacy interrupt */
1479 efx->legacy_irq = 0;
1482 static void efx_set_channels(struct efx_nic *efx)
1484 struct efx_channel *channel;
1485 struct efx_tx_queue *tx_queue;
1487 efx->tx_channel_offset =
1488 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1490 /* We need to mark which channels really have RX and TX
1491 * queues, and adjust the TX queue numbers if we have separate
1492 * RX-only and TX-only channels.
1494 efx_for_each_channel(channel, efx) {
1495 if (channel->channel < efx->n_rx_channels)
1496 channel->rx_queue.core_index = channel->channel;
1498 channel->rx_queue.core_index = -1;
1500 efx_for_each_channel_tx_queue(tx_queue, channel)
1501 tx_queue->queue -= (efx->tx_channel_offset *
1506 static int efx_probe_nic(struct efx_nic *efx)
1511 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1513 /* Carry out hardware-type specific initialisation */
1514 rc = efx->type->probe(efx);
1518 /* Determine the number of channels and queues by trying to hook
1519 * in MSI-X interrupts. */
1520 rc = efx_probe_interrupts(efx);
1524 rc = efx->type->dimension_resources(efx);
1528 if (efx->n_channels > 1)
1529 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1530 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1531 efx->rx_indir_table[i] =
1532 ethtool_rxfh_indir_default(i, efx->rss_spread);
1534 efx_set_channels(efx);
1535 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1536 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1538 /* Initialise the interrupt moderation settings */
1539 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1545 efx_remove_interrupts(efx);
1547 efx->type->remove(efx);
1551 static void efx_remove_nic(struct efx_nic *efx)
1553 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1555 efx_remove_interrupts(efx);
1556 efx->type->remove(efx);
1559 static int efx_probe_filters(struct efx_nic *efx)
1563 spin_lock_init(&efx->filter_lock);
1565 rc = efx->type->filter_table_probe(efx);
1569 #ifdef CONFIG_RFS_ACCEL
1570 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1571 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1572 sizeof(*efx->rps_flow_id),
1574 if (!efx->rps_flow_id) {
1575 efx->type->filter_table_remove(efx);
1584 static void efx_remove_filters(struct efx_nic *efx)
1586 #ifdef CONFIG_RFS_ACCEL
1587 kfree(efx->rps_flow_id);
1589 efx->type->filter_table_remove(efx);
1592 static void efx_restore_filters(struct efx_nic *efx)
1594 efx->type->filter_table_restore(efx);
1597 /**************************************************************************
1599 * NIC startup/shutdown
1601 *************************************************************************/
1603 static int efx_probe_all(struct efx_nic *efx)
1607 rc = efx_probe_nic(efx);
1609 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1613 rc = efx_probe_port(efx);
1615 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1619 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1620 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1624 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1626 rc = efx_probe_filters(efx);
1628 netif_err(efx, probe, efx->net_dev,
1629 "failed to create filter tables\n");
1633 rc = efx_probe_channels(efx);
1640 efx_remove_filters(efx);
1642 efx_remove_port(efx);
1644 efx_remove_nic(efx);
1649 /* If the interface is supposed to be running but is not, start
1650 * the hardware and software data path, regular activity for the port
1651 * (MAC statistics, link polling, etc.) and schedule the port to be
1652 * reconfigured. Interrupts must already be enabled. This function
1653 * is safe to call multiple times, so long as the NIC is not disabled.
1654 * Requires the RTNL lock.
1656 static void efx_start_all(struct efx_nic *efx)
1658 EFX_ASSERT_RESET_SERIALISED(efx);
1659 BUG_ON(efx->state == STATE_DISABLED);
1661 /* Check that it is appropriate to restart the interface. All
1662 * of these flags are safe to read under just the rtnl lock */
1663 if (efx->port_enabled || !netif_running(efx->net_dev))
1666 efx_start_port(efx);
1667 efx_start_datapath(efx);
1669 /* Start the hardware monitor if there is one */
1670 if (efx->type->monitor != NULL)
1671 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1672 efx_monitor_interval);
1674 /* If link state detection is normally event-driven, we have
1675 * to poll now because we could have missed a change
1677 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1678 mutex_lock(&efx->mac_lock);
1679 if (efx->phy_op->poll(efx))
1680 efx_link_status_changed(efx);
1681 mutex_unlock(&efx->mac_lock);
1684 efx->type->start_stats(efx);
1687 /* Flush all delayed work. Should only be called when no more delayed work
1688 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1689 * since we're holding the rtnl_lock at this point. */
1690 static void efx_flush_all(struct efx_nic *efx)
1692 /* Make sure the hardware monitor and event self-test are stopped */
1693 cancel_delayed_work_sync(&efx->monitor_work);
1694 efx_selftest_async_cancel(efx);
1695 /* Stop scheduled port reconfigurations */
1696 cancel_work_sync(&efx->mac_work);
1699 /* Quiesce the hardware and software data path, and regular activity
1700 * for the port without bringing the link down. Safe to call multiple
1701 * times with the NIC in almost any state, but interrupts should be
1702 * enabled. Requires the RTNL lock.
1704 static void efx_stop_all(struct efx_nic *efx)
1706 EFX_ASSERT_RESET_SERIALISED(efx);
1708 /* port_enabled can be read safely under the rtnl lock */
1709 if (!efx->port_enabled)
1712 efx->type->stop_stats(efx);
1715 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1718 /* Stop the kernel transmit interface. This is only valid if
1719 * the device is stopped or detached; otherwise the watchdog
1720 * may fire immediately.
1722 WARN_ON(netif_running(efx->net_dev) &&
1723 netif_device_present(efx->net_dev));
1724 netif_tx_disable(efx->net_dev);
1726 efx_stop_datapath(efx);
1729 static void efx_remove_all(struct efx_nic *efx)
1731 efx_remove_channels(efx);
1732 efx_remove_filters(efx);
1733 efx_remove_port(efx);
1734 efx_remove_nic(efx);
1737 /**************************************************************************
1739 * Interrupt moderation
1741 **************************************************************************/
1743 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1747 if (usecs * 1000 < quantum_ns)
1748 return 1; /* never round down to 0 */
1749 return usecs * 1000 / quantum_ns;
1752 /* Set interrupt moderation parameters */
1753 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1754 unsigned int rx_usecs, bool rx_adaptive,
1755 bool rx_may_override_tx)
1757 struct efx_channel *channel;
1758 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1759 efx->timer_quantum_ns,
1761 unsigned int tx_ticks;
1762 unsigned int rx_ticks;
1764 EFX_ASSERT_RESET_SERIALISED(efx);
1766 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1769 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1770 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1772 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1773 !rx_may_override_tx) {
1774 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1775 "RX and TX IRQ moderation must be equal\n");
1779 efx->irq_rx_adaptive = rx_adaptive;
1780 efx->irq_rx_moderation = rx_ticks;
1781 efx_for_each_channel(channel, efx) {
1782 if (efx_channel_has_rx_queue(channel))
1783 channel->irq_moderation = rx_ticks;
1784 else if (efx_channel_has_tx_queues(channel))
1785 channel->irq_moderation = tx_ticks;
1791 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1792 unsigned int *rx_usecs, bool *rx_adaptive)
1794 /* We must round up when converting ticks to microseconds
1795 * because we round down when converting the other way.
1798 *rx_adaptive = efx->irq_rx_adaptive;
1799 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1800 efx->timer_quantum_ns,
1803 /* If channels are shared between RX and TX, so is IRQ
1804 * moderation. Otherwise, IRQ moderation is the same for all
1805 * TX channels and is not adaptive.
1807 if (efx->tx_channel_offset == 0)
1808 *tx_usecs = *rx_usecs;
1810 *tx_usecs = DIV_ROUND_UP(
1811 efx->channel[efx->tx_channel_offset]->irq_moderation *
1812 efx->timer_quantum_ns,
1816 /**************************************************************************
1820 **************************************************************************/
1822 /* Run periodically off the general workqueue */
1823 static void efx_monitor(struct work_struct *data)
1825 struct efx_nic *efx = container_of(data, struct efx_nic,
1828 netif_vdbg(efx, timer, efx->net_dev,
1829 "hardware monitor executing on CPU %d\n",
1830 raw_smp_processor_id());
1831 BUG_ON(efx->type->monitor == NULL);
1833 /* If the mac_lock is already held then it is likely a port
1834 * reconfiguration is already in place, which will likely do
1835 * most of the work of monitor() anyway. */
1836 if (mutex_trylock(&efx->mac_lock)) {
1837 if (efx->port_enabled)
1838 efx->type->monitor(efx);
1839 mutex_unlock(&efx->mac_lock);
1842 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1843 efx_monitor_interval);
1846 /**************************************************************************
1850 *************************************************************************/
1853 * Context: process, rtnl_lock() held.
1855 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1857 struct efx_nic *efx = netdev_priv(net_dev);
1858 struct mii_ioctl_data *data = if_mii(ifr);
1860 if (cmd == SIOCSHWTSTAMP)
1861 return efx_ptp_set_ts_config(efx, ifr);
1862 if (cmd == SIOCGHWTSTAMP)
1863 return efx_ptp_get_ts_config(efx, ifr);
1865 /* Convert phy_id from older PRTAD/DEVAD format */
1866 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1867 (data->phy_id & 0xfc00) == 0x0400)
1868 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1870 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1873 /**************************************************************************
1877 **************************************************************************/
1879 static void efx_init_napi_channel(struct efx_channel *channel)
1881 struct efx_nic *efx = channel->efx;
1883 channel->napi_dev = efx->net_dev;
1884 netif_napi_add(channel->napi_dev, &channel->napi_str,
1885 efx_poll, napi_weight);
1888 static void efx_init_napi(struct efx_nic *efx)
1890 struct efx_channel *channel;
1892 efx_for_each_channel(channel, efx)
1893 efx_init_napi_channel(channel);
1896 static void efx_fini_napi_channel(struct efx_channel *channel)
1898 if (channel->napi_dev)
1899 netif_napi_del(&channel->napi_str);
1900 channel->napi_dev = NULL;
1903 static void efx_fini_napi(struct efx_nic *efx)
1905 struct efx_channel *channel;
1907 efx_for_each_channel(channel, efx)
1908 efx_fini_napi_channel(channel);
1911 /**************************************************************************
1913 * Kernel netpoll interface
1915 *************************************************************************/
1917 #ifdef CONFIG_NET_POLL_CONTROLLER
1919 /* Although in the common case interrupts will be disabled, this is not
1920 * guaranteed. However, all our work happens inside the NAPI callback,
1921 * so no locking is required.
1923 static void efx_netpoll(struct net_device *net_dev)
1925 struct efx_nic *efx = netdev_priv(net_dev);
1926 struct efx_channel *channel;
1928 efx_for_each_channel(channel, efx)
1929 efx_schedule_channel(channel);
1934 /**************************************************************************
1936 * Kernel net device interface
1938 *************************************************************************/
1940 /* Context: process, rtnl_lock() held. */
1941 static int efx_net_open(struct net_device *net_dev)
1943 struct efx_nic *efx = netdev_priv(net_dev);
1946 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1947 raw_smp_processor_id());
1949 rc = efx_check_disabled(efx);
1952 if (efx->phy_mode & PHY_MODE_SPECIAL)
1954 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1957 /* Notify the kernel of the link state polled during driver load,
1958 * before the monitor starts running */
1959 efx_link_status_changed(efx);
1962 efx_selftest_async_start(efx);
1966 /* Context: process, rtnl_lock() held.
1967 * Note that the kernel will ignore our return code; this method
1968 * should really be a void.
1970 static int efx_net_stop(struct net_device *net_dev)
1972 struct efx_nic *efx = netdev_priv(net_dev);
1974 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1975 raw_smp_processor_id());
1977 /* Stop the device and flush all the channels */
1983 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1984 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1985 struct rtnl_link_stats64 *stats)
1987 struct efx_nic *efx = netdev_priv(net_dev);
1989 spin_lock_bh(&efx->stats_lock);
1990 efx->type->update_stats(efx, NULL, stats);
1991 spin_unlock_bh(&efx->stats_lock);
1996 /* Context: netif_tx_lock held, BHs disabled. */
1997 static void efx_watchdog(struct net_device *net_dev)
1999 struct efx_nic *efx = netdev_priv(net_dev);
2001 netif_err(efx, tx_err, efx->net_dev,
2002 "TX stuck with port_enabled=%d: resetting channels\n",
2005 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2009 /* Context: process, rtnl_lock() held. */
2010 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2012 struct efx_nic *efx = netdev_priv(net_dev);
2015 rc = efx_check_disabled(efx);
2018 if (new_mtu > EFX_MAX_MTU)
2021 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2023 efx_device_detach_sync(efx);
2026 mutex_lock(&efx->mac_lock);
2027 net_dev->mtu = new_mtu;
2028 efx->type->reconfigure_mac(efx);
2029 mutex_unlock(&efx->mac_lock);
2032 netif_device_attach(efx->net_dev);
2036 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2038 struct efx_nic *efx = netdev_priv(net_dev);
2039 struct sockaddr *addr = data;
2040 char *new_addr = addr->sa_data;
2042 if (!is_valid_ether_addr(new_addr)) {
2043 netif_err(efx, drv, efx->net_dev,
2044 "invalid ethernet MAC address requested: %pM\n",
2046 return -EADDRNOTAVAIL;
2049 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2050 efx_sriov_mac_address_changed(efx);
2052 /* Reconfigure the MAC */
2053 mutex_lock(&efx->mac_lock);
2054 efx->type->reconfigure_mac(efx);
2055 mutex_unlock(&efx->mac_lock);
2060 /* Context: netif_addr_lock held, BHs disabled. */
2061 static void efx_set_rx_mode(struct net_device *net_dev)
2063 struct efx_nic *efx = netdev_priv(net_dev);
2065 if (efx->port_enabled)
2066 queue_work(efx->workqueue, &efx->mac_work);
2067 /* Otherwise efx_start_port() will do this */
2070 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2072 struct efx_nic *efx = netdev_priv(net_dev);
2074 /* If disabling RX n-tuple filtering, clear existing filters */
2075 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2076 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2081 static const struct net_device_ops efx_farch_netdev_ops = {
2082 .ndo_open = efx_net_open,
2083 .ndo_stop = efx_net_stop,
2084 .ndo_get_stats64 = efx_net_stats,
2085 .ndo_tx_timeout = efx_watchdog,
2086 .ndo_start_xmit = efx_hard_start_xmit,
2087 .ndo_validate_addr = eth_validate_addr,
2088 .ndo_do_ioctl = efx_ioctl,
2089 .ndo_change_mtu = efx_change_mtu,
2090 .ndo_set_mac_address = efx_set_mac_address,
2091 .ndo_set_rx_mode = efx_set_rx_mode,
2092 .ndo_set_features = efx_set_features,
2093 #ifdef CONFIG_SFC_SRIOV
2094 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2095 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2096 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2097 .ndo_get_vf_config = efx_sriov_get_vf_config,
2099 #ifdef CONFIG_NET_POLL_CONTROLLER
2100 .ndo_poll_controller = efx_netpoll,
2102 .ndo_setup_tc = efx_setup_tc,
2103 #ifdef CONFIG_RFS_ACCEL
2104 .ndo_rx_flow_steer = efx_filter_rfs,
2108 static const struct net_device_ops efx_ef10_netdev_ops = {
2109 .ndo_open = efx_net_open,
2110 .ndo_stop = efx_net_stop,
2111 .ndo_get_stats64 = efx_net_stats,
2112 .ndo_tx_timeout = efx_watchdog,
2113 .ndo_start_xmit = efx_hard_start_xmit,
2114 .ndo_validate_addr = eth_validate_addr,
2115 .ndo_do_ioctl = efx_ioctl,
2116 .ndo_change_mtu = efx_change_mtu,
2117 .ndo_set_mac_address = efx_set_mac_address,
2118 .ndo_set_rx_mode = efx_set_rx_mode,
2119 .ndo_set_features = efx_set_features,
2120 #ifdef CONFIG_NET_POLL_CONTROLLER
2121 .ndo_poll_controller = efx_netpoll,
2123 #ifdef CONFIG_RFS_ACCEL
2124 .ndo_rx_flow_steer = efx_filter_rfs,
2128 static void efx_update_name(struct efx_nic *efx)
2130 strcpy(efx->name, efx->net_dev->name);
2131 efx_mtd_rename(efx);
2132 efx_set_channel_names(efx);
2135 static int efx_netdev_event(struct notifier_block *this,
2136 unsigned long event, void *ptr)
2138 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2140 if ((net_dev->netdev_ops == &efx_farch_netdev_ops ||
2141 net_dev->netdev_ops == &efx_ef10_netdev_ops) &&
2142 event == NETDEV_CHANGENAME)
2143 efx_update_name(netdev_priv(net_dev));
2148 static struct notifier_block efx_netdev_notifier = {
2149 .notifier_call = efx_netdev_event,
2153 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2155 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2156 return sprintf(buf, "%d\n", efx->phy_type);
2158 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2160 static int efx_register_netdev(struct efx_nic *efx)
2162 struct net_device *net_dev = efx->net_dev;
2163 struct efx_channel *channel;
2166 net_dev->watchdog_timeo = 5 * HZ;
2167 net_dev->irq = efx->pci_dev->irq;
2168 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
2169 net_dev->netdev_ops = &efx_ef10_netdev_ops;
2170 net_dev->priv_flags |= IFF_UNICAST_FLT;
2172 net_dev->netdev_ops = &efx_farch_netdev_ops;
2174 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2175 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2179 /* Enable resets to be scheduled and check whether any were
2180 * already requested. If so, the NIC is probably hosed so we
2183 efx->state = STATE_READY;
2184 smp_mb(); /* ensure we change state before checking reset_pending */
2185 if (efx->reset_pending) {
2186 netif_err(efx, probe, efx->net_dev,
2187 "aborting probe due to scheduled reset\n");
2192 rc = dev_alloc_name(net_dev, net_dev->name);
2195 efx_update_name(efx);
2197 /* Always start with carrier off; PHY events will detect the link */
2198 netif_carrier_off(net_dev);
2200 rc = register_netdevice(net_dev);
2204 efx_for_each_channel(channel, efx) {
2205 struct efx_tx_queue *tx_queue;
2206 efx_for_each_channel_tx_queue(tx_queue, channel)
2207 efx_init_tx_queue_core_txq(tx_queue);
2212 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2214 netif_err(efx, drv, efx->net_dev,
2215 "failed to init net dev attributes\n");
2216 goto fail_registered;
2223 unregister_netdevice(net_dev);
2225 efx->state = STATE_UNINIT;
2227 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2231 static void efx_unregister_netdev(struct efx_nic *efx)
2236 BUG_ON(netdev_priv(efx->net_dev) != efx);
2238 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2239 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2242 unregister_netdevice(efx->net_dev);
2243 efx->state = STATE_UNINIT;
2247 /**************************************************************************
2249 * Device reset and suspend
2251 **************************************************************************/
2253 /* Tears down the entire software state and most of the hardware state
2255 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2257 EFX_ASSERT_RESET_SERIALISED(efx);
2260 efx_disable_interrupts(efx);
2262 mutex_lock(&efx->mac_lock);
2263 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2264 efx->phy_op->fini(efx);
2265 efx->type->fini(efx);
2268 /* This function will always ensure that the locks acquired in
2269 * efx_reset_down() are released. A failure return code indicates
2270 * that we were unable to reinitialise the hardware, and the
2271 * driver should be disabled. If ok is false, then the rx and tx
2272 * engines are not restarted, pending a RESET_DISABLE. */
2273 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2277 EFX_ASSERT_RESET_SERIALISED(efx);
2279 rc = efx->type->init(efx);
2281 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2288 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2289 rc = efx->phy_op->init(efx);
2292 if (efx->phy_op->reconfigure(efx))
2293 netif_err(efx, drv, efx->net_dev,
2294 "could not restore PHY settings\n");
2297 rc = efx_enable_interrupts(efx);
2300 efx_restore_filters(efx);
2301 efx_sriov_reset(efx);
2303 mutex_unlock(&efx->mac_lock);
2310 efx->port_initialized = false;
2312 mutex_unlock(&efx->mac_lock);
2317 /* Reset the NIC using the specified method. Note that the reset may
2318 * fail, in which case the card will be left in an unusable state.
2320 * Caller must hold the rtnl_lock.
2322 int efx_reset(struct efx_nic *efx, enum reset_type method)
2327 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2328 RESET_TYPE(method));
2330 efx_device_detach_sync(efx);
2331 efx_reset_down(efx, method);
2333 rc = efx->type->reset(efx, method);
2335 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2339 /* Clear flags for the scopes we covered. We assume the NIC and
2340 * driver are now quiescent so that there is no race here.
2342 efx->reset_pending &= -(1 << (method + 1));
2344 /* Reinitialise bus-mastering, which may have been turned off before
2345 * the reset was scheduled. This is still appropriate, even in the
2346 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2347 * can respond to requests. */
2348 pci_set_master(efx->pci_dev);
2351 /* Leave device stopped if necessary */
2353 method == RESET_TYPE_DISABLE ||
2354 method == RESET_TYPE_RECOVER_OR_DISABLE;
2355 rc2 = efx_reset_up(efx, method, !disabled);
2363 dev_close(efx->net_dev);
2364 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2365 efx->state = STATE_DISABLED;
2367 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2368 netif_device_attach(efx->net_dev);
2373 /* Try recovery mechanisms.
2374 * For now only EEH is supported.
2375 * Returns 0 if the recovery mechanisms are unsuccessful.
2376 * Returns a non-zero value otherwise.
2378 int efx_try_recovery(struct efx_nic *efx)
2381 /* A PCI error can occur and not be seen by EEH because nothing
2382 * happens on the PCI bus. In this case the driver may fail and
2383 * schedule a 'recover or reset', leading to this recovery handler.
2384 * Manually call the eeh failure check function.
2386 struct eeh_dev *eehdev =
2387 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2389 if (eeh_dev_check_failure(eehdev)) {
2390 /* The EEH mechanisms will handle the error and reset the
2391 * device if necessary.
2399 static void efx_wait_for_bist_end(struct efx_nic *efx)
2403 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2404 if (efx_mcdi_poll_reboot(efx))
2406 msleep(BIST_WAIT_DELAY_MS);
2409 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2411 /* Either way unset the BIST flag. If we found no reboot we probably
2412 * won't recover, but we should try.
2414 efx->mc_bist_for_other_fn = false;
2417 /* The worker thread exists so that code that cannot sleep can
2418 * schedule a reset for later.
2420 static void efx_reset_work(struct work_struct *data)
2422 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2423 unsigned long pending;
2424 enum reset_type method;
2426 pending = ACCESS_ONCE(efx->reset_pending);
2427 method = fls(pending) - 1;
2429 if (method == RESET_TYPE_MC_BIST)
2430 efx_wait_for_bist_end(efx);
2432 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2433 method == RESET_TYPE_RECOVER_OR_ALL) &&
2434 efx_try_recovery(efx))
2442 /* We checked the state in efx_schedule_reset() but it may
2443 * have changed by now. Now that we have the RTNL lock,
2444 * it cannot change again.
2446 if (efx->state == STATE_READY)
2447 (void)efx_reset(efx, method);
2452 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2454 enum reset_type method;
2456 if (efx->state == STATE_RECOVERY) {
2457 netif_dbg(efx, drv, efx->net_dev,
2458 "recovering: skip scheduling %s reset\n",
2464 case RESET_TYPE_INVISIBLE:
2465 case RESET_TYPE_ALL:
2466 case RESET_TYPE_RECOVER_OR_ALL:
2467 case RESET_TYPE_WORLD:
2468 case RESET_TYPE_DISABLE:
2469 case RESET_TYPE_RECOVER_OR_DISABLE:
2470 case RESET_TYPE_MC_BIST:
2472 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2473 RESET_TYPE(method));
2476 method = efx->type->map_reset_reason(type);
2477 netif_dbg(efx, drv, efx->net_dev,
2478 "scheduling %s reset for %s\n",
2479 RESET_TYPE(method), RESET_TYPE(type));
2483 set_bit(method, &efx->reset_pending);
2484 smp_mb(); /* ensure we change reset_pending before checking state */
2486 /* If we're not READY then just leave the flags set as the cue
2487 * to abort probing or reschedule the reset later.
2489 if (ACCESS_ONCE(efx->state) != STATE_READY)
2492 /* efx_process_channel() will no longer read events once a
2493 * reset is scheduled. So switch back to poll'd MCDI completions. */
2494 efx_mcdi_mode_poll(efx);
2496 queue_work(reset_workqueue, &efx->reset_work);
2499 /**************************************************************************
2501 * List of NICs we support
2503 **************************************************************************/
2505 /* PCI device ID table */
2506 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2507 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2508 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2509 .driver_data = (unsigned long) &falcon_a1_nic_type},
2510 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2511 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2512 .driver_data = (unsigned long) &falcon_b0_nic_type},
2513 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2514 .driver_data = (unsigned long) &siena_a0_nic_type},
2515 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2516 .driver_data = (unsigned long) &siena_a0_nic_type},
2517 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2518 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2519 {0} /* end of list */
2522 /**************************************************************************
2524 * Dummy PHY/MAC operations
2526 * Can be used for some unimplemented operations
2527 * Needed so all function pointers are valid and do not have to be tested
2530 **************************************************************************/
2531 int efx_port_dummy_op_int(struct efx_nic *efx)
2535 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2537 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2542 static const struct efx_phy_operations efx_dummy_phy_operations = {
2543 .init = efx_port_dummy_op_int,
2544 .reconfigure = efx_port_dummy_op_int,
2545 .poll = efx_port_dummy_op_poll,
2546 .fini = efx_port_dummy_op_void,
2549 /**************************************************************************
2553 **************************************************************************/
2555 /* This zeroes out and then fills in the invariants in a struct
2556 * efx_nic (including all sub-structures).
2558 static int efx_init_struct(struct efx_nic *efx,
2559 struct pci_dev *pci_dev, struct net_device *net_dev)
2563 /* Initialise common structures */
2564 spin_lock_init(&efx->biu_lock);
2565 #ifdef CONFIG_SFC_MTD
2566 INIT_LIST_HEAD(&efx->mtd_list);
2568 INIT_WORK(&efx->reset_work, efx_reset_work);
2569 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2570 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2571 efx->pci_dev = pci_dev;
2572 efx->msg_enable = debug;
2573 efx->state = STATE_UNINIT;
2574 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2576 efx->net_dev = net_dev;
2577 efx->rx_prefix_size = efx->type->rx_prefix_size;
2579 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2580 efx->rx_packet_hash_offset =
2581 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2582 spin_lock_init(&efx->stats_lock);
2583 mutex_init(&efx->mac_lock);
2584 efx->phy_op = &efx_dummy_phy_operations;
2585 efx->mdio.dev = net_dev;
2586 INIT_WORK(&efx->mac_work, efx_mac_work);
2587 init_waitqueue_head(&efx->flush_wq);
2589 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2590 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2591 if (!efx->channel[i])
2593 efx->msi_context[i].efx = efx;
2594 efx->msi_context[i].index = i;
2597 /* Higher numbered interrupt modes are less capable! */
2598 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2601 /* Would be good to use the net_dev name, but we're too early */
2602 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2604 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2605 if (!efx->workqueue)
2611 efx_fini_struct(efx);
2615 static void efx_fini_struct(struct efx_nic *efx)
2619 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2620 kfree(efx->channel[i]);
2622 if (efx->workqueue) {
2623 destroy_workqueue(efx->workqueue);
2624 efx->workqueue = NULL;
2628 /**************************************************************************
2632 **************************************************************************/
2634 /* Main body of final NIC shutdown code
2635 * This is called only at module unload (or hotplug removal).
2637 static void efx_pci_remove_main(struct efx_nic *efx)
2639 /* Flush reset_work. It can no longer be scheduled since we
2642 BUG_ON(efx->state == STATE_READY);
2643 cancel_work_sync(&efx->reset_work);
2645 efx_disable_interrupts(efx);
2646 efx_nic_fini_interrupt(efx);
2648 efx->type->fini(efx);
2650 efx_remove_all(efx);
2653 /* Final NIC shutdown
2654 * This is called only at module unload (or hotplug removal).
2656 static void efx_pci_remove(struct pci_dev *pci_dev)
2658 struct efx_nic *efx;
2660 efx = pci_get_drvdata(pci_dev);
2664 /* Mark the NIC as fini, then stop the interface */
2666 dev_close(efx->net_dev);
2667 efx_disable_interrupts(efx);
2670 efx_sriov_fini(efx);
2671 efx_unregister_netdev(efx);
2673 efx_mtd_remove(efx);
2675 efx_pci_remove_main(efx);
2678 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2680 efx_fini_struct(efx);
2681 pci_set_drvdata(pci_dev, NULL);
2682 free_netdev(efx->net_dev);
2684 pci_disable_pcie_error_reporting(pci_dev);
2687 /* NIC VPD information
2688 * Called during probe to display the part number of the
2689 * installed NIC. VPD is potentially very large but this should
2690 * always appear within the first 512 bytes.
2692 #define SFC_VPD_LEN 512
2693 static void efx_print_product_vpd(struct efx_nic *efx)
2695 struct pci_dev *dev = efx->pci_dev;
2696 char vpd_data[SFC_VPD_LEN];
2700 /* Get the vpd data from the device */
2701 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2702 if (vpd_size <= 0) {
2703 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2707 /* Get the Read only section */
2708 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2710 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2714 j = pci_vpd_lrdt_size(&vpd_data[i]);
2715 i += PCI_VPD_LRDT_TAG_SIZE;
2716 if (i + j > vpd_size)
2719 /* Get the Part number */
2720 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2722 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2726 j = pci_vpd_info_field_size(&vpd_data[i]);
2727 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2728 if (i + j > vpd_size) {
2729 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2733 netif_info(efx, drv, efx->net_dev,
2734 "Part Number : %.*s\n", j, &vpd_data[i]);
2738 /* Main body of NIC initialisation
2739 * This is called at module load (or hotplug insertion, theoretically).
2741 static int efx_pci_probe_main(struct efx_nic *efx)
2745 /* Do start-of-day initialisation */
2746 rc = efx_probe_all(efx);
2752 rc = efx->type->init(efx);
2754 netif_err(efx, probe, efx->net_dev,
2755 "failed to initialise NIC\n");
2759 rc = efx_init_port(efx);
2761 netif_err(efx, probe, efx->net_dev,
2762 "failed to initialise port\n");
2766 rc = efx_nic_init_interrupt(efx);
2769 rc = efx_enable_interrupts(efx);
2776 efx_nic_fini_interrupt(efx);
2780 efx->type->fini(efx);
2783 efx_remove_all(efx);
2788 /* NIC initialisation
2790 * This is called at module load (or hotplug insertion,
2791 * theoretically). It sets up PCI mappings, resets the NIC,
2792 * sets up and registers the network devices with the kernel and hooks
2793 * the interrupt service routine. It does not prepare the device for
2794 * transmission; this is left to the first time one of the network
2795 * interfaces is brought up (i.e. efx_net_open).
2797 static int efx_pci_probe(struct pci_dev *pci_dev,
2798 const struct pci_device_id *entry)
2800 struct net_device *net_dev;
2801 struct efx_nic *efx;
2804 /* Allocate and initialise a struct net_device and struct efx_nic */
2805 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2809 efx = netdev_priv(net_dev);
2810 efx->type = (const struct efx_nic_type *) entry->driver_data;
2811 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2812 NETIF_F_HIGHDMA | NETIF_F_TSO |
2814 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2815 net_dev->features |= NETIF_F_TSO6;
2816 /* Mask for features that also apply to VLAN devices */
2817 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2818 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2820 /* All offloads can be toggled */
2821 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2822 pci_set_drvdata(pci_dev, efx);
2823 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2824 rc = efx_init_struct(efx, pci_dev, net_dev);
2828 netif_info(efx, probe, efx->net_dev,
2829 "Solarflare NIC detected\n");
2831 efx_print_product_vpd(efx);
2833 /* Set up basic I/O (BAR mappings etc) */
2834 rc = efx_init_io(efx);
2838 rc = efx_pci_probe_main(efx);
2842 rc = efx_register_netdev(efx);
2846 rc = efx_sriov_init(efx);
2848 netif_err(efx, probe, efx->net_dev,
2849 "SR-IOV can't be enabled rc %d\n", rc);
2851 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2853 /* Try to create MTDs, but allow this to fail */
2855 rc = efx_mtd_probe(efx);
2858 netif_warn(efx, probe, efx->net_dev,
2859 "failed to create MTDs (%d)\n", rc);
2861 rc = pci_enable_pcie_error_reporting(pci_dev);
2862 if (rc && rc != -EINVAL)
2863 netif_warn(efx, probe, efx->net_dev,
2864 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2869 efx_pci_remove_main(efx);
2873 efx_fini_struct(efx);
2875 pci_set_drvdata(pci_dev, NULL);
2877 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2878 free_netdev(net_dev);
2882 static int efx_pm_freeze(struct device *dev)
2884 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2888 if (efx->state != STATE_DISABLED) {
2889 efx->state = STATE_UNINIT;
2891 efx_device_detach_sync(efx);
2894 efx_disable_interrupts(efx);
2902 static int efx_pm_thaw(struct device *dev)
2905 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2909 if (efx->state != STATE_DISABLED) {
2910 rc = efx_enable_interrupts(efx);
2914 mutex_lock(&efx->mac_lock);
2915 efx->phy_op->reconfigure(efx);
2916 mutex_unlock(&efx->mac_lock);
2920 netif_device_attach(efx->net_dev);
2922 efx->state = STATE_READY;
2924 efx->type->resume_wol(efx);
2929 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2930 queue_work(reset_workqueue, &efx->reset_work);
2940 static int efx_pm_poweroff(struct device *dev)
2942 struct pci_dev *pci_dev = to_pci_dev(dev);
2943 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2945 efx->type->fini(efx);
2947 efx->reset_pending = 0;
2949 pci_save_state(pci_dev);
2950 return pci_set_power_state(pci_dev, PCI_D3hot);
2953 /* Used for both resume and restore */
2954 static int efx_pm_resume(struct device *dev)
2956 struct pci_dev *pci_dev = to_pci_dev(dev);
2957 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2960 rc = pci_set_power_state(pci_dev, PCI_D0);
2963 pci_restore_state(pci_dev);
2964 rc = pci_enable_device(pci_dev);
2967 pci_set_master(efx->pci_dev);
2968 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2971 rc = efx->type->init(efx);
2974 rc = efx_pm_thaw(dev);
2978 static int efx_pm_suspend(struct device *dev)
2983 rc = efx_pm_poweroff(dev);
2989 static const struct dev_pm_ops efx_pm_ops = {
2990 .suspend = efx_pm_suspend,
2991 .resume = efx_pm_resume,
2992 .freeze = efx_pm_freeze,
2993 .thaw = efx_pm_thaw,
2994 .poweroff = efx_pm_poweroff,
2995 .restore = efx_pm_resume,
2998 /* A PCI error affecting this device was detected.
2999 * At this point MMIO and DMA may be disabled.
3000 * Stop the software path and request a slot reset.
3002 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3003 enum pci_channel_state state)
3005 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3006 struct efx_nic *efx = pci_get_drvdata(pdev);
3008 if (state == pci_channel_io_perm_failure)
3009 return PCI_ERS_RESULT_DISCONNECT;
3013 if (efx->state != STATE_DISABLED) {
3014 efx->state = STATE_RECOVERY;
3015 efx->reset_pending = 0;
3017 efx_device_detach_sync(efx);
3020 efx_disable_interrupts(efx);
3022 status = PCI_ERS_RESULT_NEED_RESET;
3024 /* If the interface is disabled we don't want to do anything
3027 status = PCI_ERS_RESULT_RECOVERED;
3032 pci_disable_device(pdev);
3037 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
3038 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3040 struct efx_nic *efx = pci_get_drvdata(pdev);
3041 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3044 if (pci_enable_device(pdev)) {
3045 netif_err(efx, hw, efx->net_dev,
3046 "Cannot re-enable PCI device after reset.\n");
3047 status = PCI_ERS_RESULT_DISCONNECT;
3050 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3052 netif_err(efx, hw, efx->net_dev,
3053 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3054 /* Non-fatal error. Continue. */
3060 /* Perform the actual reset and resume I/O operations. */
3061 static void efx_io_resume(struct pci_dev *pdev)
3063 struct efx_nic *efx = pci_get_drvdata(pdev);
3068 if (efx->state == STATE_DISABLED)
3071 rc = efx_reset(efx, RESET_TYPE_ALL);
3073 netif_err(efx, hw, efx->net_dev,
3074 "efx_reset failed after PCI error (%d)\n", rc);
3076 efx->state = STATE_READY;
3077 netif_dbg(efx, hw, efx->net_dev,
3078 "Done resetting and resuming IO after PCI error.\n");
3085 /* For simplicity and reliability, we always require a slot reset and try to
3086 * reset the hardware when a pci error affecting the device is detected.
3087 * We leave both the link_reset and mmio_enabled callback unimplemented:
3088 * with our request for slot reset the mmio_enabled callback will never be
3089 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3091 static struct pci_error_handlers efx_err_handlers = {
3092 .error_detected = efx_io_error_detected,
3093 .slot_reset = efx_io_slot_reset,
3094 .resume = efx_io_resume,
3097 static struct pci_driver efx_pci_driver = {
3098 .name = KBUILD_MODNAME,
3099 .id_table = efx_pci_table,
3100 .probe = efx_pci_probe,
3101 .remove = efx_pci_remove,
3102 .driver.pm = &efx_pm_ops,
3103 .err_handler = &efx_err_handlers,
3106 /**************************************************************************
3108 * Kernel module interface
3110 *************************************************************************/
3112 module_param(interrupt_mode, uint, 0444);
3113 MODULE_PARM_DESC(interrupt_mode,
3114 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3116 static int __init efx_init_module(void)
3120 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3122 rc = register_netdevice_notifier(&efx_netdev_notifier);
3126 rc = efx_init_sriov();
3130 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3131 if (!reset_workqueue) {
3136 rc = pci_register_driver(&efx_pci_driver);
3143 destroy_workqueue(reset_workqueue);
3147 unregister_netdevice_notifier(&efx_netdev_notifier);
3152 static void __exit efx_exit_module(void)
3154 printk(KERN_INFO "Solarflare NET driver unloading\n");
3156 pci_unregister_driver(&efx_pci_driver);
3157 destroy_workqueue(reset_workqueue);
3159 unregister_netdevice_notifier(&efx_netdev_notifier);
3163 module_init(efx_init_module);
3164 module_exit(efx_exit_module);
3166 MODULE_AUTHOR("Solarflare Communications and "
3167 "Michael Brown <mbrown@fensystems.co.uk>");
3168 MODULE_DESCRIPTION("Solarflare Communications network driver");
3169 MODULE_LICENSE("GPL");
3170 MODULE_DEVICE_TABLE(pci, efx_pci_table);