1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *const efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *const efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* This controls whether or not the driver will initialise devices
126 * with invalid MAC addresses stored in the EEPROM or flash. If true,
127 * such devices will be initialised with a random locally-generated
128 * MAC address. This allows for loading the sfc_mtd driver to
129 * reprogram the flash, even if the flash contents (including the MAC
130 * address) have previously been erased.
132 static unsigned int allow_bad_hwaddr;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * The default for RX should strike a balance between increasing the
138 * round-trip latency and reducing overhead.
140 static unsigned int rx_irq_mod_usec = 60;
142 /* Initial interrupt moderation settings. They can be modified after
143 * module load with ethtool.
145 * This default is chosen to ensure that a 10G link does not go idle
146 * while a TX queue is stopped after it has become full. A queue is
147 * restarted when it drops below half full. The time this takes (assuming
148 * worst case 3 descriptors per packet and 1024 descriptors) is
149 * 512 / 3 * 1.2 = 205 usec.
151 static unsigned int tx_irq_mod_usec = 150;
153 /* This is the first interrupt mode to try out of:
158 static unsigned int interrupt_mode;
160 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
161 * i.e. the number of CPUs among which we may distribute simultaneous
162 * interrupt handling.
164 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
165 * The default (0) means to assign an interrupt to each package (level II cache)
167 static unsigned int rss_cpus;
168 module_param(rss_cpus, uint, 0444);
169 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
171 static int phy_flash_cfg;
172 module_param(phy_flash_cfg, int, 0644);
173 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
175 static unsigned irq_adapt_low_thresh = 10000;
176 module_param(irq_adapt_low_thresh, uint, 0644);
177 MODULE_PARM_DESC(irq_adapt_low_thresh,
178 "Threshold score for reducing IRQ moderation");
180 static unsigned irq_adapt_high_thresh = 20000;
181 module_param(irq_adapt_high_thresh, uint, 0644);
182 MODULE_PARM_DESC(irq_adapt_high_thresh,
183 "Threshold score for increasing IRQ moderation");
185 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
186 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
187 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
188 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
189 module_param(debug, uint, 0);
190 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
192 /**************************************************************************
194 * Utility functions and prototypes
196 *************************************************************************/
198 static void efx_remove_channels(struct efx_nic *efx);
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_init_napi(struct efx_nic *efx);
201 static void efx_fini_napi(struct efx_nic *efx);
202 static void efx_fini_napi_channel(struct efx_channel *channel);
203 static void efx_fini_struct(struct efx_nic *efx);
204 static void efx_start_all(struct efx_nic *efx);
205 static void efx_stop_all(struct efx_nic *efx);
207 #define EFX_ASSERT_RESET_SERIALISED(efx) \
209 if ((efx->state == STATE_RUNNING) || \
210 (efx->state == STATE_DISABLED)) \
214 /**************************************************************************
216 * Event queue processing
218 *************************************************************************/
220 /* Process channel's event queue
222 * This function is responsible for processing the event queue of a
223 * single channel. The caller must guarantee that this function will
224 * never be concurrently called more than once on the same channel,
225 * though different channels may be being processed concurrently.
227 static int efx_process_channel(struct efx_channel *channel, int budget)
229 struct efx_nic *efx = channel->efx;
232 if (unlikely(efx->reset_pending || !channel->enabled))
235 spent = efx_nic_process_eventq(channel, budget);
239 /* Deliver last RX packet. */
240 if (channel->rx_pkt) {
241 __efx_rx_packet(channel, channel->rx_pkt,
242 channel->rx_pkt_csummed);
243 channel->rx_pkt = NULL;
246 efx_rx_strategy(channel);
248 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
253 /* Mark channel as finished processing
255 * Note that since we will not receive further interrupts for this
256 * channel before we finish processing and call the eventq_read_ack()
257 * method, there is no need to use the interrupt hold-off timers.
259 static inline void efx_channel_processed(struct efx_channel *channel)
261 /* The interrupt handler for this channel may set work_pending
262 * as soon as we acknowledge the events we've seen. Make sure
263 * it's cleared before then. */
264 channel->work_pending = false;
267 efx_nic_eventq_read_ack(channel);
272 * NAPI guarantees serialisation of polls of the same device, which
273 * provides the guarantee required by efx_process_channel().
275 static int efx_poll(struct napi_struct *napi, int budget)
277 struct efx_channel *channel =
278 container_of(napi, struct efx_channel, napi_str);
279 struct efx_nic *efx = channel->efx;
282 netif_vdbg(efx, intr, efx->net_dev,
283 "channel %d NAPI poll executing on CPU %d\n",
284 channel->channel, raw_smp_processor_id());
286 spent = efx_process_channel(channel, budget);
288 if (spent < budget) {
289 if (channel->channel < efx->n_rx_channels &&
290 efx->irq_rx_adaptive &&
291 unlikely(++channel->irq_count == 1000)) {
292 if (unlikely(channel->irq_mod_score <
293 irq_adapt_low_thresh)) {
294 if (channel->irq_moderation > 1) {
295 channel->irq_moderation -= 1;
296 efx->type->push_irq_moderation(channel);
298 } else if (unlikely(channel->irq_mod_score >
299 irq_adapt_high_thresh)) {
300 if (channel->irq_moderation <
301 efx->irq_rx_moderation) {
302 channel->irq_moderation += 1;
303 efx->type->push_irq_moderation(channel);
306 channel->irq_count = 0;
307 channel->irq_mod_score = 0;
310 efx_filter_rfs_expire(channel);
312 /* There is no race here; although napi_disable() will
313 * only wait for napi_complete(), this isn't a problem
314 * since efx_channel_processed() will have no effect if
315 * interrupts have already been disabled.
318 efx_channel_processed(channel);
324 /* Process the eventq of the specified channel immediately on this CPU
326 * Disable hardware generated interrupts, wait for any existing
327 * processing to finish, then directly poll (and ack ) the eventq.
328 * Finally reenable NAPI and interrupts.
330 * This is for use only during a loopback self-test. It must not
331 * deliver any packets up the stack as this can result in deadlock.
333 void efx_process_channel_now(struct efx_channel *channel)
335 struct efx_nic *efx = channel->efx;
337 BUG_ON(channel->channel >= efx->n_channels);
338 BUG_ON(!channel->enabled);
339 BUG_ON(!efx->loopback_selftest);
341 /* Disable interrupts and wait for ISRs to complete */
342 efx_nic_disable_interrupts(efx);
343 if (efx->legacy_irq) {
344 synchronize_irq(efx->legacy_irq);
345 efx->legacy_irq_enabled = false;
348 synchronize_irq(channel->irq);
350 /* Wait for any NAPI processing to complete */
351 napi_disable(&channel->napi_str);
353 /* Poll the channel */
354 efx_process_channel(channel, channel->eventq_mask + 1);
356 /* Ack the eventq. This may cause an interrupt to be generated
357 * when they are reenabled */
358 efx_channel_processed(channel);
360 napi_enable(&channel->napi_str);
362 efx->legacy_irq_enabled = true;
363 efx_nic_enable_interrupts(efx);
366 /* Create event queue
367 * Event queue memory allocations are done only once. If the channel
368 * is reset, the memory buffer will be reused; this guards against
369 * errors during channel reset and also simplifies interrupt handling.
371 static int efx_probe_eventq(struct efx_channel *channel)
373 struct efx_nic *efx = channel->efx;
374 unsigned long entries;
376 netif_dbg(channel->efx, probe, channel->efx->net_dev,
377 "chan %d create event queue\n", channel->channel);
379 /* Build an event queue with room for one event per tx and rx buffer,
380 * plus some extra for link state events and MCDI completions. */
381 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
382 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
383 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
385 return efx_nic_probe_eventq(channel);
388 /* Prepare channel's event queue */
389 static void efx_init_eventq(struct efx_channel *channel)
391 netif_dbg(channel->efx, drv, channel->efx->net_dev,
392 "chan %d init event queue\n", channel->channel);
394 channel->eventq_read_ptr = 0;
396 efx_nic_init_eventq(channel);
399 static void efx_fini_eventq(struct efx_channel *channel)
401 netif_dbg(channel->efx, drv, channel->efx->net_dev,
402 "chan %d fini event queue\n", channel->channel);
404 efx_nic_fini_eventq(channel);
407 static void efx_remove_eventq(struct efx_channel *channel)
409 netif_dbg(channel->efx, drv, channel->efx->net_dev,
410 "chan %d remove event queue\n", channel->channel);
412 efx_nic_remove_eventq(channel);
415 /**************************************************************************
419 *************************************************************************/
421 /* Allocate and initialise a channel structure, optionally copying
422 * parameters (but not resources) from an old channel structure. */
423 static struct efx_channel *
424 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
426 struct efx_channel *channel;
427 struct efx_rx_queue *rx_queue;
428 struct efx_tx_queue *tx_queue;
432 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
436 *channel = *old_channel;
438 channel->napi_dev = NULL;
439 memset(&channel->eventq, 0, sizeof(channel->eventq));
441 rx_queue = &channel->rx_queue;
442 rx_queue->buffer = NULL;
443 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
445 for (j = 0; j < EFX_TXQ_TYPES; j++) {
446 tx_queue = &channel->tx_queue[j];
447 if (tx_queue->channel)
448 tx_queue->channel = channel;
449 tx_queue->buffer = NULL;
450 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
453 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
458 channel->channel = i;
460 for (j = 0; j < EFX_TXQ_TYPES; j++) {
461 tx_queue = &channel->tx_queue[j];
463 tx_queue->queue = i * EFX_TXQ_TYPES + j;
464 tx_queue->channel = channel;
468 rx_queue = &channel->rx_queue;
470 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
471 (unsigned long)rx_queue);
476 static int efx_probe_channel(struct efx_channel *channel)
478 struct efx_tx_queue *tx_queue;
479 struct efx_rx_queue *rx_queue;
482 netif_dbg(channel->efx, probe, channel->efx->net_dev,
483 "creating channel %d\n", channel->channel);
485 rc = efx_probe_eventq(channel);
489 efx_for_each_channel_tx_queue(tx_queue, channel) {
490 rc = efx_probe_tx_queue(tx_queue);
495 efx_for_each_channel_rx_queue(rx_queue, channel) {
496 rc = efx_probe_rx_queue(rx_queue);
501 channel->n_rx_frm_trunc = 0;
506 efx_for_each_channel_rx_queue(rx_queue, channel)
507 efx_remove_rx_queue(rx_queue);
509 efx_for_each_channel_tx_queue(tx_queue, channel)
510 efx_remove_tx_queue(tx_queue);
516 static void efx_set_channel_names(struct efx_nic *efx)
518 struct efx_channel *channel;
519 const char *type = "";
522 efx_for_each_channel(channel, efx) {
523 number = channel->channel;
524 if (efx->n_channels > efx->n_rx_channels) {
525 if (channel->channel < efx->n_rx_channels) {
529 number -= efx->n_rx_channels;
532 snprintf(efx->channel_name[channel->channel],
533 sizeof(efx->channel_name[0]),
534 "%s%s-%d", efx->name, type, number);
538 static int efx_probe_channels(struct efx_nic *efx)
540 struct efx_channel *channel;
543 /* Restart special buffer allocation */
544 efx->next_buffer_table = 0;
546 efx_for_each_channel(channel, efx) {
547 rc = efx_probe_channel(channel);
549 netif_err(efx, probe, efx->net_dev,
550 "failed to create channel %d\n",
555 efx_set_channel_names(efx);
560 efx_remove_channels(efx);
564 /* Channels are shutdown and reinitialised whilst the NIC is running
565 * to propagate configuration changes (mtu, checksum offload), or
566 * to clear hardware error conditions
568 static void efx_init_channels(struct efx_nic *efx)
570 struct efx_tx_queue *tx_queue;
571 struct efx_rx_queue *rx_queue;
572 struct efx_channel *channel;
574 /* Calculate the rx buffer allocation parameters required to
575 * support the current MTU, including padding for header
576 * alignment and overruns.
578 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
579 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
580 efx->type->rx_buffer_hash_size +
581 efx->type->rx_buffer_padding);
582 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
583 sizeof(struct efx_rx_page_state));
585 /* Initialise the channels */
586 efx_for_each_channel(channel, efx) {
587 netif_dbg(channel->efx, drv, channel->efx->net_dev,
588 "init chan %d\n", channel->channel);
590 efx_init_eventq(channel);
592 efx_for_each_channel_tx_queue(tx_queue, channel)
593 efx_init_tx_queue(tx_queue);
595 /* The rx buffer allocation strategy is MTU dependent */
596 efx_rx_strategy(channel);
598 efx_for_each_channel_rx_queue(rx_queue, channel)
599 efx_init_rx_queue(rx_queue);
601 WARN_ON(channel->rx_pkt != NULL);
602 efx_rx_strategy(channel);
606 /* This enables event queue processing and packet transmission.
608 * Note that this function is not allowed to fail, since that would
609 * introduce too much complexity into the suspend/resume path.
611 static void efx_start_channel(struct efx_channel *channel)
613 struct efx_rx_queue *rx_queue;
615 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
616 "starting chan %d\n", channel->channel);
618 /* The interrupt handler for this channel may set work_pending
619 * as soon as we enable it. Make sure it's cleared before
620 * then. Similarly, make sure it sees the enabled flag set. */
621 channel->work_pending = false;
622 channel->enabled = true;
625 /* Fill the queues before enabling NAPI */
626 efx_for_each_channel_rx_queue(rx_queue, channel)
627 efx_fast_push_rx_descriptors(rx_queue);
629 napi_enable(&channel->napi_str);
632 /* This disables event queue processing and packet transmission.
633 * This function does not guarantee that all queue processing
634 * (e.g. RX refill) is complete.
636 static void efx_stop_channel(struct efx_channel *channel)
638 if (!channel->enabled)
641 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
642 "stop chan %d\n", channel->channel);
644 channel->enabled = false;
645 napi_disable(&channel->napi_str);
648 static void efx_fini_channels(struct efx_nic *efx)
650 struct efx_channel *channel;
651 struct efx_tx_queue *tx_queue;
652 struct efx_rx_queue *rx_queue;
655 EFX_ASSERT_RESET_SERIALISED(efx);
656 BUG_ON(efx->port_enabled);
658 rc = efx_nic_flush_queues(efx);
659 if (rc && EFX_WORKAROUND_7803(efx)) {
660 /* Schedule a reset to recover from the flush failure. The
661 * descriptor caches reference memory we're about to free,
662 * but falcon_reconfigure_mac_wrapper() won't reconnect
663 * the MACs because of the pending reset. */
664 netif_err(efx, drv, efx->net_dev,
665 "Resetting to recover from flush failure\n");
666 efx_schedule_reset(efx, RESET_TYPE_ALL);
668 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
670 netif_dbg(efx, drv, efx->net_dev,
671 "successfully flushed all queues\n");
674 efx_for_each_channel(channel, efx) {
675 netif_dbg(channel->efx, drv, channel->efx->net_dev,
676 "shut down chan %d\n", channel->channel);
678 efx_for_each_channel_rx_queue(rx_queue, channel)
679 efx_fini_rx_queue(rx_queue);
680 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
681 efx_fini_tx_queue(tx_queue);
682 efx_fini_eventq(channel);
686 static void efx_remove_channel(struct efx_channel *channel)
688 struct efx_tx_queue *tx_queue;
689 struct efx_rx_queue *rx_queue;
691 netif_dbg(channel->efx, drv, channel->efx->net_dev,
692 "destroy chan %d\n", channel->channel);
694 efx_for_each_channel_rx_queue(rx_queue, channel)
695 efx_remove_rx_queue(rx_queue);
696 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
697 efx_remove_tx_queue(tx_queue);
698 efx_remove_eventq(channel);
701 static void efx_remove_channels(struct efx_nic *efx)
703 struct efx_channel *channel;
705 efx_for_each_channel(channel, efx)
706 efx_remove_channel(channel);
710 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
712 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
713 u32 old_rxq_entries, old_txq_entries;
718 efx_fini_channels(efx);
721 memset(other_channel, 0, sizeof(other_channel));
722 for (i = 0; i < efx->n_channels; i++) {
723 channel = efx_alloc_channel(efx, i, efx->channel[i]);
728 other_channel[i] = channel;
731 /* Swap entry counts and channel pointers */
732 old_rxq_entries = efx->rxq_entries;
733 old_txq_entries = efx->txq_entries;
734 efx->rxq_entries = rxq_entries;
735 efx->txq_entries = txq_entries;
736 for (i = 0; i < efx->n_channels; i++) {
737 channel = efx->channel[i];
738 efx->channel[i] = other_channel[i];
739 other_channel[i] = channel;
742 rc = efx_probe_channels(efx);
748 /* Destroy old channels */
749 for (i = 0; i < efx->n_channels; i++) {
750 efx_fini_napi_channel(other_channel[i]);
751 efx_remove_channel(other_channel[i]);
754 /* Free unused channel structures */
755 for (i = 0; i < efx->n_channels; i++)
756 kfree(other_channel[i]);
758 efx_init_channels(efx);
764 efx->rxq_entries = old_rxq_entries;
765 efx->txq_entries = old_txq_entries;
766 for (i = 0; i < efx->n_channels; i++) {
767 channel = efx->channel[i];
768 efx->channel[i] = other_channel[i];
769 other_channel[i] = channel;
774 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
776 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
779 /**************************************************************************
783 **************************************************************************/
785 /* This ensures that the kernel is kept informed (via
786 * netif_carrier_on/off) of the link status, and also maintains the
787 * link status's stop on the port's TX queue.
789 void efx_link_status_changed(struct efx_nic *efx)
791 struct efx_link_state *link_state = &efx->link_state;
793 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
794 * that no events are triggered between unregister_netdev() and the
795 * driver unloading. A more general condition is that NETDEV_CHANGE
796 * can only be generated between NETDEV_UP and NETDEV_DOWN */
797 if (!netif_running(efx->net_dev))
800 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
801 efx->n_link_state_changes++;
804 netif_carrier_on(efx->net_dev);
806 netif_carrier_off(efx->net_dev);
809 /* Status message for kernel log */
810 if (link_state->up) {
811 netif_info(efx, link, efx->net_dev,
812 "link up at %uMbps %s-duplex (MTU %d)%s\n",
813 link_state->speed, link_state->fd ? "full" : "half",
815 (efx->promiscuous ? " [PROMISC]" : ""));
817 netif_info(efx, link, efx->net_dev, "link down\n");
822 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
824 efx->link_advertising = advertising;
826 if (advertising & ADVERTISED_Pause)
827 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
829 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
830 if (advertising & ADVERTISED_Asym_Pause)
831 efx->wanted_fc ^= EFX_FC_TX;
835 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
837 efx->wanted_fc = wanted_fc;
838 if (efx->link_advertising) {
839 if (wanted_fc & EFX_FC_RX)
840 efx->link_advertising |= (ADVERTISED_Pause |
841 ADVERTISED_Asym_Pause);
843 efx->link_advertising &= ~(ADVERTISED_Pause |
844 ADVERTISED_Asym_Pause);
845 if (wanted_fc & EFX_FC_TX)
846 efx->link_advertising ^= ADVERTISED_Asym_Pause;
850 static void efx_fini_port(struct efx_nic *efx);
852 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
853 * the MAC appropriately. All other PHY configuration changes are pushed
854 * through phy_op->set_settings(), and pushed asynchronously to the MAC
855 * through efx_monitor().
857 * Callers must hold the mac_lock
859 int __efx_reconfigure_port(struct efx_nic *efx)
861 enum efx_phy_mode phy_mode;
864 WARN_ON(!mutex_is_locked(&efx->mac_lock));
866 /* Serialise the promiscuous flag with efx_set_multicast_list. */
867 if (efx_dev_registered(efx)) {
868 netif_addr_lock_bh(efx->net_dev);
869 netif_addr_unlock_bh(efx->net_dev);
872 /* Disable PHY transmit in mac level loopbacks */
873 phy_mode = efx->phy_mode;
874 if (LOOPBACK_INTERNAL(efx))
875 efx->phy_mode |= PHY_MODE_TX_DISABLED;
877 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
879 rc = efx->type->reconfigure_port(efx);
882 efx->phy_mode = phy_mode;
887 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
889 int efx_reconfigure_port(struct efx_nic *efx)
893 EFX_ASSERT_RESET_SERIALISED(efx);
895 mutex_lock(&efx->mac_lock);
896 rc = __efx_reconfigure_port(efx);
897 mutex_unlock(&efx->mac_lock);
902 /* Asynchronous work item for changing MAC promiscuity and multicast
903 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
905 static void efx_mac_work(struct work_struct *data)
907 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
909 mutex_lock(&efx->mac_lock);
910 if (efx->port_enabled) {
911 efx->type->push_multicast_hash(efx);
912 efx->mac_op->reconfigure(efx);
914 mutex_unlock(&efx->mac_lock);
917 static int efx_probe_port(struct efx_nic *efx)
919 unsigned char *perm_addr;
922 netif_dbg(efx, probe, efx->net_dev, "create port\n");
925 efx->phy_mode = PHY_MODE_SPECIAL;
927 /* Connect up MAC/PHY operations table */
928 rc = efx->type->probe_port(efx);
932 /* Sanity check MAC address */
933 perm_addr = efx->net_dev->perm_addr;
934 if (is_valid_ether_addr(perm_addr)) {
935 memcpy(efx->net_dev->dev_addr, perm_addr, ETH_ALEN);
937 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
939 if (!allow_bad_hwaddr) {
943 random_ether_addr(efx->net_dev->dev_addr);
944 netif_info(efx, probe, efx->net_dev,
945 "using locally-generated MAC %pM\n",
946 efx->net_dev->dev_addr);
952 efx->type->remove_port(efx);
956 static int efx_init_port(struct efx_nic *efx)
960 netif_dbg(efx, drv, efx->net_dev, "init port\n");
962 mutex_lock(&efx->mac_lock);
964 rc = efx->phy_op->init(efx);
968 efx->port_initialized = true;
970 /* Reconfigure the MAC before creating dma queues (required for
971 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
972 efx->mac_op->reconfigure(efx);
974 /* Ensure the PHY advertises the correct flow control settings */
975 rc = efx->phy_op->reconfigure(efx);
979 mutex_unlock(&efx->mac_lock);
983 efx->phy_op->fini(efx);
985 mutex_unlock(&efx->mac_lock);
989 static void efx_start_port(struct efx_nic *efx)
991 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
992 BUG_ON(efx->port_enabled);
994 mutex_lock(&efx->mac_lock);
995 efx->port_enabled = true;
997 /* efx_mac_work() might have been scheduled after efx_stop_port(),
998 * and then cancelled by efx_flush_all() */
999 efx->type->push_multicast_hash(efx);
1000 efx->mac_op->reconfigure(efx);
1002 mutex_unlock(&efx->mac_lock);
1005 /* Prevent efx_mac_work() and efx_monitor() from working */
1006 static void efx_stop_port(struct efx_nic *efx)
1008 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1010 mutex_lock(&efx->mac_lock);
1011 efx->port_enabled = false;
1012 mutex_unlock(&efx->mac_lock);
1014 /* Serialise against efx_set_multicast_list() */
1015 if (efx_dev_registered(efx)) {
1016 netif_addr_lock_bh(efx->net_dev);
1017 netif_addr_unlock_bh(efx->net_dev);
1021 static void efx_fini_port(struct efx_nic *efx)
1023 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1025 if (!efx->port_initialized)
1028 efx->phy_op->fini(efx);
1029 efx->port_initialized = false;
1031 efx->link_state.up = false;
1032 efx_link_status_changed(efx);
1035 static void efx_remove_port(struct efx_nic *efx)
1037 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1039 efx->type->remove_port(efx);
1042 /**************************************************************************
1046 **************************************************************************/
1048 /* This configures the PCI device to enable I/O and DMA. */
1049 static int efx_init_io(struct efx_nic *efx)
1051 struct pci_dev *pci_dev = efx->pci_dev;
1052 dma_addr_t dma_mask = efx->type->max_dma_mask;
1055 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1057 rc = pci_enable_device(pci_dev);
1059 netif_err(efx, probe, efx->net_dev,
1060 "failed to enable PCI device\n");
1064 pci_set_master(pci_dev);
1066 /* Set the PCI DMA mask. Try all possibilities from our
1067 * genuine mask down to 32 bits, because some architectures
1068 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1069 * masks event though they reject 46 bit masks.
1071 while (dma_mask > 0x7fffffffUL) {
1072 if (pci_dma_supported(pci_dev, dma_mask)) {
1073 rc = pci_set_dma_mask(pci_dev, dma_mask);
1080 netif_err(efx, probe, efx->net_dev,
1081 "could not find a suitable DMA mask\n");
1084 netif_dbg(efx, probe, efx->net_dev,
1085 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1086 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1088 /* pci_set_consistent_dma_mask() is not *allowed* to
1089 * fail with a mask that pci_set_dma_mask() accepted,
1090 * but just in case...
1092 netif_err(efx, probe, efx->net_dev,
1093 "failed to set consistent DMA mask\n");
1097 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1098 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1100 netif_err(efx, probe, efx->net_dev,
1101 "request for memory BAR failed\n");
1105 efx->membase = ioremap_nocache(efx->membase_phys,
1106 efx->type->mem_map_size);
1107 if (!efx->membase) {
1108 netif_err(efx, probe, efx->net_dev,
1109 "could not map memory BAR at %llx+%x\n",
1110 (unsigned long long)efx->membase_phys,
1111 efx->type->mem_map_size);
1115 netif_dbg(efx, probe, efx->net_dev,
1116 "memory BAR at %llx+%x (virtual %p)\n",
1117 (unsigned long long)efx->membase_phys,
1118 efx->type->mem_map_size, efx->membase);
1123 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1125 efx->membase_phys = 0;
1127 pci_disable_device(efx->pci_dev);
1132 static void efx_fini_io(struct efx_nic *efx)
1134 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1137 iounmap(efx->membase);
1138 efx->membase = NULL;
1141 if (efx->membase_phys) {
1142 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1143 efx->membase_phys = 0;
1146 pci_disable_device(efx->pci_dev);
1149 /* Get number of channels wanted. Each channel will have its own IRQ,
1150 * 1 RX queue and/or 2 TX queues. */
1151 static int efx_wanted_channels(void)
1153 cpumask_var_t core_mask;
1160 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1162 "sfc: RSS disabled due to allocation failure\n");
1167 for_each_online_cpu(cpu) {
1168 if (!cpumask_test_cpu(cpu, core_mask)) {
1170 cpumask_or(core_mask, core_mask,
1171 topology_core_cpumask(cpu));
1175 free_cpumask_var(core_mask);
1180 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1182 #ifdef CONFIG_RFS_ACCEL
1185 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1186 if (!efx->net_dev->rx_cpu_rmap)
1188 for (i = 0; i < efx->n_rx_channels; i++) {
1189 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1190 xentries[i].vector);
1192 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1193 efx->net_dev->rx_cpu_rmap = NULL;
1201 /* Probe the number and type of interrupts we are able to obtain, and
1202 * the resulting numbers of channels and RX queues.
1204 static int efx_probe_interrupts(struct efx_nic *efx)
1207 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1210 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1211 struct msix_entry xentries[EFX_MAX_CHANNELS];
1214 n_channels = efx_wanted_channels();
1215 if (separate_tx_channels)
1217 n_channels = min(n_channels, max_channels);
1219 for (i = 0; i < n_channels; i++)
1220 xentries[i].entry = i;
1221 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1223 netif_err(efx, drv, efx->net_dev,
1224 "WARNING: Insufficient MSI-X vectors"
1225 " available (%d < %d).\n", rc, n_channels);
1226 netif_err(efx, drv, efx->net_dev,
1227 "WARNING: Performance may be reduced.\n");
1228 EFX_BUG_ON_PARANOID(rc >= n_channels);
1230 rc = pci_enable_msix(efx->pci_dev, xentries,
1235 efx->n_channels = n_channels;
1236 if (separate_tx_channels) {
1237 efx->n_tx_channels =
1238 max(efx->n_channels / 2, 1U);
1239 efx->n_rx_channels =
1240 max(efx->n_channels -
1241 efx->n_tx_channels, 1U);
1243 efx->n_tx_channels = efx->n_channels;
1244 efx->n_rx_channels = efx->n_channels;
1246 rc = efx_init_rx_cpu_rmap(efx, xentries);
1248 pci_disable_msix(efx->pci_dev);
1251 for (i = 0; i < n_channels; i++)
1252 efx_get_channel(efx, i)->irq =
1255 /* Fall back to single channel MSI */
1256 efx->interrupt_mode = EFX_INT_MODE_MSI;
1257 netif_err(efx, drv, efx->net_dev,
1258 "could not enable MSI-X\n");
1262 /* Try single interrupt MSI */
1263 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1264 efx->n_channels = 1;
1265 efx->n_rx_channels = 1;
1266 efx->n_tx_channels = 1;
1267 rc = pci_enable_msi(efx->pci_dev);
1269 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1271 netif_err(efx, drv, efx->net_dev,
1272 "could not enable MSI\n");
1273 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1277 /* Assume legacy interrupts */
1278 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1279 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1280 efx->n_rx_channels = 1;
1281 efx->n_tx_channels = 1;
1282 efx->legacy_irq = efx->pci_dev->irq;
1288 static void efx_remove_interrupts(struct efx_nic *efx)
1290 struct efx_channel *channel;
1292 /* Remove MSI/MSI-X interrupts */
1293 efx_for_each_channel(channel, efx)
1295 pci_disable_msi(efx->pci_dev);
1296 pci_disable_msix(efx->pci_dev);
1298 /* Remove legacy interrupt */
1299 efx->legacy_irq = 0;
1302 static void efx_set_channels(struct efx_nic *efx)
1304 struct efx_channel *channel;
1305 struct efx_tx_queue *tx_queue;
1307 efx->tx_channel_offset =
1308 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1310 /* We need to adjust the TX queue numbers if we have separate
1311 * RX-only and TX-only channels.
1313 efx_for_each_channel(channel, efx) {
1314 efx_for_each_channel_tx_queue(tx_queue, channel)
1315 tx_queue->queue -= (efx->tx_channel_offset *
1320 static int efx_probe_nic(struct efx_nic *efx)
1325 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1327 /* Carry out hardware-type specific initialisation */
1328 rc = efx->type->probe(efx);
1332 /* Determine the number of channels and queues by trying to hook
1333 * in MSI-X interrupts. */
1334 rc = efx_probe_interrupts(efx);
1338 if (efx->n_channels > 1)
1339 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1340 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1341 efx->rx_indir_table[i] =
1342 ethtool_rxfh_indir_default(i, efx->n_rx_channels);
1344 efx_set_channels(efx);
1345 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1346 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1348 /* Initialise the interrupt moderation settings */
1349 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1355 efx->type->remove(efx);
1359 static void efx_remove_nic(struct efx_nic *efx)
1361 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1363 efx_remove_interrupts(efx);
1364 efx->type->remove(efx);
1367 /**************************************************************************
1369 * NIC startup/shutdown
1371 *************************************************************************/
1373 static int efx_probe_all(struct efx_nic *efx)
1377 rc = efx_probe_nic(efx);
1379 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1383 rc = efx_probe_port(efx);
1385 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1389 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1390 rc = efx_probe_channels(efx);
1394 rc = efx_probe_filters(efx);
1396 netif_err(efx, probe, efx->net_dev,
1397 "failed to create filter tables\n");
1404 efx_remove_channels(efx);
1406 efx_remove_port(efx);
1408 efx_remove_nic(efx);
1413 /* Called after previous invocation(s) of efx_stop_all, restarts the
1414 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1415 * and ensures that the port is scheduled to be reconfigured.
1416 * This function is safe to call multiple times when the NIC is in any
1418 static void efx_start_all(struct efx_nic *efx)
1420 struct efx_channel *channel;
1422 EFX_ASSERT_RESET_SERIALISED(efx);
1424 /* Check that it is appropriate to restart the interface. All
1425 * of these flags are safe to read under just the rtnl lock */
1426 if (efx->port_enabled)
1428 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1430 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1433 /* Mark the port as enabled so port reconfigurations can start, then
1434 * restart the transmit interface early so the watchdog timer stops */
1435 efx_start_port(efx);
1437 if (efx_dev_registered(efx) && netif_device_present(efx->net_dev))
1438 netif_tx_wake_all_queues(efx->net_dev);
1440 efx_for_each_channel(channel, efx)
1441 efx_start_channel(channel);
1443 if (efx->legacy_irq)
1444 efx->legacy_irq_enabled = true;
1445 efx_nic_enable_interrupts(efx);
1447 /* Switch to event based MCDI completions after enabling interrupts.
1448 * If a reset has been scheduled, then we need to stay in polled mode.
1449 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1450 * reset_pending [modified from an atomic context], we instead guarantee
1451 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1452 efx_mcdi_mode_event(efx);
1453 if (efx->reset_pending)
1454 efx_mcdi_mode_poll(efx);
1456 /* Start the hardware monitor if there is one. Otherwise (we're link
1457 * event driven), we have to poll the PHY because after an event queue
1458 * flush, we could have a missed a link state change */
1459 if (efx->type->monitor != NULL) {
1460 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1461 efx_monitor_interval);
1463 mutex_lock(&efx->mac_lock);
1464 if (efx->phy_op->poll(efx))
1465 efx_link_status_changed(efx);
1466 mutex_unlock(&efx->mac_lock);
1469 efx->type->start_stats(efx);
1472 /* Flush all delayed work. Should only be called when no more delayed work
1473 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1474 * since we're holding the rtnl_lock at this point. */
1475 static void efx_flush_all(struct efx_nic *efx)
1477 /* Make sure the hardware monitor is stopped */
1478 cancel_delayed_work_sync(&efx->monitor_work);
1479 /* Stop scheduled port reconfigurations */
1480 cancel_work_sync(&efx->mac_work);
1483 /* Quiesce hardware and software without bringing the link down.
1484 * Safe to call multiple times, when the nic and interface is in any
1485 * state. The caller is guaranteed to subsequently be in a position
1486 * to modify any hardware and software state they see fit without
1488 static void efx_stop_all(struct efx_nic *efx)
1490 struct efx_channel *channel;
1492 EFX_ASSERT_RESET_SERIALISED(efx);
1494 /* port_enabled can be read safely under the rtnl lock */
1495 if (!efx->port_enabled)
1498 efx->type->stop_stats(efx);
1500 /* Switch to MCDI polling on Siena before disabling interrupts */
1501 efx_mcdi_mode_poll(efx);
1503 /* Disable interrupts and wait for ISR to complete */
1504 efx_nic_disable_interrupts(efx);
1505 if (efx->legacy_irq) {
1506 synchronize_irq(efx->legacy_irq);
1507 efx->legacy_irq_enabled = false;
1509 efx_for_each_channel(channel, efx) {
1511 synchronize_irq(channel->irq);
1514 /* Stop all NAPI processing and synchronous rx refills */
1515 efx_for_each_channel(channel, efx)
1516 efx_stop_channel(channel);
1518 /* Stop all asynchronous port reconfigurations. Since all
1519 * event processing has already been stopped, there is no
1520 * window to loose phy events */
1523 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1526 /* Stop the kernel transmit interface late, so the watchdog
1527 * timer isn't ticking over the flush */
1528 if (efx_dev_registered(efx)) {
1529 netif_tx_stop_all_queues(efx->net_dev);
1530 netif_tx_lock_bh(efx->net_dev);
1531 netif_tx_unlock_bh(efx->net_dev);
1535 static void efx_remove_all(struct efx_nic *efx)
1537 efx_remove_filters(efx);
1538 efx_remove_channels(efx);
1539 efx_remove_port(efx);
1540 efx_remove_nic(efx);
1543 /**************************************************************************
1545 * Interrupt moderation
1547 **************************************************************************/
1549 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int resolution)
1553 if (usecs < resolution)
1554 return 1; /* never round down to 0 */
1555 return usecs / resolution;
1558 /* Set interrupt moderation parameters */
1559 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1560 unsigned int rx_usecs, bool rx_adaptive,
1561 bool rx_may_override_tx)
1563 struct efx_channel *channel;
1564 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1565 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1567 EFX_ASSERT_RESET_SERIALISED(efx);
1569 if (tx_ticks > EFX_IRQ_MOD_MAX || rx_ticks > EFX_IRQ_MOD_MAX)
1572 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1573 !rx_may_override_tx) {
1574 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1575 "RX and TX IRQ moderation must be equal\n");
1579 efx->irq_rx_adaptive = rx_adaptive;
1580 efx->irq_rx_moderation = rx_ticks;
1581 efx_for_each_channel(channel, efx) {
1582 if (efx_channel_has_rx_queue(channel))
1583 channel->irq_moderation = rx_ticks;
1584 else if (efx_channel_has_tx_queues(channel))
1585 channel->irq_moderation = tx_ticks;
1591 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1592 unsigned int *rx_usecs, bool *rx_adaptive)
1594 *rx_adaptive = efx->irq_rx_adaptive;
1595 *rx_usecs = efx->irq_rx_moderation * EFX_IRQ_MOD_RESOLUTION;
1597 /* If channels are shared between RX and TX, so is IRQ
1598 * moderation. Otherwise, IRQ moderation is the same for all
1599 * TX channels and is not adaptive.
1601 if (efx->tx_channel_offset == 0)
1602 *tx_usecs = *rx_usecs;
1605 efx->channel[efx->tx_channel_offset]->irq_moderation *
1606 EFX_IRQ_MOD_RESOLUTION;
1609 /**************************************************************************
1613 **************************************************************************/
1615 /* Run periodically off the general workqueue */
1616 static void efx_monitor(struct work_struct *data)
1618 struct efx_nic *efx = container_of(data, struct efx_nic,
1621 netif_vdbg(efx, timer, efx->net_dev,
1622 "hardware monitor executing on CPU %d\n",
1623 raw_smp_processor_id());
1624 BUG_ON(efx->type->monitor == NULL);
1626 /* If the mac_lock is already held then it is likely a port
1627 * reconfiguration is already in place, which will likely do
1628 * most of the work of monitor() anyway. */
1629 if (mutex_trylock(&efx->mac_lock)) {
1630 if (efx->port_enabled)
1631 efx->type->monitor(efx);
1632 mutex_unlock(&efx->mac_lock);
1635 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1636 efx_monitor_interval);
1639 /**************************************************************************
1643 *************************************************************************/
1646 * Context: process, rtnl_lock() held.
1648 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1650 struct efx_nic *efx = netdev_priv(net_dev);
1651 struct mii_ioctl_data *data = if_mii(ifr);
1653 EFX_ASSERT_RESET_SERIALISED(efx);
1655 /* Convert phy_id from older PRTAD/DEVAD format */
1656 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1657 (data->phy_id & 0xfc00) == 0x0400)
1658 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1660 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1663 /**************************************************************************
1667 **************************************************************************/
1669 static void efx_init_napi(struct efx_nic *efx)
1671 struct efx_channel *channel;
1673 efx_for_each_channel(channel, efx) {
1674 channel->napi_dev = efx->net_dev;
1675 netif_napi_add(channel->napi_dev, &channel->napi_str,
1676 efx_poll, napi_weight);
1680 static void efx_fini_napi_channel(struct efx_channel *channel)
1682 if (channel->napi_dev)
1683 netif_napi_del(&channel->napi_str);
1684 channel->napi_dev = NULL;
1687 static void efx_fini_napi(struct efx_nic *efx)
1689 struct efx_channel *channel;
1691 efx_for_each_channel(channel, efx)
1692 efx_fini_napi_channel(channel);
1695 /**************************************************************************
1697 * Kernel netpoll interface
1699 *************************************************************************/
1701 #ifdef CONFIG_NET_POLL_CONTROLLER
1703 /* Although in the common case interrupts will be disabled, this is not
1704 * guaranteed. However, all our work happens inside the NAPI callback,
1705 * so no locking is required.
1707 static void efx_netpoll(struct net_device *net_dev)
1709 struct efx_nic *efx = netdev_priv(net_dev);
1710 struct efx_channel *channel;
1712 efx_for_each_channel(channel, efx)
1713 efx_schedule_channel(channel);
1718 /**************************************************************************
1720 * Kernel net device interface
1722 *************************************************************************/
1724 /* Context: process, rtnl_lock() held. */
1725 static int efx_net_open(struct net_device *net_dev)
1727 struct efx_nic *efx = netdev_priv(net_dev);
1728 EFX_ASSERT_RESET_SERIALISED(efx);
1730 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1731 raw_smp_processor_id());
1733 if (efx->state == STATE_DISABLED)
1735 if (efx->phy_mode & PHY_MODE_SPECIAL)
1737 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1740 /* Notify the kernel of the link state polled during driver load,
1741 * before the monitor starts running */
1742 efx_link_status_changed(efx);
1748 /* Context: process, rtnl_lock() held.
1749 * Note that the kernel will ignore our return code; this method
1750 * should really be a void.
1752 static int efx_net_stop(struct net_device *net_dev)
1754 struct efx_nic *efx = netdev_priv(net_dev);
1756 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1757 raw_smp_processor_id());
1759 if (efx->state != STATE_DISABLED) {
1760 /* Stop the device and flush all the channels */
1762 efx_fini_channels(efx);
1763 efx_init_channels(efx);
1769 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1770 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1772 struct efx_nic *efx = netdev_priv(net_dev);
1773 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1775 spin_lock_bh(&efx->stats_lock);
1776 efx->type->update_stats(efx);
1777 spin_unlock_bh(&efx->stats_lock);
1779 stats->rx_packets = mac_stats->rx_packets;
1780 stats->tx_packets = mac_stats->tx_packets;
1781 stats->rx_bytes = mac_stats->rx_bytes;
1782 stats->tx_bytes = mac_stats->tx_bytes;
1783 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1784 stats->multicast = mac_stats->rx_multicast;
1785 stats->collisions = mac_stats->tx_collision;
1786 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1787 mac_stats->rx_length_error);
1788 stats->rx_crc_errors = mac_stats->rx_bad;
1789 stats->rx_frame_errors = mac_stats->rx_align_error;
1790 stats->rx_fifo_errors = mac_stats->rx_overflow;
1791 stats->rx_missed_errors = mac_stats->rx_missed;
1792 stats->tx_window_errors = mac_stats->tx_late_collision;
1794 stats->rx_errors = (stats->rx_length_errors +
1795 stats->rx_crc_errors +
1796 stats->rx_frame_errors +
1797 mac_stats->rx_symbol_error);
1798 stats->tx_errors = (stats->tx_window_errors +
1804 /* Context: netif_tx_lock held, BHs disabled. */
1805 static void efx_watchdog(struct net_device *net_dev)
1807 struct efx_nic *efx = netdev_priv(net_dev);
1809 netif_err(efx, tx_err, efx->net_dev,
1810 "TX stuck with port_enabled=%d: resetting channels\n",
1813 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1817 /* Context: process, rtnl_lock() held. */
1818 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1820 struct efx_nic *efx = netdev_priv(net_dev);
1823 EFX_ASSERT_RESET_SERIALISED(efx);
1825 if (new_mtu > EFX_MAX_MTU)
1830 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1832 efx_fini_channels(efx);
1834 mutex_lock(&efx->mac_lock);
1835 /* Reconfigure the MAC before enabling the dma queues so that
1836 * the RX buffers don't overflow */
1837 net_dev->mtu = new_mtu;
1838 efx->mac_op->reconfigure(efx);
1839 mutex_unlock(&efx->mac_lock);
1841 efx_init_channels(efx);
1847 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1849 struct efx_nic *efx = netdev_priv(net_dev);
1850 struct sockaddr *addr = data;
1851 char *new_addr = addr->sa_data;
1853 EFX_ASSERT_RESET_SERIALISED(efx);
1855 if (!is_valid_ether_addr(new_addr)) {
1856 netif_err(efx, drv, efx->net_dev,
1857 "invalid ethernet MAC address requested: %pM\n",
1862 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1864 /* Reconfigure the MAC */
1865 mutex_lock(&efx->mac_lock);
1866 efx->mac_op->reconfigure(efx);
1867 mutex_unlock(&efx->mac_lock);
1872 /* Context: netif_addr_lock held, BHs disabled. */
1873 static void efx_set_multicast_list(struct net_device *net_dev)
1875 struct efx_nic *efx = netdev_priv(net_dev);
1876 struct netdev_hw_addr *ha;
1877 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1881 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1883 /* Build multicast hash table */
1884 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1885 memset(mc_hash, 0xff, sizeof(*mc_hash));
1887 memset(mc_hash, 0x00, sizeof(*mc_hash));
1888 netdev_for_each_mc_addr(ha, net_dev) {
1889 crc = ether_crc_le(ETH_ALEN, ha->addr);
1890 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1891 set_bit_le(bit, mc_hash->byte);
1894 /* Broadcast packets go through the multicast hash filter.
1895 * ether_crc_le() of the broadcast address is 0xbe2612ff
1896 * so we always add bit 0xff to the mask.
1898 set_bit_le(0xff, mc_hash->byte);
1901 if (efx->port_enabled)
1902 queue_work(efx->workqueue, &efx->mac_work);
1903 /* Otherwise efx_start_port() will do this */
1906 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
1908 struct efx_nic *efx = netdev_priv(net_dev);
1910 /* If disabling RX n-tuple filtering, clear existing filters */
1911 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1912 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
1917 static const struct net_device_ops efx_netdev_ops = {
1918 .ndo_open = efx_net_open,
1919 .ndo_stop = efx_net_stop,
1920 .ndo_get_stats64 = efx_net_stats,
1921 .ndo_tx_timeout = efx_watchdog,
1922 .ndo_start_xmit = efx_hard_start_xmit,
1923 .ndo_validate_addr = eth_validate_addr,
1924 .ndo_do_ioctl = efx_ioctl,
1925 .ndo_change_mtu = efx_change_mtu,
1926 .ndo_set_mac_address = efx_set_mac_address,
1927 .ndo_set_rx_mode = efx_set_multicast_list,
1928 .ndo_set_features = efx_set_features,
1929 #ifdef CONFIG_NET_POLL_CONTROLLER
1930 .ndo_poll_controller = efx_netpoll,
1932 .ndo_setup_tc = efx_setup_tc,
1933 #ifdef CONFIG_RFS_ACCEL
1934 .ndo_rx_flow_steer = efx_filter_rfs,
1938 static void efx_update_name(struct efx_nic *efx)
1940 strcpy(efx->name, efx->net_dev->name);
1941 efx_mtd_rename(efx);
1942 efx_set_channel_names(efx);
1945 static int efx_netdev_event(struct notifier_block *this,
1946 unsigned long event, void *ptr)
1948 struct net_device *net_dev = ptr;
1950 if (net_dev->netdev_ops == &efx_netdev_ops &&
1951 event == NETDEV_CHANGENAME)
1952 efx_update_name(netdev_priv(net_dev));
1957 static struct notifier_block efx_netdev_notifier = {
1958 .notifier_call = efx_netdev_event,
1962 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1964 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1965 return sprintf(buf, "%d\n", efx->phy_type);
1967 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1969 static int efx_register_netdev(struct efx_nic *efx)
1971 struct net_device *net_dev = efx->net_dev;
1972 struct efx_channel *channel;
1975 net_dev->watchdog_timeo = 5 * HZ;
1976 net_dev->irq = efx->pci_dev->irq;
1977 net_dev->netdev_ops = &efx_netdev_ops;
1978 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1980 /* Clear MAC statistics */
1981 efx->mac_op->update_stats(efx);
1982 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1986 rc = dev_alloc_name(net_dev, net_dev->name);
1989 efx_update_name(efx);
1991 rc = register_netdevice(net_dev);
1995 efx_for_each_channel(channel, efx) {
1996 struct efx_tx_queue *tx_queue;
1997 efx_for_each_channel_tx_queue(tx_queue, channel)
1998 efx_init_tx_queue_core_txq(tx_queue);
2001 /* Always start with carrier off; PHY events will detect the link */
2002 netif_carrier_off(efx->net_dev);
2006 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2008 netif_err(efx, drv, efx->net_dev,
2009 "failed to init net dev attributes\n");
2010 goto fail_registered;
2017 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2021 unregister_netdev(net_dev);
2025 static void efx_unregister_netdev(struct efx_nic *efx)
2027 struct efx_channel *channel;
2028 struct efx_tx_queue *tx_queue;
2033 BUG_ON(netdev_priv(efx->net_dev) != efx);
2035 /* Free up any skbs still remaining. This has to happen before
2036 * we try to unregister the netdev as running their destructors
2037 * may be needed to get the device ref. count to 0. */
2038 efx_for_each_channel(channel, efx) {
2039 efx_for_each_channel_tx_queue(tx_queue, channel)
2040 efx_release_tx_buffers(tx_queue);
2043 if (efx_dev_registered(efx)) {
2044 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2045 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2046 unregister_netdev(efx->net_dev);
2050 /**************************************************************************
2052 * Device reset and suspend
2054 **************************************************************************/
2056 /* Tears down the entire software state and most of the hardware state
2058 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2060 EFX_ASSERT_RESET_SERIALISED(efx);
2063 mutex_lock(&efx->mac_lock);
2065 efx_fini_channels(efx);
2066 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2067 efx->phy_op->fini(efx);
2068 efx->type->fini(efx);
2071 /* This function will always ensure that the locks acquired in
2072 * efx_reset_down() are released. A failure return code indicates
2073 * that we were unable to reinitialise the hardware, and the
2074 * driver should be disabled. If ok is false, then the rx and tx
2075 * engines are not restarted, pending a RESET_DISABLE. */
2076 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2080 EFX_ASSERT_RESET_SERIALISED(efx);
2082 rc = efx->type->init(efx);
2084 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2091 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2092 rc = efx->phy_op->init(efx);
2095 if (efx->phy_op->reconfigure(efx))
2096 netif_err(efx, drv, efx->net_dev,
2097 "could not restore PHY settings\n");
2100 efx->mac_op->reconfigure(efx);
2102 efx_init_channels(efx);
2103 efx_restore_filters(efx);
2105 mutex_unlock(&efx->mac_lock);
2112 efx->port_initialized = false;
2114 mutex_unlock(&efx->mac_lock);
2119 /* Reset the NIC using the specified method. Note that the reset may
2120 * fail, in which case the card will be left in an unusable state.
2122 * Caller must hold the rtnl_lock.
2124 int efx_reset(struct efx_nic *efx, enum reset_type method)
2129 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2130 RESET_TYPE(method));
2132 netif_device_detach(efx->net_dev);
2133 efx_reset_down(efx, method);
2135 rc = efx->type->reset(efx, method);
2137 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2141 /* Clear flags for the scopes we covered. We assume the NIC and
2142 * driver are now quiescent so that there is no race here.
2144 efx->reset_pending &= -(1 << (method + 1));
2146 /* Reinitialise bus-mastering, which may have been turned off before
2147 * the reset was scheduled. This is still appropriate, even in the
2148 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2149 * can respond to requests. */
2150 pci_set_master(efx->pci_dev);
2153 /* Leave device stopped if necessary */
2154 disabled = rc || method == RESET_TYPE_DISABLE;
2155 rc2 = efx_reset_up(efx, method, !disabled);
2163 dev_close(efx->net_dev);
2164 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2165 efx->state = STATE_DISABLED;
2167 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2168 netif_device_attach(efx->net_dev);
2173 /* The worker thread exists so that code that cannot sleep can
2174 * schedule a reset for later.
2176 static void efx_reset_work(struct work_struct *data)
2178 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2179 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2184 /* If we're not RUNNING then don't reset. Leave the reset_pending
2185 * flags set so that efx_pci_probe_main will be retried */
2186 if (efx->state != STATE_RUNNING) {
2187 netif_info(efx, drv, efx->net_dev,
2188 "scheduled reset quenched. NIC not RUNNING\n");
2193 (void)efx_reset(efx, fls(pending) - 1);
2197 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2199 enum reset_type method;
2202 case RESET_TYPE_INVISIBLE:
2203 case RESET_TYPE_ALL:
2204 case RESET_TYPE_WORLD:
2205 case RESET_TYPE_DISABLE:
2207 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2208 RESET_TYPE(method));
2211 method = efx->type->map_reset_reason(type);
2212 netif_dbg(efx, drv, efx->net_dev,
2213 "scheduling %s reset for %s\n",
2214 RESET_TYPE(method), RESET_TYPE(type));
2218 set_bit(method, &efx->reset_pending);
2220 /* efx_process_channel() will no longer read events once a
2221 * reset is scheduled. So switch back to poll'd MCDI completions. */
2222 efx_mcdi_mode_poll(efx);
2224 queue_work(reset_workqueue, &efx->reset_work);
2227 /**************************************************************************
2229 * List of NICs we support
2231 **************************************************************************/
2233 /* PCI device ID table */
2234 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2235 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2236 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2237 .driver_data = (unsigned long) &falcon_a1_nic_type},
2238 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2239 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2240 .driver_data = (unsigned long) &falcon_b0_nic_type},
2241 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2242 .driver_data = (unsigned long) &siena_a0_nic_type},
2243 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2244 .driver_data = (unsigned long) &siena_a0_nic_type},
2245 {0} /* end of list */
2248 /**************************************************************************
2250 * Dummy PHY/MAC operations
2252 * Can be used for some unimplemented operations
2253 * Needed so all function pointers are valid and do not have to be tested
2256 **************************************************************************/
2257 int efx_port_dummy_op_int(struct efx_nic *efx)
2261 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2263 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2268 static const struct efx_phy_operations efx_dummy_phy_operations = {
2269 .init = efx_port_dummy_op_int,
2270 .reconfigure = efx_port_dummy_op_int,
2271 .poll = efx_port_dummy_op_poll,
2272 .fini = efx_port_dummy_op_void,
2275 /**************************************************************************
2279 **************************************************************************/
2281 /* This zeroes out and then fills in the invariants in a struct
2282 * efx_nic (including all sub-structures).
2284 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2285 struct pci_dev *pci_dev, struct net_device *net_dev)
2289 /* Initialise common structures */
2290 memset(efx, 0, sizeof(*efx));
2291 spin_lock_init(&efx->biu_lock);
2292 #ifdef CONFIG_SFC_MTD
2293 INIT_LIST_HEAD(&efx->mtd_list);
2295 INIT_WORK(&efx->reset_work, efx_reset_work);
2296 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2297 efx->pci_dev = pci_dev;
2298 efx->msg_enable = debug;
2299 efx->state = STATE_INIT;
2300 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2302 efx->net_dev = net_dev;
2303 spin_lock_init(&efx->stats_lock);
2304 mutex_init(&efx->mac_lock);
2305 efx->mac_op = type->default_mac_ops;
2306 efx->phy_op = &efx_dummy_phy_operations;
2307 efx->mdio.dev = net_dev;
2308 INIT_WORK(&efx->mac_work, efx_mac_work);
2310 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2311 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2312 if (!efx->channel[i])
2318 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2320 /* Higher numbered interrupt modes are less capable! */
2321 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2324 /* Would be good to use the net_dev name, but we're too early */
2325 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2327 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2328 if (!efx->workqueue)
2334 efx_fini_struct(efx);
2338 static void efx_fini_struct(struct efx_nic *efx)
2342 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2343 kfree(efx->channel[i]);
2345 if (efx->workqueue) {
2346 destroy_workqueue(efx->workqueue);
2347 efx->workqueue = NULL;
2351 /**************************************************************************
2355 **************************************************************************/
2357 /* Main body of final NIC shutdown code
2358 * This is called only at module unload (or hotplug removal).
2360 static void efx_pci_remove_main(struct efx_nic *efx)
2362 #ifdef CONFIG_RFS_ACCEL
2363 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2364 efx->net_dev->rx_cpu_rmap = NULL;
2366 efx_nic_fini_interrupt(efx);
2367 efx_fini_channels(efx);
2369 efx->type->fini(efx);
2371 efx_remove_all(efx);
2374 /* Final NIC shutdown
2375 * This is called only at module unload (or hotplug removal).
2377 static void efx_pci_remove(struct pci_dev *pci_dev)
2379 struct efx_nic *efx;
2381 efx = pci_get_drvdata(pci_dev);
2385 /* Mark the NIC as fini, then stop the interface */
2387 efx->state = STATE_FINI;
2388 dev_close(efx->net_dev);
2390 /* Allow any queued efx_resets() to complete */
2393 efx_unregister_netdev(efx);
2395 efx_mtd_remove(efx);
2397 /* Wait for any scheduled resets to complete. No more will be
2398 * scheduled from this point because efx_stop_all() has been
2399 * called, we are no longer registered with driverlink, and
2400 * the net_device's have been removed. */
2401 cancel_work_sync(&efx->reset_work);
2403 efx_pci_remove_main(efx);
2406 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2408 pci_set_drvdata(pci_dev, NULL);
2409 efx_fini_struct(efx);
2410 free_netdev(efx->net_dev);
2413 /* Main body of NIC initialisation
2414 * This is called at module load (or hotplug insertion, theoretically).
2416 static int efx_pci_probe_main(struct efx_nic *efx)
2420 /* Do start-of-day initialisation */
2421 rc = efx_probe_all(efx);
2427 rc = efx->type->init(efx);
2429 netif_err(efx, probe, efx->net_dev,
2430 "failed to initialise NIC\n");
2434 rc = efx_init_port(efx);
2436 netif_err(efx, probe, efx->net_dev,
2437 "failed to initialise port\n");
2441 efx_init_channels(efx);
2443 rc = efx_nic_init_interrupt(efx);
2450 efx_fini_channels(efx);
2453 efx->type->fini(efx);
2456 efx_remove_all(efx);
2461 /* NIC initialisation
2463 * This is called at module load (or hotplug insertion,
2464 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2465 * sets up and registers the network devices with the kernel and hooks
2466 * the interrupt service routine. It does not prepare the device for
2467 * transmission; this is left to the first time one of the network
2468 * interfaces is brought up (i.e. efx_net_open).
2470 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2471 const struct pci_device_id *entry)
2473 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2474 struct net_device *net_dev;
2475 struct efx_nic *efx;
2478 /* Allocate and initialise a struct net_device and struct efx_nic */
2479 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2483 net_dev->features |= (type->offload_features | NETIF_F_SG |
2484 NETIF_F_HIGHDMA | NETIF_F_TSO |
2486 if (type->offload_features & NETIF_F_V6_CSUM)
2487 net_dev->features |= NETIF_F_TSO6;
2488 /* Mask for features that also apply to VLAN devices */
2489 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2490 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2492 /* All offloads can be toggled */
2493 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2494 efx = netdev_priv(net_dev);
2495 pci_set_drvdata(pci_dev, efx);
2496 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2497 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2501 netif_info(efx, probe, efx->net_dev,
2502 "Solarflare NIC detected\n");
2504 /* Set up basic I/O (BAR mappings etc) */
2505 rc = efx_init_io(efx);
2509 /* No serialisation is required with the reset path because
2510 * we're in STATE_INIT. */
2511 for (i = 0; i < 5; i++) {
2512 rc = efx_pci_probe_main(efx);
2514 /* Serialise against efx_reset(). No more resets will be
2515 * scheduled since efx_stop_all() has been called, and we
2516 * have not and never have been registered with either
2517 * the rtnetlink or driverlink layers. */
2518 cancel_work_sync(&efx->reset_work);
2521 if (efx->reset_pending) {
2522 /* If there was a scheduled reset during
2523 * probe, the NIC is probably hosed anyway */
2524 efx_pci_remove_main(efx);
2531 /* Retry if a recoverably reset event has been scheduled */
2532 if (efx->reset_pending &
2533 ~(1 << RESET_TYPE_INVISIBLE | 1 << RESET_TYPE_ALL) ||
2534 !efx->reset_pending)
2537 efx->reset_pending = 0;
2541 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2545 /* Switch to the running state before we expose the device to the OS,
2546 * so that dev_open()|efx_start_all() will actually start the device */
2547 efx->state = STATE_RUNNING;
2549 rc = efx_register_netdev(efx);
2553 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2556 efx_mtd_probe(efx); /* allowed to fail */
2561 efx_pci_remove_main(efx);
2566 efx_fini_struct(efx);
2569 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2570 free_netdev(net_dev);
2574 static int efx_pm_freeze(struct device *dev)
2576 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2578 efx->state = STATE_FINI;
2580 netif_device_detach(efx->net_dev);
2583 efx_fini_channels(efx);
2588 static int efx_pm_thaw(struct device *dev)
2590 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2592 efx->state = STATE_INIT;
2594 efx_init_channels(efx);
2596 mutex_lock(&efx->mac_lock);
2597 efx->phy_op->reconfigure(efx);
2598 mutex_unlock(&efx->mac_lock);
2602 netif_device_attach(efx->net_dev);
2604 efx->state = STATE_RUNNING;
2606 efx->type->resume_wol(efx);
2608 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2609 queue_work(reset_workqueue, &efx->reset_work);
2614 static int efx_pm_poweroff(struct device *dev)
2616 struct pci_dev *pci_dev = to_pci_dev(dev);
2617 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2619 efx->type->fini(efx);
2621 efx->reset_pending = 0;
2623 pci_save_state(pci_dev);
2624 return pci_set_power_state(pci_dev, PCI_D3hot);
2627 /* Used for both resume and restore */
2628 static int efx_pm_resume(struct device *dev)
2630 struct pci_dev *pci_dev = to_pci_dev(dev);
2631 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2634 rc = pci_set_power_state(pci_dev, PCI_D0);
2637 pci_restore_state(pci_dev);
2638 rc = pci_enable_device(pci_dev);
2641 pci_set_master(efx->pci_dev);
2642 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2645 rc = efx->type->init(efx);
2652 static int efx_pm_suspend(struct device *dev)
2657 rc = efx_pm_poweroff(dev);
2663 static const struct dev_pm_ops efx_pm_ops = {
2664 .suspend = efx_pm_suspend,
2665 .resume = efx_pm_resume,
2666 .freeze = efx_pm_freeze,
2667 .thaw = efx_pm_thaw,
2668 .poweroff = efx_pm_poweroff,
2669 .restore = efx_pm_resume,
2672 static struct pci_driver efx_pci_driver = {
2673 .name = KBUILD_MODNAME,
2674 .id_table = efx_pci_table,
2675 .probe = efx_pci_probe,
2676 .remove = efx_pci_remove,
2677 .driver.pm = &efx_pm_ops,
2680 /**************************************************************************
2682 * Kernel module interface
2684 *************************************************************************/
2686 module_param(interrupt_mode, uint, 0444);
2687 MODULE_PARM_DESC(interrupt_mode,
2688 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2690 static int __init efx_init_module(void)
2694 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2696 rc = register_netdevice_notifier(&efx_netdev_notifier);
2700 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2701 if (!reset_workqueue) {
2706 rc = pci_register_driver(&efx_pci_driver);
2713 destroy_workqueue(reset_workqueue);
2715 unregister_netdevice_notifier(&efx_netdev_notifier);
2720 static void __exit efx_exit_module(void)
2722 printk(KERN_INFO "Solarflare NET driver unloading\n");
2724 pci_unregister_driver(&efx_pci_driver);
2725 destroy_workqueue(reset_workqueue);
2726 unregister_netdevice_notifier(&efx_netdev_notifier);
2730 module_init(efx_init_module);
2731 module_exit(efx_exit_module);
2733 MODULE_AUTHOR("Solarflare Communications and "
2734 "Michael Brown <mbrown@fensystems.co.uk>");
2735 MODULE_DESCRIPTION("Solarflare Communications network driver");
2736 MODULE_LICENSE("GPL");
2737 MODULE_DEVICE_TABLE(pci, efx_pci_table);