1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *const efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *const efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* Initial interrupt moderation settings. They can be modified after
126 * module load with ethtool.
128 * The default for RX should strike a balance between increasing the
129 * round-trip latency and reducing overhead.
131 static unsigned int rx_irq_mod_usec = 60;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * This default is chosen to ensure that a 10G link does not go idle
137 * while a TX queue is stopped after it has become full. A queue is
138 * restarted when it drops below half full. The time this takes (assuming
139 * worst case 3 descriptors per packet and 1024 descriptors) is
140 * 512 / 3 * 1.2 = 205 usec.
142 static unsigned int tx_irq_mod_usec = 150;
144 /* This is the first interrupt mode to try out of:
149 static unsigned int interrupt_mode;
151 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
152 * i.e. the number of CPUs among which we may distribute simultaneous
153 * interrupt handling.
155 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
156 * The default (0) means to assign an interrupt to each core.
158 static unsigned int rss_cpus;
159 module_param(rss_cpus, uint, 0444);
160 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
162 static int phy_flash_cfg;
163 module_param(phy_flash_cfg, int, 0644);
164 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
166 static unsigned irq_adapt_low_thresh = 10000;
167 module_param(irq_adapt_low_thresh, uint, 0644);
168 MODULE_PARM_DESC(irq_adapt_low_thresh,
169 "Threshold score for reducing IRQ moderation");
171 static unsigned irq_adapt_high_thresh = 20000;
172 module_param(irq_adapt_high_thresh, uint, 0644);
173 MODULE_PARM_DESC(irq_adapt_high_thresh,
174 "Threshold score for increasing IRQ moderation");
176 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
177 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
178 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
179 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
180 module_param(debug, uint, 0);
181 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
183 /**************************************************************************
185 * Utility functions and prototypes
187 *************************************************************************/
189 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq);
190 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq);
191 static void efx_remove_channel(struct efx_channel *channel);
192 static void efx_remove_channels(struct efx_nic *efx);
193 static const struct efx_channel_type efx_default_channel_type;
194 static void efx_remove_port(struct efx_nic *efx);
195 static void efx_init_napi_channel(struct efx_channel *channel);
196 static void efx_fini_napi(struct efx_nic *efx);
197 static void efx_fini_napi_channel(struct efx_channel *channel);
198 static void efx_fini_struct(struct efx_nic *efx);
199 static void efx_start_all(struct efx_nic *efx);
200 static void efx_stop_all(struct efx_nic *efx);
202 #define EFX_ASSERT_RESET_SERIALISED(efx) \
204 if ((efx->state == STATE_RUNNING) || \
205 (efx->state == STATE_DISABLED)) \
209 /**************************************************************************
211 * Event queue processing
213 *************************************************************************/
215 /* Process channel's event queue
217 * This function is responsible for processing the event queue of a
218 * single channel. The caller must guarantee that this function will
219 * never be concurrently called more than once on the same channel,
220 * though different channels may be being processed concurrently.
222 static int efx_process_channel(struct efx_channel *channel, int budget)
226 if (unlikely(!channel->enabled))
229 spent = efx_nic_process_eventq(channel, budget);
230 if (spent && efx_channel_has_rx_queue(channel)) {
231 struct efx_rx_queue *rx_queue =
232 efx_channel_get_rx_queue(channel);
234 /* Deliver last RX packet. */
235 if (channel->rx_pkt) {
236 __efx_rx_packet(channel, channel->rx_pkt);
237 channel->rx_pkt = NULL;
239 if (rx_queue->enabled) {
240 efx_rx_strategy(channel);
241 efx_fast_push_rx_descriptors(rx_queue);
248 /* Mark channel as finished processing
250 * Note that since we will not receive further interrupts for this
251 * channel before we finish processing and call the eventq_read_ack()
252 * method, there is no need to use the interrupt hold-off timers.
254 static inline void efx_channel_processed(struct efx_channel *channel)
256 /* The interrupt handler for this channel may set work_pending
257 * as soon as we acknowledge the events we've seen. Make sure
258 * it's cleared before then. */
259 channel->work_pending = false;
262 efx_nic_eventq_read_ack(channel);
267 * NAPI guarantees serialisation of polls of the same device, which
268 * provides the guarantee required by efx_process_channel().
270 static int efx_poll(struct napi_struct *napi, int budget)
272 struct efx_channel *channel =
273 container_of(napi, struct efx_channel, napi_str);
274 struct efx_nic *efx = channel->efx;
277 netif_vdbg(efx, intr, efx->net_dev,
278 "channel %d NAPI poll executing on CPU %d\n",
279 channel->channel, raw_smp_processor_id());
281 spent = efx_process_channel(channel, budget);
283 if (spent < budget) {
284 if (efx_channel_has_rx_queue(channel) &&
285 efx->irq_rx_adaptive &&
286 unlikely(++channel->irq_count == 1000)) {
287 if (unlikely(channel->irq_mod_score <
288 irq_adapt_low_thresh)) {
289 if (channel->irq_moderation > 1) {
290 channel->irq_moderation -= 1;
291 efx->type->push_irq_moderation(channel);
293 } else if (unlikely(channel->irq_mod_score >
294 irq_adapt_high_thresh)) {
295 if (channel->irq_moderation <
296 efx->irq_rx_moderation) {
297 channel->irq_moderation += 1;
298 efx->type->push_irq_moderation(channel);
301 channel->irq_count = 0;
302 channel->irq_mod_score = 0;
305 efx_filter_rfs_expire(channel);
307 /* There is no race here; although napi_disable() will
308 * only wait for napi_complete(), this isn't a problem
309 * since efx_channel_processed() will have no effect if
310 * interrupts have already been disabled.
313 efx_channel_processed(channel);
319 /* Process the eventq of the specified channel immediately on this CPU
321 * Disable hardware generated interrupts, wait for any existing
322 * processing to finish, then directly poll (and ack ) the eventq.
323 * Finally reenable NAPI and interrupts.
325 * This is for use only during a loopback self-test. It must not
326 * deliver any packets up the stack as this can result in deadlock.
328 void efx_process_channel_now(struct efx_channel *channel)
330 struct efx_nic *efx = channel->efx;
332 BUG_ON(channel->channel >= efx->n_channels);
333 BUG_ON(!channel->enabled);
334 BUG_ON(!efx->loopback_selftest);
336 /* Disable interrupts and wait for ISRs to complete */
337 efx_nic_disable_interrupts(efx);
338 if (efx->legacy_irq) {
339 synchronize_irq(efx->legacy_irq);
340 efx->legacy_irq_enabled = false;
343 synchronize_irq(channel->irq);
345 /* Wait for any NAPI processing to complete */
346 napi_disable(&channel->napi_str);
348 /* Poll the channel */
349 efx_process_channel(channel, channel->eventq_mask + 1);
351 /* Ack the eventq. This may cause an interrupt to be generated
352 * when they are reenabled */
353 efx_channel_processed(channel);
355 napi_enable(&channel->napi_str);
357 efx->legacy_irq_enabled = true;
358 efx_nic_enable_interrupts(efx);
361 /* Create event queue
362 * Event queue memory allocations are done only once. If the channel
363 * is reset, the memory buffer will be reused; this guards against
364 * errors during channel reset and also simplifies interrupt handling.
366 static int efx_probe_eventq(struct efx_channel *channel)
368 struct efx_nic *efx = channel->efx;
369 unsigned long entries;
371 netif_dbg(efx, probe, efx->net_dev,
372 "chan %d create event queue\n", channel->channel);
374 /* Build an event queue with room for one event per tx and rx buffer,
375 * plus some extra for link state events and MCDI completions. */
376 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
377 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
378 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
380 return efx_nic_probe_eventq(channel);
383 /* Prepare channel's event queue */
384 static void efx_init_eventq(struct efx_channel *channel)
386 netif_dbg(channel->efx, drv, channel->efx->net_dev,
387 "chan %d init event queue\n", channel->channel);
389 channel->eventq_read_ptr = 0;
391 efx_nic_init_eventq(channel);
394 /* Enable event queue processing and NAPI */
395 static void efx_start_eventq(struct efx_channel *channel)
397 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
398 "chan %d start event queue\n", channel->channel);
400 /* The interrupt handler for this channel may set work_pending
401 * as soon as we enable it. Make sure it's cleared before
402 * then. Similarly, make sure it sees the enabled flag set.
404 channel->work_pending = false;
405 channel->enabled = true;
408 napi_enable(&channel->napi_str);
409 efx_nic_eventq_read_ack(channel);
412 /* Disable event queue processing and NAPI */
413 static void efx_stop_eventq(struct efx_channel *channel)
415 if (!channel->enabled)
418 napi_disable(&channel->napi_str);
419 channel->enabled = false;
422 static void efx_fini_eventq(struct efx_channel *channel)
424 netif_dbg(channel->efx, drv, channel->efx->net_dev,
425 "chan %d fini event queue\n", channel->channel);
427 efx_nic_fini_eventq(channel);
430 static void efx_remove_eventq(struct efx_channel *channel)
432 netif_dbg(channel->efx, drv, channel->efx->net_dev,
433 "chan %d remove event queue\n", channel->channel);
435 efx_nic_remove_eventq(channel);
438 /**************************************************************************
442 *************************************************************************/
444 /* Allocate and initialise a channel structure. */
445 static struct efx_channel *
446 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
448 struct efx_channel *channel;
449 struct efx_rx_queue *rx_queue;
450 struct efx_tx_queue *tx_queue;
453 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
458 channel->channel = i;
459 channel->type = &efx_default_channel_type;
461 for (j = 0; j < EFX_TXQ_TYPES; j++) {
462 tx_queue = &channel->tx_queue[j];
464 tx_queue->queue = i * EFX_TXQ_TYPES + j;
465 tx_queue->channel = channel;
468 rx_queue = &channel->rx_queue;
470 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
471 (unsigned long)rx_queue);
476 /* Allocate and initialise a channel structure, copying parameters
477 * (but not resources) from an old channel structure.
479 static struct efx_channel *
480 efx_copy_channel(const struct efx_channel *old_channel)
482 struct efx_channel *channel;
483 struct efx_rx_queue *rx_queue;
484 struct efx_tx_queue *tx_queue;
487 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
491 *channel = *old_channel;
493 channel->napi_dev = NULL;
494 memset(&channel->eventq, 0, sizeof(channel->eventq));
496 for (j = 0; j < EFX_TXQ_TYPES; j++) {
497 tx_queue = &channel->tx_queue[j];
498 if (tx_queue->channel)
499 tx_queue->channel = channel;
500 tx_queue->buffer = NULL;
501 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
504 rx_queue = &channel->rx_queue;
505 rx_queue->buffer = NULL;
506 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
507 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
508 (unsigned long)rx_queue);
513 static int efx_probe_channel(struct efx_channel *channel)
515 struct efx_tx_queue *tx_queue;
516 struct efx_rx_queue *rx_queue;
519 netif_dbg(channel->efx, probe, channel->efx->net_dev,
520 "creating channel %d\n", channel->channel);
522 rc = channel->type->pre_probe(channel);
526 rc = efx_probe_eventq(channel);
530 efx_for_each_channel_tx_queue(tx_queue, channel) {
531 rc = efx_probe_tx_queue(tx_queue);
536 efx_for_each_channel_rx_queue(rx_queue, channel) {
537 rc = efx_probe_rx_queue(rx_queue);
542 channel->n_rx_frm_trunc = 0;
547 efx_remove_channel(channel);
552 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
554 struct efx_nic *efx = channel->efx;
558 number = channel->channel;
559 if (efx->tx_channel_offset == 0) {
561 } else if (channel->channel < efx->tx_channel_offset) {
565 number -= efx->tx_channel_offset;
567 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
570 static void efx_set_channel_names(struct efx_nic *efx)
572 struct efx_channel *channel;
574 efx_for_each_channel(channel, efx)
575 channel->type->get_name(channel,
576 efx->channel_name[channel->channel],
577 sizeof(efx->channel_name[0]));
580 static int efx_probe_channels(struct efx_nic *efx)
582 struct efx_channel *channel;
585 /* Restart special buffer allocation */
586 efx->next_buffer_table = 0;
588 efx_for_each_channel(channel, efx) {
589 rc = efx_probe_channel(channel);
591 netif_err(efx, probe, efx->net_dev,
592 "failed to create channel %d\n",
597 efx_set_channel_names(efx);
602 efx_remove_channels(efx);
606 /* Channels are shutdown and reinitialised whilst the NIC is running
607 * to propagate configuration changes (mtu, checksum offload), or
608 * to clear hardware error conditions
610 static void efx_start_datapath(struct efx_nic *efx)
612 struct efx_tx_queue *tx_queue;
613 struct efx_rx_queue *rx_queue;
614 struct efx_channel *channel;
616 /* Calculate the rx buffer allocation parameters required to
617 * support the current MTU, including padding for header
618 * alignment and overruns.
620 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
621 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
622 efx->type->rx_buffer_hash_size +
623 efx->type->rx_buffer_padding);
624 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
625 sizeof(struct efx_rx_page_state));
627 /* Initialise the channels */
628 efx_for_each_channel(channel, efx) {
629 efx_for_each_channel_tx_queue(tx_queue, channel)
630 efx_init_tx_queue(tx_queue);
632 /* The rx buffer allocation strategy is MTU dependent */
633 efx_rx_strategy(channel);
635 efx_for_each_channel_rx_queue(rx_queue, channel) {
636 efx_init_rx_queue(rx_queue);
637 efx_nic_generate_fill_event(rx_queue);
640 WARN_ON(channel->rx_pkt != NULL);
641 efx_rx_strategy(channel);
644 if (netif_device_present(efx->net_dev))
645 netif_tx_wake_all_queues(efx->net_dev);
648 static void efx_stop_datapath(struct efx_nic *efx)
650 struct efx_channel *channel;
651 struct efx_tx_queue *tx_queue;
652 struct efx_rx_queue *rx_queue;
655 EFX_ASSERT_RESET_SERIALISED(efx);
656 BUG_ON(efx->port_enabled);
658 rc = efx_nic_flush_queues(efx);
659 if (rc && EFX_WORKAROUND_7803(efx)) {
660 /* Schedule a reset to recover from the flush failure. The
661 * descriptor caches reference memory we're about to free,
662 * but falcon_reconfigure_mac_wrapper() won't reconnect
663 * the MACs because of the pending reset. */
664 netif_err(efx, drv, efx->net_dev,
665 "Resetting to recover from flush failure\n");
666 efx_schedule_reset(efx, RESET_TYPE_ALL);
668 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
670 netif_dbg(efx, drv, efx->net_dev,
671 "successfully flushed all queues\n");
674 efx_for_each_channel(channel, efx) {
675 /* RX packet processing is pipelined, so wait for the
676 * NAPI handler to complete. At least event queue 0
677 * might be kept active by non-data events, so don't
678 * use napi_synchronize() but actually disable NAPI
681 if (efx_channel_has_rx_queue(channel)) {
682 efx_stop_eventq(channel);
683 efx_start_eventq(channel);
686 efx_for_each_channel_rx_queue(rx_queue, channel)
687 efx_fini_rx_queue(rx_queue);
688 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
689 efx_fini_tx_queue(tx_queue);
693 static void efx_remove_channel(struct efx_channel *channel)
695 struct efx_tx_queue *tx_queue;
696 struct efx_rx_queue *rx_queue;
698 netif_dbg(channel->efx, drv, channel->efx->net_dev,
699 "destroy chan %d\n", channel->channel);
701 efx_for_each_channel_rx_queue(rx_queue, channel)
702 efx_remove_rx_queue(rx_queue);
703 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
704 efx_remove_tx_queue(tx_queue);
705 efx_remove_eventq(channel);
708 static void efx_remove_channels(struct efx_nic *efx)
710 struct efx_channel *channel;
712 efx_for_each_channel(channel, efx)
713 efx_remove_channel(channel);
717 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
719 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
720 u32 old_rxq_entries, old_txq_entries;
721 unsigned i, next_buffer_table = 0;
724 /* Not all channels should be reallocated. We must avoid
725 * reallocating their buffer table entries.
727 efx_for_each_channel(channel, efx) {
728 struct efx_rx_queue *rx_queue;
729 struct efx_tx_queue *tx_queue;
731 if (channel->type->copy)
733 next_buffer_table = max(next_buffer_table,
734 channel->eventq.index +
735 channel->eventq.entries);
736 efx_for_each_channel_rx_queue(rx_queue, channel)
737 next_buffer_table = max(next_buffer_table,
738 rx_queue->rxd.index +
739 rx_queue->rxd.entries);
740 efx_for_each_channel_tx_queue(tx_queue, channel)
741 next_buffer_table = max(next_buffer_table,
742 tx_queue->txd.index +
743 tx_queue->txd.entries);
747 efx_stop_interrupts(efx, true);
749 /* Clone channels (where possible) */
750 memset(other_channel, 0, sizeof(other_channel));
751 for (i = 0; i < efx->n_channels; i++) {
752 channel = efx->channel[i];
753 if (channel->type->copy)
754 channel = channel->type->copy(channel);
759 other_channel[i] = channel;
762 /* Swap entry counts and channel pointers */
763 old_rxq_entries = efx->rxq_entries;
764 old_txq_entries = efx->txq_entries;
765 efx->rxq_entries = rxq_entries;
766 efx->txq_entries = txq_entries;
767 for (i = 0; i < efx->n_channels; i++) {
768 channel = efx->channel[i];
769 efx->channel[i] = other_channel[i];
770 other_channel[i] = channel;
773 /* Restart buffer table allocation */
774 efx->next_buffer_table = next_buffer_table;
776 for (i = 0; i < efx->n_channels; i++) {
777 channel = efx->channel[i];
778 if (!channel->type->copy)
780 rc = efx_probe_channel(channel);
783 efx_init_napi_channel(efx->channel[i]);
787 /* Destroy unused channel structures */
788 for (i = 0; i < efx->n_channels; i++) {
789 channel = other_channel[i];
790 if (channel && channel->type->copy) {
791 efx_fini_napi_channel(channel);
792 efx_remove_channel(channel);
797 efx_start_interrupts(efx, true);
803 efx->rxq_entries = old_rxq_entries;
804 efx->txq_entries = old_txq_entries;
805 for (i = 0; i < efx->n_channels; i++) {
806 channel = efx->channel[i];
807 efx->channel[i] = other_channel[i];
808 other_channel[i] = channel;
813 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
815 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
818 static const struct efx_channel_type efx_default_channel_type = {
819 .pre_probe = efx_channel_dummy_op_int,
820 .get_name = efx_get_channel_name,
821 .copy = efx_copy_channel,
822 .keep_eventq = false,
825 int efx_channel_dummy_op_int(struct efx_channel *channel)
830 /**************************************************************************
834 **************************************************************************/
836 /* This ensures that the kernel is kept informed (via
837 * netif_carrier_on/off) of the link status, and also maintains the
838 * link status's stop on the port's TX queue.
840 void efx_link_status_changed(struct efx_nic *efx)
842 struct efx_link_state *link_state = &efx->link_state;
844 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
845 * that no events are triggered between unregister_netdev() and the
846 * driver unloading. A more general condition is that NETDEV_CHANGE
847 * can only be generated between NETDEV_UP and NETDEV_DOWN */
848 if (!netif_running(efx->net_dev))
851 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
852 efx->n_link_state_changes++;
855 netif_carrier_on(efx->net_dev);
857 netif_carrier_off(efx->net_dev);
860 /* Status message for kernel log */
862 netif_info(efx, link, efx->net_dev,
863 "link up at %uMbps %s-duplex (MTU %d)%s\n",
864 link_state->speed, link_state->fd ? "full" : "half",
866 (efx->promiscuous ? " [PROMISC]" : ""));
868 netif_info(efx, link, efx->net_dev, "link down\n");
871 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
873 efx->link_advertising = advertising;
875 if (advertising & ADVERTISED_Pause)
876 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
878 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
879 if (advertising & ADVERTISED_Asym_Pause)
880 efx->wanted_fc ^= EFX_FC_TX;
884 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
886 efx->wanted_fc = wanted_fc;
887 if (efx->link_advertising) {
888 if (wanted_fc & EFX_FC_RX)
889 efx->link_advertising |= (ADVERTISED_Pause |
890 ADVERTISED_Asym_Pause);
892 efx->link_advertising &= ~(ADVERTISED_Pause |
893 ADVERTISED_Asym_Pause);
894 if (wanted_fc & EFX_FC_TX)
895 efx->link_advertising ^= ADVERTISED_Asym_Pause;
899 static void efx_fini_port(struct efx_nic *efx);
901 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
902 * the MAC appropriately. All other PHY configuration changes are pushed
903 * through phy_op->set_settings(), and pushed asynchronously to the MAC
904 * through efx_monitor().
906 * Callers must hold the mac_lock
908 int __efx_reconfigure_port(struct efx_nic *efx)
910 enum efx_phy_mode phy_mode;
913 WARN_ON(!mutex_is_locked(&efx->mac_lock));
915 /* Serialise the promiscuous flag with efx_set_rx_mode. */
916 netif_addr_lock_bh(efx->net_dev);
917 netif_addr_unlock_bh(efx->net_dev);
919 /* Disable PHY transmit in mac level loopbacks */
920 phy_mode = efx->phy_mode;
921 if (LOOPBACK_INTERNAL(efx))
922 efx->phy_mode |= PHY_MODE_TX_DISABLED;
924 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
926 rc = efx->type->reconfigure_port(efx);
929 efx->phy_mode = phy_mode;
934 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
936 int efx_reconfigure_port(struct efx_nic *efx)
940 EFX_ASSERT_RESET_SERIALISED(efx);
942 mutex_lock(&efx->mac_lock);
943 rc = __efx_reconfigure_port(efx);
944 mutex_unlock(&efx->mac_lock);
949 /* Asynchronous work item for changing MAC promiscuity and multicast
950 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
952 static void efx_mac_work(struct work_struct *data)
954 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
956 mutex_lock(&efx->mac_lock);
957 if (efx->port_enabled)
958 efx->type->reconfigure_mac(efx);
959 mutex_unlock(&efx->mac_lock);
962 static int efx_probe_port(struct efx_nic *efx)
966 netif_dbg(efx, probe, efx->net_dev, "create port\n");
969 efx->phy_mode = PHY_MODE_SPECIAL;
971 /* Connect up MAC/PHY operations table */
972 rc = efx->type->probe_port(efx);
976 /* Initialise MAC address to permanent address */
977 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
982 static int efx_init_port(struct efx_nic *efx)
986 netif_dbg(efx, drv, efx->net_dev, "init port\n");
988 mutex_lock(&efx->mac_lock);
990 rc = efx->phy_op->init(efx);
994 efx->port_initialized = true;
996 /* Reconfigure the MAC before creating dma queues (required for
997 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
998 efx->type->reconfigure_mac(efx);
1000 /* Ensure the PHY advertises the correct flow control settings */
1001 rc = efx->phy_op->reconfigure(efx);
1005 mutex_unlock(&efx->mac_lock);
1009 efx->phy_op->fini(efx);
1011 mutex_unlock(&efx->mac_lock);
1015 static void efx_start_port(struct efx_nic *efx)
1017 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1018 BUG_ON(efx->port_enabled);
1020 mutex_lock(&efx->mac_lock);
1021 efx->port_enabled = true;
1023 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1024 * and then cancelled by efx_flush_all() */
1025 efx->type->reconfigure_mac(efx);
1027 mutex_unlock(&efx->mac_lock);
1030 /* Prevent efx_mac_work() and efx_monitor() from working */
1031 static void efx_stop_port(struct efx_nic *efx)
1033 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1035 mutex_lock(&efx->mac_lock);
1036 efx->port_enabled = false;
1037 mutex_unlock(&efx->mac_lock);
1039 /* Serialise against efx_set_multicast_list() */
1040 netif_addr_lock_bh(efx->net_dev);
1041 netif_addr_unlock_bh(efx->net_dev);
1044 static void efx_fini_port(struct efx_nic *efx)
1046 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1048 if (!efx->port_initialized)
1051 efx->phy_op->fini(efx);
1052 efx->port_initialized = false;
1054 efx->link_state.up = false;
1055 efx_link_status_changed(efx);
1058 static void efx_remove_port(struct efx_nic *efx)
1060 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1062 efx->type->remove_port(efx);
1065 /**************************************************************************
1069 **************************************************************************/
1071 /* This configures the PCI device to enable I/O and DMA. */
1072 static int efx_init_io(struct efx_nic *efx)
1074 struct pci_dev *pci_dev = efx->pci_dev;
1075 dma_addr_t dma_mask = efx->type->max_dma_mask;
1078 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1080 rc = pci_enable_device(pci_dev);
1082 netif_err(efx, probe, efx->net_dev,
1083 "failed to enable PCI device\n");
1087 pci_set_master(pci_dev);
1089 /* Set the PCI DMA mask. Try all possibilities from our
1090 * genuine mask down to 32 bits, because some architectures
1091 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1092 * masks event though they reject 46 bit masks.
1094 while (dma_mask > 0x7fffffffUL) {
1095 if (pci_dma_supported(pci_dev, dma_mask)) {
1096 rc = pci_set_dma_mask(pci_dev, dma_mask);
1103 netif_err(efx, probe, efx->net_dev,
1104 "could not find a suitable DMA mask\n");
1107 netif_dbg(efx, probe, efx->net_dev,
1108 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1109 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1111 /* pci_set_consistent_dma_mask() is not *allowed* to
1112 * fail with a mask that pci_set_dma_mask() accepted,
1113 * but just in case...
1115 netif_err(efx, probe, efx->net_dev,
1116 "failed to set consistent DMA mask\n");
1120 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1121 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1123 netif_err(efx, probe, efx->net_dev,
1124 "request for memory BAR failed\n");
1128 efx->membase = ioremap_nocache(efx->membase_phys,
1129 efx->type->mem_map_size);
1130 if (!efx->membase) {
1131 netif_err(efx, probe, efx->net_dev,
1132 "could not map memory BAR at %llx+%x\n",
1133 (unsigned long long)efx->membase_phys,
1134 efx->type->mem_map_size);
1138 netif_dbg(efx, probe, efx->net_dev,
1139 "memory BAR at %llx+%x (virtual %p)\n",
1140 (unsigned long long)efx->membase_phys,
1141 efx->type->mem_map_size, efx->membase);
1146 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1148 efx->membase_phys = 0;
1150 pci_disable_device(efx->pci_dev);
1155 static void efx_fini_io(struct efx_nic *efx)
1157 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1160 iounmap(efx->membase);
1161 efx->membase = NULL;
1164 if (efx->membase_phys) {
1165 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1166 efx->membase_phys = 0;
1169 pci_disable_device(efx->pci_dev);
1172 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1174 cpumask_var_t thread_mask;
1181 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1182 netif_warn(efx, probe, efx->net_dev,
1183 "RSS disabled due to allocation failure\n");
1188 for_each_online_cpu(cpu) {
1189 if (!cpumask_test_cpu(cpu, thread_mask)) {
1191 cpumask_or(thread_mask, thread_mask,
1192 topology_thread_cpumask(cpu));
1196 free_cpumask_var(thread_mask);
1199 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1200 * table entries that are inaccessible to VFs
1202 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1203 count > efx_vf_size(efx)) {
1204 netif_warn(efx, probe, efx->net_dev,
1205 "Reducing number of RSS channels from %u to %u for "
1206 "VF support. Increase vf-msix-limit to use more "
1207 "channels on the PF.\n",
1208 count, efx_vf_size(efx));
1209 count = efx_vf_size(efx);
1216 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1218 #ifdef CONFIG_RFS_ACCEL
1222 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1223 if (!efx->net_dev->rx_cpu_rmap)
1225 for (i = 0; i < efx->n_rx_channels; i++) {
1226 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1227 xentries[i].vector);
1229 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1230 efx->net_dev->rx_cpu_rmap = NULL;
1238 /* Probe the number and type of interrupts we are able to obtain, and
1239 * the resulting numbers of channels and RX queues.
1241 static int efx_probe_interrupts(struct efx_nic *efx)
1243 unsigned int max_channels =
1244 min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1245 unsigned int extra_channels = 0;
1249 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1250 if (efx->extra_channel_type[i])
1253 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1254 struct msix_entry xentries[EFX_MAX_CHANNELS];
1255 unsigned int n_channels;
1257 n_channels = efx_wanted_parallelism(efx);
1258 if (separate_tx_channels)
1260 n_channels += extra_channels;
1261 n_channels = min(n_channels, max_channels);
1263 for (i = 0; i < n_channels; i++)
1264 xentries[i].entry = i;
1265 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1267 netif_err(efx, drv, efx->net_dev,
1268 "WARNING: Insufficient MSI-X vectors"
1269 " available (%d < %u).\n", rc, n_channels);
1270 netif_err(efx, drv, efx->net_dev,
1271 "WARNING: Performance may be reduced.\n");
1272 EFX_BUG_ON_PARANOID(rc >= n_channels);
1274 rc = pci_enable_msix(efx->pci_dev, xentries,
1279 efx->n_channels = n_channels;
1280 if (n_channels > extra_channels)
1281 n_channels -= extra_channels;
1282 if (separate_tx_channels) {
1283 efx->n_tx_channels = max(n_channels / 2, 1U);
1284 efx->n_rx_channels = max(n_channels -
1288 efx->n_tx_channels = n_channels;
1289 efx->n_rx_channels = n_channels;
1291 rc = efx_init_rx_cpu_rmap(efx, xentries);
1293 pci_disable_msix(efx->pci_dev);
1296 for (i = 0; i < efx->n_channels; i++)
1297 efx_get_channel(efx, i)->irq =
1300 /* Fall back to single channel MSI */
1301 efx->interrupt_mode = EFX_INT_MODE_MSI;
1302 netif_err(efx, drv, efx->net_dev,
1303 "could not enable MSI-X\n");
1307 /* Try single interrupt MSI */
1308 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1309 efx->n_channels = 1;
1310 efx->n_rx_channels = 1;
1311 efx->n_tx_channels = 1;
1312 rc = pci_enable_msi(efx->pci_dev);
1314 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1316 netif_err(efx, drv, efx->net_dev,
1317 "could not enable MSI\n");
1318 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1322 /* Assume legacy interrupts */
1323 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1324 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1325 efx->n_rx_channels = 1;
1326 efx->n_tx_channels = 1;
1327 efx->legacy_irq = efx->pci_dev->irq;
1330 /* Assign extra channels if possible */
1331 j = efx->n_channels;
1332 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1333 if (!efx->extra_channel_type[i])
1335 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1336 efx->n_channels <= extra_channels) {
1337 efx->extra_channel_type[i]->handle_no_channel(efx);
1340 efx_get_channel(efx, j)->type =
1341 efx->extra_channel_type[i];
1345 /* RSS might be usable on VFs even if it is disabled on the PF */
1346 efx->rss_spread = (efx->n_rx_channels > 1 ?
1347 efx->n_rx_channels : efx_vf_size(efx));
1352 /* Enable interrupts, then probe and start the event queues */
1353 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1355 struct efx_channel *channel;
1357 if (efx->legacy_irq)
1358 efx->legacy_irq_enabled = true;
1359 efx_nic_enable_interrupts(efx);
1361 efx_for_each_channel(channel, efx) {
1362 if (!channel->type->keep_eventq || !may_keep_eventq)
1363 efx_init_eventq(channel);
1364 efx_start_eventq(channel);
1367 efx_mcdi_mode_event(efx);
1370 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1372 struct efx_channel *channel;
1374 efx_mcdi_mode_poll(efx);
1376 efx_nic_disable_interrupts(efx);
1377 if (efx->legacy_irq) {
1378 synchronize_irq(efx->legacy_irq);
1379 efx->legacy_irq_enabled = false;
1382 efx_for_each_channel(channel, efx) {
1384 synchronize_irq(channel->irq);
1386 efx_stop_eventq(channel);
1387 if (!channel->type->keep_eventq || !may_keep_eventq)
1388 efx_fini_eventq(channel);
1392 static void efx_remove_interrupts(struct efx_nic *efx)
1394 struct efx_channel *channel;
1396 /* Remove MSI/MSI-X interrupts */
1397 efx_for_each_channel(channel, efx)
1399 pci_disable_msi(efx->pci_dev);
1400 pci_disable_msix(efx->pci_dev);
1402 /* Remove legacy interrupt */
1403 efx->legacy_irq = 0;
1406 static void efx_set_channels(struct efx_nic *efx)
1408 struct efx_channel *channel;
1409 struct efx_tx_queue *tx_queue;
1411 efx->tx_channel_offset =
1412 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1414 /* We need to adjust the TX queue numbers if we have separate
1415 * RX-only and TX-only channels.
1417 efx_for_each_channel(channel, efx) {
1418 efx_for_each_channel_tx_queue(tx_queue, channel)
1419 tx_queue->queue -= (efx->tx_channel_offset *
1424 static int efx_probe_nic(struct efx_nic *efx)
1429 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1431 /* Carry out hardware-type specific initialisation */
1432 rc = efx->type->probe(efx);
1436 /* Determine the number of channels and queues by trying to hook
1437 * in MSI-X interrupts. */
1438 rc = efx_probe_interrupts(efx);
1442 efx->type->dimension_resources(efx);
1444 if (efx->n_channels > 1)
1445 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1446 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1447 efx->rx_indir_table[i] =
1448 ethtool_rxfh_indir_default(i, efx->rss_spread);
1450 efx_set_channels(efx);
1451 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1452 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1454 /* Initialise the interrupt moderation settings */
1455 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1461 efx->type->remove(efx);
1465 static void efx_remove_nic(struct efx_nic *efx)
1467 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1469 efx_remove_interrupts(efx);
1470 efx->type->remove(efx);
1473 /**************************************************************************
1475 * NIC startup/shutdown
1477 *************************************************************************/
1479 static int efx_probe_all(struct efx_nic *efx)
1483 rc = efx_probe_nic(efx);
1485 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1489 rc = efx_probe_port(efx);
1491 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1495 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1497 rc = efx_probe_filters(efx);
1499 netif_err(efx, probe, efx->net_dev,
1500 "failed to create filter tables\n");
1504 rc = efx_probe_channels(efx);
1511 efx_remove_filters(efx);
1513 efx_remove_port(efx);
1515 efx_remove_nic(efx);
1520 /* Called after previous invocation(s) of efx_stop_all, restarts the port,
1521 * kernel transmit queues and NAPI processing, and ensures that the port is
1522 * scheduled to be reconfigured. This function is safe to call multiple
1523 * times when the NIC is in any state.
1525 static void efx_start_all(struct efx_nic *efx)
1527 EFX_ASSERT_RESET_SERIALISED(efx);
1529 /* Check that it is appropriate to restart the interface. All
1530 * of these flags are safe to read under just the rtnl lock */
1531 if (efx->port_enabled)
1533 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1535 if (!netif_running(efx->net_dev))
1538 efx_start_port(efx);
1539 efx_start_datapath(efx);
1541 /* Start the hardware monitor if there is one. Otherwise (we're link
1542 * event driven), we have to poll the PHY because after an event queue
1543 * flush, we could have a missed a link state change */
1544 if (efx->type->monitor != NULL) {
1545 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1546 efx_monitor_interval);
1548 mutex_lock(&efx->mac_lock);
1549 if (efx->phy_op->poll(efx))
1550 efx_link_status_changed(efx);
1551 mutex_unlock(&efx->mac_lock);
1554 efx->type->start_stats(efx);
1557 /* Flush all delayed work. Should only be called when no more delayed work
1558 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1559 * since we're holding the rtnl_lock at this point. */
1560 static void efx_flush_all(struct efx_nic *efx)
1562 /* Make sure the hardware monitor is stopped */
1563 cancel_delayed_work_sync(&efx->monitor_work);
1564 /* Stop scheduled port reconfigurations */
1565 cancel_work_sync(&efx->mac_work);
1568 /* Quiesce hardware and software without bringing the link down.
1569 * Safe to call multiple times, when the nic and interface is in any
1570 * state. The caller is guaranteed to subsequently be in a position
1571 * to modify any hardware and software state they see fit without
1573 static void efx_stop_all(struct efx_nic *efx)
1575 EFX_ASSERT_RESET_SERIALISED(efx);
1577 /* port_enabled can be read safely under the rtnl lock */
1578 if (!efx->port_enabled)
1581 efx->type->stop_stats(efx);
1584 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1587 /* Stop the kernel transmit interface late, so the watchdog
1588 * timer isn't ticking over the flush */
1589 netif_tx_disable(efx->net_dev);
1591 efx_stop_datapath(efx);
1594 static void efx_remove_all(struct efx_nic *efx)
1596 efx_remove_channels(efx);
1597 efx_remove_filters(efx);
1598 efx_remove_port(efx);
1599 efx_remove_nic(efx);
1602 /**************************************************************************
1604 * Interrupt moderation
1606 **************************************************************************/
1608 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1612 if (usecs * 1000 < quantum_ns)
1613 return 1; /* never round down to 0 */
1614 return usecs * 1000 / quantum_ns;
1617 /* Set interrupt moderation parameters */
1618 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1619 unsigned int rx_usecs, bool rx_adaptive,
1620 bool rx_may_override_tx)
1622 struct efx_channel *channel;
1623 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1624 efx->timer_quantum_ns,
1626 unsigned int tx_ticks;
1627 unsigned int rx_ticks;
1629 EFX_ASSERT_RESET_SERIALISED(efx);
1631 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1634 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1635 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1637 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1638 !rx_may_override_tx) {
1639 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1640 "RX and TX IRQ moderation must be equal\n");
1644 efx->irq_rx_adaptive = rx_adaptive;
1645 efx->irq_rx_moderation = rx_ticks;
1646 efx_for_each_channel(channel, efx) {
1647 if (efx_channel_has_rx_queue(channel))
1648 channel->irq_moderation = rx_ticks;
1649 else if (efx_channel_has_tx_queues(channel))
1650 channel->irq_moderation = tx_ticks;
1656 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1657 unsigned int *rx_usecs, bool *rx_adaptive)
1659 /* We must round up when converting ticks to microseconds
1660 * because we round down when converting the other way.
1663 *rx_adaptive = efx->irq_rx_adaptive;
1664 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1665 efx->timer_quantum_ns,
1668 /* If channels are shared between RX and TX, so is IRQ
1669 * moderation. Otherwise, IRQ moderation is the same for all
1670 * TX channels and is not adaptive.
1672 if (efx->tx_channel_offset == 0)
1673 *tx_usecs = *rx_usecs;
1675 *tx_usecs = DIV_ROUND_UP(
1676 efx->channel[efx->tx_channel_offset]->irq_moderation *
1677 efx->timer_quantum_ns,
1681 /**************************************************************************
1685 **************************************************************************/
1687 /* Run periodically off the general workqueue */
1688 static void efx_monitor(struct work_struct *data)
1690 struct efx_nic *efx = container_of(data, struct efx_nic,
1693 netif_vdbg(efx, timer, efx->net_dev,
1694 "hardware monitor executing on CPU %d\n",
1695 raw_smp_processor_id());
1696 BUG_ON(efx->type->monitor == NULL);
1698 /* If the mac_lock is already held then it is likely a port
1699 * reconfiguration is already in place, which will likely do
1700 * most of the work of monitor() anyway. */
1701 if (mutex_trylock(&efx->mac_lock)) {
1702 if (efx->port_enabled)
1703 efx->type->monitor(efx);
1704 mutex_unlock(&efx->mac_lock);
1707 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1708 efx_monitor_interval);
1711 /**************************************************************************
1715 *************************************************************************/
1718 * Context: process, rtnl_lock() held.
1720 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1722 struct efx_nic *efx = netdev_priv(net_dev);
1723 struct mii_ioctl_data *data = if_mii(ifr);
1725 EFX_ASSERT_RESET_SERIALISED(efx);
1727 /* Convert phy_id from older PRTAD/DEVAD format */
1728 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1729 (data->phy_id & 0xfc00) == 0x0400)
1730 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1732 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1735 /**************************************************************************
1739 **************************************************************************/
1741 static void efx_init_napi_channel(struct efx_channel *channel)
1743 struct efx_nic *efx = channel->efx;
1745 channel->napi_dev = efx->net_dev;
1746 netif_napi_add(channel->napi_dev, &channel->napi_str,
1747 efx_poll, napi_weight);
1750 static void efx_init_napi(struct efx_nic *efx)
1752 struct efx_channel *channel;
1754 efx_for_each_channel(channel, efx)
1755 efx_init_napi_channel(channel);
1758 static void efx_fini_napi_channel(struct efx_channel *channel)
1760 if (channel->napi_dev)
1761 netif_napi_del(&channel->napi_str);
1762 channel->napi_dev = NULL;
1765 static void efx_fini_napi(struct efx_nic *efx)
1767 struct efx_channel *channel;
1769 efx_for_each_channel(channel, efx)
1770 efx_fini_napi_channel(channel);
1773 /**************************************************************************
1775 * Kernel netpoll interface
1777 *************************************************************************/
1779 #ifdef CONFIG_NET_POLL_CONTROLLER
1781 /* Although in the common case interrupts will be disabled, this is not
1782 * guaranteed. However, all our work happens inside the NAPI callback,
1783 * so no locking is required.
1785 static void efx_netpoll(struct net_device *net_dev)
1787 struct efx_nic *efx = netdev_priv(net_dev);
1788 struct efx_channel *channel;
1790 efx_for_each_channel(channel, efx)
1791 efx_schedule_channel(channel);
1796 /**************************************************************************
1798 * Kernel net device interface
1800 *************************************************************************/
1802 /* Context: process, rtnl_lock() held. */
1803 static int efx_net_open(struct net_device *net_dev)
1805 struct efx_nic *efx = netdev_priv(net_dev);
1806 EFX_ASSERT_RESET_SERIALISED(efx);
1808 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1809 raw_smp_processor_id());
1811 if (efx->state == STATE_DISABLED)
1813 if (efx->phy_mode & PHY_MODE_SPECIAL)
1815 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1818 /* Notify the kernel of the link state polled during driver load,
1819 * before the monitor starts running */
1820 efx_link_status_changed(efx);
1826 /* Context: process, rtnl_lock() held.
1827 * Note that the kernel will ignore our return code; this method
1828 * should really be a void.
1830 static int efx_net_stop(struct net_device *net_dev)
1832 struct efx_nic *efx = netdev_priv(net_dev);
1834 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1835 raw_smp_processor_id());
1837 if (efx->state != STATE_DISABLED) {
1838 /* Stop the device and flush all the channels */
1845 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1846 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1847 struct rtnl_link_stats64 *stats)
1849 struct efx_nic *efx = netdev_priv(net_dev);
1850 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1852 spin_lock_bh(&efx->stats_lock);
1854 efx->type->update_stats(efx);
1856 stats->rx_packets = mac_stats->rx_packets;
1857 stats->tx_packets = mac_stats->tx_packets;
1858 stats->rx_bytes = mac_stats->rx_bytes;
1859 stats->tx_bytes = mac_stats->tx_bytes;
1860 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1861 stats->multicast = mac_stats->rx_multicast;
1862 stats->collisions = mac_stats->tx_collision;
1863 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1864 mac_stats->rx_length_error);
1865 stats->rx_crc_errors = mac_stats->rx_bad;
1866 stats->rx_frame_errors = mac_stats->rx_align_error;
1867 stats->rx_fifo_errors = mac_stats->rx_overflow;
1868 stats->rx_missed_errors = mac_stats->rx_missed;
1869 stats->tx_window_errors = mac_stats->tx_late_collision;
1871 stats->rx_errors = (stats->rx_length_errors +
1872 stats->rx_crc_errors +
1873 stats->rx_frame_errors +
1874 mac_stats->rx_symbol_error);
1875 stats->tx_errors = (stats->tx_window_errors +
1878 spin_unlock_bh(&efx->stats_lock);
1883 /* Context: netif_tx_lock held, BHs disabled. */
1884 static void efx_watchdog(struct net_device *net_dev)
1886 struct efx_nic *efx = netdev_priv(net_dev);
1888 netif_err(efx, tx_err, efx->net_dev,
1889 "TX stuck with port_enabled=%d: resetting channels\n",
1892 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1896 /* Context: process, rtnl_lock() held. */
1897 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1899 struct efx_nic *efx = netdev_priv(net_dev);
1901 EFX_ASSERT_RESET_SERIALISED(efx);
1903 if (new_mtu > EFX_MAX_MTU)
1908 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1910 mutex_lock(&efx->mac_lock);
1911 /* Reconfigure the MAC before enabling the dma queues so that
1912 * the RX buffers don't overflow */
1913 net_dev->mtu = new_mtu;
1914 efx->type->reconfigure_mac(efx);
1915 mutex_unlock(&efx->mac_lock);
1921 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1923 struct efx_nic *efx = netdev_priv(net_dev);
1924 struct sockaddr *addr = data;
1925 char *new_addr = addr->sa_data;
1927 EFX_ASSERT_RESET_SERIALISED(efx);
1929 if (!is_valid_ether_addr(new_addr)) {
1930 netif_err(efx, drv, efx->net_dev,
1931 "invalid ethernet MAC address requested: %pM\n",
1936 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1937 efx_sriov_mac_address_changed(efx);
1939 /* Reconfigure the MAC */
1940 mutex_lock(&efx->mac_lock);
1941 efx->type->reconfigure_mac(efx);
1942 mutex_unlock(&efx->mac_lock);
1947 /* Context: netif_addr_lock held, BHs disabled. */
1948 static void efx_set_rx_mode(struct net_device *net_dev)
1950 struct efx_nic *efx = netdev_priv(net_dev);
1951 struct netdev_hw_addr *ha;
1952 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1956 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1958 /* Build multicast hash table */
1959 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1960 memset(mc_hash, 0xff, sizeof(*mc_hash));
1962 memset(mc_hash, 0x00, sizeof(*mc_hash));
1963 netdev_for_each_mc_addr(ha, net_dev) {
1964 crc = ether_crc_le(ETH_ALEN, ha->addr);
1965 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1966 set_bit_le(bit, mc_hash->byte);
1969 /* Broadcast packets go through the multicast hash filter.
1970 * ether_crc_le() of the broadcast address is 0xbe2612ff
1971 * so we always add bit 0xff to the mask.
1973 set_bit_le(0xff, mc_hash->byte);
1976 if (efx->port_enabled)
1977 queue_work(efx->workqueue, &efx->mac_work);
1978 /* Otherwise efx_start_port() will do this */
1981 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
1983 struct efx_nic *efx = netdev_priv(net_dev);
1985 /* If disabling RX n-tuple filtering, clear existing filters */
1986 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1987 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
1992 static const struct net_device_ops efx_netdev_ops = {
1993 .ndo_open = efx_net_open,
1994 .ndo_stop = efx_net_stop,
1995 .ndo_get_stats64 = efx_net_stats,
1996 .ndo_tx_timeout = efx_watchdog,
1997 .ndo_start_xmit = efx_hard_start_xmit,
1998 .ndo_validate_addr = eth_validate_addr,
1999 .ndo_do_ioctl = efx_ioctl,
2000 .ndo_change_mtu = efx_change_mtu,
2001 .ndo_set_mac_address = efx_set_mac_address,
2002 .ndo_set_rx_mode = efx_set_rx_mode,
2003 .ndo_set_features = efx_set_features,
2004 #ifdef CONFIG_SFC_SRIOV
2005 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2006 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2007 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2008 .ndo_get_vf_config = efx_sriov_get_vf_config,
2010 #ifdef CONFIG_NET_POLL_CONTROLLER
2011 .ndo_poll_controller = efx_netpoll,
2013 .ndo_setup_tc = efx_setup_tc,
2014 #ifdef CONFIG_RFS_ACCEL
2015 .ndo_rx_flow_steer = efx_filter_rfs,
2019 static void efx_update_name(struct efx_nic *efx)
2021 strcpy(efx->name, efx->net_dev->name);
2022 efx_mtd_rename(efx);
2023 efx_set_channel_names(efx);
2026 static int efx_netdev_event(struct notifier_block *this,
2027 unsigned long event, void *ptr)
2029 struct net_device *net_dev = ptr;
2031 if (net_dev->netdev_ops == &efx_netdev_ops &&
2032 event == NETDEV_CHANGENAME)
2033 efx_update_name(netdev_priv(net_dev));
2038 static struct notifier_block efx_netdev_notifier = {
2039 .notifier_call = efx_netdev_event,
2043 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2045 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2046 return sprintf(buf, "%d\n", efx->phy_type);
2048 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
2050 static int efx_register_netdev(struct efx_nic *efx)
2052 struct net_device *net_dev = efx->net_dev;
2053 struct efx_channel *channel;
2056 net_dev->watchdog_timeo = 5 * HZ;
2057 net_dev->irq = efx->pci_dev->irq;
2058 net_dev->netdev_ops = &efx_netdev_ops;
2059 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2063 rc = dev_alloc_name(net_dev, net_dev->name);
2066 efx_update_name(efx);
2068 rc = register_netdevice(net_dev);
2072 efx_for_each_channel(channel, efx) {
2073 struct efx_tx_queue *tx_queue;
2074 efx_for_each_channel_tx_queue(tx_queue, channel)
2075 efx_init_tx_queue_core_txq(tx_queue);
2078 /* Always start with carrier off; PHY events will detect the link */
2079 netif_carrier_off(net_dev);
2083 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2085 netif_err(efx, drv, efx->net_dev,
2086 "failed to init net dev attributes\n");
2087 goto fail_registered;
2094 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2098 unregister_netdev(net_dev);
2102 static void efx_unregister_netdev(struct efx_nic *efx)
2104 struct efx_channel *channel;
2105 struct efx_tx_queue *tx_queue;
2110 BUG_ON(netdev_priv(efx->net_dev) != efx);
2112 /* Free up any skbs still remaining. This has to happen before
2113 * we try to unregister the netdev as running their destructors
2114 * may be needed to get the device ref. count to 0. */
2115 efx_for_each_channel(channel, efx) {
2116 efx_for_each_channel_tx_queue(tx_queue, channel)
2117 efx_release_tx_buffers(tx_queue);
2120 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2121 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2122 unregister_netdev(efx->net_dev);
2125 /**************************************************************************
2127 * Device reset and suspend
2129 **************************************************************************/
2131 /* Tears down the entire software state and most of the hardware state
2133 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2135 EFX_ASSERT_RESET_SERIALISED(efx);
2138 mutex_lock(&efx->mac_lock);
2140 efx_stop_interrupts(efx, false);
2141 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2142 efx->phy_op->fini(efx);
2143 efx->type->fini(efx);
2146 /* This function will always ensure that the locks acquired in
2147 * efx_reset_down() are released. A failure return code indicates
2148 * that we were unable to reinitialise the hardware, and the
2149 * driver should be disabled. If ok is false, then the rx and tx
2150 * engines are not restarted, pending a RESET_DISABLE. */
2151 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2155 EFX_ASSERT_RESET_SERIALISED(efx);
2157 rc = efx->type->init(efx);
2159 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2166 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2167 rc = efx->phy_op->init(efx);
2170 if (efx->phy_op->reconfigure(efx))
2171 netif_err(efx, drv, efx->net_dev,
2172 "could not restore PHY settings\n");
2175 efx->type->reconfigure_mac(efx);
2177 efx_start_interrupts(efx, false);
2178 efx_restore_filters(efx);
2179 efx_sriov_reset(efx);
2181 mutex_unlock(&efx->mac_lock);
2188 efx->port_initialized = false;
2190 mutex_unlock(&efx->mac_lock);
2195 /* Reset the NIC using the specified method. Note that the reset may
2196 * fail, in which case the card will be left in an unusable state.
2198 * Caller must hold the rtnl_lock.
2200 int efx_reset(struct efx_nic *efx, enum reset_type method)
2205 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2206 RESET_TYPE(method));
2208 netif_device_detach(efx->net_dev);
2209 efx_reset_down(efx, method);
2211 rc = efx->type->reset(efx, method);
2213 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2217 /* Clear flags for the scopes we covered. We assume the NIC and
2218 * driver are now quiescent so that there is no race here.
2220 efx->reset_pending &= -(1 << (method + 1));
2222 /* Reinitialise bus-mastering, which may have been turned off before
2223 * the reset was scheduled. This is still appropriate, even in the
2224 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2225 * can respond to requests. */
2226 pci_set_master(efx->pci_dev);
2229 /* Leave device stopped if necessary */
2230 disabled = rc || method == RESET_TYPE_DISABLE;
2231 rc2 = efx_reset_up(efx, method, !disabled);
2239 dev_close(efx->net_dev);
2240 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2241 efx->state = STATE_DISABLED;
2243 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2244 netif_device_attach(efx->net_dev);
2249 /* The worker thread exists so that code that cannot sleep can
2250 * schedule a reset for later.
2252 static void efx_reset_work(struct work_struct *data)
2254 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2255 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2260 /* If we're not RUNNING then don't reset. Leave the reset_pending
2261 * flags set so that efx_pci_probe_main will be retried */
2262 if (efx->state != STATE_RUNNING) {
2263 netif_info(efx, drv, efx->net_dev,
2264 "scheduled reset quenched. NIC not RUNNING\n");
2269 (void)efx_reset(efx, fls(pending) - 1);
2273 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2275 enum reset_type method;
2278 case RESET_TYPE_INVISIBLE:
2279 case RESET_TYPE_ALL:
2280 case RESET_TYPE_WORLD:
2281 case RESET_TYPE_DISABLE:
2283 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2284 RESET_TYPE(method));
2287 method = efx->type->map_reset_reason(type);
2288 netif_dbg(efx, drv, efx->net_dev,
2289 "scheduling %s reset for %s\n",
2290 RESET_TYPE(method), RESET_TYPE(type));
2294 set_bit(method, &efx->reset_pending);
2296 /* efx_process_channel() will no longer read events once a
2297 * reset is scheduled. So switch back to poll'd MCDI completions. */
2298 efx_mcdi_mode_poll(efx);
2300 queue_work(reset_workqueue, &efx->reset_work);
2303 /**************************************************************************
2305 * List of NICs we support
2307 **************************************************************************/
2309 /* PCI device ID table */
2310 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2311 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2312 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2313 .driver_data = (unsigned long) &falcon_a1_nic_type},
2314 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2315 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2316 .driver_data = (unsigned long) &falcon_b0_nic_type},
2317 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2318 .driver_data = (unsigned long) &siena_a0_nic_type},
2319 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2320 .driver_data = (unsigned long) &siena_a0_nic_type},
2321 {0} /* end of list */
2324 /**************************************************************************
2326 * Dummy PHY/MAC operations
2328 * Can be used for some unimplemented operations
2329 * Needed so all function pointers are valid and do not have to be tested
2332 **************************************************************************/
2333 int efx_port_dummy_op_int(struct efx_nic *efx)
2337 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2339 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2344 static const struct efx_phy_operations efx_dummy_phy_operations = {
2345 .init = efx_port_dummy_op_int,
2346 .reconfigure = efx_port_dummy_op_int,
2347 .poll = efx_port_dummy_op_poll,
2348 .fini = efx_port_dummy_op_void,
2351 /**************************************************************************
2355 **************************************************************************/
2357 /* This zeroes out and then fills in the invariants in a struct
2358 * efx_nic (including all sub-structures).
2360 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2361 struct pci_dev *pci_dev, struct net_device *net_dev)
2365 /* Initialise common structures */
2366 memset(efx, 0, sizeof(*efx));
2367 spin_lock_init(&efx->biu_lock);
2368 #ifdef CONFIG_SFC_MTD
2369 INIT_LIST_HEAD(&efx->mtd_list);
2371 INIT_WORK(&efx->reset_work, efx_reset_work);
2372 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2373 efx->pci_dev = pci_dev;
2374 efx->msg_enable = debug;
2375 efx->state = STATE_INIT;
2376 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2378 efx->net_dev = net_dev;
2379 spin_lock_init(&efx->stats_lock);
2380 mutex_init(&efx->mac_lock);
2381 efx->phy_op = &efx_dummy_phy_operations;
2382 efx->mdio.dev = net_dev;
2383 INIT_WORK(&efx->mac_work, efx_mac_work);
2384 init_waitqueue_head(&efx->flush_wq);
2386 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2387 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2388 if (!efx->channel[i])
2394 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2396 /* Higher numbered interrupt modes are less capable! */
2397 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2400 /* Would be good to use the net_dev name, but we're too early */
2401 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2403 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2404 if (!efx->workqueue)
2410 efx_fini_struct(efx);
2414 static void efx_fini_struct(struct efx_nic *efx)
2418 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2419 kfree(efx->channel[i]);
2421 if (efx->workqueue) {
2422 destroy_workqueue(efx->workqueue);
2423 efx->workqueue = NULL;
2427 /**************************************************************************
2431 **************************************************************************/
2433 /* Main body of final NIC shutdown code
2434 * This is called only at module unload (or hotplug removal).
2436 static void efx_pci_remove_main(struct efx_nic *efx)
2438 #ifdef CONFIG_RFS_ACCEL
2439 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2440 efx->net_dev->rx_cpu_rmap = NULL;
2442 efx_stop_interrupts(efx, false);
2443 efx_nic_fini_interrupt(efx);
2445 efx->type->fini(efx);
2447 efx_remove_all(efx);
2450 /* Final NIC shutdown
2451 * This is called only at module unload (or hotplug removal).
2453 static void efx_pci_remove(struct pci_dev *pci_dev)
2455 struct efx_nic *efx;
2457 efx = pci_get_drvdata(pci_dev);
2461 /* Mark the NIC as fini, then stop the interface */
2463 efx->state = STATE_FINI;
2464 dev_close(efx->net_dev);
2466 /* Allow any queued efx_resets() to complete */
2469 efx_stop_interrupts(efx, false);
2470 efx_sriov_fini(efx);
2471 efx_unregister_netdev(efx);
2473 efx_mtd_remove(efx);
2475 /* Wait for any scheduled resets to complete. No more will be
2476 * scheduled from this point because efx_stop_all() has been
2477 * called, we are no longer registered with driverlink, and
2478 * the net_device's have been removed. */
2479 cancel_work_sync(&efx->reset_work);
2481 efx_pci_remove_main(efx);
2484 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2486 pci_set_drvdata(pci_dev, NULL);
2487 efx_fini_struct(efx);
2488 free_netdev(efx->net_dev);
2491 /* Main body of NIC initialisation
2492 * This is called at module load (or hotplug insertion, theoretically).
2494 static int efx_pci_probe_main(struct efx_nic *efx)
2498 /* Do start-of-day initialisation */
2499 rc = efx_probe_all(efx);
2505 rc = efx->type->init(efx);
2507 netif_err(efx, probe, efx->net_dev,
2508 "failed to initialise NIC\n");
2512 rc = efx_init_port(efx);
2514 netif_err(efx, probe, efx->net_dev,
2515 "failed to initialise port\n");
2519 rc = efx_nic_init_interrupt(efx);
2522 efx_start_interrupts(efx, false);
2529 efx->type->fini(efx);
2532 efx_remove_all(efx);
2537 /* NIC initialisation
2539 * This is called at module load (or hotplug insertion,
2540 * theoretically). It sets up PCI mappings, resets the NIC,
2541 * sets up and registers the network devices with the kernel and hooks
2542 * the interrupt service routine. It does not prepare the device for
2543 * transmission; this is left to the first time one of the network
2544 * interfaces is brought up (i.e. efx_net_open).
2546 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2547 const struct pci_device_id *entry)
2549 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2550 struct net_device *net_dev;
2551 struct efx_nic *efx;
2554 /* Allocate and initialise a struct net_device and struct efx_nic */
2555 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2559 net_dev->features |= (type->offload_features | NETIF_F_SG |
2560 NETIF_F_HIGHDMA | NETIF_F_TSO |
2562 if (type->offload_features & NETIF_F_V6_CSUM)
2563 net_dev->features |= NETIF_F_TSO6;
2564 /* Mask for features that also apply to VLAN devices */
2565 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2566 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2568 /* All offloads can be toggled */
2569 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2570 efx = netdev_priv(net_dev);
2571 pci_set_drvdata(pci_dev, efx);
2572 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2573 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2577 netif_info(efx, probe, efx->net_dev,
2578 "Solarflare NIC detected\n");
2580 /* Set up basic I/O (BAR mappings etc) */
2581 rc = efx_init_io(efx);
2585 rc = efx_pci_probe_main(efx);
2587 /* Serialise against efx_reset(). No more resets will be
2588 * scheduled since efx_stop_all() has been called, and we have
2589 * not and never have been registered.
2591 cancel_work_sync(&efx->reset_work);
2596 /* If there was a scheduled reset during probe, the NIC is
2597 * probably hosed anyway.
2599 if (efx->reset_pending) {
2604 /* Switch to the running state before we expose the device to the OS,
2605 * so that dev_open()|efx_start_all() will actually start the device */
2606 efx->state = STATE_RUNNING;
2608 rc = efx_register_netdev(efx);
2612 rc = efx_sriov_init(efx);
2614 netif_err(efx, probe, efx->net_dev,
2615 "SR-IOV can't be enabled rc %d\n", rc);
2617 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2619 /* Try to create MTDs, but allow this to fail */
2621 rc = efx_mtd_probe(efx);
2624 netif_warn(efx, probe, efx->net_dev,
2625 "failed to create MTDs (%d)\n", rc);
2630 efx_pci_remove_main(efx);
2634 efx_fini_struct(efx);
2637 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2638 free_netdev(net_dev);
2642 static int efx_pm_freeze(struct device *dev)
2644 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2646 efx->state = STATE_FINI;
2648 netif_device_detach(efx->net_dev);
2651 efx_stop_interrupts(efx, false);
2656 static int efx_pm_thaw(struct device *dev)
2658 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2660 efx->state = STATE_INIT;
2662 efx_start_interrupts(efx, false);
2664 mutex_lock(&efx->mac_lock);
2665 efx->phy_op->reconfigure(efx);
2666 mutex_unlock(&efx->mac_lock);
2670 netif_device_attach(efx->net_dev);
2672 efx->state = STATE_RUNNING;
2674 efx->type->resume_wol(efx);
2676 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2677 queue_work(reset_workqueue, &efx->reset_work);
2682 static int efx_pm_poweroff(struct device *dev)
2684 struct pci_dev *pci_dev = to_pci_dev(dev);
2685 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2687 efx->type->fini(efx);
2689 efx->reset_pending = 0;
2691 pci_save_state(pci_dev);
2692 return pci_set_power_state(pci_dev, PCI_D3hot);
2695 /* Used for both resume and restore */
2696 static int efx_pm_resume(struct device *dev)
2698 struct pci_dev *pci_dev = to_pci_dev(dev);
2699 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2702 rc = pci_set_power_state(pci_dev, PCI_D0);
2705 pci_restore_state(pci_dev);
2706 rc = pci_enable_device(pci_dev);
2709 pci_set_master(efx->pci_dev);
2710 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2713 rc = efx->type->init(efx);
2720 static int efx_pm_suspend(struct device *dev)
2725 rc = efx_pm_poweroff(dev);
2731 static const struct dev_pm_ops efx_pm_ops = {
2732 .suspend = efx_pm_suspend,
2733 .resume = efx_pm_resume,
2734 .freeze = efx_pm_freeze,
2735 .thaw = efx_pm_thaw,
2736 .poweroff = efx_pm_poweroff,
2737 .restore = efx_pm_resume,
2740 static struct pci_driver efx_pci_driver = {
2741 .name = KBUILD_MODNAME,
2742 .id_table = efx_pci_table,
2743 .probe = efx_pci_probe,
2744 .remove = efx_pci_remove,
2745 .driver.pm = &efx_pm_ops,
2748 /**************************************************************************
2750 * Kernel module interface
2752 *************************************************************************/
2754 module_param(interrupt_mode, uint, 0444);
2755 MODULE_PARM_DESC(interrupt_mode,
2756 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2758 static int __init efx_init_module(void)
2762 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2764 rc = register_netdevice_notifier(&efx_netdev_notifier);
2768 rc = efx_init_sriov();
2772 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2773 if (!reset_workqueue) {
2778 rc = pci_register_driver(&efx_pci_driver);
2785 destroy_workqueue(reset_workqueue);
2789 unregister_netdevice_notifier(&efx_netdev_notifier);
2794 static void __exit efx_exit_module(void)
2796 printk(KERN_INFO "Solarflare NET driver unloading\n");
2798 pci_unregister_driver(&efx_pci_driver);
2799 destroy_workqueue(reset_workqueue);
2801 unregister_netdevice_notifier(&efx_netdev_notifier);
2805 module_init(efx_init_module);
2806 module_exit(efx_exit_module);
2808 MODULE_AUTHOR("Solarflare Communications and "
2809 "Michael Brown <mbrown@fensystems.co.uk>");
2810 MODULE_DESCRIPTION("Solarflare Communications network driver");
2811 MODULE_LICENSE("GPL");
2812 MODULE_DEVICE_TABLE(pci, efx_pci_table);