1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *const efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *const efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* Initial interrupt moderation settings. They can be modified after
126 * module load with ethtool.
128 * The default for RX should strike a balance between increasing the
129 * round-trip latency and reducing overhead.
131 static unsigned int rx_irq_mod_usec = 60;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * This default is chosen to ensure that a 10G link does not go idle
137 * while a TX queue is stopped after it has become full. A queue is
138 * restarted when it drops below half full. The time this takes (assuming
139 * worst case 3 descriptors per packet and 1024 descriptors) is
140 * 512 / 3 * 1.2 = 205 usec.
142 static unsigned int tx_irq_mod_usec = 150;
144 /* This is the first interrupt mode to try out of:
149 static unsigned int interrupt_mode;
151 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
152 * i.e. the number of CPUs among which we may distribute simultaneous
153 * interrupt handling.
155 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
156 * The default (0) means to assign an interrupt to each core.
158 static unsigned int rss_cpus;
159 module_param(rss_cpus, uint, 0444);
160 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
162 static int phy_flash_cfg;
163 module_param(phy_flash_cfg, int, 0644);
164 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
166 static unsigned irq_adapt_low_thresh = 10000;
167 module_param(irq_adapt_low_thresh, uint, 0644);
168 MODULE_PARM_DESC(irq_adapt_low_thresh,
169 "Threshold score for reducing IRQ moderation");
171 static unsigned irq_adapt_high_thresh = 20000;
172 module_param(irq_adapt_high_thresh, uint, 0644);
173 MODULE_PARM_DESC(irq_adapt_high_thresh,
174 "Threshold score for increasing IRQ moderation");
176 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
177 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
178 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
179 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
180 module_param(debug, uint, 0);
181 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
183 /**************************************************************************
185 * Utility functions and prototypes
187 *************************************************************************/
189 static void efx_remove_channels(struct efx_nic *efx);
190 static void efx_remove_port(struct efx_nic *efx);
191 static void efx_init_napi(struct efx_nic *efx);
192 static void efx_fini_napi(struct efx_nic *efx);
193 static void efx_fini_napi_channel(struct efx_channel *channel);
194 static void efx_fini_struct(struct efx_nic *efx);
195 static void efx_start_all(struct efx_nic *efx);
196 static void efx_stop_all(struct efx_nic *efx);
198 #define EFX_ASSERT_RESET_SERIALISED(efx) \
200 if ((efx->state == STATE_RUNNING) || \
201 (efx->state == STATE_DISABLED)) \
205 /**************************************************************************
207 * Event queue processing
209 *************************************************************************/
211 /* Process channel's event queue
213 * This function is responsible for processing the event queue of a
214 * single channel. The caller must guarantee that this function will
215 * never be concurrently called more than once on the same channel,
216 * though different channels may be being processed concurrently.
218 static int efx_process_channel(struct efx_channel *channel, int budget)
220 struct efx_nic *efx = channel->efx;
223 if (unlikely(efx->reset_pending || !channel->enabled))
226 spent = efx_nic_process_eventq(channel, budget);
230 /* Deliver last RX packet. */
231 if (channel->rx_pkt) {
232 __efx_rx_packet(channel, channel->rx_pkt,
233 channel->rx_pkt_csummed);
234 channel->rx_pkt = NULL;
237 efx_rx_strategy(channel);
239 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
244 /* Mark channel as finished processing
246 * Note that since we will not receive further interrupts for this
247 * channel before we finish processing and call the eventq_read_ack()
248 * method, there is no need to use the interrupt hold-off timers.
250 static inline void efx_channel_processed(struct efx_channel *channel)
252 /* The interrupt handler for this channel may set work_pending
253 * as soon as we acknowledge the events we've seen. Make sure
254 * it's cleared before then. */
255 channel->work_pending = false;
258 efx_nic_eventq_read_ack(channel);
263 * NAPI guarantees serialisation of polls of the same device, which
264 * provides the guarantee required by efx_process_channel().
266 static int efx_poll(struct napi_struct *napi, int budget)
268 struct efx_channel *channel =
269 container_of(napi, struct efx_channel, napi_str);
270 struct efx_nic *efx = channel->efx;
273 netif_vdbg(efx, intr, efx->net_dev,
274 "channel %d NAPI poll executing on CPU %d\n",
275 channel->channel, raw_smp_processor_id());
277 spent = efx_process_channel(channel, budget);
279 if (spent < budget) {
280 if (channel->channel < efx->n_rx_channels &&
281 efx->irq_rx_adaptive &&
282 unlikely(++channel->irq_count == 1000)) {
283 if (unlikely(channel->irq_mod_score <
284 irq_adapt_low_thresh)) {
285 if (channel->irq_moderation > 1) {
286 channel->irq_moderation -= 1;
287 efx->type->push_irq_moderation(channel);
289 } else if (unlikely(channel->irq_mod_score >
290 irq_adapt_high_thresh)) {
291 if (channel->irq_moderation <
292 efx->irq_rx_moderation) {
293 channel->irq_moderation += 1;
294 efx->type->push_irq_moderation(channel);
297 channel->irq_count = 0;
298 channel->irq_mod_score = 0;
301 efx_filter_rfs_expire(channel);
303 /* There is no race here; although napi_disable() will
304 * only wait for napi_complete(), this isn't a problem
305 * since efx_channel_processed() will have no effect if
306 * interrupts have already been disabled.
309 efx_channel_processed(channel);
315 /* Process the eventq of the specified channel immediately on this CPU
317 * Disable hardware generated interrupts, wait for any existing
318 * processing to finish, then directly poll (and ack ) the eventq.
319 * Finally reenable NAPI and interrupts.
321 * This is for use only during a loopback self-test. It must not
322 * deliver any packets up the stack as this can result in deadlock.
324 void efx_process_channel_now(struct efx_channel *channel)
326 struct efx_nic *efx = channel->efx;
328 BUG_ON(channel->channel >= efx->n_channels);
329 BUG_ON(!channel->enabled);
330 BUG_ON(!efx->loopback_selftest);
332 /* Disable interrupts and wait for ISRs to complete */
333 efx_nic_disable_interrupts(efx);
334 if (efx->legacy_irq) {
335 synchronize_irq(efx->legacy_irq);
336 efx->legacy_irq_enabled = false;
339 synchronize_irq(channel->irq);
341 /* Wait for any NAPI processing to complete */
342 napi_disable(&channel->napi_str);
344 /* Poll the channel */
345 efx_process_channel(channel, channel->eventq_mask + 1);
347 /* Ack the eventq. This may cause an interrupt to be generated
348 * when they are reenabled */
349 efx_channel_processed(channel);
351 napi_enable(&channel->napi_str);
353 efx->legacy_irq_enabled = true;
354 efx_nic_enable_interrupts(efx);
357 /* Create event queue
358 * Event queue memory allocations are done only once. If the channel
359 * is reset, the memory buffer will be reused; this guards against
360 * errors during channel reset and also simplifies interrupt handling.
362 static int efx_probe_eventq(struct efx_channel *channel)
364 struct efx_nic *efx = channel->efx;
365 unsigned long entries;
367 netif_dbg(channel->efx, probe, channel->efx->net_dev,
368 "chan %d create event queue\n", channel->channel);
370 /* Build an event queue with room for one event per tx and rx buffer,
371 * plus some extra for link state events and MCDI completions. */
372 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
373 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
374 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
376 return efx_nic_probe_eventq(channel);
379 /* Prepare channel's event queue */
380 static void efx_init_eventq(struct efx_channel *channel)
382 netif_dbg(channel->efx, drv, channel->efx->net_dev,
383 "chan %d init event queue\n", channel->channel);
385 channel->eventq_read_ptr = 0;
387 efx_nic_init_eventq(channel);
390 static void efx_fini_eventq(struct efx_channel *channel)
392 netif_dbg(channel->efx, drv, channel->efx->net_dev,
393 "chan %d fini event queue\n", channel->channel);
395 efx_nic_fini_eventq(channel);
398 static void efx_remove_eventq(struct efx_channel *channel)
400 netif_dbg(channel->efx, drv, channel->efx->net_dev,
401 "chan %d remove event queue\n", channel->channel);
403 efx_nic_remove_eventq(channel);
406 /**************************************************************************
410 *************************************************************************/
412 /* Allocate and initialise a channel structure, optionally copying
413 * parameters (but not resources) from an old channel structure. */
414 static struct efx_channel *
415 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
417 struct efx_channel *channel;
418 struct efx_rx_queue *rx_queue;
419 struct efx_tx_queue *tx_queue;
423 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
427 *channel = *old_channel;
429 channel->napi_dev = NULL;
430 memset(&channel->eventq, 0, sizeof(channel->eventq));
432 rx_queue = &channel->rx_queue;
433 rx_queue->buffer = NULL;
434 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
436 for (j = 0; j < EFX_TXQ_TYPES; j++) {
437 tx_queue = &channel->tx_queue[j];
438 if (tx_queue->channel)
439 tx_queue->channel = channel;
440 tx_queue->buffer = NULL;
441 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
444 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
449 channel->channel = i;
451 for (j = 0; j < EFX_TXQ_TYPES; j++) {
452 tx_queue = &channel->tx_queue[j];
454 tx_queue->queue = i * EFX_TXQ_TYPES + j;
455 tx_queue->channel = channel;
459 rx_queue = &channel->rx_queue;
461 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
462 (unsigned long)rx_queue);
467 static int efx_probe_channel(struct efx_channel *channel)
469 struct efx_tx_queue *tx_queue;
470 struct efx_rx_queue *rx_queue;
473 netif_dbg(channel->efx, probe, channel->efx->net_dev,
474 "creating channel %d\n", channel->channel);
476 rc = efx_probe_eventq(channel);
480 efx_for_each_channel_tx_queue(tx_queue, channel) {
481 rc = efx_probe_tx_queue(tx_queue);
486 efx_for_each_channel_rx_queue(rx_queue, channel) {
487 rc = efx_probe_rx_queue(rx_queue);
492 channel->n_rx_frm_trunc = 0;
497 efx_for_each_channel_rx_queue(rx_queue, channel)
498 efx_remove_rx_queue(rx_queue);
500 efx_for_each_channel_tx_queue(tx_queue, channel)
501 efx_remove_tx_queue(tx_queue);
507 static void efx_set_channel_names(struct efx_nic *efx)
509 struct efx_channel *channel;
510 const char *type = "";
513 efx_for_each_channel(channel, efx) {
514 number = channel->channel;
515 if (efx->n_channels > efx->n_rx_channels) {
516 if (channel->channel < efx->n_rx_channels) {
520 number -= efx->n_rx_channels;
523 snprintf(efx->channel_name[channel->channel],
524 sizeof(efx->channel_name[0]),
525 "%s%s-%d", efx->name, type, number);
529 static int efx_probe_channels(struct efx_nic *efx)
531 struct efx_channel *channel;
534 /* Restart special buffer allocation */
535 efx->next_buffer_table = 0;
537 efx_for_each_channel(channel, efx) {
538 rc = efx_probe_channel(channel);
540 netif_err(efx, probe, efx->net_dev,
541 "failed to create channel %d\n",
546 efx_set_channel_names(efx);
551 efx_remove_channels(efx);
555 /* Channels are shutdown and reinitialised whilst the NIC is running
556 * to propagate configuration changes (mtu, checksum offload), or
557 * to clear hardware error conditions
559 static void efx_init_channels(struct efx_nic *efx)
561 struct efx_tx_queue *tx_queue;
562 struct efx_rx_queue *rx_queue;
563 struct efx_channel *channel;
565 /* Calculate the rx buffer allocation parameters required to
566 * support the current MTU, including padding for header
567 * alignment and overruns.
569 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
570 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
571 efx->type->rx_buffer_hash_size +
572 efx->type->rx_buffer_padding);
573 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
574 sizeof(struct efx_rx_page_state));
576 /* Initialise the channels */
577 efx_for_each_channel(channel, efx) {
578 netif_dbg(channel->efx, drv, channel->efx->net_dev,
579 "init chan %d\n", channel->channel);
581 efx_init_eventq(channel);
583 efx_for_each_channel_tx_queue(tx_queue, channel)
584 efx_init_tx_queue(tx_queue);
586 /* The rx buffer allocation strategy is MTU dependent */
587 efx_rx_strategy(channel);
589 efx_for_each_channel_rx_queue(rx_queue, channel)
590 efx_init_rx_queue(rx_queue);
592 WARN_ON(channel->rx_pkt != NULL);
593 efx_rx_strategy(channel);
597 /* This enables event queue processing and packet transmission.
599 * Note that this function is not allowed to fail, since that would
600 * introduce too much complexity into the suspend/resume path.
602 static void efx_start_channel(struct efx_channel *channel)
604 struct efx_rx_queue *rx_queue;
606 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
607 "starting chan %d\n", channel->channel);
609 /* The interrupt handler for this channel may set work_pending
610 * as soon as we enable it. Make sure it's cleared before
611 * then. Similarly, make sure it sees the enabled flag set. */
612 channel->work_pending = false;
613 channel->enabled = true;
616 /* Fill the queues before enabling NAPI */
617 efx_for_each_channel_rx_queue(rx_queue, channel)
618 efx_fast_push_rx_descriptors(rx_queue);
620 napi_enable(&channel->napi_str);
623 /* This disables event queue processing and packet transmission.
624 * This function does not guarantee that all queue processing
625 * (e.g. RX refill) is complete.
627 static void efx_stop_channel(struct efx_channel *channel)
629 if (!channel->enabled)
632 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
633 "stop chan %d\n", channel->channel);
635 channel->enabled = false;
636 napi_disable(&channel->napi_str);
639 static void efx_fini_channels(struct efx_nic *efx)
641 struct efx_channel *channel;
642 struct efx_tx_queue *tx_queue;
643 struct efx_rx_queue *rx_queue;
646 EFX_ASSERT_RESET_SERIALISED(efx);
647 BUG_ON(efx->port_enabled);
649 rc = efx_nic_flush_queues(efx);
650 if (rc && EFX_WORKAROUND_7803(efx)) {
651 /* Schedule a reset to recover from the flush failure. The
652 * descriptor caches reference memory we're about to free,
653 * but falcon_reconfigure_mac_wrapper() won't reconnect
654 * the MACs because of the pending reset. */
655 netif_err(efx, drv, efx->net_dev,
656 "Resetting to recover from flush failure\n");
657 efx_schedule_reset(efx, RESET_TYPE_ALL);
659 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
661 netif_dbg(efx, drv, efx->net_dev,
662 "successfully flushed all queues\n");
665 efx_for_each_channel(channel, efx) {
666 netif_dbg(channel->efx, drv, channel->efx->net_dev,
667 "shut down chan %d\n", channel->channel);
669 efx_for_each_channel_rx_queue(rx_queue, channel)
670 efx_fini_rx_queue(rx_queue);
671 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
672 efx_fini_tx_queue(tx_queue);
673 efx_fini_eventq(channel);
677 static void efx_remove_channel(struct efx_channel *channel)
679 struct efx_tx_queue *tx_queue;
680 struct efx_rx_queue *rx_queue;
682 netif_dbg(channel->efx, drv, channel->efx->net_dev,
683 "destroy chan %d\n", channel->channel);
685 efx_for_each_channel_rx_queue(rx_queue, channel)
686 efx_remove_rx_queue(rx_queue);
687 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
688 efx_remove_tx_queue(tx_queue);
689 efx_remove_eventq(channel);
692 static void efx_remove_channels(struct efx_nic *efx)
694 struct efx_channel *channel;
696 efx_for_each_channel(channel, efx)
697 efx_remove_channel(channel);
701 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
703 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
704 u32 old_rxq_entries, old_txq_entries;
709 efx_fini_channels(efx);
712 memset(other_channel, 0, sizeof(other_channel));
713 for (i = 0; i < efx->n_channels; i++) {
714 channel = efx_alloc_channel(efx, i, efx->channel[i]);
719 other_channel[i] = channel;
722 /* Swap entry counts and channel pointers */
723 old_rxq_entries = efx->rxq_entries;
724 old_txq_entries = efx->txq_entries;
725 efx->rxq_entries = rxq_entries;
726 efx->txq_entries = txq_entries;
727 for (i = 0; i < efx->n_channels; i++) {
728 channel = efx->channel[i];
729 efx->channel[i] = other_channel[i];
730 other_channel[i] = channel;
733 rc = efx_probe_channels(efx);
739 /* Destroy old channels */
740 for (i = 0; i < efx->n_channels; i++) {
741 efx_fini_napi_channel(other_channel[i]);
742 efx_remove_channel(other_channel[i]);
745 /* Free unused channel structures */
746 for (i = 0; i < efx->n_channels; i++)
747 kfree(other_channel[i]);
749 efx_init_channels(efx);
755 efx->rxq_entries = old_rxq_entries;
756 efx->txq_entries = old_txq_entries;
757 for (i = 0; i < efx->n_channels; i++) {
758 channel = efx->channel[i];
759 efx->channel[i] = other_channel[i];
760 other_channel[i] = channel;
765 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
767 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
770 /**************************************************************************
774 **************************************************************************/
776 /* This ensures that the kernel is kept informed (via
777 * netif_carrier_on/off) of the link status, and also maintains the
778 * link status's stop on the port's TX queue.
780 void efx_link_status_changed(struct efx_nic *efx)
782 struct efx_link_state *link_state = &efx->link_state;
784 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
785 * that no events are triggered between unregister_netdev() and the
786 * driver unloading. A more general condition is that NETDEV_CHANGE
787 * can only be generated between NETDEV_UP and NETDEV_DOWN */
788 if (!netif_running(efx->net_dev))
791 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
792 efx->n_link_state_changes++;
795 netif_carrier_on(efx->net_dev);
797 netif_carrier_off(efx->net_dev);
800 /* Status message for kernel log */
801 if (link_state->up) {
802 netif_info(efx, link, efx->net_dev,
803 "link up at %uMbps %s-duplex (MTU %d)%s\n",
804 link_state->speed, link_state->fd ? "full" : "half",
806 (efx->promiscuous ? " [PROMISC]" : ""));
808 netif_info(efx, link, efx->net_dev, "link down\n");
813 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
815 efx->link_advertising = advertising;
817 if (advertising & ADVERTISED_Pause)
818 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
820 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
821 if (advertising & ADVERTISED_Asym_Pause)
822 efx->wanted_fc ^= EFX_FC_TX;
826 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
828 efx->wanted_fc = wanted_fc;
829 if (efx->link_advertising) {
830 if (wanted_fc & EFX_FC_RX)
831 efx->link_advertising |= (ADVERTISED_Pause |
832 ADVERTISED_Asym_Pause);
834 efx->link_advertising &= ~(ADVERTISED_Pause |
835 ADVERTISED_Asym_Pause);
836 if (wanted_fc & EFX_FC_TX)
837 efx->link_advertising ^= ADVERTISED_Asym_Pause;
841 static void efx_fini_port(struct efx_nic *efx);
843 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
844 * the MAC appropriately. All other PHY configuration changes are pushed
845 * through phy_op->set_settings(), and pushed asynchronously to the MAC
846 * through efx_monitor().
848 * Callers must hold the mac_lock
850 int __efx_reconfigure_port(struct efx_nic *efx)
852 enum efx_phy_mode phy_mode;
855 WARN_ON(!mutex_is_locked(&efx->mac_lock));
857 /* Serialise the promiscuous flag with efx_set_multicast_list. */
858 if (efx_dev_registered(efx)) {
859 netif_addr_lock_bh(efx->net_dev);
860 netif_addr_unlock_bh(efx->net_dev);
863 /* Disable PHY transmit in mac level loopbacks */
864 phy_mode = efx->phy_mode;
865 if (LOOPBACK_INTERNAL(efx))
866 efx->phy_mode |= PHY_MODE_TX_DISABLED;
868 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
870 rc = efx->type->reconfigure_port(efx);
873 efx->phy_mode = phy_mode;
878 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
880 int efx_reconfigure_port(struct efx_nic *efx)
884 EFX_ASSERT_RESET_SERIALISED(efx);
886 mutex_lock(&efx->mac_lock);
887 rc = __efx_reconfigure_port(efx);
888 mutex_unlock(&efx->mac_lock);
893 /* Asynchronous work item for changing MAC promiscuity and multicast
894 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
896 static void efx_mac_work(struct work_struct *data)
898 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
900 mutex_lock(&efx->mac_lock);
901 if (efx->port_enabled) {
902 efx->type->push_multicast_hash(efx);
903 efx->mac_op->reconfigure(efx);
905 mutex_unlock(&efx->mac_lock);
908 static int efx_probe_port(struct efx_nic *efx)
912 netif_dbg(efx, probe, efx->net_dev, "create port\n");
915 efx->phy_mode = PHY_MODE_SPECIAL;
917 /* Connect up MAC/PHY operations table */
918 rc = efx->type->probe_port(efx);
922 /* Initialise MAC address to permanent address */
923 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
928 static int efx_init_port(struct efx_nic *efx)
932 netif_dbg(efx, drv, efx->net_dev, "init port\n");
934 mutex_lock(&efx->mac_lock);
936 rc = efx->phy_op->init(efx);
940 efx->port_initialized = true;
942 /* Reconfigure the MAC before creating dma queues (required for
943 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
944 efx->mac_op->reconfigure(efx);
946 /* Ensure the PHY advertises the correct flow control settings */
947 rc = efx->phy_op->reconfigure(efx);
951 mutex_unlock(&efx->mac_lock);
955 efx->phy_op->fini(efx);
957 mutex_unlock(&efx->mac_lock);
961 static void efx_start_port(struct efx_nic *efx)
963 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
964 BUG_ON(efx->port_enabled);
966 mutex_lock(&efx->mac_lock);
967 efx->port_enabled = true;
969 /* efx_mac_work() might have been scheduled after efx_stop_port(),
970 * and then cancelled by efx_flush_all() */
971 efx->type->push_multicast_hash(efx);
972 efx->mac_op->reconfigure(efx);
974 mutex_unlock(&efx->mac_lock);
977 /* Prevent efx_mac_work() and efx_monitor() from working */
978 static void efx_stop_port(struct efx_nic *efx)
980 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
982 mutex_lock(&efx->mac_lock);
983 efx->port_enabled = false;
984 mutex_unlock(&efx->mac_lock);
986 /* Serialise against efx_set_multicast_list() */
987 if (efx_dev_registered(efx)) {
988 netif_addr_lock_bh(efx->net_dev);
989 netif_addr_unlock_bh(efx->net_dev);
993 static void efx_fini_port(struct efx_nic *efx)
995 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
997 if (!efx->port_initialized)
1000 efx->phy_op->fini(efx);
1001 efx->port_initialized = false;
1003 efx->link_state.up = false;
1004 efx_link_status_changed(efx);
1007 static void efx_remove_port(struct efx_nic *efx)
1009 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1011 efx->type->remove_port(efx);
1014 /**************************************************************************
1018 **************************************************************************/
1020 /* This configures the PCI device to enable I/O and DMA. */
1021 static int efx_init_io(struct efx_nic *efx)
1023 struct pci_dev *pci_dev = efx->pci_dev;
1024 dma_addr_t dma_mask = efx->type->max_dma_mask;
1027 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1029 rc = pci_enable_device(pci_dev);
1031 netif_err(efx, probe, efx->net_dev,
1032 "failed to enable PCI device\n");
1036 pci_set_master(pci_dev);
1038 /* Set the PCI DMA mask. Try all possibilities from our
1039 * genuine mask down to 32 bits, because some architectures
1040 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1041 * masks event though they reject 46 bit masks.
1043 while (dma_mask > 0x7fffffffUL) {
1044 if (pci_dma_supported(pci_dev, dma_mask)) {
1045 rc = pci_set_dma_mask(pci_dev, dma_mask);
1052 netif_err(efx, probe, efx->net_dev,
1053 "could not find a suitable DMA mask\n");
1056 netif_dbg(efx, probe, efx->net_dev,
1057 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1058 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1060 /* pci_set_consistent_dma_mask() is not *allowed* to
1061 * fail with a mask that pci_set_dma_mask() accepted,
1062 * but just in case...
1064 netif_err(efx, probe, efx->net_dev,
1065 "failed to set consistent DMA mask\n");
1069 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1070 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1072 netif_err(efx, probe, efx->net_dev,
1073 "request for memory BAR failed\n");
1077 efx->membase = ioremap_nocache(efx->membase_phys,
1078 efx->type->mem_map_size);
1079 if (!efx->membase) {
1080 netif_err(efx, probe, efx->net_dev,
1081 "could not map memory BAR at %llx+%x\n",
1082 (unsigned long long)efx->membase_phys,
1083 efx->type->mem_map_size);
1087 netif_dbg(efx, probe, efx->net_dev,
1088 "memory BAR at %llx+%x (virtual %p)\n",
1089 (unsigned long long)efx->membase_phys,
1090 efx->type->mem_map_size, efx->membase);
1095 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1097 efx->membase_phys = 0;
1099 pci_disable_device(efx->pci_dev);
1104 static void efx_fini_io(struct efx_nic *efx)
1106 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1109 iounmap(efx->membase);
1110 efx->membase = NULL;
1113 if (efx->membase_phys) {
1114 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1115 efx->membase_phys = 0;
1118 pci_disable_device(efx->pci_dev);
1121 static int efx_wanted_parallelism(void)
1123 cpumask_var_t thread_mask;
1130 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1132 "sfc: RSS disabled due to allocation failure\n");
1137 for_each_online_cpu(cpu) {
1138 if (!cpumask_test_cpu(cpu, thread_mask)) {
1140 cpumask_or(thread_mask, thread_mask,
1141 topology_thread_cpumask(cpu));
1145 free_cpumask_var(thread_mask);
1150 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1152 #ifdef CONFIG_RFS_ACCEL
1155 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1156 if (!efx->net_dev->rx_cpu_rmap)
1158 for (i = 0; i < efx->n_rx_channels; i++) {
1159 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1160 xentries[i].vector);
1162 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1163 efx->net_dev->rx_cpu_rmap = NULL;
1171 /* Probe the number and type of interrupts we are able to obtain, and
1172 * the resulting numbers of channels and RX queues.
1174 static int efx_probe_interrupts(struct efx_nic *efx)
1177 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1180 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1181 struct msix_entry xentries[EFX_MAX_CHANNELS];
1184 n_channels = efx_wanted_parallelism();
1185 if (separate_tx_channels)
1187 n_channels = min(n_channels, max_channels);
1189 for (i = 0; i < n_channels; i++)
1190 xentries[i].entry = i;
1191 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1193 netif_err(efx, drv, efx->net_dev,
1194 "WARNING: Insufficient MSI-X vectors"
1195 " available (%d < %d).\n", rc, n_channels);
1196 netif_err(efx, drv, efx->net_dev,
1197 "WARNING: Performance may be reduced.\n");
1198 EFX_BUG_ON_PARANOID(rc >= n_channels);
1200 rc = pci_enable_msix(efx->pci_dev, xentries,
1205 efx->n_channels = n_channels;
1206 if (separate_tx_channels) {
1207 efx->n_tx_channels =
1208 max(efx->n_channels / 2, 1U);
1209 efx->n_rx_channels =
1210 max(efx->n_channels -
1211 efx->n_tx_channels, 1U);
1213 efx->n_tx_channels = efx->n_channels;
1214 efx->n_rx_channels = efx->n_channels;
1216 rc = efx_init_rx_cpu_rmap(efx, xentries);
1218 pci_disable_msix(efx->pci_dev);
1221 for (i = 0; i < n_channels; i++)
1222 efx_get_channel(efx, i)->irq =
1225 /* Fall back to single channel MSI */
1226 efx->interrupt_mode = EFX_INT_MODE_MSI;
1227 netif_err(efx, drv, efx->net_dev,
1228 "could not enable MSI-X\n");
1232 /* Try single interrupt MSI */
1233 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1234 efx->n_channels = 1;
1235 efx->n_rx_channels = 1;
1236 efx->n_tx_channels = 1;
1237 rc = pci_enable_msi(efx->pci_dev);
1239 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1241 netif_err(efx, drv, efx->net_dev,
1242 "could not enable MSI\n");
1243 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1247 /* Assume legacy interrupts */
1248 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1249 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1250 efx->n_rx_channels = 1;
1251 efx->n_tx_channels = 1;
1252 efx->legacy_irq = efx->pci_dev->irq;
1258 static void efx_remove_interrupts(struct efx_nic *efx)
1260 struct efx_channel *channel;
1262 /* Remove MSI/MSI-X interrupts */
1263 efx_for_each_channel(channel, efx)
1265 pci_disable_msi(efx->pci_dev);
1266 pci_disable_msix(efx->pci_dev);
1268 /* Remove legacy interrupt */
1269 efx->legacy_irq = 0;
1272 static void efx_set_channels(struct efx_nic *efx)
1274 struct efx_channel *channel;
1275 struct efx_tx_queue *tx_queue;
1277 efx->tx_channel_offset =
1278 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1280 /* We need to adjust the TX queue numbers if we have separate
1281 * RX-only and TX-only channels.
1283 efx_for_each_channel(channel, efx) {
1284 efx_for_each_channel_tx_queue(tx_queue, channel)
1285 tx_queue->queue -= (efx->tx_channel_offset *
1290 static int efx_probe_nic(struct efx_nic *efx)
1295 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1297 /* Carry out hardware-type specific initialisation */
1298 rc = efx->type->probe(efx);
1302 /* Determine the number of channels and queues by trying to hook
1303 * in MSI-X interrupts. */
1304 rc = efx_probe_interrupts(efx);
1308 if (efx->n_channels > 1)
1309 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1310 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1311 efx->rx_indir_table[i] =
1312 ethtool_rxfh_indir_default(i, efx->n_rx_channels);
1314 efx_set_channels(efx);
1315 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1316 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1318 /* Initialise the interrupt moderation settings */
1319 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1325 efx->type->remove(efx);
1329 static void efx_remove_nic(struct efx_nic *efx)
1331 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1333 efx_remove_interrupts(efx);
1334 efx->type->remove(efx);
1337 /**************************************************************************
1339 * NIC startup/shutdown
1341 *************************************************************************/
1343 static int efx_probe_all(struct efx_nic *efx)
1347 rc = efx_probe_nic(efx);
1349 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1353 rc = efx_probe_port(efx);
1355 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1359 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1360 rc = efx_probe_channels(efx);
1364 rc = efx_probe_filters(efx);
1366 netif_err(efx, probe, efx->net_dev,
1367 "failed to create filter tables\n");
1374 efx_remove_channels(efx);
1376 efx_remove_port(efx);
1378 efx_remove_nic(efx);
1383 /* Called after previous invocation(s) of efx_stop_all, restarts the
1384 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1385 * and ensures that the port is scheduled to be reconfigured.
1386 * This function is safe to call multiple times when the NIC is in any
1388 static void efx_start_all(struct efx_nic *efx)
1390 struct efx_channel *channel;
1392 EFX_ASSERT_RESET_SERIALISED(efx);
1394 /* Check that it is appropriate to restart the interface. All
1395 * of these flags are safe to read under just the rtnl lock */
1396 if (efx->port_enabled)
1398 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1400 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1403 /* Mark the port as enabled so port reconfigurations can start, then
1404 * restart the transmit interface early so the watchdog timer stops */
1405 efx_start_port(efx);
1407 if (efx_dev_registered(efx) && netif_device_present(efx->net_dev))
1408 netif_tx_wake_all_queues(efx->net_dev);
1410 efx_for_each_channel(channel, efx)
1411 efx_start_channel(channel);
1413 if (efx->legacy_irq)
1414 efx->legacy_irq_enabled = true;
1415 efx_nic_enable_interrupts(efx);
1417 /* Switch to event based MCDI completions after enabling interrupts.
1418 * If a reset has been scheduled, then we need to stay in polled mode.
1419 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1420 * reset_pending [modified from an atomic context], we instead guarantee
1421 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1422 efx_mcdi_mode_event(efx);
1423 if (efx->reset_pending)
1424 efx_mcdi_mode_poll(efx);
1426 /* Start the hardware monitor if there is one. Otherwise (we're link
1427 * event driven), we have to poll the PHY because after an event queue
1428 * flush, we could have a missed a link state change */
1429 if (efx->type->monitor != NULL) {
1430 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1431 efx_monitor_interval);
1433 mutex_lock(&efx->mac_lock);
1434 if (efx->phy_op->poll(efx))
1435 efx_link_status_changed(efx);
1436 mutex_unlock(&efx->mac_lock);
1439 efx->type->start_stats(efx);
1442 /* Flush all delayed work. Should only be called when no more delayed work
1443 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1444 * since we're holding the rtnl_lock at this point. */
1445 static void efx_flush_all(struct efx_nic *efx)
1447 /* Make sure the hardware monitor is stopped */
1448 cancel_delayed_work_sync(&efx->monitor_work);
1449 /* Stop scheduled port reconfigurations */
1450 cancel_work_sync(&efx->mac_work);
1453 /* Quiesce hardware and software without bringing the link down.
1454 * Safe to call multiple times, when the nic and interface is in any
1455 * state. The caller is guaranteed to subsequently be in a position
1456 * to modify any hardware and software state they see fit without
1458 static void efx_stop_all(struct efx_nic *efx)
1460 struct efx_channel *channel;
1462 EFX_ASSERT_RESET_SERIALISED(efx);
1464 /* port_enabled can be read safely under the rtnl lock */
1465 if (!efx->port_enabled)
1468 efx->type->stop_stats(efx);
1470 /* Switch to MCDI polling on Siena before disabling interrupts */
1471 efx_mcdi_mode_poll(efx);
1473 /* Disable interrupts and wait for ISR to complete */
1474 efx_nic_disable_interrupts(efx);
1475 if (efx->legacy_irq) {
1476 synchronize_irq(efx->legacy_irq);
1477 efx->legacy_irq_enabled = false;
1479 efx_for_each_channel(channel, efx) {
1481 synchronize_irq(channel->irq);
1484 /* Stop all NAPI processing and synchronous rx refills */
1485 efx_for_each_channel(channel, efx)
1486 efx_stop_channel(channel);
1488 /* Stop all asynchronous port reconfigurations. Since all
1489 * event processing has already been stopped, there is no
1490 * window to loose phy events */
1493 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1496 /* Stop the kernel transmit interface late, so the watchdog
1497 * timer isn't ticking over the flush */
1498 if (efx_dev_registered(efx)) {
1499 netif_tx_stop_all_queues(efx->net_dev);
1500 netif_tx_lock_bh(efx->net_dev);
1501 netif_tx_unlock_bh(efx->net_dev);
1505 static void efx_remove_all(struct efx_nic *efx)
1507 efx_remove_filters(efx);
1508 efx_remove_channels(efx);
1509 efx_remove_port(efx);
1510 efx_remove_nic(efx);
1513 /**************************************************************************
1515 * Interrupt moderation
1517 **************************************************************************/
1519 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int resolution)
1523 if (usecs < resolution)
1524 return 1; /* never round down to 0 */
1525 return usecs / resolution;
1528 /* Set interrupt moderation parameters */
1529 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1530 unsigned int rx_usecs, bool rx_adaptive,
1531 bool rx_may_override_tx)
1533 struct efx_channel *channel;
1534 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1535 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1537 EFX_ASSERT_RESET_SERIALISED(efx);
1539 if (tx_ticks > EFX_IRQ_MOD_MAX || rx_ticks > EFX_IRQ_MOD_MAX)
1542 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1543 !rx_may_override_tx) {
1544 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1545 "RX and TX IRQ moderation must be equal\n");
1549 efx->irq_rx_adaptive = rx_adaptive;
1550 efx->irq_rx_moderation = rx_ticks;
1551 efx_for_each_channel(channel, efx) {
1552 if (efx_channel_has_rx_queue(channel))
1553 channel->irq_moderation = rx_ticks;
1554 else if (efx_channel_has_tx_queues(channel))
1555 channel->irq_moderation = tx_ticks;
1561 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1562 unsigned int *rx_usecs, bool *rx_adaptive)
1564 *rx_adaptive = efx->irq_rx_adaptive;
1565 *rx_usecs = efx->irq_rx_moderation * EFX_IRQ_MOD_RESOLUTION;
1567 /* If channels are shared between RX and TX, so is IRQ
1568 * moderation. Otherwise, IRQ moderation is the same for all
1569 * TX channels and is not adaptive.
1571 if (efx->tx_channel_offset == 0)
1572 *tx_usecs = *rx_usecs;
1575 efx->channel[efx->tx_channel_offset]->irq_moderation *
1576 EFX_IRQ_MOD_RESOLUTION;
1579 /**************************************************************************
1583 **************************************************************************/
1585 /* Run periodically off the general workqueue */
1586 static void efx_monitor(struct work_struct *data)
1588 struct efx_nic *efx = container_of(data, struct efx_nic,
1591 netif_vdbg(efx, timer, efx->net_dev,
1592 "hardware monitor executing on CPU %d\n",
1593 raw_smp_processor_id());
1594 BUG_ON(efx->type->monitor == NULL);
1596 /* If the mac_lock is already held then it is likely a port
1597 * reconfiguration is already in place, which will likely do
1598 * most of the work of monitor() anyway. */
1599 if (mutex_trylock(&efx->mac_lock)) {
1600 if (efx->port_enabled)
1601 efx->type->monitor(efx);
1602 mutex_unlock(&efx->mac_lock);
1605 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1606 efx_monitor_interval);
1609 /**************************************************************************
1613 *************************************************************************/
1616 * Context: process, rtnl_lock() held.
1618 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1620 struct efx_nic *efx = netdev_priv(net_dev);
1621 struct mii_ioctl_data *data = if_mii(ifr);
1623 EFX_ASSERT_RESET_SERIALISED(efx);
1625 /* Convert phy_id from older PRTAD/DEVAD format */
1626 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1627 (data->phy_id & 0xfc00) == 0x0400)
1628 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1630 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1633 /**************************************************************************
1637 **************************************************************************/
1639 static void efx_init_napi(struct efx_nic *efx)
1641 struct efx_channel *channel;
1643 efx_for_each_channel(channel, efx) {
1644 channel->napi_dev = efx->net_dev;
1645 netif_napi_add(channel->napi_dev, &channel->napi_str,
1646 efx_poll, napi_weight);
1650 static void efx_fini_napi_channel(struct efx_channel *channel)
1652 if (channel->napi_dev)
1653 netif_napi_del(&channel->napi_str);
1654 channel->napi_dev = NULL;
1657 static void efx_fini_napi(struct efx_nic *efx)
1659 struct efx_channel *channel;
1661 efx_for_each_channel(channel, efx)
1662 efx_fini_napi_channel(channel);
1665 /**************************************************************************
1667 * Kernel netpoll interface
1669 *************************************************************************/
1671 #ifdef CONFIG_NET_POLL_CONTROLLER
1673 /* Although in the common case interrupts will be disabled, this is not
1674 * guaranteed. However, all our work happens inside the NAPI callback,
1675 * so no locking is required.
1677 static void efx_netpoll(struct net_device *net_dev)
1679 struct efx_nic *efx = netdev_priv(net_dev);
1680 struct efx_channel *channel;
1682 efx_for_each_channel(channel, efx)
1683 efx_schedule_channel(channel);
1688 /**************************************************************************
1690 * Kernel net device interface
1692 *************************************************************************/
1694 /* Context: process, rtnl_lock() held. */
1695 static int efx_net_open(struct net_device *net_dev)
1697 struct efx_nic *efx = netdev_priv(net_dev);
1698 EFX_ASSERT_RESET_SERIALISED(efx);
1700 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1701 raw_smp_processor_id());
1703 if (efx->state == STATE_DISABLED)
1705 if (efx->phy_mode & PHY_MODE_SPECIAL)
1707 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1710 /* Notify the kernel of the link state polled during driver load,
1711 * before the monitor starts running */
1712 efx_link_status_changed(efx);
1718 /* Context: process, rtnl_lock() held.
1719 * Note that the kernel will ignore our return code; this method
1720 * should really be a void.
1722 static int efx_net_stop(struct net_device *net_dev)
1724 struct efx_nic *efx = netdev_priv(net_dev);
1726 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1727 raw_smp_processor_id());
1729 if (efx->state != STATE_DISABLED) {
1730 /* Stop the device and flush all the channels */
1732 efx_fini_channels(efx);
1733 efx_init_channels(efx);
1739 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1740 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1742 struct efx_nic *efx = netdev_priv(net_dev);
1743 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1745 spin_lock_bh(&efx->stats_lock);
1746 efx->type->update_stats(efx);
1747 spin_unlock_bh(&efx->stats_lock);
1749 stats->rx_packets = mac_stats->rx_packets;
1750 stats->tx_packets = mac_stats->tx_packets;
1751 stats->rx_bytes = mac_stats->rx_bytes;
1752 stats->tx_bytes = mac_stats->tx_bytes;
1753 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1754 stats->multicast = mac_stats->rx_multicast;
1755 stats->collisions = mac_stats->tx_collision;
1756 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1757 mac_stats->rx_length_error);
1758 stats->rx_crc_errors = mac_stats->rx_bad;
1759 stats->rx_frame_errors = mac_stats->rx_align_error;
1760 stats->rx_fifo_errors = mac_stats->rx_overflow;
1761 stats->rx_missed_errors = mac_stats->rx_missed;
1762 stats->tx_window_errors = mac_stats->tx_late_collision;
1764 stats->rx_errors = (stats->rx_length_errors +
1765 stats->rx_crc_errors +
1766 stats->rx_frame_errors +
1767 mac_stats->rx_symbol_error);
1768 stats->tx_errors = (stats->tx_window_errors +
1774 /* Context: netif_tx_lock held, BHs disabled. */
1775 static void efx_watchdog(struct net_device *net_dev)
1777 struct efx_nic *efx = netdev_priv(net_dev);
1779 netif_err(efx, tx_err, efx->net_dev,
1780 "TX stuck with port_enabled=%d: resetting channels\n",
1783 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1787 /* Context: process, rtnl_lock() held. */
1788 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1790 struct efx_nic *efx = netdev_priv(net_dev);
1793 EFX_ASSERT_RESET_SERIALISED(efx);
1795 if (new_mtu > EFX_MAX_MTU)
1800 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1802 efx_fini_channels(efx);
1804 mutex_lock(&efx->mac_lock);
1805 /* Reconfigure the MAC before enabling the dma queues so that
1806 * the RX buffers don't overflow */
1807 net_dev->mtu = new_mtu;
1808 efx->mac_op->reconfigure(efx);
1809 mutex_unlock(&efx->mac_lock);
1811 efx_init_channels(efx);
1817 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1819 struct efx_nic *efx = netdev_priv(net_dev);
1820 struct sockaddr *addr = data;
1821 char *new_addr = addr->sa_data;
1823 EFX_ASSERT_RESET_SERIALISED(efx);
1825 if (!is_valid_ether_addr(new_addr)) {
1826 netif_err(efx, drv, efx->net_dev,
1827 "invalid ethernet MAC address requested: %pM\n",
1832 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1834 /* Reconfigure the MAC */
1835 mutex_lock(&efx->mac_lock);
1836 efx->mac_op->reconfigure(efx);
1837 mutex_unlock(&efx->mac_lock);
1842 /* Context: netif_addr_lock held, BHs disabled. */
1843 static void efx_set_multicast_list(struct net_device *net_dev)
1845 struct efx_nic *efx = netdev_priv(net_dev);
1846 struct netdev_hw_addr *ha;
1847 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1851 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1853 /* Build multicast hash table */
1854 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1855 memset(mc_hash, 0xff, sizeof(*mc_hash));
1857 memset(mc_hash, 0x00, sizeof(*mc_hash));
1858 netdev_for_each_mc_addr(ha, net_dev) {
1859 crc = ether_crc_le(ETH_ALEN, ha->addr);
1860 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1861 set_bit_le(bit, mc_hash->byte);
1864 /* Broadcast packets go through the multicast hash filter.
1865 * ether_crc_le() of the broadcast address is 0xbe2612ff
1866 * so we always add bit 0xff to the mask.
1868 set_bit_le(0xff, mc_hash->byte);
1871 if (efx->port_enabled)
1872 queue_work(efx->workqueue, &efx->mac_work);
1873 /* Otherwise efx_start_port() will do this */
1876 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
1878 struct efx_nic *efx = netdev_priv(net_dev);
1880 /* If disabling RX n-tuple filtering, clear existing filters */
1881 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1882 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
1887 static const struct net_device_ops efx_netdev_ops = {
1888 .ndo_open = efx_net_open,
1889 .ndo_stop = efx_net_stop,
1890 .ndo_get_stats64 = efx_net_stats,
1891 .ndo_tx_timeout = efx_watchdog,
1892 .ndo_start_xmit = efx_hard_start_xmit,
1893 .ndo_validate_addr = eth_validate_addr,
1894 .ndo_do_ioctl = efx_ioctl,
1895 .ndo_change_mtu = efx_change_mtu,
1896 .ndo_set_mac_address = efx_set_mac_address,
1897 .ndo_set_rx_mode = efx_set_multicast_list,
1898 .ndo_set_features = efx_set_features,
1899 #ifdef CONFIG_NET_POLL_CONTROLLER
1900 .ndo_poll_controller = efx_netpoll,
1902 .ndo_setup_tc = efx_setup_tc,
1903 #ifdef CONFIG_RFS_ACCEL
1904 .ndo_rx_flow_steer = efx_filter_rfs,
1908 static void efx_update_name(struct efx_nic *efx)
1910 strcpy(efx->name, efx->net_dev->name);
1911 efx_mtd_rename(efx);
1912 efx_set_channel_names(efx);
1915 static int efx_netdev_event(struct notifier_block *this,
1916 unsigned long event, void *ptr)
1918 struct net_device *net_dev = ptr;
1920 if (net_dev->netdev_ops == &efx_netdev_ops &&
1921 event == NETDEV_CHANGENAME)
1922 efx_update_name(netdev_priv(net_dev));
1927 static struct notifier_block efx_netdev_notifier = {
1928 .notifier_call = efx_netdev_event,
1932 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1934 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1935 return sprintf(buf, "%d\n", efx->phy_type);
1937 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1939 static int efx_register_netdev(struct efx_nic *efx)
1941 struct net_device *net_dev = efx->net_dev;
1942 struct efx_channel *channel;
1945 net_dev->watchdog_timeo = 5 * HZ;
1946 net_dev->irq = efx->pci_dev->irq;
1947 net_dev->netdev_ops = &efx_netdev_ops;
1948 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1950 /* Clear MAC statistics */
1951 efx->mac_op->update_stats(efx);
1952 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1956 rc = dev_alloc_name(net_dev, net_dev->name);
1959 efx_update_name(efx);
1961 rc = register_netdevice(net_dev);
1965 efx_for_each_channel(channel, efx) {
1966 struct efx_tx_queue *tx_queue;
1967 efx_for_each_channel_tx_queue(tx_queue, channel)
1968 efx_init_tx_queue_core_txq(tx_queue);
1971 /* Always start with carrier off; PHY events will detect the link */
1972 netif_carrier_off(efx->net_dev);
1976 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1978 netif_err(efx, drv, efx->net_dev,
1979 "failed to init net dev attributes\n");
1980 goto fail_registered;
1987 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1991 unregister_netdev(net_dev);
1995 static void efx_unregister_netdev(struct efx_nic *efx)
1997 struct efx_channel *channel;
1998 struct efx_tx_queue *tx_queue;
2003 BUG_ON(netdev_priv(efx->net_dev) != efx);
2005 /* Free up any skbs still remaining. This has to happen before
2006 * we try to unregister the netdev as running their destructors
2007 * may be needed to get the device ref. count to 0. */
2008 efx_for_each_channel(channel, efx) {
2009 efx_for_each_channel_tx_queue(tx_queue, channel)
2010 efx_release_tx_buffers(tx_queue);
2013 if (efx_dev_registered(efx)) {
2014 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2015 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2016 unregister_netdev(efx->net_dev);
2020 /**************************************************************************
2022 * Device reset and suspend
2024 **************************************************************************/
2026 /* Tears down the entire software state and most of the hardware state
2028 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2030 EFX_ASSERT_RESET_SERIALISED(efx);
2033 mutex_lock(&efx->mac_lock);
2035 efx_fini_channels(efx);
2036 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2037 efx->phy_op->fini(efx);
2038 efx->type->fini(efx);
2041 /* This function will always ensure that the locks acquired in
2042 * efx_reset_down() are released. A failure return code indicates
2043 * that we were unable to reinitialise the hardware, and the
2044 * driver should be disabled. If ok is false, then the rx and tx
2045 * engines are not restarted, pending a RESET_DISABLE. */
2046 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2050 EFX_ASSERT_RESET_SERIALISED(efx);
2052 rc = efx->type->init(efx);
2054 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2061 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2062 rc = efx->phy_op->init(efx);
2065 if (efx->phy_op->reconfigure(efx))
2066 netif_err(efx, drv, efx->net_dev,
2067 "could not restore PHY settings\n");
2070 efx->mac_op->reconfigure(efx);
2072 efx_init_channels(efx);
2073 efx_restore_filters(efx);
2075 mutex_unlock(&efx->mac_lock);
2082 efx->port_initialized = false;
2084 mutex_unlock(&efx->mac_lock);
2089 /* Reset the NIC using the specified method. Note that the reset may
2090 * fail, in which case the card will be left in an unusable state.
2092 * Caller must hold the rtnl_lock.
2094 int efx_reset(struct efx_nic *efx, enum reset_type method)
2099 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2100 RESET_TYPE(method));
2102 netif_device_detach(efx->net_dev);
2103 efx_reset_down(efx, method);
2105 rc = efx->type->reset(efx, method);
2107 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2111 /* Clear flags for the scopes we covered. We assume the NIC and
2112 * driver are now quiescent so that there is no race here.
2114 efx->reset_pending &= -(1 << (method + 1));
2116 /* Reinitialise bus-mastering, which may have been turned off before
2117 * the reset was scheduled. This is still appropriate, even in the
2118 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2119 * can respond to requests. */
2120 pci_set_master(efx->pci_dev);
2123 /* Leave device stopped if necessary */
2124 disabled = rc || method == RESET_TYPE_DISABLE;
2125 rc2 = efx_reset_up(efx, method, !disabled);
2133 dev_close(efx->net_dev);
2134 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2135 efx->state = STATE_DISABLED;
2137 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2138 netif_device_attach(efx->net_dev);
2143 /* The worker thread exists so that code that cannot sleep can
2144 * schedule a reset for later.
2146 static void efx_reset_work(struct work_struct *data)
2148 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2149 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2154 /* If we're not RUNNING then don't reset. Leave the reset_pending
2155 * flags set so that efx_pci_probe_main will be retried */
2156 if (efx->state != STATE_RUNNING) {
2157 netif_info(efx, drv, efx->net_dev,
2158 "scheduled reset quenched. NIC not RUNNING\n");
2163 (void)efx_reset(efx, fls(pending) - 1);
2167 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2169 enum reset_type method;
2172 case RESET_TYPE_INVISIBLE:
2173 case RESET_TYPE_ALL:
2174 case RESET_TYPE_WORLD:
2175 case RESET_TYPE_DISABLE:
2177 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2178 RESET_TYPE(method));
2181 method = efx->type->map_reset_reason(type);
2182 netif_dbg(efx, drv, efx->net_dev,
2183 "scheduling %s reset for %s\n",
2184 RESET_TYPE(method), RESET_TYPE(type));
2188 set_bit(method, &efx->reset_pending);
2190 /* efx_process_channel() will no longer read events once a
2191 * reset is scheduled. So switch back to poll'd MCDI completions. */
2192 efx_mcdi_mode_poll(efx);
2194 queue_work(reset_workqueue, &efx->reset_work);
2197 /**************************************************************************
2199 * List of NICs we support
2201 **************************************************************************/
2203 /* PCI device ID table */
2204 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2205 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2206 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2207 .driver_data = (unsigned long) &falcon_a1_nic_type},
2208 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2209 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2210 .driver_data = (unsigned long) &falcon_b0_nic_type},
2211 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2212 .driver_data = (unsigned long) &siena_a0_nic_type},
2213 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2214 .driver_data = (unsigned long) &siena_a0_nic_type},
2215 {0} /* end of list */
2218 /**************************************************************************
2220 * Dummy PHY/MAC operations
2222 * Can be used for some unimplemented operations
2223 * Needed so all function pointers are valid and do not have to be tested
2226 **************************************************************************/
2227 int efx_port_dummy_op_int(struct efx_nic *efx)
2231 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2233 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2238 static const struct efx_phy_operations efx_dummy_phy_operations = {
2239 .init = efx_port_dummy_op_int,
2240 .reconfigure = efx_port_dummy_op_int,
2241 .poll = efx_port_dummy_op_poll,
2242 .fini = efx_port_dummy_op_void,
2245 /**************************************************************************
2249 **************************************************************************/
2251 /* This zeroes out and then fills in the invariants in a struct
2252 * efx_nic (including all sub-structures).
2254 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2255 struct pci_dev *pci_dev, struct net_device *net_dev)
2259 /* Initialise common structures */
2260 memset(efx, 0, sizeof(*efx));
2261 spin_lock_init(&efx->biu_lock);
2262 #ifdef CONFIG_SFC_MTD
2263 INIT_LIST_HEAD(&efx->mtd_list);
2265 INIT_WORK(&efx->reset_work, efx_reset_work);
2266 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2267 efx->pci_dev = pci_dev;
2268 efx->msg_enable = debug;
2269 efx->state = STATE_INIT;
2270 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2272 efx->net_dev = net_dev;
2273 spin_lock_init(&efx->stats_lock);
2274 mutex_init(&efx->mac_lock);
2275 efx->mac_op = type->default_mac_ops;
2276 efx->phy_op = &efx_dummy_phy_operations;
2277 efx->mdio.dev = net_dev;
2278 INIT_WORK(&efx->mac_work, efx_mac_work);
2280 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2281 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2282 if (!efx->channel[i])
2288 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2290 /* Higher numbered interrupt modes are less capable! */
2291 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2294 /* Would be good to use the net_dev name, but we're too early */
2295 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2297 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2298 if (!efx->workqueue)
2304 efx_fini_struct(efx);
2308 static void efx_fini_struct(struct efx_nic *efx)
2312 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2313 kfree(efx->channel[i]);
2315 if (efx->workqueue) {
2316 destroy_workqueue(efx->workqueue);
2317 efx->workqueue = NULL;
2321 /**************************************************************************
2325 **************************************************************************/
2327 /* Main body of final NIC shutdown code
2328 * This is called only at module unload (or hotplug removal).
2330 static void efx_pci_remove_main(struct efx_nic *efx)
2332 #ifdef CONFIG_RFS_ACCEL
2333 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2334 efx->net_dev->rx_cpu_rmap = NULL;
2336 efx_nic_fini_interrupt(efx);
2337 efx_fini_channels(efx);
2339 efx->type->fini(efx);
2341 efx_remove_all(efx);
2344 /* Final NIC shutdown
2345 * This is called only at module unload (or hotplug removal).
2347 static void efx_pci_remove(struct pci_dev *pci_dev)
2349 struct efx_nic *efx;
2351 efx = pci_get_drvdata(pci_dev);
2355 /* Mark the NIC as fini, then stop the interface */
2357 efx->state = STATE_FINI;
2358 dev_close(efx->net_dev);
2360 /* Allow any queued efx_resets() to complete */
2363 efx_unregister_netdev(efx);
2365 efx_mtd_remove(efx);
2367 /* Wait for any scheduled resets to complete. No more will be
2368 * scheduled from this point because efx_stop_all() has been
2369 * called, we are no longer registered with driverlink, and
2370 * the net_device's have been removed. */
2371 cancel_work_sync(&efx->reset_work);
2373 efx_pci_remove_main(efx);
2376 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2378 pci_set_drvdata(pci_dev, NULL);
2379 efx_fini_struct(efx);
2380 free_netdev(efx->net_dev);
2383 /* Main body of NIC initialisation
2384 * This is called at module load (or hotplug insertion, theoretically).
2386 static int efx_pci_probe_main(struct efx_nic *efx)
2390 /* Do start-of-day initialisation */
2391 rc = efx_probe_all(efx);
2397 rc = efx->type->init(efx);
2399 netif_err(efx, probe, efx->net_dev,
2400 "failed to initialise NIC\n");
2404 rc = efx_init_port(efx);
2406 netif_err(efx, probe, efx->net_dev,
2407 "failed to initialise port\n");
2411 efx_init_channels(efx);
2413 rc = efx_nic_init_interrupt(efx);
2420 efx_fini_channels(efx);
2423 efx->type->fini(efx);
2426 efx_remove_all(efx);
2431 /* NIC initialisation
2433 * This is called at module load (or hotplug insertion,
2434 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2435 * sets up and registers the network devices with the kernel and hooks
2436 * the interrupt service routine. It does not prepare the device for
2437 * transmission; this is left to the first time one of the network
2438 * interfaces is brought up (i.e. efx_net_open).
2440 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2441 const struct pci_device_id *entry)
2443 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2444 struct net_device *net_dev;
2445 struct efx_nic *efx;
2448 /* Allocate and initialise a struct net_device and struct efx_nic */
2449 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2453 net_dev->features |= (type->offload_features | NETIF_F_SG |
2454 NETIF_F_HIGHDMA | NETIF_F_TSO |
2456 if (type->offload_features & NETIF_F_V6_CSUM)
2457 net_dev->features |= NETIF_F_TSO6;
2458 /* Mask for features that also apply to VLAN devices */
2459 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2460 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2462 /* All offloads can be toggled */
2463 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2464 efx = netdev_priv(net_dev);
2465 pci_set_drvdata(pci_dev, efx);
2466 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2467 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2471 netif_info(efx, probe, efx->net_dev,
2472 "Solarflare NIC detected\n");
2474 /* Set up basic I/O (BAR mappings etc) */
2475 rc = efx_init_io(efx);
2479 /* No serialisation is required with the reset path because
2480 * we're in STATE_INIT. */
2481 for (i = 0; i < 5; i++) {
2482 rc = efx_pci_probe_main(efx);
2484 /* Serialise against efx_reset(). No more resets will be
2485 * scheduled since efx_stop_all() has been called, and we
2486 * have not and never have been registered with either
2487 * the rtnetlink or driverlink layers. */
2488 cancel_work_sync(&efx->reset_work);
2491 if (efx->reset_pending) {
2492 /* If there was a scheduled reset during
2493 * probe, the NIC is probably hosed anyway */
2494 efx_pci_remove_main(efx);
2501 /* Retry if a recoverably reset event has been scheduled */
2502 if (efx->reset_pending &
2503 ~(1 << RESET_TYPE_INVISIBLE | 1 << RESET_TYPE_ALL) ||
2504 !efx->reset_pending)
2507 efx->reset_pending = 0;
2511 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2515 /* Switch to the running state before we expose the device to the OS,
2516 * so that dev_open()|efx_start_all() will actually start the device */
2517 efx->state = STATE_RUNNING;
2519 rc = efx_register_netdev(efx);
2523 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2526 efx_mtd_probe(efx); /* allowed to fail */
2531 efx_pci_remove_main(efx);
2536 efx_fini_struct(efx);
2539 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2540 free_netdev(net_dev);
2544 static int efx_pm_freeze(struct device *dev)
2546 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2548 efx->state = STATE_FINI;
2550 netif_device_detach(efx->net_dev);
2553 efx_fini_channels(efx);
2558 static int efx_pm_thaw(struct device *dev)
2560 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2562 efx->state = STATE_INIT;
2564 efx_init_channels(efx);
2566 mutex_lock(&efx->mac_lock);
2567 efx->phy_op->reconfigure(efx);
2568 mutex_unlock(&efx->mac_lock);
2572 netif_device_attach(efx->net_dev);
2574 efx->state = STATE_RUNNING;
2576 efx->type->resume_wol(efx);
2578 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2579 queue_work(reset_workqueue, &efx->reset_work);
2584 static int efx_pm_poweroff(struct device *dev)
2586 struct pci_dev *pci_dev = to_pci_dev(dev);
2587 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2589 efx->type->fini(efx);
2591 efx->reset_pending = 0;
2593 pci_save_state(pci_dev);
2594 return pci_set_power_state(pci_dev, PCI_D3hot);
2597 /* Used for both resume and restore */
2598 static int efx_pm_resume(struct device *dev)
2600 struct pci_dev *pci_dev = to_pci_dev(dev);
2601 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2604 rc = pci_set_power_state(pci_dev, PCI_D0);
2607 pci_restore_state(pci_dev);
2608 rc = pci_enable_device(pci_dev);
2611 pci_set_master(efx->pci_dev);
2612 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2615 rc = efx->type->init(efx);
2622 static int efx_pm_suspend(struct device *dev)
2627 rc = efx_pm_poweroff(dev);
2633 static const struct dev_pm_ops efx_pm_ops = {
2634 .suspend = efx_pm_suspend,
2635 .resume = efx_pm_resume,
2636 .freeze = efx_pm_freeze,
2637 .thaw = efx_pm_thaw,
2638 .poweroff = efx_pm_poweroff,
2639 .restore = efx_pm_resume,
2642 static struct pci_driver efx_pci_driver = {
2643 .name = KBUILD_MODNAME,
2644 .id_table = efx_pci_table,
2645 .probe = efx_pci_probe,
2646 .remove = efx_pci_remove,
2647 .driver.pm = &efx_pm_ops,
2650 /**************************************************************************
2652 * Kernel module interface
2654 *************************************************************************/
2656 module_param(interrupt_mode, uint, 0444);
2657 MODULE_PARM_DESC(interrupt_mode,
2658 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2660 static int __init efx_init_module(void)
2664 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2666 rc = register_netdevice_notifier(&efx_netdev_notifier);
2670 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2671 if (!reset_workqueue) {
2676 rc = pci_register_driver(&efx_pci_driver);
2683 destroy_workqueue(reset_workqueue);
2685 unregister_netdevice_notifier(&efx_netdev_notifier);
2690 static void __exit efx_exit_module(void)
2692 printk(KERN_INFO "Solarflare NET driver unloading\n");
2694 pci_unregister_driver(&efx_pci_driver);
2695 destroy_workqueue(reset_workqueue);
2696 unregister_netdevice_notifier(&efx_netdev_notifier);
2700 module_init(efx_init_module);
2701 module_exit(efx_exit_module);
2703 MODULE_AUTHOR("Solarflare Communications and "
2704 "Michael Brown <mbrown@fensystems.co.uk>");
2705 MODULE_DESCRIPTION("Solarflare Communications network driver");
2706 MODULE_LICENSE("GPL");
2707 MODULE_DEVICE_TABLE(pci, efx_pci_table);