1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *const efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *const efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* Initial interrupt moderation settings. They can be modified after
126 * module load with ethtool.
128 * The default for RX should strike a balance between increasing the
129 * round-trip latency and reducing overhead.
131 static unsigned int rx_irq_mod_usec = 60;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * This default is chosen to ensure that a 10G link does not go idle
137 * while a TX queue is stopped after it has become full. A queue is
138 * restarted when it drops below half full. The time this takes (assuming
139 * worst case 3 descriptors per packet and 1024 descriptors) is
140 * 512 / 3 * 1.2 = 205 usec.
142 static unsigned int tx_irq_mod_usec = 150;
144 /* This is the first interrupt mode to try out of:
149 static unsigned int interrupt_mode;
151 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
152 * i.e. the number of CPUs among which we may distribute simultaneous
153 * interrupt handling.
155 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
156 * The default (0) means to assign an interrupt to each core.
158 static unsigned int rss_cpus;
159 module_param(rss_cpus, uint, 0444);
160 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
162 static int phy_flash_cfg;
163 module_param(phy_flash_cfg, int, 0644);
164 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
166 static unsigned irq_adapt_low_thresh = 10000;
167 module_param(irq_adapt_low_thresh, uint, 0644);
168 MODULE_PARM_DESC(irq_adapt_low_thresh,
169 "Threshold score for reducing IRQ moderation");
171 static unsigned irq_adapt_high_thresh = 20000;
172 module_param(irq_adapt_high_thresh, uint, 0644);
173 MODULE_PARM_DESC(irq_adapt_high_thresh,
174 "Threshold score for increasing IRQ moderation");
176 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
177 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
178 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
179 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
180 module_param(debug, uint, 0);
181 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
183 /**************************************************************************
185 * Utility functions and prototypes
187 *************************************************************************/
189 static void efx_remove_channels(struct efx_nic *efx);
190 static void efx_remove_port(struct efx_nic *efx);
191 static void efx_init_napi(struct efx_nic *efx);
192 static void efx_fini_napi(struct efx_nic *efx);
193 static void efx_fini_napi_channel(struct efx_channel *channel);
194 static void efx_fini_struct(struct efx_nic *efx);
195 static void efx_start_all(struct efx_nic *efx);
196 static void efx_stop_all(struct efx_nic *efx);
198 #define EFX_ASSERT_RESET_SERIALISED(efx) \
200 if ((efx->state == STATE_RUNNING) || \
201 (efx->state == STATE_DISABLED)) \
205 /**************************************************************************
207 * Event queue processing
209 *************************************************************************/
211 /* Process channel's event queue
213 * This function is responsible for processing the event queue of a
214 * single channel. The caller must guarantee that this function will
215 * never be concurrently called more than once on the same channel,
216 * though different channels may be being processed concurrently.
218 static int efx_process_channel(struct efx_channel *channel, int budget)
220 struct efx_nic *efx = channel->efx;
223 if (unlikely(efx->reset_pending || !channel->enabled))
226 spent = efx_nic_process_eventq(channel, budget);
230 /* Deliver last RX packet. */
231 if (channel->rx_pkt) {
232 __efx_rx_packet(channel, channel->rx_pkt,
233 channel->rx_pkt_csummed);
234 channel->rx_pkt = NULL;
237 efx_rx_strategy(channel);
239 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
244 /* Mark channel as finished processing
246 * Note that since we will not receive further interrupts for this
247 * channel before we finish processing and call the eventq_read_ack()
248 * method, there is no need to use the interrupt hold-off timers.
250 static inline void efx_channel_processed(struct efx_channel *channel)
252 /* The interrupt handler for this channel may set work_pending
253 * as soon as we acknowledge the events we've seen. Make sure
254 * it's cleared before then. */
255 channel->work_pending = false;
258 efx_nic_eventq_read_ack(channel);
263 * NAPI guarantees serialisation of polls of the same device, which
264 * provides the guarantee required by efx_process_channel().
266 static int efx_poll(struct napi_struct *napi, int budget)
268 struct efx_channel *channel =
269 container_of(napi, struct efx_channel, napi_str);
270 struct efx_nic *efx = channel->efx;
273 netif_vdbg(efx, intr, efx->net_dev,
274 "channel %d NAPI poll executing on CPU %d\n",
275 channel->channel, raw_smp_processor_id());
277 spent = efx_process_channel(channel, budget);
279 if (spent < budget) {
280 if (channel->channel < efx->n_rx_channels &&
281 efx->irq_rx_adaptive &&
282 unlikely(++channel->irq_count == 1000)) {
283 if (unlikely(channel->irq_mod_score <
284 irq_adapt_low_thresh)) {
285 if (channel->irq_moderation > 1) {
286 channel->irq_moderation -= 1;
287 efx->type->push_irq_moderation(channel);
289 } else if (unlikely(channel->irq_mod_score >
290 irq_adapt_high_thresh)) {
291 if (channel->irq_moderation <
292 efx->irq_rx_moderation) {
293 channel->irq_moderation += 1;
294 efx->type->push_irq_moderation(channel);
297 channel->irq_count = 0;
298 channel->irq_mod_score = 0;
301 efx_filter_rfs_expire(channel);
303 /* There is no race here; although napi_disable() will
304 * only wait for napi_complete(), this isn't a problem
305 * since efx_channel_processed() will have no effect if
306 * interrupts have already been disabled.
309 efx_channel_processed(channel);
315 /* Process the eventq of the specified channel immediately on this CPU
317 * Disable hardware generated interrupts, wait for any existing
318 * processing to finish, then directly poll (and ack ) the eventq.
319 * Finally reenable NAPI and interrupts.
321 * This is for use only during a loopback self-test. It must not
322 * deliver any packets up the stack as this can result in deadlock.
324 void efx_process_channel_now(struct efx_channel *channel)
326 struct efx_nic *efx = channel->efx;
328 BUG_ON(channel->channel >= efx->n_channels);
329 BUG_ON(!channel->enabled);
330 BUG_ON(!efx->loopback_selftest);
332 /* Disable interrupts and wait for ISRs to complete */
333 efx_nic_disable_interrupts(efx);
334 if (efx->legacy_irq) {
335 synchronize_irq(efx->legacy_irq);
336 efx->legacy_irq_enabled = false;
339 synchronize_irq(channel->irq);
341 /* Wait for any NAPI processing to complete */
342 napi_disable(&channel->napi_str);
344 /* Poll the channel */
345 efx_process_channel(channel, channel->eventq_mask + 1);
347 /* Ack the eventq. This may cause an interrupt to be generated
348 * when they are reenabled */
349 efx_channel_processed(channel);
351 napi_enable(&channel->napi_str);
353 efx->legacy_irq_enabled = true;
354 efx_nic_enable_interrupts(efx);
357 /* Create event queue
358 * Event queue memory allocations are done only once. If the channel
359 * is reset, the memory buffer will be reused; this guards against
360 * errors during channel reset and also simplifies interrupt handling.
362 static int efx_probe_eventq(struct efx_channel *channel)
364 struct efx_nic *efx = channel->efx;
365 unsigned long entries;
367 netif_dbg(efx, probe, efx->net_dev,
368 "chan %d create event queue\n", channel->channel);
370 /* Build an event queue with room for one event per tx and rx buffer,
371 * plus some extra for link state events and MCDI completions. */
372 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
373 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
374 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
376 return efx_nic_probe_eventq(channel);
379 /* Prepare channel's event queue */
380 static void efx_init_eventq(struct efx_channel *channel)
382 netif_dbg(channel->efx, drv, channel->efx->net_dev,
383 "chan %d init event queue\n", channel->channel);
385 channel->eventq_read_ptr = 0;
387 efx_nic_init_eventq(channel);
390 static void efx_fini_eventq(struct efx_channel *channel)
392 netif_dbg(channel->efx, drv, channel->efx->net_dev,
393 "chan %d fini event queue\n", channel->channel);
395 efx_nic_fini_eventq(channel);
398 static void efx_remove_eventq(struct efx_channel *channel)
400 netif_dbg(channel->efx, drv, channel->efx->net_dev,
401 "chan %d remove event queue\n", channel->channel);
403 efx_nic_remove_eventq(channel);
406 /**************************************************************************
410 *************************************************************************/
412 /* Allocate and initialise a channel structure, optionally copying
413 * parameters (but not resources) from an old channel structure. */
414 static struct efx_channel *
415 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
417 struct efx_channel *channel;
418 struct efx_rx_queue *rx_queue;
419 struct efx_tx_queue *tx_queue;
423 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
427 *channel = *old_channel;
429 channel->napi_dev = NULL;
430 memset(&channel->eventq, 0, sizeof(channel->eventq));
432 rx_queue = &channel->rx_queue;
433 rx_queue->buffer = NULL;
434 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
436 for (j = 0; j < EFX_TXQ_TYPES; j++) {
437 tx_queue = &channel->tx_queue[j];
438 if (tx_queue->channel)
439 tx_queue->channel = channel;
440 tx_queue->buffer = NULL;
441 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
444 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
449 channel->channel = i;
451 for (j = 0; j < EFX_TXQ_TYPES; j++) {
452 tx_queue = &channel->tx_queue[j];
454 tx_queue->queue = i * EFX_TXQ_TYPES + j;
455 tx_queue->channel = channel;
459 rx_queue = &channel->rx_queue;
461 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
462 (unsigned long)rx_queue);
467 static int efx_probe_channel(struct efx_channel *channel)
469 struct efx_tx_queue *tx_queue;
470 struct efx_rx_queue *rx_queue;
473 netif_dbg(channel->efx, probe, channel->efx->net_dev,
474 "creating channel %d\n", channel->channel);
476 rc = efx_probe_eventq(channel);
480 efx_for_each_channel_tx_queue(tx_queue, channel) {
481 rc = efx_probe_tx_queue(tx_queue);
486 efx_for_each_channel_rx_queue(rx_queue, channel) {
487 rc = efx_probe_rx_queue(rx_queue);
492 channel->n_rx_frm_trunc = 0;
497 efx_for_each_channel_rx_queue(rx_queue, channel)
498 efx_remove_rx_queue(rx_queue);
500 efx_for_each_channel_tx_queue(tx_queue, channel)
501 efx_remove_tx_queue(tx_queue);
507 static void efx_set_channel_names(struct efx_nic *efx)
509 struct efx_channel *channel;
510 const char *type = "";
513 efx_for_each_channel(channel, efx) {
514 number = channel->channel;
515 if (efx->n_channels > efx->n_rx_channels) {
516 if (channel->channel < efx->n_rx_channels) {
520 number -= efx->n_rx_channels;
523 snprintf(efx->channel_name[channel->channel],
524 sizeof(efx->channel_name[0]),
525 "%s%s-%d", efx->name, type, number);
529 static int efx_probe_channels(struct efx_nic *efx)
531 struct efx_channel *channel;
534 /* Restart special buffer allocation */
535 efx->next_buffer_table = 0;
537 efx_for_each_channel(channel, efx) {
538 rc = efx_probe_channel(channel);
540 netif_err(efx, probe, efx->net_dev,
541 "failed to create channel %d\n",
546 efx_set_channel_names(efx);
551 efx_remove_channels(efx);
555 /* Channels are shutdown and reinitialised whilst the NIC is running
556 * to propagate configuration changes (mtu, checksum offload), or
557 * to clear hardware error conditions
559 static void efx_init_channels(struct efx_nic *efx)
561 struct efx_tx_queue *tx_queue;
562 struct efx_rx_queue *rx_queue;
563 struct efx_channel *channel;
565 /* Calculate the rx buffer allocation parameters required to
566 * support the current MTU, including padding for header
567 * alignment and overruns.
569 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
570 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
571 efx->type->rx_buffer_hash_size +
572 efx->type->rx_buffer_padding);
573 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
574 sizeof(struct efx_rx_page_state));
576 /* Initialise the channels */
577 efx_for_each_channel(channel, efx) {
578 netif_dbg(channel->efx, drv, channel->efx->net_dev,
579 "init chan %d\n", channel->channel);
581 efx_init_eventq(channel);
583 efx_for_each_channel_tx_queue(tx_queue, channel)
584 efx_init_tx_queue(tx_queue);
586 /* The rx buffer allocation strategy is MTU dependent */
587 efx_rx_strategy(channel);
589 efx_for_each_channel_rx_queue(rx_queue, channel)
590 efx_init_rx_queue(rx_queue);
592 WARN_ON(channel->rx_pkt != NULL);
593 efx_rx_strategy(channel);
597 /* This enables event queue processing and packet transmission.
599 * Note that this function is not allowed to fail, since that would
600 * introduce too much complexity into the suspend/resume path.
602 static void efx_start_channel(struct efx_channel *channel)
604 struct efx_rx_queue *rx_queue;
606 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
607 "starting chan %d\n", channel->channel);
609 /* The interrupt handler for this channel may set work_pending
610 * as soon as we enable it. Make sure it's cleared before
611 * then. Similarly, make sure it sees the enabled flag set. */
612 channel->work_pending = false;
613 channel->enabled = true;
616 /* Fill the queues before enabling NAPI */
617 efx_for_each_channel_rx_queue(rx_queue, channel)
618 efx_fast_push_rx_descriptors(rx_queue);
620 napi_enable(&channel->napi_str);
623 /* This disables event queue processing and packet transmission.
624 * This function does not guarantee that all queue processing
625 * (e.g. RX refill) is complete.
627 static void efx_stop_channel(struct efx_channel *channel)
629 if (!channel->enabled)
632 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
633 "stop chan %d\n", channel->channel);
635 channel->enabled = false;
636 napi_disable(&channel->napi_str);
639 static void efx_fini_channels(struct efx_nic *efx)
641 struct efx_channel *channel;
642 struct efx_tx_queue *tx_queue;
643 struct efx_rx_queue *rx_queue;
646 EFX_ASSERT_RESET_SERIALISED(efx);
647 BUG_ON(efx->port_enabled);
649 rc = efx_nic_flush_queues(efx);
650 if (rc && EFX_WORKAROUND_7803(efx)) {
651 /* Schedule a reset to recover from the flush failure. The
652 * descriptor caches reference memory we're about to free,
653 * but falcon_reconfigure_mac_wrapper() won't reconnect
654 * the MACs because of the pending reset. */
655 netif_err(efx, drv, efx->net_dev,
656 "Resetting to recover from flush failure\n");
657 efx_schedule_reset(efx, RESET_TYPE_ALL);
659 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
661 netif_dbg(efx, drv, efx->net_dev,
662 "successfully flushed all queues\n");
665 efx_for_each_channel(channel, efx) {
666 netif_dbg(channel->efx, drv, channel->efx->net_dev,
667 "shut down chan %d\n", channel->channel);
669 efx_for_each_channel_rx_queue(rx_queue, channel)
670 efx_fini_rx_queue(rx_queue);
671 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
672 efx_fini_tx_queue(tx_queue);
673 efx_fini_eventq(channel);
677 static void efx_remove_channel(struct efx_channel *channel)
679 struct efx_tx_queue *tx_queue;
680 struct efx_rx_queue *rx_queue;
682 netif_dbg(channel->efx, drv, channel->efx->net_dev,
683 "destroy chan %d\n", channel->channel);
685 efx_for_each_channel_rx_queue(rx_queue, channel)
686 efx_remove_rx_queue(rx_queue);
687 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
688 efx_remove_tx_queue(tx_queue);
689 efx_remove_eventq(channel);
692 static void efx_remove_channels(struct efx_nic *efx)
694 struct efx_channel *channel;
696 efx_for_each_channel(channel, efx)
697 efx_remove_channel(channel);
701 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
703 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
704 u32 old_rxq_entries, old_txq_entries;
709 efx_fini_channels(efx);
712 memset(other_channel, 0, sizeof(other_channel));
713 for (i = 0; i < efx->n_channels; i++) {
714 channel = efx_alloc_channel(efx, i, efx->channel[i]);
719 other_channel[i] = channel;
722 /* Swap entry counts and channel pointers */
723 old_rxq_entries = efx->rxq_entries;
724 old_txq_entries = efx->txq_entries;
725 efx->rxq_entries = rxq_entries;
726 efx->txq_entries = txq_entries;
727 for (i = 0; i < efx->n_channels; i++) {
728 channel = efx->channel[i];
729 efx->channel[i] = other_channel[i];
730 other_channel[i] = channel;
733 rc = efx_probe_channels(efx);
739 /* Destroy old channels */
740 for (i = 0; i < efx->n_channels; i++) {
741 efx_fini_napi_channel(other_channel[i]);
742 efx_remove_channel(other_channel[i]);
745 /* Free unused channel structures */
746 for (i = 0; i < efx->n_channels; i++)
747 kfree(other_channel[i]);
749 efx_init_channels(efx);
755 efx->rxq_entries = old_rxq_entries;
756 efx->txq_entries = old_txq_entries;
757 for (i = 0; i < efx->n_channels; i++) {
758 channel = efx->channel[i];
759 efx->channel[i] = other_channel[i];
760 other_channel[i] = channel;
765 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
767 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
770 /**************************************************************************
774 **************************************************************************/
776 /* This ensures that the kernel is kept informed (via
777 * netif_carrier_on/off) of the link status, and also maintains the
778 * link status's stop on the port's TX queue.
780 void efx_link_status_changed(struct efx_nic *efx)
782 struct efx_link_state *link_state = &efx->link_state;
784 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
785 * that no events are triggered between unregister_netdev() and the
786 * driver unloading. A more general condition is that NETDEV_CHANGE
787 * can only be generated between NETDEV_UP and NETDEV_DOWN */
788 if (!netif_running(efx->net_dev))
791 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
792 efx->n_link_state_changes++;
795 netif_carrier_on(efx->net_dev);
797 netif_carrier_off(efx->net_dev);
800 /* Status message for kernel log */
802 netif_info(efx, link, efx->net_dev,
803 "link up at %uMbps %s-duplex (MTU %d)%s\n",
804 link_state->speed, link_state->fd ? "full" : "half",
806 (efx->promiscuous ? " [PROMISC]" : ""));
808 netif_info(efx, link, efx->net_dev, "link down\n");
811 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
813 efx->link_advertising = advertising;
815 if (advertising & ADVERTISED_Pause)
816 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
818 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
819 if (advertising & ADVERTISED_Asym_Pause)
820 efx->wanted_fc ^= EFX_FC_TX;
824 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
826 efx->wanted_fc = wanted_fc;
827 if (efx->link_advertising) {
828 if (wanted_fc & EFX_FC_RX)
829 efx->link_advertising |= (ADVERTISED_Pause |
830 ADVERTISED_Asym_Pause);
832 efx->link_advertising &= ~(ADVERTISED_Pause |
833 ADVERTISED_Asym_Pause);
834 if (wanted_fc & EFX_FC_TX)
835 efx->link_advertising ^= ADVERTISED_Asym_Pause;
839 static void efx_fini_port(struct efx_nic *efx);
841 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
842 * the MAC appropriately. All other PHY configuration changes are pushed
843 * through phy_op->set_settings(), and pushed asynchronously to the MAC
844 * through efx_monitor().
846 * Callers must hold the mac_lock
848 int __efx_reconfigure_port(struct efx_nic *efx)
850 enum efx_phy_mode phy_mode;
853 WARN_ON(!mutex_is_locked(&efx->mac_lock));
855 /* Serialise the promiscuous flag with efx_set_multicast_list. */
856 netif_addr_lock_bh(efx->net_dev);
857 netif_addr_unlock_bh(efx->net_dev);
859 /* Disable PHY transmit in mac level loopbacks */
860 phy_mode = efx->phy_mode;
861 if (LOOPBACK_INTERNAL(efx))
862 efx->phy_mode |= PHY_MODE_TX_DISABLED;
864 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
866 rc = efx->type->reconfigure_port(efx);
869 efx->phy_mode = phy_mode;
874 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
876 int efx_reconfigure_port(struct efx_nic *efx)
880 EFX_ASSERT_RESET_SERIALISED(efx);
882 mutex_lock(&efx->mac_lock);
883 rc = __efx_reconfigure_port(efx);
884 mutex_unlock(&efx->mac_lock);
889 /* Asynchronous work item for changing MAC promiscuity and multicast
890 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
892 static void efx_mac_work(struct work_struct *data)
894 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
896 mutex_lock(&efx->mac_lock);
897 if (efx->port_enabled)
898 efx->type->reconfigure_mac(efx);
899 mutex_unlock(&efx->mac_lock);
902 static int efx_probe_port(struct efx_nic *efx)
906 netif_dbg(efx, probe, efx->net_dev, "create port\n");
909 efx->phy_mode = PHY_MODE_SPECIAL;
911 /* Connect up MAC/PHY operations table */
912 rc = efx->type->probe_port(efx);
916 /* Initialise MAC address to permanent address */
917 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
922 static int efx_init_port(struct efx_nic *efx)
926 netif_dbg(efx, drv, efx->net_dev, "init port\n");
928 mutex_lock(&efx->mac_lock);
930 rc = efx->phy_op->init(efx);
934 efx->port_initialized = true;
936 /* Reconfigure the MAC before creating dma queues (required for
937 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
938 efx->type->reconfigure_mac(efx);
940 /* Ensure the PHY advertises the correct flow control settings */
941 rc = efx->phy_op->reconfigure(efx);
945 mutex_unlock(&efx->mac_lock);
949 efx->phy_op->fini(efx);
951 mutex_unlock(&efx->mac_lock);
955 static void efx_start_port(struct efx_nic *efx)
957 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
958 BUG_ON(efx->port_enabled);
960 mutex_lock(&efx->mac_lock);
961 efx->port_enabled = true;
963 /* efx_mac_work() might have been scheduled after efx_stop_port(),
964 * and then cancelled by efx_flush_all() */
965 efx->type->reconfigure_mac(efx);
967 mutex_unlock(&efx->mac_lock);
970 /* Prevent efx_mac_work() and efx_monitor() from working */
971 static void efx_stop_port(struct efx_nic *efx)
973 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
975 mutex_lock(&efx->mac_lock);
976 efx->port_enabled = false;
977 mutex_unlock(&efx->mac_lock);
979 /* Serialise against efx_set_multicast_list() */
980 netif_addr_lock_bh(efx->net_dev);
981 netif_addr_unlock_bh(efx->net_dev);
984 static void efx_fini_port(struct efx_nic *efx)
986 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
988 if (!efx->port_initialized)
991 efx->phy_op->fini(efx);
992 efx->port_initialized = false;
994 efx->link_state.up = false;
995 efx_link_status_changed(efx);
998 static void efx_remove_port(struct efx_nic *efx)
1000 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1002 efx->type->remove_port(efx);
1005 /**************************************************************************
1009 **************************************************************************/
1011 /* This configures the PCI device to enable I/O and DMA. */
1012 static int efx_init_io(struct efx_nic *efx)
1014 struct pci_dev *pci_dev = efx->pci_dev;
1015 dma_addr_t dma_mask = efx->type->max_dma_mask;
1018 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1020 rc = pci_enable_device(pci_dev);
1022 netif_err(efx, probe, efx->net_dev,
1023 "failed to enable PCI device\n");
1027 pci_set_master(pci_dev);
1029 /* Set the PCI DMA mask. Try all possibilities from our
1030 * genuine mask down to 32 bits, because some architectures
1031 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1032 * masks event though they reject 46 bit masks.
1034 while (dma_mask > 0x7fffffffUL) {
1035 if (pci_dma_supported(pci_dev, dma_mask)) {
1036 rc = pci_set_dma_mask(pci_dev, dma_mask);
1043 netif_err(efx, probe, efx->net_dev,
1044 "could not find a suitable DMA mask\n");
1047 netif_dbg(efx, probe, efx->net_dev,
1048 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1049 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1051 /* pci_set_consistent_dma_mask() is not *allowed* to
1052 * fail with a mask that pci_set_dma_mask() accepted,
1053 * but just in case...
1055 netif_err(efx, probe, efx->net_dev,
1056 "failed to set consistent DMA mask\n");
1060 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1061 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1063 netif_err(efx, probe, efx->net_dev,
1064 "request for memory BAR failed\n");
1068 efx->membase = ioremap_nocache(efx->membase_phys,
1069 efx->type->mem_map_size);
1070 if (!efx->membase) {
1071 netif_err(efx, probe, efx->net_dev,
1072 "could not map memory BAR at %llx+%x\n",
1073 (unsigned long long)efx->membase_phys,
1074 efx->type->mem_map_size);
1078 netif_dbg(efx, probe, efx->net_dev,
1079 "memory BAR at %llx+%x (virtual %p)\n",
1080 (unsigned long long)efx->membase_phys,
1081 efx->type->mem_map_size, efx->membase);
1086 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1088 efx->membase_phys = 0;
1090 pci_disable_device(efx->pci_dev);
1095 static void efx_fini_io(struct efx_nic *efx)
1097 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1100 iounmap(efx->membase);
1101 efx->membase = NULL;
1104 if (efx->membase_phys) {
1105 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1106 efx->membase_phys = 0;
1109 pci_disable_device(efx->pci_dev);
1112 static int efx_wanted_parallelism(void)
1114 cpumask_var_t thread_mask;
1121 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1123 "sfc: RSS disabled due to allocation failure\n");
1128 for_each_online_cpu(cpu) {
1129 if (!cpumask_test_cpu(cpu, thread_mask)) {
1131 cpumask_or(thread_mask, thread_mask,
1132 topology_thread_cpumask(cpu));
1136 free_cpumask_var(thread_mask);
1141 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1143 #ifdef CONFIG_RFS_ACCEL
1146 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1147 if (!efx->net_dev->rx_cpu_rmap)
1149 for (i = 0; i < efx->n_rx_channels; i++) {
1150 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1151 xentries[i].vector);
1153 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1154 efx->net_dev->rx_cpu_rmap = NULL;
1162 /* Probe the number and type of interrupts we are able to obtain, and
1163 * the resulting numbers of channels and RX queues.
1165 static int efx_probe_interrupts(struct efx_nic *efx)
1168 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1171 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1172 struct msix_entry xentries[EFX_MAX_CHANNELS];
1175 n_channels = efx_wanted_parallelism();
1176 if (separate_tx_channels)
1178 n_channels = min(n_channels, max_channels);
1180 for (i = 0; i < n_channels; i++)
1181 xentries[i].entry = i;
1182 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1184 netif_err(efx, drv, efx->net_dev,
1185 "WARNING: Insufficient MSI-X vectors"
1186 " available (%d < %d).\n", rc, n_channels);
1187 netif_err(efx, drv, efx->net_dev,
1188 "WARNING: Performance may be reduced.\n");
1189 EFX_BUG_ON_PARANOID(rc >= n_channels);
1191 rc = pci_enable_msix(efx->pci_dev, xentries,
1196 efx->n_channels = n_channels;
1197 if (separate_tx_channels) {
1198 efx->n_tx_channels =
1199 max(efx->n_channels / 2, 1U);
1200 efx->n_rx_channels =
1201 max(efx->n_channels -
1202 efx->n_tx_channels, 1U);
1204 efx->n_tx_channels = efx->n_channels;
1205 efx->n_rx_channels = efx->n_channels;
1207 rc = efx_init_rx_cpu_rmap(efx, xentries);
1209 pci_disable_msix(efx->pci_dev);
1212 for (i = 0; i < n_channels; i++)
1213 efx_get_channel(efx, i)->irq =
1216 /* Fall back to single channel MSI */
1217 efx->interrupt_mode = EFX_INT_MODE_MSI;
1218 netif_err(efx, drv, efx->net_dev,
1219 "could not enable MSI-X\n");
1223 /* Try single interrupt MSI */
1224 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1225 efx->n_channels = 1;
1226 efx->n_rx_channels = 1;
1227 efx->n_tx_channels = 1;
1228 rc = pci_enable_msi(efx->pci_dev);
1230 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1232 netif_err(efx, drv, efx->net_dev,
1233 "could not enable MSI\n");
1234 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1238 /* Assume legacy interrupts */
1239 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1240 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1241 efx->n_rx_channels = 1;
1242 efx->n_tx_channels = 1;
1243 efx->legacy_irq = efx->pci_dev->irq;
1249 static void efx_remove_interrupts(struct efx_nic *efx)
1251 struct efx_channel *channel;
1253 /* Remove MSI/MSI-X interrupts */
1254 efx_for_each_channel(channel, efx)
1256 pci_disable_msi(efx->pci_dev);
1257 pci_disable_msix(efx->pci_dev);
1259 /* Remove legacy interrupt */
1260 efx->legacy_irq = 0;
1263 static void efx_set_channels(struct efx_nic *efx)
1265 struct efx_channel *channel;
1266 struct efx_tx_queue *tx_queue;
1268 efx->tx_channel_offset =
1269 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1271 /* We need to adjust the TX queue numbers if we have separate
1272 * RX-only and TX-only channels.
1274 efx_for_each_channel(channel, efx) {
1275 efx_for_each_channel_tx_queue(tx_queue, channel)
1276 tx_queue->queue -= (efx->tx_channel_offset *
1281 static int efx_probe_nic(struct efx_nic *efx)
1286 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1288 /* Carry out hardware-type specific initialisation */
1289 rc = efx->type->probe(efx);
1293 /* Determine the number of channels and queues by trying to hook
1294 * in MSI-X interrupts. */
1295 rc = efx_probe_interrupts(efx);
1299 if (efx->n_channels > 1)
1300 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1301 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1302 efx->rx_indir_table[i] =
1303 ethtool_rxfh_indir_default(i, efx->n_rx_channels);
1305 efx_set_channels(efx);
1306 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1307 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1309 /* Initialise the interrupt moderation settings */
1310 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1316 efx->type->remove(efx);
1320 static void efx_remove_nic(struct efx_nic *efx)
1322 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1324 efx_remove_interrupts(efx);
1325 efx->type->remove(efx);
1328 /**************************************************************************
1330 * NIC startup/shutdown
1332 *************************************************************************/
1334 static int efx_probe_all(struct efx_nic *efx)
1338 rc = efx_probe_nic(efx);
1340 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1344 rc = efx_probe_port(efx);
1346 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1350 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1351 rc = efx_probe_channels(efx);
1355 rc = efx_probe_filters(efx);
1357 netif_err(efx, probe, efx->net_dev,
1358 "failed to create filter tables\n");
1365 efx_remove_channels(efx);
1367 efx_remove_port(efx);
1369 efx_remove_nic(efx);
1374 /* Called after previous invocation(s) of efx_stop_all, restarts the
1375 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1376 * and ensures that the port is scheduled to be reconfigured.
1377 * This function is safe to call multiple times when the NIC is in any
1379 static void efx_start_all(struct efx_nic *efx)
1381 struct efx_channel *channel;
1383 EFX_ASSERT_RESET_SERIALISED(efx);
1385 /* Check that it is appropriate to restart the interface. All
1386 * of these flags are safe to read under just the rtnl lock */
1387 if (efx->port_enabled)
1389 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1391 if (!netif_running(efx->net_dev))
1394 /* Mark the port as enabled so port reconfigurations can start, then
1395 * restart the transmit interface early so the watchdog timer stops */
1396 efx_start_port(efx);
1398 if (netif_device_present(efx->net_dev))
1399 netif_tx_wake_all_queues(efx->net_dev);
1401 efx_for_each_channel(channel, efx)
1402 efx_start_channel(channel);
1404 if (efx->legacy_irq)
1405 efx->legacy_irq_enabled = true;
1406 efx_nic_enable_interrupts(efx);
1408 /* Switch to event based MCDI completions after enabling interrupts.
1409 * If a reset has been scheduled, then we need to stay in polled mode.
1410 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1411 * reset_pending [modified from an atomic context], we instead guarantee
1412 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1413 efx_mcdi_mode_event(efx);
1414 if (efx->reset_pending)
1415 efx_mcdi_mode_poll(efx);
1417 /* Start the hardware monitor if there is one. Otherwise (we're link
1418 * event driven), we have to poll the PHY because after an event queue
1419 * flush, we could have a missed a link state change */
1420 if (efx->type->monitor != NULL) {
1421 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1422 efx_monitor_interval);
1424 mutex_lock(&efx->mac_lock);
1425 if (efx->phy_op->poll(efx))
1426 efx_link_status_changed(efx);
1427 mutex_unlock(&efx->mac_lock);
1430 efx->type->start_stats(efx);
1433 /* Flush all delayed work. Should only be called when no more delayed work
1434 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1435 * since we're holding the rtnl_lock at this point. */
1436 static void efx_flush_all(struct efx_nic *efx)
1438 /* Make sure the hardware monitor is stopped */
1439 cancel_delayed_work_sync(&efx->monitor_work);
1440 /* Stop scheduled port reconfigurations */
1441 cancel_work_sync(&efx->mac_work);
1444 /* Quiesce hardware and software without bringing the link down.
1445 * Safe to call multiple times, when the nic and interface is in any
1446 * state. The caller is guaranteed to subsequently be in a position
1447 * to modify any hardware and software state they see fit without
1449 static void efx_stop_all(struct efx_nic *efx)
1451 struct efx_channel *channel;
1453 EFX_ASSERT_RESET_SERIALISED(efx);
1455 /* port_enabled can be read safely under the rtnl lock */
1456 if (!efx->port_enabled)
1459 efx->type->stop_stats(efx);
1461 /* Switch to MCDI polling on Siena before disabling interrupts */
1462 efx_mcdi_mode_poll(efx);
1464 /* Disable interrupts and wait for ISR to complete */
1465 efx_nic_disable_interrupts(efx);
1466 if (efx->legacy_irq) {
1467 synchronize_irq(efx->legacy_irq);
1468 efx->legacy_irq_enabled = false;
1470 efx_for_each_channel(channel, efx) {
1472 synchronize_irq(channel->irq);
1475 /* Stop all NAPI processing and synchronous rx refills */
1476 efx_for_each_channel(channel, efx)
1477 efx_stop_channel(channel);
1479 /* Stop all asynchronous port reconfigurations. Since all
1480 * event processing has already been stopped, there is no
1481 * window to loose phy events */
1484 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1487 /* Stop the kernel transmit interface late, so the watchdog
1488 * timer isn't ticking over the flush */
1489 netif_tx_stop_all_queues(efx->net_dev);
1490 netif_tx_lock_bh(efx->net_dev);
1491 netif_tx_unlock_bh(efx->net_dev);
1494 static void efx_remove_all(struct efx_nic *efx)
1496 efx_remove_filters(efx);
1497 efx_remove_channels(efx);
1498 efx_remove_port(efx);
1499 efx_remove_nic(efx);
1502 /**************************************************************************
1504 * Interrupt moderation
1506 **************************************************************************/
1508 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1512 if (usecs * 1000 < quantum_ns)
1513 return 1; /* never round down to 0 */
1514 return usecs * 1000 / quantum_ns;
1517 /* Set interrupt moderation parameters */
1518 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1519 unsigned int rx_usecs, bool rx_adaptive,
1520 bool rx_may_override_tx)
1522 struct efx_channel *channel;
1523 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1524 efx->timer_quantum_ns,
1526 unsigned int tx_ticks;
1527 unsigned int rx_ticks;
1529 EFX_ASSERT_RESET_SERIALISED(efx);
1531 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1534 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1535 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1537 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1538 !rx_may_override_tx) {
1539 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1540 "RX and TX IRQ moderation must be equal\n");
1544 efx->irq_rx_adaptive = rx_adaptive;
1545 efx->irq_rx_moderation = rx_ticks;
1546 efx_for_each_channel(channel, efx) {
1547 if (efx_channel_has_rx_queue(channel))
1548 channel->irq_moderation = rx_ticks;
1549 else if (efx_channel_has_tx_queues(channel))
1550 channel->irq_moderation = tx_ticks;
1556 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1557 unsigned int *rx_usecs, bool *rx_adaptive)
1559 /* We must round up when converting ticks to microseconds
1560 * because we round down when converting the other way.
1563 *rx_adaptive = efx->irq_rx_adaptive;
1564 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1565 efx->timer_quantum_ns,
1568 /* If channels are shared between RX and TX, so is IRQ
1569 * moderation. Otherwise, IRQ moderation is the same for all
1570 * TX channels and is not adaptive.
1572 if (efx->tx_channel_offset == 0)
1573 *tx_usecs = *rx_usecs;
1575 *tx_usecs = DIV_ROUND_UP(
1576 efx->channel[efx->tx_channel_offset]->irq_moderation *
1577 efx->timer_quantum_ns,
1581 /**************************************************************************
1585 **************************************************************************/
1587 /* Run periodically off the general workqueue */
1588 static void efx_monitor(struct work_struct *data)
1590 struct efx_nic *efx = container_of(data, struct efx_nic,
1593 netif_vdbg(efx, timer, efx->net_dev,
1594 "hardware monitor executing on CPU %d\n",
1595 raw_smp_processor_id());
1596 BUG_ON(efx->type->monitor == NULL);
1598 /* If the mac_lock is already held then it is likely a port
1599 * reconfiguration is already in place, which will likely do
1600 * most of the work of monitor() anyway. */
1601 if (mutex_trylock(&efx->mac_lock)) {
1602 if (efx->port_enabled)
1603 efx->type->monitor(efx);
1604 mutex_unlock(&efx->mac_lock);
1607 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1608 efx_monitor_interval);
1611 /**************************************************************************
1615 *************************************************************************/
1618 * Context: process, rtnl_lock() held.
1620 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1622 struct efx_nic *efx = netdev_priv(net_dev);
1623 struct mii_ioctl_data *data = if_mii(ifr);
1625 EFX_ASSERT_RESET_SERIALISED(efx);
1627 /* Convert phy_id from older PRTAD/DEVAD format */
1628 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1629 (data->phy_id & 0xfc00) == 0x0400)
1630 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1632 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1635 /**************************************************************************
1639 **************************************************************************/
1641 static void efx_init_napi(struct efx_nic *efx)
1643 struct efx_channel *channel;
1645 efx_for_each_channel(channel, efx) {
1646 channel->napi_dev = efx->net_dev;
1647 netif_napi_add(channel->napi_dev, &channel->napi_str,
1648 efx_poll, napi_weight);
1652 static void efx_fini_napi_channel(struct efx_channel *channel)
1654 if (channel->napi_dev)
1655 netif_napi_del(&channel->napi_str);
1656 channel->napi_dev = NULL;
1659 static void efx_fini_napi(struct efx_nic *efx)
1661 struct efx_channel *channel;
1663 efx_for_each_channel(channel, efx)
1664 efx_fini_napi_channel(channel);
1667 /**************************************************************************
1669 * Kernel netpoll interface
1671 *************************************************************************/
1673 #ifdef CONFIG_NET_POLL_CONTROLLER
1675 /* Although in the common case interrupts will be disabled, this is not
1676 * guaranteed. However, all our work happens inside the NAPI callback,
1677 * so no locking is required.
1679 static void efx_netpoll(struct net_device *net_dev)
1681 struct efx_nic *efx = netdev_priv(net_dev);
1682 struct efx_channel *channel;
1684 efx_for_each_channel(channel, efx)
1685 efx_schedule_channel(channel);
1690 /**************************************************************************
1692 * Kernel net device interface
1694 *************************************************************************/
1696 /* Context: process, rtnl_lock() held. */
1697 static int efx_net_open(struct net_device *net_dev)
1699 struct efx_nic *efx = netdev_priv(net_dev);
1700 EFX_ASSERT_RESET_SERIALISED(efx);
1702 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1703 raw_smp_processor_id());
1705 if (efx->state == STATE_DISABLED)
1707 if (efx->phy_mode & PHY_MODE_SPECIAL)
1709 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1712 /* Notify the kernel of the link state polled during driver load,
1713 * before the monitor starts running */
1714 efx_link_status_changed(efx);
1720 /* Context: process, rtnl_lock() held.
1721 * Note that the kernel will ignore our return code; this method
1722 * should really be a void.
1724 static int efx_net_stop(struct net_device *net_dev)
1726 struct efx_nic *efx = netdev_priv(net_dev);
1728 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1729 raw_smp_processor_id());
1731 if (efx->state != STATE_DISABLED) {
1732 /* Stop the device and flush all the channels */
1734 efx_fini_channels(efx);
1735 efx_init_channels(efx);
1741 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1742 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1743 struct rtnl_link_stats64 *stats)
1745 struct efx_nic *efx = netdev_priv(net_dev);
1746 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1748 spin_lock_bh(&efx->stats_lock);
1750 efx->type->update_stats(efx);
1752 stats->rx_packets = mac_stats->rx_packets;
1753 stats->tx_packets = mac_stats->tx_packets;
1754 stats->rx_bytes = mac_stats->rx_bytes;
1755 stats->tx_bytes = mac_stats->tx_bytes;
1756 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1757 stats->multicast = mac_stats->rx_multicast;
1758 stats->collisions = mac_stats->tx_collision;
1759 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1760 mac_stats->rx_length_error);
1761 stats->rx_crc_errors = mac_stats->rx_bad;
1762 stats->rx_frame_errors = mac_stats->rx_align_error;
1763 stats->rx_fifo_errors = mac_stats->rx_overflow;
1764 stats->rx_missed_errors = mac_stats->rx_missed;
1765 stats->tx_window_errors = mac_stats->tx_late_collision;
1767 stats->rx_errors = (stats->rx_length_errors +
1768 stats->rx_crc_errors +
1769 stats->rx_frame_errors +
1770 mac_stats->rx_symbol_error);
1771 stats->tx_errors = (stats->tx_window_errors +
1774 spin_unlock_bh(&efx->stats_lock);
1779 /* Context: netif_tx_lock held, BHs disabled. */
1780 static void efx_watchdog(struct net_device *net_dev)
1782 struct efx_nic *efx = netdev_priv(net_dev);
1784 netif_err(efx, tx_err, efx->net_dev,
1785 "TX stuck with port_enabled=%d: resetting channels\n",
1788 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1792 /* Context: process, rtnl_lock() held. */
1793 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1795 struct efx_nic *efx = netdev_priv(net_dev);
1797 EFX_ASSERT_RESET_SERIALISED(efx);
1799 if (new_mtu > EFX_MAX_MTU)
1804 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1806 efx_fini_channels(efx);
1808 mutex_lock(&efx->mac_lock);
1809 /* Reconfigure the MAC before enabling the dma queues so that
1810 * the RX buffers don't overflow */
1811 net_dev->mtu = new_mtu;
1812 efx->type->reconfigure_mac(efx);
1813 mutex_unlock(&efx->mac_lock);
1815 efx_init_channels(efx);
1821 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1823 struct efx_nic *efx = netdev_priv(net_dev);
1824 struct sockaddr *addr = data;
1825 char *new_addr = addr->sa_data;
1827 EFX_ASSERT_RESET_SERIALISED(efx);
1829 if (!is_valid_ether_addr(new_addr)) {
1830 netif_err(efx, drv, efx->net_dev,
1831 "invalid ethernet MAC address requested: %pM\n",
1836 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1838 /* Reconfigure the MAC */
1839 mutex_lock(&efx->mac_lock);
1840 efx->type->reconfigure_mac(efx);
1841 mutex_unlock(&efx->mac_lock);
1846 /* Context: netif_addr_lock held, BHs disabled. */
1847 static void efx_set_multicast_list(struct net_device *net_dev)
1849 struct efx_nic *efx = netdev_priv(net_dev);
1850 struct netdev_hw_addr *ha;
1851 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1855 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1857 /* Build multicast hash table */
1858 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1859 memset(mc_hash, 0xff, sizeof(*mc_hash));
1861 memset(mc_hash, 0x00, sizeof(*mc_hash));
1862 netdev_for_each_mc_addr(ha, net_dev) {
1863 crc = ether_crc_le(ETH_ALEN, ha->addr);
1864 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1865 set_bit_le(bit, mc_hash->byte);
1868 /* Broadcast packets go through the multicast hash filter.
1869 * ether_crc_le() of the broadcast address is 0xbe2612ff
1870 * so we always add bit 0xff to the mask.
1872 set_bit_le(0xff, mc_hash->byte);
1875 if (efx->port_enabled)
1876 queue_work(efx->workqueue, &efx->mac_work);
1877 /* Otherwise efx_start_port() will do this */
1880 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
1882 struct efx_nic *efx = netdev_priv(net_dev);
1884 /* If disabling RX n-tuple filtering, clear existing filters */
1885 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1886 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
1891 static const struct net_device_ops efx_netdev_ops = {
1892 .ndo_open = efx_net_open,
1893 .ndo_stop = efx_net_stop,
1894 .ndo_get_stats64 = efx_net_stats,
1895 .ndo_tx_timeout = efx_watchdog,
1896 .ndo_start_xmit = efx_hard_start_xmit,
1897 .ndo_validate_addr = eth_validate_addr,
1898 .ndo_do_ioctl = efx_ioctl,
1899 .ndo_change_mtu = efx_change_mtu,
1900 .ndo_set_mac_address = efx_set_mac_address,
1901 .ndo_set_rx_mode = efx_set_multicast_list,
1902 .ndo_set_features = efx_set_features,
1903 #ifdef CONFIG_NET_POLL_CONTROLLER
1904 .ndo_poll_controller = efx_netpoll,
1906 .ndo_setup_tc = efx_setup_tc,
1907 #ifdef CONFIG_RFS_ACCEL
1908 .ndo_rx_flow_steer = efx_filter_rfs,
1912 static void efx_update_name(struct efx_nic *efx)
1914 strcpy(efx->name, efx->net_dev->name);
1915 efx_mtd_rename(efx);
1916 efx_set_channel_names(efx);
1919 static int efx_netdev_event(struct notifier_block *this,
1920 unsigned long event, void *ptr)
1922 struct net_device *net_dev = ptr;
1924 if (net_dev->netdev_ops == &efx_netdev_ops &&
1925 event == NETDEV_CHANGENAME)
1926 efx_update_name(netdev_priv(net_dev));
1931 static struct notifier_block efx_netdev_notifier = {
1932 .notifier_call = efx_netdev_event,
1936 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1938 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1939 return sprintf(buf, "%d\n", efx->phy_type);
1941 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1943 static int efx_register_netdev(struct efx_nic *efx)
1945 struct net_device *net_dev = efx->net_dev;
1946 struct efx_channel *channel;
1949 net_dev->watchdog_timeo = 5 * HZ;
1950 net_dev->irq = efx->pci_dev->irq;
1951 net_dev->netdev_ops = &efx_netdev_ops;
1952 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1956 rc = dev_alloc_name(net_dev, net_dev->name);
1959 efx_update_name(efx);
1961 rc = register_netdevice(net_dev);
1965 efx_for_each_channel(channel, efx) {
1966 struct efx_tx_queue *tx_queue;
1967 efx_for_each_channel_tx_queue(tx_queue, channel)
1968 efx_init_tx_queue_core_txq(tx_queue);
1971 /* Always start with carrier off; PHY events will detect the link */
1972 netif_carrier_off(net_dev);
1976 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1978 netif_err(efx, drv, efx->net_dev,
1979 "failed to init net dev attributes\n");
1980 goto fail_registered;
1987 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1991 unregister_netdev(net_dev);
1995 static void efx_unregister_netdev(struct efx_nic *efx)
1997 struct efx_channel *channel;
1998 struct efx_tx_queue *tx_queue;
2003 BUG_ON(netdev_priv(efx->net_dev) != efx);
2005 /* Free up any skbs still remaining. This has to happen before
2006 * we try to unregister the netdev as running their destructors
2007 * may be needed to get the device ref. count to 0. */
2008 efx_for_each_channel(channel, efx) {
2009 efx_for_each_channel_tx_queue(tx_queue, channel)
2010 efx_release_tx_buffers(tx_queue);
2013 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2014 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2015 unregister_netdev(efx->net_dev);
2018 /**************************************************************************
2020 * Device reset and suspend
2022 **************************************************************************/
2024 /* Tears down the entire software state and most of the hardware state
2026 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2028 EFX_ASSERT_RESET_SERIALISED(efx);
2031 mutex_lock(&efx->mac_lock);
2033 efx_fini_channels(efx);
2034 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2035 efx->phy_op->fini(efx);
2036 efx->type->fini(efx);
2039 /* This function will always ensure that the locks acquired in
2040 * efx_reset_down() are released. A failure return code indicates
2041 * that we were unable to reinitialise the hardware, and the
2042 * driver should be disabled. If ok is false, then the rx and tx
2043 * engines are not restarted, pending a RESET_DISABLE. */
2044 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2048 EFX_ASSERT_RESET_SERIALISED(efx);
2050 rc = efx->type->init(efx);
2052 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2059 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2060 rc = efx->phy_op->init(efx);
2063 if (efx->phy_op->reconfigure(efx))
2064 netif_err(efx, drv, efx->net_dev,
2065 "could not restore PHY settings\n");
2068 efx->type->reconfigure_mac(efx);
2070 efx_init_channels(efx);
2071 efx_restore_filters(efx);
2073 mutex_unlock(&efx->mac_lock);
2080 efx->port_initialized = false;
2082 mutex_unlock(&efx->mac_lock);
2087 /* Reset the NIC using the specified method. Note that the reset may
2088 * fail, in which case the card will be left in an unusable state.
2090 * Caller must hold the rtnl_lock.
2092 int efx_reset(struct efx_nic *efx, enum reset_type method)
2097 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2098 RESET_TYPE(method));
2100 netif_device_detach(efx->net_dev);
2101 efx_reset_down(efx, method);
2103 rc = efx->type->reset(efx, method);
2105 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2109 /* Clear flags for the scopes we covered. We assume the NIC and
2110 * driver are now quiescent so that there is no race here.
2112 efx->reset_pending &= -(1 << (method + 1));
2114 /* Reinitialise bus-mastering, which may have been turned off before
2115 * the reset was scheduled. This is still appropriate, even in the
2116 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2117 * can respond to requests. */
2118 pci_set_master(efx->pci_dev);
2121 /* Leave device stopped if necessary */
2122 disabled = rc || method == RESET_TYPE_DISABLE;
2123 rc2 = efx_reset_up(efx, method, !disabled);
2131 dev_close(efx->net_dev);
2132 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2133 efx->state = STATE_DISABLED;
2135 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2136 netif_device_attach(efx->net_dev);
2141 /* The worker thread exists so that code that cannot sleep can
2142 * schedule a reset for later.
2144 static void efx_reset_work(struct work_struct *data)
2146 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2147 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2152 /* If we're not RUNNING then don't reset. Leave the reset_pending
2153 * flags set so that efx_pci_probe_main will be retried */
2154 if (efx->state != STATE_RUNNING) {
2155 netif_info(efx, drv, efx->net_dev,
2156 "scheduled reset quenched. NIC not RUNNING\n");
2161 (void)efx_reset(efx, fls(pending) - 1);
2165 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2167 enum reset_type method;
2170 case RESET_TYPE_INVISIBLE:
2171 case RESET_TYPE_ALL:
2172 case RESET_TYPE_WORLD:
2173 case RESET_TYPE_DISABLE:
2175 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2176 RESET_TYPE(method));
2179 method = efx->type->map_reset_reason(type);
2180 netif_dbg(efx, drv, efx->net_dev,
2181 "scheduling %s reset for %s\n",
2182 RESET_TYPE(method), RESET_TYPE(type));
2186 set_bit(method, &efx->reset_pending);
2188 /* efx_process_channel() will no longer read events once a
2189 * reset is scheduled. So switch back to poll'd MCDI completions. */
2190 efx_mcdi_mode_poll(efx);
2192 queue_work(reset_workqueue, &efx->reset_work);
2195 /**************************************************************************
2197 * List of NICs we support
2199 **************************************************************************/
2201 /* PCI device ID table */
2202 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2203 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2204 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2205 .driver_data = (unsigned long) &falcon_a1_nic_type},
2206 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2207 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2208 .driver_data = (unsigned long) &falcon_b0_nic_type},
2209 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2210 .driver_data = (unsigned long) &siena_a0_nic_type},
2211 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2212 .driver_data = (unsigned long) &siena_a0_nic_type},
2213 {0} /* end of list */
2216 /**************************************************************************
2218 * Dummy PHY/MAC operations
2220 * Can be used for some unimplemented operations
2221 * Needed so all function pointers are valid and do not have to be tested
2224 **************************************************************************/
2225 int efx_port_dummy_op_int(struct efx_nic *efx)
2229 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2231 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2236 static const struct efx_phy_operations efx_dummy_phy_operations = {
2237 .init = efx_port_dummy_op_int,
2238 .reconfigure = efx_port_dummy_op_int,
2239 .poll = efx_port_dummy_op_poll,
2240 .fini = efx_port_dummy_op_void,
2243 /**************************************************************************
2247 **************************************************************************/
2249 /* This zeroes out and then fills in the invariants in a struct
2250 * efx_nic (including all sub-structures).
2252 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2253 struct pci_dev *pci_dev, struct net_device *net_dev)
2257 /* Initialise common structures */
2258 memset(efx, 0, sizeof(*efx));
2259 spin_lock_init(&efx->biu_lock);
2260 #ifdef CONFIG_SFC_MTD
2261 INIT_LIST_HEAD(&efx->mtd_list);
2263 INIT_WORK(&efx->reset_work, efx_reset_work);
2264 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2265 efx->pci_dev = pci_dev;
2266 efx->msg_enable = debug;
2267 efx->state = STATE_INIT;
2268 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2270 efx->net_dev = net_dev;
2271 spin_lock_init(&efx->stats_lock);
2272 mutex_init(&efx->mac_lock);
2273 efx->phy_op = &efx_dummy_phy_operations;
2274 efx->mdio.dev = net_dev;
2275 INIT_WORK(&efx->mac_work, efx_mac_work);
2277 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2278 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2279 if (!efx->channel[i])
2285 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2287 /* Higher numbered interrupt modes are less capable! */
2288 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2291 /* Would be good to use the net_dev name, but we're too early */
2292 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2294 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2295 if (!efx->workqueue)
2301 efx_fini_struct(efx);
2305 static void efx_fini_struct(struct efx_nic *efx)
2309 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2310 kfree(efx->channel[i]);
2312 if (efx->workqueue) {
2313 destroy_workqueue(efx->workqueue);
2314 efx->workqueue = NULL;
2318 /**************************************************************************
2322 **************************************************************************/
2324 /* Main body of final NIC shutdown code
2325 * This is called only at module unload (or hotplug removal).
2327 static void efx_pci_remove_main(struct efx_nic *efx)
2329 #ifdef CONFIG_RFS_ACCEL
2330 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2331 efx->net_dev->rx_cpu_rmap = NULL;
2333 efx_nic_fini_interrupt(efx);
2334 efx_fini_channels(efx);
2336 efx->type->fini(efx);
2338 efx_remove_all(efx);
2341 /* Final NIC shutdown
2342 * This is called only at module unload (or hotplug removal).
2344 static void efx_pci_remove(struct pci_dev *pci_dev)
2346 struct efx_nic *efx;
2348 efx = pci_get_drvdata(pci_dev);
2352 /* Mark the NIC as fini, then stop the interface */
2354 efx->state = STATE_FINI;
2355 dev_close(efx->net_dev);
2357 /* Allow any queued efx_resets() to complete */
2360 efx_unregister_netdev(efx);
2362 efx_mtd_remove(efx);
2364 /* Wait for any scheduled resets to complete. No more will be
2365 * scheduled from this point because efx_stop_all() has been
2366 * called, we are no longer registered with driverlink, and
2367 * the net_device's have been removed. */
2368 cancel_work_sync(&efx->reset_work);
2370 efx_pci_remove_main(efx);
2373 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2375 pci_set_drvdata(pci_dev, NULL);
2376 efx_fini_struct(efx);
2377 free_netdev(efx->net_dev);
2380 /* Main body of NIC initialisation
2381 * This is called at module load (or hotplug insertion, theoretically).
2383 static int efx_pci_probe_main(struct efx_nic *efx)
2387 /* Do start-of-day initialisation */
2388 rc = efx_probe_all(efx);
2394 rc = efx->type->init(efx);
2396 netif_err(efx, probe, efx->net_dev,
2397 "failed to initialise NIC\n");
2401 rc = efx_init_port(efx);
2403 netif_err(efx, probe, efx->net_dev,
2404 "failed to initialise port\n");
2408 efx_init_channels(efx);
2410 rc = efx_nic_init_interrupt(efx);
2417 efx_fini_channels(efx);
2420 efx->type->fini(efx);
2423 efx_remove_all(efx);
2428 /* NIC initialisation
2430 * This is called at module load (or hotplug insertion,
2431 * theoretically). It sets up PCI mappings, resets the NIC,
2432 * sets up and registers the network devices with the kernel and hooks
2433 * the interrupt service routine. It does not prepare the device for
2434 * transmission; this is left to the first time one of the network
2435 * interfaces is brought up (i.e. efx_net_open).
2437 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2438 const struct pci_device_id *entry)
2440 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2441 struct net_device *net_dev;
2442 struct efx_nic *efx;
2445 /* Allocate and initialise a struct net_device and struct efx_nic */
2446 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2450 net_dev->features |= (type->offload_features | NETIF_F_SG |
2451 NETIF_F_HIGHDMA | NETIF_F_TSO |
2453 if (type->offload_features & NETIF_F_V6_CSUM)
2454 net_dev->features |= NETIF_F_TSO6;
2455 /* Mask for features that also apply to VLAN devices */
2456 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2457 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2459 /* All offloads can be toggled */
2460 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2461 efx = netdev_priv(net_dev);
2462 pci_set_drvdata(pci_dev, efx);
2463 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2464 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2468 netif_info(efx, probe, efx->net_dev,
2469 "Solarflare NIC detected\n");
2471 /* Set up basic I/O (BAR mappings etc) */
2472 rc = efx_init_io(efx);
2476 /* No serialisation is required with the reset path because
2477 * we're in STATE_INIT. */
2478 for (i = 0; i < 5; i++) {
2479 rc = efx_pci_probe_main(efx);
2481 /* Serialise against efx_reset(). No more resets will be
2482 * scheduled since efx_stop_all() has been called, and we
2483 * have not and never have been registered with either
2484 * the rtnetlink or driverlink layers. */
2485 cancel_work_sync(&efx->reset_work);
2488 if (efx->reset_pending) {
2489 /* If there was a scheduled reset during
2490 * probe, the NIC is probably hosed anyway */
2491 efx_pci_remove_main(efx);
2498 /* Retry if a recoverably reset event has been scheduled */
2499 if (efx->reset_pending &
2500 ~(1 << RESET_TYPE_INVISIBLE | 1 << RESET_TYPE_ALL) ||
2501 !efx->reset_pending)
2504 efx->reset_pending = 0;
2508 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2512 /* Switch to the running state before we expose the device to the OS,
2513 * so that dev_open()|efx_start_all() will actually start the device */
2514 efx->state = STATE_RUNNING;
2516 rc = efx_register_netdev(efx);
2520 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2523 efx_mtd_probe(efx); /* allowed to fail */
2528 efx_pci_remove_main(efx);
2533 efx_fini_struct(efx);
2536 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2537 free_netdev(net_dev);
2541 static int efx_pm_freeze(struct device *dev)
2543 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2545 efx->state = STATE_FINI;
2547 netif_device_detach(efx->net_dev);
2550 efx_fini_channels(efx);
2555 static int efx_pm_thaw(struct device *dev)
2557 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2559 efx->state = STATE_INIT;
2561 efx_init_channels(efx);
2563 mutex_lock(&efx->mac_lock);
2564 efx->phy_op->reconfigure(efx);
2565 mutex_unlock(&efx->mac_lock);
2569 netif_device_attach(efx->net_dev);
2571 efx->state = STATE_RUNNING;
2573 efx->type->resume_wol(efx);
2575 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2576 queue_work(reset_workqueue, &efx->reset_work);
2581 static int efx_pm_poweroff(struct device *dev)
2583 struct pci_dev *pci_dev = to_pci_dev(dev);
2584 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2586 efx->type->fini(efx);
2588 efx->reset_pending = 0;
2590 pci_save_state(pci_dev);
2591 return pci_set_power_state(pci_dev, PCI_D3hot);
2594 /* Used for both resume and restore */
2595 static int efx_pm_resume(struct device *dev)
2597 struct pci_dev *pci_dev = to_pci_dev(dev);
2598 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2601 rc = pci_set_power_state(pci_dev, PCI_D0);
2604 pci_restore_state(pci_dev);
2605 rc = pci_enable_device(pci_dev);
2608 pci_set_master(efx->pci_dev);
2609 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2612 rc = efx->type->init(efx);
2619 static int efx_pm_suspend(struct device *dev)
2624 rc = efx_pm_poweroff(dev);
2630 static const struct dev_pm_ops efx_pm_ops = {
2631 .suspend = efx_pm_suspend,
2632 .resume = efx_pm_resume,
2633 .freeze = efx_pm_freeze,
2634 .thaw = efx_pm_thaw,
2635 .poweroff = efx_pm_poweroff,
2636 .restore = efx_pm_resume,
2639 static struct pci_driver efx_pci_driver = {
2640 .name = KBUILD_MODNAME,
2641 .id_table = efx_pci_table,
2642 .probe = efx_pci_probe,
2643 .remove = efx_pci_remove,
2644 .driver.pm = &efx_pm_ops,
2647 /**************************************************************************
2649 * Kernel module interface
2651 *************************************************************************/
2653 module_param(interrupt_mode, uint, 0444);
2654 MODULE_PARM_DESC(interrupt_mode,
2655 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2657 static int __init efx_init_module(void)
2661 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2663 rc = register_netdevice_notifier(&efx_netdev_notifier);
2667 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2668 if (!reset_workqueue) {
2673 rc = pci_register_driver(&efx_pci_driver);
2680 destroy_workqueue(reset_workqueue);
2682 unregister_netdevice_notifier(&efx_netdev_notifier);
2687 static void __exit efx_exit_module(void)
2689 printk(KERN_INFO "Solarflare NET driver unloading\n");
2691 pci_unregister_driver(&efx_pci_driver);
2692 destroy_workqueue(reset_workqueue);
2693 unregister_netdevice_notifier(&efx_netdev_notifier);
2697 module_init(efx_init_module);
2698 module_exit(efx_exit_module);
2700 MODULE_AUTHOR("Solarflare Communications and "
2701 "Michael Brown <mbrown@fensystems.co.uk>");
2702 MODULE_DESCRIPTION("Solarflare Communications network driver");
2703 MODULE_LICENSE("GPL");
2704 MODULE_DEVICE_TABLE(pci, efx_pci_table);