1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
84 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
85 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
86 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
90 * queued onto this work queue. This is not a per-nic work queue, because
91 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
93 static struct workqueue_struct *reset_workqueue;
95 /**************************************************************************
99 *************************************************************************/
102 * Use separate channels for TX and RX events
104 * Set this to 1 to use separate channels for TX and RX. It allows us
105 * to control interrupt affinity separately for TX and RX.
107 * This is only used in MSI-X interrupt mode
109 static bool separate_tx_channels;
110 module_param(separate_tx_channels, bool, 0444);
111 MODULE_PARM_DESC(separate_tx_channels,
112 "Use separate channels for TX and RX");
114 /* This is the weight assigned to each of the (per-channel) virtual
117 static int napi_weight = 64;
119 /* This is the time (in jiffies) between invocations of the hardware
121 * On Falcon-based NICs, this will:
122 * - Check the on-board hardware monitor;
123 * - Poll the link state and reconfigure the hardware as necessary.
124 * On Siena-based NICs for power systems with EEH support, this will give EEH a
127 static unsigned int efx_monitor_interval = 1 * HZ;
129 /* Initial interrupt moderation settings. They can be modified after
130 * module load with ethtool.
132 * The default for RX should strike a balance between increasing the
133 * round-trip latency and reducing overhead.
135 static unsigned int rx_irq_mod_usec = 60;
137 /* Initial interrupt moderation settings. They can be modified after
138 * module load with ethtool.
140 * This default is chosen to ensure that a 10G link does not go idle
141 * while a TX queue is stopped after it has become full. A queue is
142 * restarted when it drops below half full. The time this takes (assuming
143 * worst case 3 descriptors per packet and 1024 descriptors) is
144 * 512 / 3 * 1.2 = 205 usec.
146 static unsigned int tx_irq_mod_usec = 150;
148 /* This is the first interrupt mode to try out of:
153 static unsigned int interrupt_mode;
155 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
156 * i.e. the number of CPUs among which we may distribute simultaneous
157 * interrupt handling.
159 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
160 * The default (0) means to assign an interrupt to each core.
162 static unsigned int rss_cpus;
163 module_param(rss_cpus, uint, 0444);
164 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
166 static bool phy_flash_cfg;
167 module_param(phy_flash_cfg, bool, 0644);
168 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
170 static unsigned irq_adapt_low_thresh = 8000;
171 module_param(irq_adapt_low_thresh, uint, 0644);
172 MODULE_PARM_DESC(irq_adapt_low_thresh,
173 "Threshold score for reducing IRQ moderation");
175 static unsigned irq_adapt_high_thresh = 16000;
176 module_param(irq_adapt_high_thresh, uint, 0644);
177 MODULE_PARM_DESC(irq_adapt_high_thresh,
178 "Threshold score for increasing IRQ moderation");
180 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
181 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
182 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
183 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
184 module_param(debug, uint, 0);
185 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
187 /**************************************************************************
189 * Utility functions and prototypes
191 *************************************************************************/
193 static void efx_soft_enable_interrupts(struct efx_nic *efx);
194 static void efx_soft_disable_interrupts(struct efx_nic *efx);
195 static void efx_remove_channel(struct efx_channel *channel);
196 static void efx_remove_channels(struct efx_nic *efx);
197 static const struct efx_channel_type efx_default_channel_type;
198 static void efx_remove_port(struct efx_nic *efx);
199 static void efx_init_napi_channel(struct efx_channel *channel);
200 static void efx_fini_napi(struct efx_nic *efx);
201 static void efx_fini_napi_channel(struct efx_channel *channel);
202 static void efx_fini_struct(struct efx_nic *efx);
203 static void efx_start_all(struct efx_nic *efx);
204 static void efx_stop_all(struct efx_nic *efx);
206 #define EFX_ASSERT_RESET_SERIALISED(efx) \
208 if ((efx->state == STATE_READY) || \
209 (efx->state == STATE_RECOVERY) || \
210 (efx->state == STATE_DISABLED)) \
214 static int efx_check_disabled(struct efx_nic *efx)
216 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
217 netif_err(efx, drv, efx->net_dev,
218 "device is disabled due to earlier errors\n");
224 /**************************************************************************
226 * Event queue processing
228 *************************************************************************/
230 /* Process channel's event queue
232 * This function is responsible for processing the event queue of a
233 * single channel. The caller must guarantee that this function will
234 * never be concurrently called more than once on the same channel,
235 * though different channels may be being processed concurrently.
237 static int efx_process_channel(struct efx_channel *channel, int budget)
241 if (unlikely(!channel->enabled))
244 spent = efx_nic_process_eventq(channel, budget);
245 if (spent && efx_channel_has_rx_queue(channel)) {
246 struct efx_rx_queue *rx_queue =
247 efx_channel_get_rx_queue(channel);
249 efx_rx_flush_packet(channel);
250 efx_fast_push_rx_descriptors(rx_queue);
258 * NAPI guarantees serialisation of polls of the same device, which
259 * provides the guarantee required by efx_process_channel().
261 static int efx_poll(struct napi_struct *napi, int budget)
263 struct efx_channel *channel =
264 container_of(napi, struct efx_channel, napi_str);
265 struct efx_nic *efx = channel->efx;
268 netif_vdbg(efx, intr, efx->net_dev,
269 "channel %d NAPI poll executing on CPU %d\n",
270 channel->channel, raw_smp_processor_id());
272 spent = efx_process_channel(channel, budget);
274 if (spent < budget) {
275 if (efx_channel_has_rx_queue(channel) &&
276 efx->irq_rx_adaptive &&
277 unlikely(++channel->irq_count == 1000)) {
278 if (unlikely(channel->irq_mod_score <
279 irq_adapt_low_thresh)) {
280 if (channel->irq_moderation > 1) {
281 channel->irq_moderation -= 1;
282 efx->type->push_irq_moderation(channel);
284 } else if (unlikely(channel->irq_mod_score >
285 irq_adapt_high_thresh)) {
286 if (channel->irq_moderation <
287 efx->irq_rx_moderation) {
288 channel->irq_moderation += 1;
289 efx->type->push_irq_moderation(channel);
292 channel->irq_count = 0;
293 channel->irq_mod_score = 0;
296 efx_filter_rfs_expire(channel);
298 /* There is no race here; although napi_disable() will
299 * only wait for napi_complete(), this isn't a problem
300 * since efx_nic_eventq_read_ack() will have no effect if
301 * interrupts have already been disabled.
304 efx_nic_eventq_read_ack(channel);
310 /* Create event queue
311 * Event queue memory allocations are done only once. If the channel
312 * is reset, the memory buffer will be reused; this guards against
313 * errors during channel reset and also simplifies interrupt handling.
315 static int efx_probe_eventq(struct efx_channel *channel)
317 struct efx_nic *efx = channel->efx;
318 unsigned long entries;
320 netif_dbg(efx, probe, efx->net_dev,
321 "chan %d create event queue\n", channel->channel);
323 /* Build an event queue with room for one event per tx and rx buffer,
324 * plus some extra for link state events and MCDI completions. */
325 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
326 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
327 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
329 return efx_nic_probe_eventq(channel);
332 /* Prepare channel's event queue */
333 static void efx_init_eventq(struct efx_channel *channel)
335 netif_dbg(channel->efx, drv, channel->efx->net_dev,
336 "chan %d init event queue\n", channel->channel);
338 channel->eventq_read_ptr = 0;
340 efx_nic_init_eventq(channel);
341 channel->eventq_init = true;
344 /* Enable event queue processing and NAPI */
345 static void efx_start_eventq(struct efx_channel *channel)
347 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
348 "chan %d start event queue\n", channel->channel);
350 /* Make sure the NAPI handler sees the enabled flag set */
351 channel->enabled = true;
354 napi_enable(&channel->napi_str);
355 efx_nic_eventq_read_ack(channel);
358 /* Disable event queue processing and NAPI */
359 static void efx_stop_eventq(struct efx_channel *channel)
361 if (!channel->enabled)
364 napi_disable(&channel->napi_str);
365 channel->enabled = false;
368 static void efx_fini_eventq(struct efx_channel *channel)
370 if (!channel->eventq_init)
373 netif_dbg(channel->efx, drv, channel->efx->net_dev,
374 "chan %d fini event queue\n", channel->channel);
376 efx_nic_fini_eventq(channel);
377 channel->eventq_init = false;
380 static void efx_remove_eventq(struct efx_channel *channel)
382 netif_dbg(channel->efx, drv, channel->efx->net_dev,
383 "chan %d remove event queue\n", channel->channel);
385 efx_nic_remove_eventq(channel);
388 /**************************************************************************
392 *************************************************************************/
394 /* Allocate and initialise a channel structure. */
395 static struct efx_channel *
396 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
398 struct efx_channel *channel;
399 struct efx_rx_queue *rx_queue;
400 struct efx_tx_queue *tx_queue;
403 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
408 channel->channel = i;
409 channel->type = &efx_default_channel_type;
411 for (j = 0; j < EFX_TXQ_TYPES; j++) {
412 tx_queue = &channel->tx_queue[j];
414 tx_queue->queue = i * EFX_TXQ_TYPES + j;
415 tx_queue->channel = channel;
418 rx_queue = &channel->rx_queue;
420 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
421 (unsigned long)rx_queue);
426 /* Allocate and initialise a channel structure, copying parameters
427 * (but not resources) from an old channel structure.
429 static struct efx_channel *
430 efx_copy_channel(const struct efx_channel *old_channel)
432 struct efx_channel *channel;
433 struct efx_rx_queue *rx_queue;
434 struct efx_tx_queue *tx_queue;
437 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
441 *channel = *old_channel;
443 channel->napi_dev = NULL;
444 memset(&channel->eventq, 0, sizeof(channel->eventq));
446 for (j = 0; j < EFX_TXQ_TYPES; j++) {
447 tx_queue = &channel->tx_queue[j];
448 if (tx_queue->channel)
449 tx_queue->channel = channel;
450 tx_queue->buffer = NULL;
451 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
454 rx_queue = &channel->rx_queue;
455 rx_queue->buffer = NULL;
456 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
457 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
458 (unsigned long)rx_queue);
463 static int efx_probe_channel(struct efx_channel *channel)
465 struct efx_tx_queue *tx_queue;
466 struct efx_rx_queue *rx_queue;
469 netif_dbg(channel->efx, probe, channel->efx->net_dev,
470 "creating channel %d\n", channel->channel);
472 rc = channel->type->pre_probe(channel);
476 rc = efx_probe_eventq(channel);
480 efx_for_each_channel_tx_queue(tx_queue, channel) {
481 rc = efx_probe_tx_queue(tx_queue);
486 efx_for_each_channel_rx_queue(rx_queue, channel) {
487 rc = efx_probe_rx_queue(rx_queue);
492 channel->n_rx_frm_trunc = 0;
497 efx_remove_channel(channel);
502 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
504 struct efx_nic *efx = channel->efx;
508 number = channel->channel;
509 if (efx->tx_channel_offset == 0) {
511 } else if (channel->channel < efx->tx_channel_offset) {
515 number -= efx->tx_channel_offset;
517 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
520 static void efx_set_channel_names(struct efx_nic *efx)
522 struct efx_channel *channel;
524 efx_for_each_channel(channel, efx)
525 channel->type->get_name(channel,
526 efx->msi_context[channel->channel].name,
527 sizeof(efx->msi_context[0].name));
530 static int efx_probe_channels(struct efx_nic *efx)
532 struct efx_channel *channel;
535 /* Restart special buffer allocation */
536 efx->next_buffer_table = 0;
538 /* Probe channels in reverse, so that any 'extra' channels
539 * use the start of the buffer table. This allows the traffic
540 * channels to be resized without moving them or wasting the
541 * entries before them.
543 efx_for_each_channel_rev(channel, efx) {
544 rc = efx_probe_channel(channel);
546 netif_err(efx, probe, efx->net_dev,
547 "failed to create channel %d\n",
552 efx_set_channel_names(efx);
557 efx_remove_channels(efx);
561 /* Channels are shutdown and reinitialised whilst the NIC is running
562 * to propagate configuration changes (mtu, checksum offload), or
563 * to clear hardware error conditions
565 static void efx_start_datapath(struct efx_nic *efx)
567 bool old_rx_scatter = efx->rx_scatter;
568 struct efx_tx_queue *tx_queue;
569 struct efx_rx_queue *rx_queue;
570 struct efx_channel *channel;
573 /* Calculate the rx buffer allocation parameters required to
574 * support the current MTU, including padding for header
575 * alignment and overruns.
577 efx->rx_dma_len = (efx->type->rx_buffer_hash_size +
578 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
579 efx->type->rx_buffer_padding);
580 rx_buf_len = (sizeof(struct efx_rx_page_state) +
581 NET_IP_ALIGN + efx->rx_dma_len);
582 if (rx_buf_len <= PAGE_SIZE) {
583 efx->rx_scatter = false;
584 efx->rx_buffer_order = 0;
585 } else if (efx->type->can_rx_scatter) {
586 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
587 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
588 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
589 EFX_RX_BUF_ALIGNMENT) >
591 efx->rx_scatter = true;
592 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
593 efx->rx_buffer_order = 0;
595 efx->rx_scatter = false;
596 efx->rx_buffer_order = get_order(rx_buf_len);
599 efx_rx_config_page_split(efx);
600 if (efx->rx_buffer_order)
601 netif_dbg(efx, drv, efx->net_dev,
602 "RX buf len=%u; page order=%u batch=%u\n",
603 efx->rx_dma_len, efx->rx_buffer_order,
604 efx->rx_pages_per_batch);
606 netif_dbg(efx, drv, efx->net_dev,
607 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
608 efx->rx_dma_len, efx->rx_page_buf_step,
609 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
611 /* RX filters also have scatter-enabled flags */
612 if (efx->rx_scatter != old_rx_scatter)
613 efx->type->filter_update_rx_scatter(efx);
615 /* We must keep at least one descriptor in a TX ring empty.
616 * We could avoid this when the queue size does not exactly
617 * match the hardware ring size, but it's not that important.
618 * Therefore we stop the queue when one more skb might fill
619 * the ring completely. We wake it when half way back to
622 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
623 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
625 /* Initialise the channels */
626 efx_for_each_channel(channel, efx) {
627 efx_for_each_channel_tx_queue(tx_queue, channel)
628 efx_init_tx_queue(tx_queue);
630 efx_for_each_channel_rx_queue(rx_queue, channel) {
631 efx_init_rx_queue(rx_queue);
632 efx_nic_generate_fill_event(rx_queue);
635 WARN_ON(channel->rx_pkt_n_frags);
638 if (netif_device_present(efx->net_dev))
639 netif_tx_wake_all_queues(efx->net_dev);
642 static void efx_stop_datapath(struct efx_nic *efx)
644 struct efx_channel *channel;
645 struct efx_tx_queue *tx_queue;
646 struct efx_rx_queue *rx_queue;
649 EFX_ASSERT_RESET_SERIALISED(efx);
650 BUG_ON(efx->port_enabled);
653 efx_for_each_channel(channel, efx) {
654 efx_for_each_channel_rx_queue(rx_queue, channel)
655 rx_queue->refill_enabled = false;
658 efx_for_each_channel(channel, efx) {
659 /* RX packet processing is pipelined, so wait for the
660 * NAPI handler to complete. At least event queue 0
661 * might be kept active by non-data events, so don't
662 * use napi_synchronize() but actually disable NAPI
665 if (efx_channel_has_rx_queue(channel)) {
666 efx_stop_eventq(channel);
667 efx_start_eventq(channel);
671 rc = efx->type->fini_dmaq(efx);
672 if (rc && EFX_WORKAROUND_7803(efx)) {
673 /* Schedule a reset to recover from the flush failure. The
674 * descriptor caches reference memory we're about to free,
675 * but falcon_reconfigure_mac_wrapper() won't reconnect
676 * the MACs because of the pending reset.
678 netif_err(efx, drv, efx->net_dev,
679 "Resetting to recover from flush failure\n");
680 efx_schedule_reset(efx, RESET_TYPE_ALL);
682 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
684 netif_dbg(efx, drv, efx->net_dev,
685 "successfully flushed all queues\n");
688 efx_for_each_channel(channel, efx) {
689 efx_for_each_channel_rx_queue(rx_queue, channel)
690 efx_fini_rx_queue(rx_queue);
691 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
692 efx_fini_tx_queue(tx_queue);
696 static void efx_remove_channel(struct efx_channel *channel)
698 struct efx_tx_queue *tx_queue;
699 struct efx_rx_queue *rx_queue;
701 netif_dbg(channel->efx, drv, channel->efx->net_dev,
702 "destroy chan %d\n", channel->channel);
704 efx_for_each_channel_rx_queue(rx_queue, channel)
705 efx_remove_rx_queue(rx_queue);
706 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
707 efx_remove_tx_queue(tx_queue);
708 efx_remove_eventq(channel);
709 channel->type->post_remove(channel);
712 static void efx_remove_channels(struct efx_nic *efx)
714 struct efx_channel *channel;
716 efx_for_each_channel(channel, efx)
717 efx_remove_channel(channel);
721 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
723 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
724 u32 old_rxq_entries, old_txq_entries;
725 unsigned i, next_buffer_table = 0;
728 rc = efx_check_disabled(efx);
732 /* Not all channels should be reallocated. We must avoid
733 * reallocating their buffer table entries.
735 efx_for_each_channel(channel, efx) {
736 struct efx_rx_queue *rx_queue;
737 struct efx_tx_queue *tx_queue;
739 if (channel->type->copy)
741 next_buffer_table = max(next_buffer_table,
742 channel->eventq.index +
743 channel->eventq.entries);
744 efx_for_each_channel_rx_queue(rx_queue, channel)
745 next_buffer_table = max(next_buffer_table,
746 rx_queue->rxd.index +
747 rx_queue->rxd.entries);
748 efx_for_each_channel_tx_queue(tx_queue, channel)
749 next_buffer_table = max(next_buffer_table,
750 tx_queue->txd.index +
751 tx_queue->txd.entries);
754 efx_device_detach_sync(efx);
756 efx_soft_disable_interrupts(efx);
758 /* Clone channels (where possible) */
759 memset(other_channel, 0, sizeof(other_channel));
760 for (i = 0; i < efx->n_channels; i++) {
761 channel = efx->channel[i];
762 if (channel->type->copy)
763 channel = channel->type->copy(channel);
768 other_channel[i] = channel;
771 /* Swap entry counts and channel pointers */
772 old_rxq_entries = efx->rxq_entries;
773 old_txq_entries = efx->txq_entries;
774 efx->rxq_entries = rxq_entries;
775 efx->txq_entries = txq_entries;
776 for (i = 0; i < efx->n_channels; i++) {
777 channel = efx->channel[i];
778 efx->channel[i] = other_channel[i];
779 other_channel[i] = channel;
782 /* Restart buffer table allocation */
783 efx->next_buffer_table = next_buffer_table;
785 for (i = 0; i < efx->n_channels; i++) {
786 channel = efx->channel[i];
787 if (!channel->type->copy)
789 rc = efx_probe_channel(channel);
792 efx_init_napi_channel(efx->channel[i]);
796 /* Destroy unused channel structures */
797 for (i = 0; i < efx->n_channels; i++) {
798 channel = other_channel[i];
799 if (channel && channel->type->copy) {
800 efx_fini_napi_channel(channel);
801 efx_remove_channel(channel);
806 efx_soft_enable_interrupts(efx);
808 netif_device_attach(efx->net_dev);
813 efx->rxq_entries = old_rxq_entries;
814 efx->txq_entries = old_txq_entries;
815 for (i = 0; i < efx->n_channels; i++) {
816 channel = efx->channel[i];
817 efx->channel[i] = other_channel[i];
818 other_channel[i] = channel;
823 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
825 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
828 static const struct efx_channel_type efx_default_channel_type = {
829 .pre_probe = efx_channel_dummy_op_int,
830 .post_remove = efx_channel_dummy_op_void,
831 .get_name = efx_get_channel_name,
832 .copy = efx_copy_channel,
833 .keep_eventq = false,
836 int efx_channel_dummy_op_int(struct efx_channel *channel)
841 void efx_channel_dummy_op_void(struct efx_channel *channel)
845 /**************************************************************************
849 **************************************************************************/
851 /* This ensures that the kernel is kept informed (via
852 * netif_carrier_on/off) of the link status, and also maintains the
853 * link status's stop on the port's TX queue.
855 void efx_link_status_changed(struct efx_nic *efx)
857 struct efx_link_state *link_state = &efx->link_state;
859 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
860 * that no events are triggered between unregister_netdev() and the
861 * driver unloading. A more general condition is that NETDEV_CHANGE
862 * can only be generated between NETDEV_UP and NETDEV_DOWN */
863 if (!netif_running(efx->net_dev))
866 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
867 efx->n_link_state_changes++;
870 netif_carrier_on(efx->net_dev);
872 netif_carrier_off(efx->net_dev);
875 /* Status message for kernel log */
877 netif_info(efx, link, efx->net_dev,
878 "link up at %uMbps %s-duplex (MTU %d)\n",
879 link_state->speed, link_state->fd ? "full" : "half",
882 netif_info(efx, link, efx->net_dev, "link down\n");
885 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
887 efx->link_advertising = advertising;
889 if (advertising & ADVERTISED_Pause)
890 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
892 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
893 if (advertising & ADVERTISED_Asym_Pause)
894 efx->wanted_fc ^= EFX_FC_TX;
898 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
900 efx->wanted_fc = wanted_fc;
901 if (efx->link_advertising) {
902 if (wanted_fc & EFX_FC_RX)
903 efx->link_advertising |= (ADVERTISED_Pause |
904 ADVERTISED_Asym_Pause);
906 efx->link_advertising &= ~(ADVERTISED_Pause |
907 ADVERTISED_Asym_Pause);
908 if (wanted_fc & EFX_FC_TX)
909 efx->link_advertising ^= ADVERTISED_Asym_Pause;
913 static void efx_fini_port(struct efx_nic *efx);
915 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
916 * the MAC appropriately. All other PHY configuration changes are pushed
917 * through phy_op->set_settings(), and pushed asynchronously to the MAC
918 * through efx_monitor().
920 * Callers must hold the mac_lock
922 int __efx_reconfigure_port(struct efx_nic *efx)
924 enum efx_phy_mode phy_mode;
927 WARN_ON(!mutex_is_locked(&efx->mac_lock));
929 /* Disable PHY transmit in mac level loopbacks */
930 phy_mode = efx->phy_mode;
931 if (LOOPBACK_INTERNAL(efx))
932 efx->phy_mode |= PHY_MODE_TX_DISABLED;
934 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
936 rc = efx->type->reconfigure_port(efx);
939 efx->phy_mode = phy_mode;
944 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
946 int efx_reconfigure_port(struct efx_nic *efx)
950 EFX_ASSERT_RESET_SERIALISED(efx);
952 mutex_lock(&efx->mac_lock);
953 rc = __efx_reconfigure_port(efx);
954 mutex_unlock(&efx->mac_lock);
959 /* Asynchronous work item for changing MAC promiscuity and multicast
960 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
962 static void efx_mac_work(struct work_struct *data)
964 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
966 mutex_lock(&efx->mac_lock);
967 if (efx->port_enabled)
968 efx->type->reconfigure_mac(efx);
969 mutex_unlock(&efx->mac_lock);
972 static int efx_probe_port(struct efx_nic *efx)
976 netif_dbg(efx, probe, efx->net_dev, "create port\n");
979 efx->phy_mode = PHY_MODE_SPECIAL;
981 /* Connect up MAC/PHY operations table */
982 rc = efx->type->probe_port(efx);
986 /* Initialise MAC address to permanent address */
987 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
992 static int efx_init_port(struct efx_nic *efx)
996 netif_dbg(efx, drv, efx->net_dev, "init port\n");
998 mutex_lock(&efx->mac_lock);
1000 rc = efx->phy_op->init(efx);
1004 efx->port_initialized = true;
1006 /* Reconfigure the MAC before creating dma queues (required for
1007 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1008 efx->type->reconfigure_mac(efx);
1010 /* Ensure the PHY advertises the correct flow control settings */
1011 rc = efx->phy_op->reconfigure(efx);
1015 mutex_unlock(&efx->mac_lock);
1019 efx->phy_op->fini(efx);
1021 mutex_unlock(&efx->mac_lock);
1025 static void efx_start_port(struct efx_nic *efx)
1027 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1028 BUG_ON(efx->port_enabled);
1030 mutex_lock(&efx->mac_lock);
1031 efx->port_enabled = true;
1033 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1034 * and then cancelled by efx_flush_all() */
1035 efx->type->reconfigure_mac(efx);
1037 mutex_unlock(&efx->mac_lock);
1040 /* Prevent efx_mac_work() and efx_monitor() from working */
1041 static void efx_stop_port(struct efx_nic *efx)
1043 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1045 mutex_lock(&efx->mac_lock);
1046 efx->port_enabled = false;
1047 mutex_unlock(&efx->mac_lock);
1049 /* Serialise against efx_set_multicast_list() */
1050 netif_addr_lock_bh(efx->net_dev);
1051 netif_addr_unlock_bh(efx->net_dev);
1054 static void efx_fini_port(struct efx_nic *efx)
1056 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1058 if (!efx->port_initialized)
1061 efx->phy_op->fini(efx);
1062 efx->port_initialized = false;
1064 efx->link_state.up = false;
1065 efx_link_status_changed(efx);
1068 static void efx_remove_port(struct efx_nic *efx)
1070 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1072 efx->type->remove_port(efx);
1075 /**************************************************************************
1079 **************************************************************************/
1081 /* This configures the PCI device to enable I/O and DMA. */
1082 static int efx_init_io(struct efx_nic *efx)
1084 struct pci_dev *pci_dev = efx->pci_dev;
1085 dma_addr_t dma_mask = efx->type->max_dma_mask;
1086 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1089 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1091 rc = pci_enable_device(pci_dev);
1093 netif_err(efx, probe, efx->net_dev,
1094 "failed to enable PCI device\n");
1098 pci_set_master(pci_dev);
1100 /* Set the PCI DMA mask. Try all possibilities from our
1101 * genuine mask down to 32 bits, because some architectures
1102 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1103 * masks event though they reject 46 bit masks.
1105 while (dma_mask > 0x7fffffffUL) {
1106 if (dma_supported(&pci_dev->dev, dma_mask)) {
1107 rc = dma_set_mask(&pci_dev->dev, dma_mask);
1114 netif_err(efx, probe, efx->net_dev,
1115 "could not find a suitable DMA mask\n");
1118 netif_dbg(efx, probe, efx->net_dev,
1119 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1120 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask);
1122 /* dma_set_coherent_mask() is not *allowed* to
1123 * fail with a mask that dma_set_mask() accepted,
1124 * but just in case...
1126 netif_err(efx, probe, efx->net_dev,
1127 "failed to set consistent DMA mask\n");
1131 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1132 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1134 netif_err(efx, probe, efx->net_dev,
1135 "request for memory BAR failed\n");
1139 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1140 if (!efx->membase) {
1141 netif_err(efx, probe, efx->net_dev,
1142 "could not map memory BAR at %llx+%x\n",
1143 (unsigned long long)efx->membase_phys, mem_map_size);
1147 netif_dbg(efx, probe, efx->net_dev,
1148 "memory BAR at %llx+%x (virtual %p)\n",
1149 (unsigned long long)efx->membase_phys, mem_map_size,
1155 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1157 efx->membase_phys = 0;
1159 pci_disable_device(efx->pci_dev);
1164 static void efx_fini_io(struct efx_nic *efx)
1166 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1169 iounmap(efx->membase);
1170 efx->membase = NULL;
1173 if (efx->membase_phys) {
1174 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1175 efx->membase_phys = 0;
1178 pci_disable_device(efx->pci_dev);
1181 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1183 cpumask_var_t thread_mask;
1190 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1191 netif_warn(efx, probe, efx->net_dev,
1192 "RSS disabled due to allocation failure\n");
1197 for_each_online_cpu(cpu) {
1198 if (!cpumask_test_cpu(cpu, thread_mask)) {
1200 cpumask_or(thread_mask, thread_mask,
1201 topology_thread_cpumask(cpu));
1205 free_cpumask_var(thread_mask);
1208 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1209 * table entries that are inaccessible to VFs
1211 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1212 count > efx_vf_size(efx)) {
1213 netif_warn(efx, probe, efx->net_dev,
1214 "Reducing number of RSS channels from %u to %u for "
1215 "VF support. Increase vf-msix-limit to use more "
1216 "channels on the PF.\n",
1217 count, efx_vf_size(efx));
1218 count = efx_vf_size(efx);
1224 /* Probe the number and type of interrupts we are able to obtain, and
1225 * the resulting numbers of channels and RX queues.
1227 static int efx_probe_interrupts(struct efx_nic *efx)
1229 unsigned int extra_channels = 0;
1233 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1234 if (efx->extra_channel_type[i])
1237 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1238 struct msix_entry xentries[EFX_MAX_CHANNELS];
1239 unsigned int n_channels;
1241 n_channels = efx_wanted_parallelism(efx);
1242 if (separate_tx_channels)
1244 n_channels += extra_channels;
1245 n_channels = min(n_channels, efx->max_channels);
1247 for (i = 0; i < n_channels; i++)
1248 xentries[i].entry = i;
1249 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1251 netif_err(efx, drv, efx->net_dev,
1252 "WARNING: Insufficient MSI-X vectors"
1253 " available (%d < %u).\n", rc, n_channels);
1254 netif_err(efx, drv, efx->net_dev,
1255 "WARNING: Performance may be reduced.\n");
1256 EFX_BUG_ON_PARANOID(rc >= n_channels);
1258 rc = pci_enable_msix(efx->pci_dev, xentries,
1263 efx->n_channels = n_channels;
1264 if (n_channels > extra_channels)
1265 n_channels -= extra_channels;
1266 if (separate_tx_channels) {
1267 efx->n_tx_channels = max(n_channels / 2, 1U);
1268 efx->n_rx_channels = max(n_channels -
1272 efx->n_tx_channels = n_channels;
1273 efx->n_rx_channels = n_channels;
1275 for (i = 0; i < efx->n_channels; i++)
1276 efx_get_channel(efx, i)->irq =
1279 /* Fall back to single channel MSI */
1280 efx->interrupt_mode = EFX_INT_MODE_MSI;
1281 netif_err(efx, drv, efx->net_dev,
1282 "could not enable MSI-X\n");
1286 /* Try single interrupt MSI */
1287 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1288 efx->n_channels = 1;
1289 efx->n_rx_channels = 1;
1290 efx->n_tx_channels = 1;
1291 rc = pci_enable_msi(efx->pci_dev);
1293 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1295 netif_err(efx, drv, efx->net_dev,
1296 "could not enable MSI\n");
1297 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1301 /* Assume legacy interrupts */
1302 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1303 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1304 efx->n_rx_channels = 1;
1305 efx->n_tx_channels = 1;
1306 efx->legacy_irq = efx->pci_dev->irq;
1309 /* Assign extra channels if possible */
1310 j = efx->n_channels;
1311 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1312 if (!efx->extra_channel_type[i])
1314 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1315 efx->n_channels <= extra_channels) {
1316 efx->extra_channel_type[i]->handle_no_channel(efx);
1319 efx_get_channel(efx, j)->type =
1320 efx->extra_channel_type[i];
1324 /* RSS might be usable on VFs even if it is disabled on the PF */
1325 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1326 efx->n_rx_channels : efx_vf_size(efx));
1331 static void efx_soft_enable_interrupts(struct efx_nic *efx)
1333 struct efx_channel *channel;
1335 BUG_ON(efx->state == STATE_DISABLED);
1337 efx->irq_soft_enabled = true;
1340 efx_for_each_channel(channel, efx) {
1341 if (!channel->type->keep_eventq)
1342 efx_init_eventq(channel);
1343 efx_start_eventq(channel);
1346 efx_mcdi_mode_event(efx);
1349 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1351 struct efx_channel *channel;
1353 if (efx->state == STATE_DISABLED)
1356 efx_mcdi_mode_poll(efx);
1358 efx->irq_soft_enabled = false;
1361 if (efx->legacy_irq)
1362 synchronize_irq(efx->legacy_irq);
1364 efx_for_each_channel(channel, efx) {
1366 synchronize_irq(channel->irq);
1368 efx_stop_eventq(channel);
1369 if (!channel->type->keep_eventq)
1370 efx_fini_eventq(channel);
1374 static void efx_enable_interrupts(struct efx_nic *efx)
1376 struct efx_channel *channel;
1378 BUG_ON(efx->state == STATE_DISABLED);
1380 if (efx->eeh_disabled_legacy_irq) {
1381 enable_irq(efx->legacy_irq);
1382 efx->eeh_disabled_legacy_irq = false;
1385 efx->type->irq_enable_master(efx);
1387 efx_for_each_channel(channel, efx) {
1388 if (channel->type->keep_eventq)
1389 efx_init_eventq(channel);
1392 efx_soft_enable_interrupts(efx);
1395 static void efx_disable_interrupts(struct efx_nic *efx)
1397 struct efx_channel *channel;
1399 efx_soft_disable_interrupts(efx);
1401 efx_for_each_channel(channel, efx) {
1402 if (channel->type->keep_eventq)
1403 efx_fini_eventq(channel);
1406 efx->type->irq_disable_non_ev(efx);
1409 static void efx_remove_interrupts(struct efx_nic *efx)
1411 struct efx_channel *channel;
1413 /* Remove MSI/MSI-X interrupts */
1414 efx_for_each_channel(channel, efx)
1416 pci_disable_msi(efx->pci_dev);
1417 pci_disable_msix(efx->pci_dev);
1419 /* Remove legacy interrupt */
1420 efx->legacy_irq = 0;
1423 static void efx_set_channels(struct efx_nic *efx)
1425 struct efx_channel *channel;
1426 struct efx_tx_queue *tx_queue;
1428 efx->tx_channel_offset =
1429 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1431 /* We need to mark which channels really have RX and TX
1432 * queues, and adjust the TX queue numbers if we have separate
1433 * RX-only and TX-only channels.
1435 efx_for_each_channel(channel, efx) {
1436 if (channel->channel < efx->n_rx_channels)
1437 channel->rx_queue.core_index = channel->channel;
1439 channel->rx_queue.core_index = -1;
1441 efx_for_each_channel_tx_queue(tx_queue, channel)
1442 tx_queue->queue -= (efx->tx_channel_offset *
1447 static int efx_probe_nic(struct efx_nic *efx)
1452 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1454 /* Carry out hardware-type specific initialisation */
1455 rc = efx->type->probe(efx);
1459 /* Determine the number of channels and queues by trying to hook
1460 * in MSI-X interrupts. */
1461 rc = efx_probe_interrupts(efx);
1465 efx->type->dimension_resources(efx);
1467 if (efx->n_channels > 1)
1468 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1469 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1470 efx->rx_indir_table[i] =
1471 ethtool_rxfh_indir_default(i, efx->rss_spread);
1473 efx_set_channels(efx);
1474 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1475 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1477 /* Initialise the interrupt moderation settings */
1478 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1484 efx->type->remove(efx);
1488 static void efx_remove_nic(struct efx_nic *efx)
1490 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1492 efx_remove_interrupts(efx);
1493 efx->type->remove(efx);
1496 static int efx_probe_filters(struct efx_nic *efx)
1500 spin_lock_init(&efx->filter_lock);
1502 rc = efx->type->filter_table_probe(efx);
1506 #ifdef CONFIG_RFS_ACCEL
1507 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1508 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1509 sizeof(*efx->rps_flow_id),
1511 if (!efx->rps_flow_id) {
1512 efx->type->filter_table_remove(efx);
1521 static void efx_remove_filters(struct efx_nic *efx)
1523 #ifdef CONFIG_RFS_ACCEL
1524 kfree(efx->rps_flow_id);
1526 efx->type->filter_table_remove(efx);
1529 static void efx_restore_filters(struct efx_nic *efx)
1531 efx->type->filter_table_restore(efx);
1534 /**************************************************************************
1536 * NIC startup/shutdown
1538 *************************************************************************/
1540 static int efx_probe_all(struct efx_nic *efx)
1544 rc = efx_probe_nic(efx);
1546 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1550 rc = efx_probe_port(efx);
1552 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1556 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1557 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1561 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1563 rc = efx_probe_filters(efx);
1565 netif_err(efx, probe, efx->net_dev,
1566 "failed to create filter tables\n");
1570 rc = efx_probe_channels(efx);
1577 efx_remove_filters(efx);
1579 efx_remove_port(efx);
1581 efx_remove_nic(efx);
1586 /* If the interface is supposed to be running but is not, start
1587 * the hardware and software data path, regular activity for the port
1588 * (MAC statistics, link polling, etc.) and schedule the port to be
1589 * reconfigured. Interrupts must already be enabled. This function
1590 * is safe to call multiple times, so long as the NIC is not disabled.
1591 * Requires the RTNL lock.
1593 static void efx_start_all(struct efx_nic *efx)
1595 EFX_ASSERT_RESET_SERIALISED(efx);
1596 BUG_ON(efx->state == STATE_DISABLED);
1598 /* Check that it is appropriate to restart the interface. All
1599 * of these flags are safe to read under just the rtnl lock */
1600 if (efx->port_enabled || !netif_running(efx->net_dev))
1603 efx_start_port(efx);
1604 efx_start_datapath(efx);
1606 /* Start the hardware monitor if there is one */
1607 if (efx->type->monitor != NULL)
1608 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1609 efx_monitor_interval);
1611 /* If link state detection is normally event-driven, we have
1612 * to poll now because we could have missed a change
1614 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1615 mutex_lock(&efx->mac_lock);
1616 if (efx->phy_op->poll(efx))
1617 efx_link_status_changed(efx);
1618 mutex_unlock(&efx->mac_lock);
1621 efx->type->start_stats(efx);
1624 /* Flush all delayed work. Should only be called when no more delayed work
1625 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1626 * since we're holding the rtnl_lock at this point. */
1627 static void efx_flush_all(struct efx_nic *efx)
1629 /* Make sure the hardware monitor and event self-test are stopped */
1630 cancel_delayed_work_sync(&efx->monitor_work);
1631 efx_selftest_async_cancel(efx);
1632 /* Stop scheduled port reconfigurations */
1633 cancel_work_sync(&efx->mac_work);
1636 /* Quiesce the hardware and software data path, and regular activity
1637 * for the port without bringing the link down. Safe to call multiple
1638 * times with the NIC in almost any state, but interrupts should be
1639 * enabled. Requires the RTNL lock.
1641 static void efx_stop_all(struct efx_nic *efx)
1643 EFX_ASSERT_RESET_SERIALISED(efx);
1645 /* port_enabled can be read safely under the rtnl lock */
1646 if (!efx->port_enabled)
1649 efx->type->stop_stats(efx);
1652 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1655 /* Stop the kernel transmit interface. This is only valid if
1656 * the device is stopped or detached; otherwise the watchdog
1657 * may fire immediately.
1659 WARN_ON(netif_running(efx->net_dev) &&
1660 netif_device_present(efx->net_dev));
1661 netif_tx_disable(efx->net_dev);
1663 efx_stop_datapath(efx);
1666 static void efx_remove_all(struct efx_nic *efx)
1668 efx_remove_channels(efx);
1669 efx_remove_filters(efx);
1670 efx_remove_port(efx);
1671 efx_remove_nic(efx);
1674 /**************************************************************************
1676 * Interrupt moderation
1678 **************************************************************************/
1680 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1684 if (usecs * 1000 < quantum_ns)
1685 return 1; /* never round down to 0 */
1686 return usecs * 1000 / quantum_ns;
1689 /* Set interrupt moderation parameters */
1690 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1691 unsigned int rx_usecs, bool rx_adaptive,
1692 bool rx_may_override_tx)
1694 struct efx_channel *channel;
1695 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1696 efx->timer_quantum_ns,
1698 unsigned int tx_ticks;
1699 unsigned int rx_ticks;
1701 EFX_ASSERT_RESET_SERIALISED(efx);
1703 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1706 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1707 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1709 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1710 !rx_may_override_tx) {
1711 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1712 "RX and TX IRQ moderation must be equal\n");
1716 efx->irq_rx_adaptive = rx_adaptive;
1717 efx->irq_rx_moderation = rx_ticks;
1718 efx_for_each_channel(channel, efx) {
1719 if (efx_channel_has_rx_queue(channel))
1720 channel->irq_moderation = rx_ticks;
1721 else if (efx_channel_has_tx_queues(channel))
1722 channel->irq_moderation = tx_ticks;
1728 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1729 unsigned int *rx_usecs, bool *rx_adaptive)
1731 /* We must round up when converting ticks to microseconds
1732 * because we round down when converting the other way.
1735 *rx_adaptive = efx->irq_rx_adaptive;
1736 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1737 efx->timer_quantum_ns,
1740 /* If channels are shared between RX and TX, so is IRQ
1741 * moderation. Otherwise, IRQ moderation is the same for all
1742 * TX channels and is not adaptive.
1744 if (efx->tx_channel_offset == 0)
1745 *tx_usecs = *rx_usecs;
1747 *tx_usecs = DIV_ROUND_UP(
1748 efx->channel[efx->tx_channel_offset]->irq_moderation *
1749 efx->timer_quantum_ns,
1753 /**************************************************************************
1757 **************************************************************************/
1759 /* Run periodically off the general workqueue */
1760 static void efx_monitor(struct work_struct *data)
1762 struct efx_nic *efx = container_of(data, struct efx_nic,
1765 netif_vdbg(efx, timer, efx->net_dev,
1766 "hardware monitor executing on CPU %d\n",
1767 raw_smp_processor_id());
1768 BUG_ON(efx->type->monitor == NULL);
1770 /* If the mac_lock is already held then it is likely a port
1771 * reconfiguration is already in place, which will likely do
1772 * most of the work of monitor() anyway. */
1773 if (mutex_trylock(&efx->mac_lock)) {
1774 if (efx->port_enabled)
1775 efx->type->monitor(efx);
1776 mutex_unlock(&efx->mac_lock);
1779 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1780 efx_monitor_interval);
1783 /**************************************************************************
1787 *************************************************************************/
1790 * Context: process, rtnl_lock() held.
1792 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1794 struct efx_nic *efx = netdev_priv(net_dev);
1795 struct mii_ioctl_data *data = if_mii(ifr);
1797 if (cmd == SIOCSHWTSTAMP)
1798 return efx_ptp_ioctl(efx, ifr, cmd);
1800 /* Convert phy_id from older PRTAD/DEVAD format */
1801 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1802 (data->phy_id & 0xfc00) == 0x0400)
1803 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1805 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1808 /**************************************************************************
1812 **************************************************************************/
1814 static void efx_init_napi_channel(struct efx_channel *channel)
1816 struct efx_nic *efx = channel->efx;
1818 channel->napi_dev = efx->net_dev;
1819 netif_napi_add(channel->napi_dev, &channel->napi_str,
1820 efx_poll, napi_weight);
1823 static void efx_init_napi(struct efx_nic *efx)
1825 struct efx_channel *channel;
1827 efx_for_each_channel(channel, efx)
1828 efx_init_napi_channel(channel);
1831 static void efx_fini_napi_channel(struct efx_channel *channel)
1833 if (channel->napi_dev)
1834 netif_napi_del(&channel->napi_str);
1835 channel->napi_dev = NULL;
1838 static void efx_fini_napi(struct efx_nic *efx)
1840 struct efx_channel *channel;
1842 efx_for_each_channel(channel, efx)
1843 efx_fini_napi_channel(channel);
1846 /**************************************************************************
1848 * Kernel netpoll interface
1850 *************************************************************************/
1852 #ifdef CONFIG_NET_POLL_CONTROLLER
1854 /* Although in the common case interrupts will be disabled, this is not
1855 * guaranteed. However, all our work happens inside the NAPI callback,
1856 * so no locking is required.
1858 static void efx_netpoll(struct net_device *net_dev)
1860 struct efx_nic *efx = netdev_priv(net_dev);
1861 struct efx_channel *channel;
1863 efx_for_each_channel(channel, efx)
1864 efx_schedule_channel(channel);
1869 /**************************************************************************
1871 * Kernel net device interface
1873 *************************************************************************/
1875 /* Context: process, rtnl_lock() held. */
1876 static int efx_net_open(struct net_device *net_dev)
1878 struct efx_nic *efx = netdev_priv(net_dev);
1881 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1882 raw_smp_processor_id());
1884 rc = efx_check_disabled(efx);
1887 if (efx->phy_mode & PHY_MODE_SPECIAL)
1889 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1892 /* Notify the kernel of the link state polled during driver load,
1893 * before the monitor starts running */
1894 efx_link_status_changed(efx);
1897 efx_selftest_async_start(efx);
1901 /* Context: process, rtnl_lock() held.
1902 * Note that the kernel will ignore our return code; this method
1903 * should really be a void.
1905 static int efx_net_stop(struct net_device *net_dev)
1907 struct efx_nic *efx = netdev_priv(net_dev);
1909 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1910 raw_smp_processor_id());
1912 /* Stop the device and flush all the channels */
1918 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1919 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1920 struct rtnl_link_stats64 *stats)
1922 struct efx_nic *efx = netdev_priv(net_dev);
1924 spin_lock_bh(&efx->stats_lock);
1925 efx->type->update_stats(efx, NULL, stats);
1926 spin_unlock_bh(&efx->stats_lock);
1931 /* Context: netif_tx_lock held, BHs disabled. */
1932 static void efx_watchdog(struct net_device *net_dev)
1934 struct efx_nic *efx = netdev_priv(net_dev);
1936 netif_err(efx, tx_err, efx->net_dev,
1937 "TX stuck with port_enabled=%d: resetting channels\n",
1940 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1944 /* Context: process, rtnl_lock() held. */
1945 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1947 struct efx_nic *efx = netdev_priv(net_dev);
1950 rc = efx_check_disabled(efx);
1953 if (new_mtu > EFX_MAX_MTU)
1956 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1958 efx_device_detach_sync(efx);
1961 mutex_lock(&efx->mac_lock);
1962 net_dev->mtu = new_mtu;
1963 efx->type->reconfigure_mac(efx);
1964 mutex_unlock(&efx->mac_lock);
1967 netif_device_attach(efx->net_dev);
1971 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1973 struct efx_nic *efx = netdev_priv(net_dev);
1974 struct sockaddr *addr = data;
1975 char *new_addr = addr->sa_data;
1977 if (!is_valid_ether_addr(new_addr)) {
1978 netif_err(efx, drv, efx->net_dev,
1979 "invalid ethernet MAC address requested: %pM\n",
1981 return -EADDRNOTAVAIL;
1984 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1985 efx_sriov_mac_address_changed(efx);
1987 /* Reconfigure the MAC */
1988 mutex_lock(&efx->mac_lock);
1989 efx->type->reconfigure_mac(efx);
1990 mutex_unlock(&efx->mac_lock);
1995 /* Context: netif_addr_lock held, BHs disabled. */
1996 static void efx_set_rx_mode(struct net_device *net_dev)
1998 struct efx_nic *efx = netdev_priv(net_dev);
2000 if (efx->port_enabled)
2001 queue_work(efx->workqueue, &efx->mac_work);
2002 /* Otherwise efx_start_port() will do this */
2005 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2007 struct efx_nic *efx = netdev_priv(net_dev);
2009 /* If disabling RX n-tuple filtering, clear existing filters */
2010 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2011 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2016 static const struct net_device_ops efx_netdev_ops = {
2017 .ndo_open = efx_net_open,
2018 .ndo_stop = efx_net_stop,
2019 .ndo_get_stats64 = efx_net_stats,
2020 .ndo_tx_timeout = efx_watchdog,
2021 .ndo_start_xmit = efx_hard_start_xmit,
2022 .ndo_validate_addr = eth_validate_addr,
2023 .ndo_do_ioctl = efx_ioctl,
2024 .ndo_change_mtu = efx_change_mtu,
2025 .ndo_set_mac_address = efx_set_mac_address,
2026 .ndo_set_rx_mode = efx_set_rx_mode,
2027 .ndo_set_features = efx_set_features,
2028 #ifdef CONFIG_SFC_SRIOV
2029 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2030 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2031 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2032 .ndo_get_vf_config = efx_sriov_get_vf_config,
2034 #ifdef CONFIG_NET_POLL_CONTROLLER
2035 .ndo_poll_controller = efx_netpoll,
2037 .ndo_setup_tc = efx_setup_tc,
2038 #ifdef CONFIG_RFS_ACCEL
2039 .ndo_rx_flow_steer = efx_filter_rfs,
2043 static void efx_update_name(struct efx_nic *efx)
2045 strcpy(efx->name, efx->net_dev->name);
2046 efx_mtd_rename(efx);
2047 efx_set_channel_names(efx);
2050 static int efx_netdev_event(struct notifier_block *this,
2051 unsigned long event, void *ptr)
2053 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2055 if (net_dev->netdev_ops == &efx_netdev_ops &&
2056 event == NETDEV_CHANGENAME)
2057 efx_update_name(netdev_priv(net_dev));
2062 static struct notifier_block efx_netdev_notifier = {
2063 .notifier_call = efx_netdev_event,
2067 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2069 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2070 return sprintf(buf, "%d\n", efx->phy_type);
2072 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2074 static int efx_register_netdev(struct efx_nic *efx)
2076 struct net_device *net_dev = efx->net_dev;
2077 struct efx_channel *channel;
2080 net_dev->watchdog_timeo = 5 * HZ;
2081 net_dev->irq = efx->pci_dev->irq;
2082 net_dev->netdev_ops = &efx_netdev_ops;
2083 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2084 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2088 /* Enable resets to be scheduled and check whether any were
2089 * already requested. If so, the NIC is probably hosed so we
2092 efx->state = STATE_READY;
2093 smp_mb(); /* ensure we change state before checking reset_pending */
2094 if (efx->reset_pending) {
2095 netif_err(efx, probe, efx->net_dev,
2096 "aborting probe due to scheduled reset\n");
2101 rc = dev_alloc_name(net_dev, net_dev->name);
2104 efx_update_name(efx);
2106 /* Always start with carrier off; PHY events will detect the link */
2107 netif_carrier_off(net_dev);
2109 rc = register_netdevice(net_dev);
2113 efx_for_each_channel(channel, efx) {
2114 struct efx_tx_queue *tx_queue;
2115 efx_for_each_channel_tx_queue(tx_queue, channel)
2116 efx_init_tx_queue_core_txq(tx_queue);
2121 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2123 netif_err(efx, drv, efx->net_dev,
2124 "failed to init net dev attributes\n");
2125 goto fail_registered;
2132 unregister_netdevice(net_dev);
2134 efx->state = STATE_UNINIT;
2136 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2140 static void efx_unregister_netdev(struct efx_nic *efx)
2145 BUG_ON(netdev_priv(efx->net_dev) != efx);
2147 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2148 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2151 unregister_netdevice(efx->net_dev);
2152 efx->state = STATE_UNINIT;
2156 /**************************************************************************
2158 * Device reset and suspend
2160 **************************************************************************/
2162 /* Tears down the entire software state and most of the hardware state
2164 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2166 EFX_ASSERT_RESET_SERIALISED(efx);
2169 efx_disable_interrupts(efx);
2171 mutex_lock(&efx->mac_lock);
2172 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2173 efx->phy_op->fini(efx);
2174 efx->type->fini(efx);
2177 /* This function will always ensure that the locks acquired in
2178 * efx_reset_down() are released. A failure return code indicates
2179 * that we were unable to reinitialise the hardware, and the
2180 * driver should be disabled. If ok is false, then the rx and tx
2181 * engines are not restarted, pending a RESET_DISABLE. */
2182 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2186 EFX_ASSERT_RESET_SERIALISED(efx);
2188 rc = efx->type->init(efx);
2190 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2197 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2198 rc = efx->phy_op->init(efx);
2201 if (efx->phy_op->reconfigure(efx))
2202 netif_err(efx, drv, efx->net_dev,
2203 "could not restore PHY settings\n");
2206 efx->type->reconfigure_mac(efx);
2208 efx_enable_interrupts(efx);
2209 efx_restore_filters(efx);
2210 efx_sriov_reset(efx);
2212 mutex_unlock(&efx->mac_lock);
2219 efx->port_initialized = false;
2221 mutex_unlock(&efx->mac_lock);
2226 /* Reset the NIC using the specified method. Note that the reset may
2227 * fail, in which case the card will be left in an unusable state.
2229 * Caller must hold the rtnl_lock.
2231 int efx_reset(struct efx_nic *efx, enum reset_type method)
2236 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2237 RESET_TYPE(method));
2239 efx_device_detach_sync(efx);
2240 efx_reset_down(efx, method);
2242 rc = efx->type->reset(efx, method);
2244 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2248 /* Clear flags for the scopes we covered. We assume the NIC and
2249 * driver are now quiescent so that there is no race here.
2251 efx->reset_pending &= -(1 << (method + 1));
2253 /* Reinitialise bus-mastering, which may have been turned off before
2254 * the reset was scheduled. This is still appropriate, even in the
2255 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2256 * can respond to requests. */
2257 pci_set_master(efx->pci_dev);
2260 /* Leave device stopped if necessary */
2262 method == RESET_TYPE_DISABLE ||
2263 method == RESET_TYPE_RECOVER_OR_DISABLE;
2264 rc2 = efx_reset_up(efx, method, !disabled);
2272 dev_close(efx->net_dev);
2273 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2274 efx->state = STATE_DISABLED;
2276 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2277 netif_device_attach(efx->net_dev);
2282 /* Try recovery mechanisms.
2283 * For now only EEH is supported.
2284 * Returns 0 if the recovery mechanisms are unsuccessful.
2285 * Returns a non-zero value otherwise.
2287 int efx_try_recovery(struct efx_nic *efx)
2290 /* A PCI error can occur and not be seen by EEH because nothing
2291 * happens on the PCI bus. In this case the driver may fail and
2292 * schedule a 'recover or reset', leading to this recovery handler.
2293 * Manually call the eeh failure check function.
2295 struct eeh_dev *eehdev =
2296 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2298 if (eeh_dev_check_failure(eehdev)) {
2299 /* The EEH mechanisms will handle the error and reset the
2300 * device if necessary.
2308 /* The worker thread exists so that code that cannot sleep can
2309 * schedule a reset for later.
2311 static void efx_reset_work(struct work_struct *data)
2313 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2314 unsigned long pending;
2315 enum reset_type method;
2317 pending = ACCESS_ONCE(efx->reset_pending);
2318 method = fls(pending) - 1;
2320 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2321 method == RESET_TYPE_RECOVER_OR_ALL) &&
2322 efx_try_recovery(efx))
2330 /* We checked the state in efx_schedule_reset() but it may
2331 * have changed by now. Now that we have the RTNL lock,
2332 * it cannot change again.
2334 if (efx->state == STATE_READY)
2335 (void)efx_reset(efx, method);
2340 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2342 enum reset_type method;
2344 if (efx->state == STATE_RECOVERY) {
2345 netif_dbg(efx, drv, efx->net_dev,
2346 "recovering: skip scheduling %s reset\n",
2352 case RESET_TYPE_INVISIBLE:
2353 case RESET_TYPE_ALL:
2354 case RESET_TYPE_RECOVER_OR_ALL:
2355 case RESET_TYPE_WORLD:
2356 case RESET_TYPE_DISABLE:
2357 case RESET_TYPE_RECOVER_OR_DISABLE:
2359 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2360 RESET_TYPE(method));
2363 method = efx->type->map_reset_reason(type);
2364 netif_dbg(efx, drv, efx->net_dev,
2365 "scheduling %s reset for %s\n",
2366 RESET_TYPE(method), RESET_TYPE(type));
2370 set_bit(method, &efx->reset_pending);
2371 smp_mb(); /* ensure we change reset_pending before checking state */
2373 /* If we're not READY then just leave the flags set as the cue
2374 * to abort probing or reschedule the reset later.
2376 if (ACCESS_ONCE(efx->state) != STATE_READY)
2379 /* efx_process_channel() will no longer read events once a
2380 * reset is scheduled. So switch back to poll'd MCDI completions. */
2381 efx_mcdi_mode_poll(efx);
2383 queue_work(reset_workqueue, &efx->reset_work);
2386 /**************************************************************************
2388 * List of NICs we support
2390 **************************************************************************/
2392 /* PCI device ID table */
2393 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2394 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2395 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2396 .driver_data = (unsigned long) &falcon_a1_nic_type},
2397 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2398 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2399 .driver_data = (unsigned long) &falcon_b0_nic_type},
2400 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2401 .driver_data = (unsigned long) &siena_a0_nic_type},
2402 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2403 .driver_data = (unsigned long) &siena_a0_nic_type},
2404 {0} /* end of list */
2407 /**************************************************************************
2409 * Dummy PHY/MAC operations
2411 * Can be used for some unimplemented operations
2412 * Needed so all function pointers are valid and do not have to be tested
2415 **************************************************************************/
2416 int efx_port_dummy_op_int(struct efx_nic *efx)
2420 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2422 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2427 static const struct efx_phy_operations efx_dummy_phy_operations = {
2428 .init = efx_port_dummy_op_int,
2429 .reconfigure = efx_port_dummy_op_int,
2430 .poll = efx_port_dummy_op_poll,
2431 .fini = efx_port_dummy_op_void,
2434 /**************************************************************************
2438 **************************************************************************/
2440 /* This zeroes out and then fills in the invariants in a struct
2441 * efx_nic (including all sub-structures).
2443 static int efx_init_struct(struct efx_nic *efx,
2444 struct pci_dev *pci_dev, struct net_device *net_dev)
2448 /* Initialise common structures */
2449 spin_lock_init(&efx->biu_lock);
2450 #ifdef CONFIG_SFC_MTD
2451 INIT_LIST_HEAD(&efx->mtd_list);
2453 INIT_WORK(&efx->reset_work, efx_reset_work);
2454 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2455 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2456 efx->pci_dev = pci_dev;
2457 efx->msg_enable = debug;
2458 efx->state = STATE_UNINIT;
2459 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2461 efx->net_dev = net_dev;
2462 spin_lock_init(&efx->stats_lock);
2463 mutex_init(&efx->mac_lock);
2464 efx->phy_op = &efx_dummy_phy_operations;
2465 efx->mdio.dev = net_dev;
2466 INIT_WORK(&efx->mac_work, efx_mac_work);
2467 init_waitqueue_head(&efx->flush_wq);
2469 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2470 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2471 if (!efx->channel[i])
2473 efx->msi_context[i].efx = efx;
2474 efx->msi_context[i].index = i;
2477 /* Higher numbered interrupt modes are less capable! */
2478 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2481 /* Would be good to use the net_dev name, but we're too early */
2482 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2484 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2485 if (!efx->workqueue)
2491 efx_fini_struct(efx);
2495 static void efx_fini_struct(struct efx_nic *efx)
2499 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2500 kfree(efx->channel[i]);
2502 if (efx->workqueue) {
2503 destroy_workqueue(efx->workqueue);
2504 efx->workqueue = NULL;
2508 /**************************************************************************
2512 **************************************************************************/
2514 /* Main body of final NIC shutdown code
2515 * This is called only at module unload (or hotplug removal).
2517 static void efx_pci_remove_main(struct efx_nic *efx)
2519 /* Flush reset_work. It can no longer be scheduled since we
2522 BUG_ON(efx->state == STATE_READY);
2523 cancel_work_sync(&efx->reset_work);
2525 efx_disable_interrupts(efx);
2526 efx_nic_fini_interrupt(efx);
2528 efx->type->fini(efx);
2530 efx_remove_all(efx);
2533 /* Final NIC shutdown
2534 * This is called only at module unload (or hotplug removal).
2536 static void efx_pci_remove(struct pci_dev *pci_dev)
2538 struct efx_nic *efx;
2540 efx = pci_get_drvdata(pci_dev);
2544 /* Mark the NIC as fini, then stop the interface */
2546 dev_close(efx->net_dev);
2547 efx_disable_interrupts(efx);
2550 efx_sriov_fini(efx);
2551 efx_unregister_netdev(efx);
2553 efx_mtd_remove(efx);
2555 efx_pci_remove_main(efx);
2558 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2560 efx_fini_struct(efx);
2561 pci_set_drvdata(pci_dev, NULL);
2562 free_netdev(efx->net_dev);
2564 pci_disable_pcie_error_reporting(pci_dev);
2567 /* NIC VPD information
2568 * Called during probe to display the part number of the
2569 * installed NIC. VPD is potentially very large but this should
2570 * always appear within the first 512 bytes.
2572 #define SFC_VPD_LEN 512
2573 static void efx_print_product_vpd(struct efx_nic *efx)
2575 struct pci_dev *dev = efx->pci_dev;
2576 char vpd_data[SFC_VPD_LEN];
2580 /* Get the vpd data from the device */
2581 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2582 if (vpd_size <= 0) {
2583 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2587 /* Get the Read only section */
2588 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2590 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2594 j = pci_vpd_lrdt_size(&vpd_data[i]);
2595 i += PCI_VPD_LRDT_TAG_SIZE;
2596 if (i + j > vpd_size)
2599 /* Get the Part number */
2600 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2602 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2606 j = pci_vpd_info_field_size(&vpd_data[i]);
2607 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2608 if (i + j > vpd_size) {
2609 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2613 netif_info(efx, drv, efx->net_dev,
2614 "Part Number : %.*s\n", j, &vpd_data[i]);
2618 /* Main body of NIC initialisation
2619 * This is called at module load (or hotplug insertion, theoretically).
2621 static int efx_pci_probe_main(struct efx_nic *efx)
2625 /* Do start-of-day initialisation */
2626 rc = efx_probe_all(efx);
2632 rc = efx->type->init(efx);
2634 netif_err(efx, probe, efx->net_dev,
2635 "failed to initialise NIC\n");
2639 rc = efx_init_port(efx);
2641 netif_err(efx, probe, efx->net_dev,
2642 "failed to initialise port\n");
2646 rc = efx_nic_init_interrupt(efx);
2649 efx_enable_interrupts(efx);
2656 efx->type->fini(efx);
2659 efx_remove_all(efx);
2664 /* NIC initialisation
2666 * This is called at module load (or hotplug insertion,
2667 * theoretically). It sets up PCI mappings, resets the NIC,
2668 * sets up and registers the network devices with the kernel and hooks
2669 * the interrupt service routine. It does not prepare the device for
2670 * transmission; this is left to the first time one of the network
2671 * interfaces is brought up (i.e. efx_net_open).
2673 static int efx_pci_probe(struct pci_dev *pci_dev,
2674 const struct pci_device_id *entry)
2676 struct net_device *net_dev;
2677 struct efx_nic *efx;
2680 /* Allocate and initialise a struct net_device and struct efx_nic */
2681 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2685 efx = netdev_priv(net_dev);
2686 efx->type = (const struct efx_nic_type *) entry->driver_data;
2687 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2688 NETIF_F_HIGHDMA | NETIF_F_TSO |
2690 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2691 net_dev->features |= NETIF_F_TSO6;
2692 /* Mask for features that also apply to VLAN devices */
2693 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2694 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2696 /* All offloads can be toggled */
2697 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2698 pci_set_drvdata(pci_dev, efx);
2699 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2700 rc = efx_init_struct(efx, pci_dev, net_dev);
2704 netif_info(efx, probe, efx->net_dev,
2705 "Solarflare NIC detected\n");
2707 efx_print_product_vpd(efx);
2709 /* Set up basic I/O (BAR mappings etc) */
2710 rc = efx_init_io(efx);
2714 rc = efx_pci_probe_main(efx);
2718 rc = efx_register_netdev(efx);
2722 rc = efx_sriov_init(efx);
2724 netif_err(efx, probe, efx->net_dev,
2725 "SR-IOV can't be enabled rc %d\n", rc);
2727 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2729 /* Try to create MTDs, but allow this to fail */
2731 rc = efx_mtd_probe(efx);
2734 netif_warn(efx, probe, efx->net_dev,
2735 "failed to create MTDs (%d)\n", rc);
2737 rc = pci_enable_pcie_error_reporting(pci_dev);
2738 if (rc && rc != -EINVAL)
2739 netif_warn(efx, probe, efx->net_dev,
2740 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2745 efx_pci_remove_main(efx);
2749 efx_fini_struct(efx);
2751 pci_set_drvdata(pci_dev, NULL);
2753 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2754 free_netdev(net_dev);
2758 static int efx_pm_freeze(struct device *dev)
2760 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2764 if (efx->state != STATE_DISABLED) {
2765 efx->state = STATE_UNINIT;
2767 efx_device_detach_sync(efx);
2770 efx_disable_interrupts(efx);
2778 static int efx_pm_thaw(struct device *dev)
2780 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2784 if (efx->state != STATE_DISABLED) {
2785 efx_enable_interrupts(efx);
2787 mutex_lock(&efx->mac_lock);
2788 efx->phy_op->reconfigure(efx);
2789 mutex_unlock(&efx->mac_lock);
2793 netif_device_attach(efx->net_dev);
2795 efx->state = STATE_READY;
2797 efx->type->resume_wol(efx);
2802 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2803 queue_work(reset_workqueue, &efx->reset_work);
2808 static int efx_pm_poweroff(struct device *dev)
2810 struct pci_dev *pci_dev = to_pci_dev(dev);
2811 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2813 efx->type->fini(efx);
2815 efx->reset_pending = 0;
2817 pci_save_state(pci_dev);
2818 return pci_set_power_state(pci_dev, PCI_D3hot);
2821 /* Used for both resume and restore */
2822 static int efx_pm_resume(struct device *dev)
2824 struct pci_dev *pci_dev = to_pci_dev(dev);
2825 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2828 rc = pci_set_power_state(pci_dev, PCI_D0);
2831 pci_restore_state(pci_dev);
2832 rc = pci_enable_device(pci_dev);
2835 pci_set_master(efx->pci_dev);
2836 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2839 rc = efx->type->init(efx);
2846 static int efx_pm_suspend(struct device *dev)
2851 rc = efx_pm_poweroff(dev);
2857 static const struct dev_pm_ops efx_pm_ops = {
2858 .suspend = efx_pm_suspend,
2859 .resume = efx_pm_resume,
2860 .freeze = efx_pm_freeze,
2861 .thaw = efx_pm_thaw,
2862 .poweroff = efx_pm_poweroff,
2863 .restore = efx_pm_resume,
2866 /* A PCI error affecting this device was detected.
2867 * At this point MMIO and DMA may be disabled.
2868 * Stop the software path and request a slot reset.
2870 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2871 enum pci_channel_state state)
2873 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2874 struct efx_nic *efx = pci_get_drvdata(pdev);
2876 if (state == pci_channel_io_perm_failure)
2877 return PCI_ERS_RESULT_DISCONNECT;
2881 if (efx->state != STATE_DISABLED) {
2882 efx->state = STATE_RECOVERY;
2883 efx->reset_pending = 0;
2885 efx_device_detach_sync(efx);
2888 efx_disable_interrupts(efx);
2890 status = PCI_ERS_RESULT_NEED_RESET;
2892 /* If the interface is disabled we don't want to do anything
2895 status = PCI_ERS_RESULT_RECOVERED;
2900 pci_disable_device(pdev);
2905 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
2906 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
2908 struct efx_nic *efx = pci_get_drvdata(pdev);
2909 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2912 if (pci_enable_device(pdev)) {
2913 netif_err(efx, hw, efx->net_dev,
2914 "Cannot re-enable PCI device after reset.\n");
2915 status = PCI_ERS_RESULT_DISCONNECT;
2918 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
2920 netif_err(efx, hw, efx->net_dev,
2921 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
2922 /* Non-fatal error. Continue. */
2928 /* Perform the actual reset and resume I/O operations. */
2929 static void efx_io_resume(struct pci_dev *pdev)
2931 struct efx_nic *efx = pci_get_drvdata(pdev);
2936 if (efx->state == STATE_DISABLED)
2939 rc = efx_reset(efx, RESET_TYPE_ALL);
2941 netif_err(efx, hw, efx->net_dev,
2942 "efx_reset failed after PCI error (%d)\n", rc);
2944 efx->state = STATE_READY;
2945 netif_dbg(efx, hw, efx->net_dev,
2946 "Done resetting and resuming IO after PCI error.\n");
2953 /* For simplicity and reliability, we always require a slot reset and try to
2954 * reset the hardware when a pci error affecting the device is detected.
2955 * We leave both the link_reset and mmio_enabled callback unimplemented:
2956 * with our request for slot reset the mmio_enabled callback will never be
2957 * called, and the link_reset callback is not used by AER or EEH mechanisms.
2959 static struct pci_error_handlers efx_err_handlers = {
2960 .error_detected = efx_io_error_detected,
2961 .slot_reset = efx_io_slot_reset,
2962 .resume = efx_io_resume,
2965 static struct pci_driver efx_pci_driver = {
2966 .name = KBUILD_MODNAME,
2967 .id_table = efx_pci_table,
2968 .probe = efx_pci_probe,
2969 .remove = efx_pci_remove,
2970 .driver.pm = &efx_pm_ops,
2971 .err_handler = &efx_err_handlers,
2974 /**************************************************************************
2976 * Kernel module interface
2978 *************************************************************************/
2980 module_param(interrupt_mode, uint, 0444);
2981 MODULE_PARM_DESC(interrupt_mode,
2982 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2984 static int __init efx_init_module(void)
2988 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2990 rc = register_netdevice_notifier(&efx_netdev_notifier);
2994 rc = efx_init_sriov();
2998 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2999 if (!reset_workqueue) {
3004 rc = pci_register_driver(&efx_pci_driver);
3011 destroy_workqueue(reset_workqueue);
3015 unregister_netdevice_notifier(&efx_netdev_notifier);
3020 static void __exit efx_exit_module(void)
3022 printk(KERN_INFO "Solarflare NET driver unloading\n");
3024 pci_unregister_driver(&efx_pci_driver);
3025 destroy_workqueue(reset_workqueue);
3027 unregister_netdevice_notifier(&efx_netdev_notifier);
3031 module_init(efx_init_module);
3032 module_exit(efx_exit_module);
3034 MODULE_AUTHOR("Solarflare Communications and "
3035 "Michael Brown <mbrown@fensystems.co.uk>");
3036 MODULE_DESCRIPTION("Solarflare Communications network driver");
3037 MODULE_LICENSE("GPL");
3038 MODULE_DEVICE_TABLE(pci, efx_pci_table);