1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2010 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/bitops.h>
12 #include <linux/module.h>
13 #undef DEBUG /* <linux/mtd/mtd.h> has its own use for DEBUG */
14 #include <linux/mtd/mtd.h>
15 #include <linux/delay.h>
16 #include <linux/slab.h>
17 #include <linux/rtnetlink.h>
19 #include "net_driver.h"
24 #include "mcdi_pcol.h"
26 #define EFX_SPI_VERIFY_BUF_LEN 16
28 struct efx_mtd_partition {
38 const char *type_name;
39 char name[IFNAMSIZ + 20];
43 int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
44 size_t *retlen, u8 *buffer);
45 int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
46 int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
47 size_t *retlen, const u8 *buffer);
48 int (*sync)(struct mtd_info *mtd);
52 struct list_head node;
54 const struct efx_spi_device *spi;
56 const struct efx_mtd_ops *ops;
58 struct efx_mtd_partition part[0];
61 #define efx_for_each_partition(part, efx_mtd) \
62 for ((part) = &(efx_mtd)->part[0]; \
63 (part) != &(efx_mtd)->part[(efx_mtd)->n_parts]; \
66 #define to_efx_mtd_partition(mtd) \
67 container_of(mtd, struct efx_mtd_partition, mtd)
69 static int falcon_mtd_probe(struct efx_nic *efx);
70 static int siena_mtd_probe(struct efx_nic *efx);
75 efx_spi_slow_wait(struct efx_mtd_partition *part, bool uninterruptible)
77 struct efx_mtd *efx_mtd = part->mtd.priv;
78 const struct efx_spi_device *spi = efx_mtd->spi;
79 struct efx_nic *efx = efx_mtd->efx;
83 /* Wait up to 4s for flash/EEPROM to finish a slow operation. */
84 for (i = 0; i < 40; i++) {
85 __set_current_state(uninterruptible ?
86 TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
87 schedule_timeout(HZ / 10);
88 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
89 &status, sizeof(status));
92 if (!(status & SPI_STATUS_NRDY))
94 if (signal_pending(current))
97 pr_err("%s: timed out waiting for %s\n", part->name, efx_mtd->name);
102 efx_spi_unlock(struct efx_nic *efx, const struct efx_spi_device *spi)
104 const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
109 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
110 &status, sizeof(status));
114 if (!(status & unlock_mask))
115 return 0; /* already unlocked */
117 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
120 rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
124 status &= ~unlock_mask;
125 rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
126 NULL, sizeof(status));
129 rc = falcon_spi_wait_write(efx, spi);
137 efx_spi_erase(struct efx_mtd_partition *part, loff_t start, size_t len)
139 struct efx_mtd *efx_mtd = part->mtd.priv;
140 const struct efx_spi_device *spi = efx_mtd->spi;
141 struct efx_nic *efx = efx_mtd->efx;
142 unsigned pos, block_len;
143 u8 empty[EFX_SPI_VERIFY_BUF_LEN];
144 u8 buffer[EFX_SPI_VERIFY_BUF_LEN];
147 if (len != spi->erase_size)
150 if (spi->erase_command == 0)
153 rc = efx_spi_unlock(efx, spi);
156 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
159 rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
163 rc = efx_spi_slow_wait(part, false);
165 /* Verify the entire region has been wiped */
166 memset(empty, 0xff, sizeof(empty));
167 for (pos = 0; pos < len; pos += block_len) {
168 block_len = min(len - pos, sizeof(buffer));
169 rc = falcon_spi_read(efx, spi, start + pos, block_len,
173 if (memcmp(empty, buffer, block_len))
176 /* Avoid locking up the system */
178 if (signal_pending(current))
187 static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
189 struct efx_mtd *efx_mtd = mtd->priv;
192 rc = efx_mtd->ops->erase(mtd, erase->addr, erase->len);
194 erase->state = MTD_ERASE_DONE;
196 erase->state = MTD_ERASE_FAILED;
197 erase->fail_addr = 0xffffffff;
199 mtd_erase_callback(erase);
203 static void efx_mtd_sync(struct mtd_info *mtd)
205 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
206 struct efx_mtd *efx_mtd = mtd->priv;
209 rc = efx_mtd->ops->sync(mtd);
211 pr_err("%s: %s sync failed (%d)\n",
212 part->name, efx_mtd->name, rc);
215 static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
220 rc = mtd_device_unregister(&part->mtd);
228 static void efx_mtd_remove_device(struct efx_mtd *efx_mtd)
230 struct efx_mtd_partition *part;
232 efx_for_each_partition(part, efx_mtd)
233 efx_mtd_remove_partition(part);
234 list_del(&efx_mtd->node);
238 static void efx_mtd_rename_device(struct efx_mtd *efx_mtd)
240 struct efx_mtd_partition *part;
242 efx_for_each_partition(part, efx_mtd)
243 if (efx_nic_rev(efx_mtd->efx) >= EFX_REV_SIENA_A0)
244 snprintf(part->name, sizeof(part->name),
245 "%s %s:%02x", efx_mtd->efx->name,
246 part->type_name, part->mcdi.fw_subtype);
248 snprintf(part->name, sizeof(part->name),
249 "%s %s", efx_mtd->efx->name,
253 static int efx_mtd_probe_device(struct efx_nic *efx, struct efx_mtd *efx_mtd)
255 struct efx_mtd_partition *part;
259 efx_mtd_rename_device(efx_mtd);
261 efx_for_each_partition(part, efx_mtd) {
262 part->mtd.writesize = 1;
264 part->mtd.owner = THIS_MODULE;
265 part->mtd.priv = efx_mtd;
266 part->mtd.name = part->name;
267 part->mtd.erase = efx_mtd_erase;
268 part->mtd.read = efx_mtd->ops->read;
269 part->mtd.write = efx_mtd->ops->write;
270 part->mtd.sync = efx_mtd_sync;
272 if (mtd_device_register(&part->mtd, NULL, 0))
276 list_add(&efx_mtd->node, &efx->mtd_list);
280 while (part != &efx_mtd->part[0]) {
282 efx_mtd_remove_partition(part);
284 /* mtd_device_register() returns 1 if the MTD table is full */
288 void efx_mtd_remove(struct efx_nic *efx)
290 struct efx_mtd *efx_mtd, *next;
292 WARN_ON(efx_dev_registered(efx));
294 list_for_each_entry_safe(efx_mtd, next, &efx->mtd_list, node)
295 efx_mtd_remove_device(efx_mtd);
298 void efx_mtd_rename(struct efx_nic *efx)
300 struct efx_mtd *efx_mtd;
304 list_for_each_entry(efx_mtd, &efx->mtd_list, node)
305 efx_mtd_rename_device(efx_mtd);
308 int efx_mtd_probe(struct efx_nic *efx)
310 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
311 return siena_mtd_probe(efx);
313 return falcon_mtd_probe(efx);
316 /* Implementation of MTD operations for Falcon */
318 static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
319 size_t len, size_t *retlen, u8 *buffer)
321 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
322 struct efx_mtd *efx_mtd = mtd->priv;
323 const struct efx_spi_device *spi = efx_mtd->spi;
324 struct efx_nic *efx = efx_mtd->efx;
325 struct falcon_nic_data *nic_data = efx->nic_data;
328 rc = mutex_lock_interruptible(&nic_data->spi_lock);
331 rc = falcon_spi_read(efx, spi, part->offset + start, len,
333 mutex_unlock(&nic_data->spi_lock);
337 static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
339 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
340 struct efx_mtd *efx_mtd = mtd->priv;
341 struct efx_nic *efx = efx_mtd->efx;
342 struct falcon_nic_data *nic_data = efx->nic_data;
345 rc = mutex_lock_interruptible(&nic_data->spi_lock);
348 rc = efx_spi_erase(part, part->offset + start, len);
349 mutex_unlock(&nic_data->spi_lock);
353 static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
354 size_t len, size_t *retlen, const u8 *buffer)
356 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
357 struct efx_mtd *efx_mtd = mtd->priv;
358 const struct efx_spi_device *spi = efx_mtd->spi;
359 struct efx_nic *efx = efx_mtd->efx;
360 struct falcon_nic_data *nic_data = efx->nic_data;
363 rc = mutex_lock_interruptible(&nic_data->spi_lock);
366 rc = falcon_spi_write(efx, spi, part->offset + start, len,
368 mutex_unlock(&nic_data->spi_lock);
372 static int falcon_mtd_sync(struct mtd_info *mtd)
374 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
375 struct efx_mtd *efx_mtd = mtd->priv;
376 struct efx_nic *efx = efx_mtd->efx;
377 struct falcon_nic_data *nic_data = efx->nic_data;
380 mutex_lock(&nic_data->spi_lock);
381 rc = efx_spi_slow_wait(part, true);
382 mutex_unlock(&nic_data->spi_lock);
386 static const struct efx_mtd_ops falcon_mtd_ops = {
387 .read = falcon_mtd_read,
388 .erase = falcon_mtd_erase,
389 .write = falcon_mtd_write,
390 .sync = falcon_mtd_sync,
393 static int falcon_mtd_probe(struct efx_nic *efx)
395 struct falcon_nic_data *nic_data = efx->nic_data;
396 struct efx_spi_device *spi;
397 struct efx_mtd *efx_mtd;
402 spi = &nic_data->spi_flash;
403 if (efx_spi_present(spi) && spi->size > FALCON_FLASH_BOOTCODE_START) {
404 efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
410 efx_mtd->name = "flash";
411 efx_mtd->ops = &falcon_mtd_ops;
413 efx_mtd->n_parts = 1;
414 efx_mtd->part[0].mtd.type = MTD_NORFLASH;
415 efx_mtd->part[0].mtd.flags = MTD_CAP_NORFLASH;
416 efx_mtd->part[0].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
417 efx_mtd->part[0].mtd.erasesize = spi->erase_size;
418 efx_mtd->part[0].offset = FALCON_FLASH_BOOTCODE_START;
419 efx_mtd->part[0].type_name = "sfc_flash_bootrom";
421 rc = efx_mtd_probe_device(efx, efx_mtd);
428 spi = &nic_data->spi_eeprom;
429 if (efx_spi_present(spi) && spi->size > EFX_EEPROM_BOOTCONFIG_START) {
430 efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
436 efx_mtd->name = "EEPROM";
437 efx_mtd->ops = &falcon_mtd_ops;
439 efx_mtd->n_parts = 1;
440 efx_mtd->part[0].mtd.type = MTD_RAM;
441 efx_mtd->part[0].mtd.flags = MTD_CAP_RAM;
442 efx_mtd->part[0].mtd.size =
443 min(spi->size, EFX_EEPROM_BOOTCONFIG_END) -
444 EFX_EEPROM_BOOTCONFIG_START;
445 efx_mtd->part[0].mtd.erasesize = spi->erase_size;
446 efx_mtd->part[0].offset = EFX_EEPROM_BOOTCONFIG_START;
447 efx_mtd->part[0].type_name = "sfc_bootconfig";
449 rc = efx_mtd_probe_device(efx, efx_mtd);
459 /* Implementation of MTD operations for Siena */
461 static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
462 size_t len, size_t *retlen, u8 *buffer)
464 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
465 struct efx_mtd *efx_mtd = mtd->priv;
466 struct efx_nic *efx = efx_mtd->efx;
467 loff_t offset = start;
468 loff_t end = min_t(loff_t, start + len, mtd->size);
472 while (offset < end) {
473 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
474 rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
482 *retlen = offset - start;
486 static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
488 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
489 struct efx_mtd *efx_mtd = mtd->priv;
490 struct efx_nic *efx = efx_mtd->efx;
491 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
492 loff_t end = min_t(loff_t, start + len, mtd->size);
493 size_t chunk = part->mtd.erasesize;
496 if (!part->mcdi.updating) {
497 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
500 part->mcdi.updating = true;
503 /* The MCDI interface can in fact do multiple erase blocks at once;
504 * but erasing may be slow, so we make multiple calls here to avoid
505 * tripping the MCDI RPC timeout. */
506 while (offset < end) {
507 rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
517 static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
518 size_t len, size_t *retlen, const u8 *buffer)
520 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
521 struct efx_mtd *efx_mtd = mtd->priv;
522 struct efx_nic *efx = efx_mtd->efx;
523 loff_t offset = start;
524 loff_t end = min_t(loff_t, start + len, mtd->size);
528 if (!part->mcdi.updating) {
529 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
532 part->mcdi.updating = true;
535 while (offset < end) {
536 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
537 rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
545 *retlen = offset - start;
549 static int siena_mtd_sync(struct mtd_info *mtd)
551 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
552 struct efx_mtd *efx_mtd = mtd->priv;
553 struct efx_nic *efx = efx_mtd->efx;
556 if (part->mcdi.updating) {
557 part->mcdi.updating = false;
558 rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
564 static const struct efx_mtd_ops siena_mtd_ops = {
565 .read = siena_mtd_read,
566 .erase = siena_mtd_erase,
567 .write = siena_mtd_write,
568 .sync = siena_mtd_sync,
571 struct siena_nvram_type_info {
576 static const struct siena_nvram_type_info siena_nvram_types[] = {
577 [MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" },
578 [MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" },
579 [MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" },
580 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" },
581 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" },
582 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" },
583 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" },
584 [MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" },
585 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" },
586 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" },
587 [MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" },
588 [MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" },
591 static int siena_mtd_probe_partition(struct efx_nic *efx,
592 struct efx_mtd *efx_mtd,
593 unsigned int part_id,
596 struct efx_mtd_partition *part = &efx_mtd->part[part_id];
597 const struct siena_nvram_type_info *info;
598 size_t size, erase_size;
602 if (type >= ARRAY_SIZE(siena_nvram_types))
605 info = &siena_nvram_types[type];
607 if (info->port != efx_port_num(efx))
610 rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
614 return -ENODEV; /* hide it */
616 part->mcdi.nvram_type = type;
617 part->type_name = info->name;
619 part->mtd.type = MTD_NORFLASH;
620 part->mtd.flags = MTD_CAP_NORFLASH;
621 part->mtd.size = size;
622 part->mtd.erasesize = erase_size;
627 static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
628 struct efx_mtd *efx_mtd)
630 struct efx_mtd_partition *part;
631 uint16_t fw_subtype_list[MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MINNUM];
634 rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list);
638 efx_for_each_partition(part, efx_mtd)
639 part->mcdi.fw_subtype = fw_subtype_list[part->mcdi.nvram_type];
644 static int siena_mtd_probe(struct efx_nic *efx)
646 struct efx_mtd *efx_mtd;
653 rc = efx_mcdi_nvram_types(efx, &nvram_types);
657 efx_mtd = kzalloc(sizeof(*efx_mtd) +
658 hweight32(nvram_types) * sizeof(efx_mtd->part[0]),
663 efx_mtd->name = "Siena NVRAM manager";
665 efx_mtd->ops = &siena_mtd_ops;
668 efx_mtd->n_parts = 0;
670 while (nvram_types != 0) {
671 if (nvram_types & 1) {
672 rc = siena_mtd_probe_partition(efx, efx_mtd,
673 efx_mtd->n_parts, type);
676 else if (rc != -ENODEV)
683 rc = siena_mtd_get_fw_subtypes(efx, efx_mtd);
687 rc = efx_mtd_probe_device(efx, efx_mtd);