1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
30 #include <linux/mtd/mtd.h>
36 /**************************************************************************
40 **************************************************************************/
42 #define EFX_DRIVER_VERSION "4.0"
45 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
46 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
48 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
49 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
52 /**************************************************************************
56 **************************************************************************/
58 #define EFX_MAX_CHANNELS 32U
59 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
60 #define EFX_EXTRA_CHANNEL_IOV 0
61 #define EFX_EXTRA_CHANNEL_PTP 1
62 #define EFX_MAX_EXTRA_CHANNELS 2U
64 /* Checksum generation is a per-queue option in hardware, so each
65 * queue visible to the networking core is backed by two hardware TX
67 #define EFX_MAX_TX_TC 2
68 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
69 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
70 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
71 #define EFX_TXQ_TYPES 4
72 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
74 /* Maximum possible MTU the driver supports */
75 #define EFX_MAX_MTU (9 * 1024)
77 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
78 * and should be a multiple of the cache line size.
80 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
82 /* If possible, we should ensure cache line alignment at start and end
83 * of every buffer. Otherwise, we just need to ensure 4-byte
84 * alignment of the network header.
87 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
89 #define EFX_RX_BUF_ALIGNMENT 4
92 /* Forward declare Precision Time Protocol (PTP) support structure. */
95 struct efx_self_tests;
98 * struct efx_buffer - A general-purpose DMA buffer
99 * @addr: host base address of the buffer
100 * @dma_addr: DMA base address of the buffer
101 * @len: Buffer length, in bytes
103 * The NIC uses these buffers for its interrupt status registers and
113 * struct efx_special_buffer - DMA buffer entered into buffer table
114 * @buf: Standard &struct efx_buffer
115 * @index: Buffer index within controller;s buffer table
116 * @entries: Number of buffer table entries
118 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
119 * Event and descriptor rings are addressed via one or more buffer
120 * table entries (and so can be physically non-contiguous, although we
121 * currently do not take advantage of that). On Falcon and Siena we
122 * have to take care of allocating and initialising the entries
123 * ourselves. On later hardware this is managed by the firmware and
124 * @index and @entries are left as 0.
126 struct efx_special_buffer {
127 struct efx_buffer buf;
129 unsigned int entries;
133 * struct efx_tx_buffer - buffer state for a TX descriptor
134 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
135 * freed when descriptor completes
136 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
137 * freed when descriptor completes.
138 * @option: When @flags & %EFX_TX_BUF_OPTION, a NIC-specific option descriptor.
139 * @dma_addr: DMA address of the fragment.
140 * @flags: Flags for allocation and DMA mapping type
141 * @len: Length of this fragment.
142 * This field is zero when the queue slot is empty.
143 * @unmap_len: Length of this fragment to unmap
145 struct efx_tx_buffer {
147 const struct sk_buff *skb;
154 unsigned short flags;
156 unsigned short unmap_len;
158 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
159 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
160 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
161 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
162 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */
165 * struct efx_tx_queue - An Efx TX queue
167 * This is a ring buffer of TX fragments.
168 * Since the TX completion path always executes on the same
169 * CPU and the xmit path can operate on different CPUs,
170 * performance is increased by ensuring that the completion
171 * path and the xmit path operate on different cache lines.
172 * This is particularly important if the xmit path is always
173 * executing on one CPU which is different from the completion
174 * path. There is also a cache line for members which are
175 * read but not written on the fast path.
177 * @efx: The associated Efx NIC
178 * @queue: DMA queue number
179 * @channel: The associated channel
180 * @core_txq: The networking core TX queue structure
181 * @buffer: The software buffer ring
182 * @tsoh_page: Array of pages of TSO header buffers
183 * @txd: The hardware descriptor ring
184 * @ptr_mask: The size of the ring minus 1.
185 * @piobuf: PIO buffer region for this TX queue (shared with its partner).
186 * Size of the region is efx_piobuf_size.
187 * @piobuf_offset: Buffer offset to be specified in PIO descriptors
188 * @initialised: Has hardware queue been initialised?
189 * @read_count: Current read pointer.
190 * This is the number of buffers that have been removed from both rings.
191 * @old_write_count: The value of @write_count when last checked.
192 * This is here for performance reasons. The xmit path will
193 * only get the up-to-date value of @write_count if this
194 * variable indicates that the queue is empty. This is to
195 * avoid cache-line ping-pong between the xmit path and the
197 * @merge_events: Number of TX merged completion events
198 * @insert_count: Current insert pointer
199 * This is the number of buffers that have been added to the
201 * @write_count: Current write pointer
202 * This is the number of buffers that have been added to the
204 * @old_read_count: The value of read_count when last checked.
205 * This is here for performance reasons. The xmit path will
206 * only get the up-to-date value of read_count if this
207 * variable indicates that the queue is full. This is to
208 * avoid cache-line ping-pong between the xmit path and the
210 * @tso_bursts: Number of times TSO xmit invoked by kernel
211 * @tso_long_headers: Number of packets with headers too long for standard
213 * @tso_packets: Number of packets via the TSO xmit path
214 * @pushes: Number of times the TX push feature has been used
215 * @pio_packets: Number of times the TX PIO feature has been used
216 * @empty_read_count: If the completion path has seen the queue as empty
217 * and the transmission path has not yet checked this, the value of
218 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
220 struct efx_tx_queue {
221 /* Members which don't change on the fast path */
222 struct efx_nic *efx ____cacheline_aligned_in_smp;
224 struct efx_channel *channel;
225 struct netdev_queue *core_txq;
226 struct efx_tx_buffer *buffer;
227 struct efx_buffer *tsoh_page;
228 struct efx_special_buffer txd;
229 unsigned int ptr_mask;
230 void __iomem *piobuf;
231 unsigned int piobuf_offset;
234 /* Members used mainly on the completion path */
235 unsigned int read_count ____cacheline_aligned_in_smp;
236 unsigned int old_write_count;
237 unsigned int merge_events;
239 /* Members used only on the xmit path */
240 unsigned int insert_count ____cacheline_aligned_in_smp;
241 unsigned int write_count;
242 unsigned int old_read_count;
243 unsigned int tso_bursts;
244 unsigned int tso_long_headers;
245 unsigned int tso_packets;
247 unsigned int pio_packets;
249 /* Members shared between paths and sometimes updated */
250 unsigned int empty_read_count ____cacheline_aligned_in_smp;
251 #define EFX_EMPTY_COUNT_VALID 0x80000000
252 atomic_t flush_outstanding;
256 * struct efx_rx_buffer - An Efx RX data buffer
257 * @dma_addr: DMA base address of the buffer
258 * @page: The associated page buffer.
259 * Will be %NULL if the buffer slot is currently free.
260 * @page_offset: If pending: offset in @page of DMA base address.
261 * If completed: offset in @page of Ethernet header.
262 * @len: If pending: length for DMA descriptor.
263 * If completed: received length, excluding hash prefix.
264 * @flags: Flags for buffer and packet state. These are only set on the
265 * first buffer of a scattered packet.
267 struct efx_rx_buffer {
274 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
275 #define EFX_RX_PKT_CSUMMED 0x0002
276 #define EFX_RX_PKT_DISCARD 0x0004
277 #define EFX_RX_PKT_TCP 0x0040
278 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */
281 * struct efx_rx_page_state - Page-based rx buffer state
283 * Inserted at the start of every page allocated for receive buffers.
284 * Used to facilitate sharing dma mappings between recycled rx buffers
285 * and those passed up to the kernel.
287 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
288 * When refcnt falls to zero, the page is unmapped for dma
289 * @dma_addr: The dma address of this page.
291 struct efx_rx_page_state {
295 unsigned int __pad[0] ____cacheline_aligned;
299 * struct efx_rx_queue - An Efx RX queue
300 * @efx: The associated Efx NIC
301 * @core_index: Index of network core RX queue. Will be >= 0 iff this
302 * is associated with a real RX queue.
303 * @buffer: The software buffer ring
304 * @rxd: The hardware descriptor ring
305 * @ptr_mask: The size of the ring minus 1.
306 * @refill_enabled: Enable refill whenever fill level is low
307 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
308 * @rxq_flush_pending.
309 * @added_count: Number of buffers added to the receive queue.
310 * @notified_count: Number of buffers given to NIC (<= @added_count).
311 * @removed_count: Number of buffers removed from the receive queue.
312 * @scatter_n: Used by NIC specific receive code.
313 * @scatter_len: Used by NIC specific receive code.
314 * @page_ring: The ring to store DMA mapped pages for reuse.
315 * @page_add: Counter to calculate the write pointer for the recycle ring.
316 * @page_remove: Counter to calculate the read pointer for the recycle ring.
317 * @page_recycle_count: The number of pages that have been recycled.
318 * @page_recycle_failed: The number of pages that couldn't be recycled because
319 * the kernel still held a reference to them.
320 * @page_recycle_full: The number of pages that were released because the
321 * recycle ring was full.
322 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
323 * @max_fill: RX descriptor maximum fill level (<= ring size)
324 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
326 * @min_fill: RX descriptor minimum non-zero fill level.
327 * This records the minimum fill level observed when a ring
328 * refill was triggered.
329 * @recycle_count: RX buffer recycle counter.
330 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
332 struct efx_rx_queue {
335 struct efx_rx_buffer *buffer;
336 struct efx_special_buffer rxd;
337 unsigned int ptr_mask;
341 unsigned int added_count;
342 unsigned int notified_count;
343 unsigned int removed_count;
344 unsigned int scatter_n;
345 unsigned int scatter_len;
346 struct page **page_ring;
347 unsigned int page_add;
348 unsigned int page_remove;
349 unsigned int page_recycle_count;
350 unsigned int page_recycle_failed;
351 unsigned int page_recycle_full;
352 unsigned int page_ptr_mask;
353 unsigned int max_fill;
354 unsigned int fast_fill_trigger;
355 unsigned int min_fill;
356 unsigned int min_overfill;
357 unsigned int recycle_count;
358 struct timer_list slow_fill;
359 unsigned int slow_fill_count;
362 enum efx_rx_alloc_method {
363 RX_ALLOC_METHOD_AUTO = 0,
364 RX_ALLOC_METHOD_SKB = 1,
365 RX_ALLOC_METHOD_PAGE = 2,
369 * struct efx_channel - An Efx channel
371 * A channel comprises an event queue, at least one TX queue, at least
372 * one RX queue, and an associated tasklet for processing the event
375 * @efx: Associated Efx NIC
376 * @channel: Channel instance number
377 * @type: Channel type definition
378 * @eventq_init: Event queue initialised flag
379 * @enabled: Channel enabled indicator
380 * @irq: IRQ number (MSI and MSI-X only)
381 * @irq_moderation: IRQ moderation value (in hardware ticks)
382 * @napi_dev: Net device used with NAPI
383 * @napi_str: NAPI control structure
384 * @eventq: Event queue buffer
385 * @eventq_mask: Event queue pointer mask
386 * @eventq_read_ptr: Event queue read pointer
387 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
388 * @irq_count: Number of IRQs since last adaptive moderation decision
389 * @irq_mod_score: IRQ moderation score
390 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
391 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
392 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
393 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
394 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
395 * @n_rx_overlength: Count of RX_OVERLENGTH errors
396 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
397 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
398 * lack of descriptors
399 * @n_rx_merge_events: Number of RX merged completion events
400 * @n_rx_merge_packets: Number of RX packets completed by merged events
401 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
402 * __efx_rx_packet(), or zero if there is none
403 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
404 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
405 * @rx_queue: RX queue for this channel
406 * @tx_queue: TX queues for this channel
411 const struct efx_channel_type *type;
415 unsigned int irq_moderation;
416 struct net_device *napi_dev;
417 struct napi_struct napi_str;
418 struct efx_special_buffer eventq;
419 unsigned int eventq_mask;
420 unsigned int eventq_read_ptr;
423 unsigned int irq_count;
424 unsigned int irq_mod_score;
425 #ifdef CONFIG_RFS_ACCEL
426 unsigned int rfs_filters_added;
429 unsigned n_rx_tobe_disc;
430 unsigned n_rx_ip_hdr_chksum_err;
431 unsigned n_rx_tcp_udp_chksum_err;
432 unsigned n_rx_mcast_mismatch;
433 unsigned n_rx_frm_trunc;
434 unsigned n_rx_overlength;
435 unsigned n_skbuff_leaks;
436 unsigned int n_rx_nodesc_trunc;
437 unsigned int n_rx_merge_events;
438 unsigned int n_rx_merge_packets;
440 unsigned int rx_pkt_n_frags;
441 unsigned int rx_pkt_index;
443 struct efx_rx_queue rx_queue;
444 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
448 * struct efx_msi_context - Context for each MSI
449 * @efx: The associated NIC
450 * @index: Index of the channel/IRQ
451 * @name: Name of the channel/IRQ
453 * Unlike &struct efx_channel, this is never reallocated and is always
454 * safe for the IRQ handler to access.
456 struct efx_msi_context {
459 char name[IFNAMSIZ + 6];
463 * struct efx_channel_type - distinguishes traffic and extra channels
464 * @handle_no_channel: Handle failure to allocate an extra channel
465 * @pre_probe: Set up extra state prior to initialisation
466 * @post_remove: Tear down extra state after finalisation, if allocated.
467 * May be called on channels that have not been probed.
468 * @get_name: Generate the channel's name (used for its IRQ handler)
469 * @copy: Copy the channel state prior to reallocation. May be %NULL if
470 * reallocation is not supported.
471 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
472 * @keep_eventq: Flag for whether event queue should be kept initialised
473 * while the device is stopped
475 struct efx_channel_type {
476 void (*handle_no_channel)(struct efx_nic *);
477 int (*pre_probe)(struct efx_channel *);
478 void (*post_remove)(struct efx_channel *);
479 void (*get_name)(struct efx_channel *, char *buf, size_t len);
480 struct efx_channel *(*copy)(const struct efx_channel *);
481 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
491 #define STRING_TABLE_LOOKUP(val, member) \
492 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
494 extern const char *const efx_loopback_mode_names[];
495 extern const unsigned int efx_loopback_mode_max;
496 #define LOOPBACK_MODE(efx) \
497 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
499 extern const char *const efx_reset_type_names[];
500 extern const unsigned int efx_reset_type_max;
501 #define RESET_TYPE(type) \
502 STRING_TABLE_LOOKUP(type, efx_reset_type)
505 /* Be careful if altering to correct macro below */
506 EFX_INT_MODE_MSIX = 0,
507 EFX_INT_MODE_MSI = 1,
508 EFX_INT_MODE_LEGACY = 2,
509 EFX_INT_MODE_MAX /* Insert any new items before this */
511 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
514 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
515 STATE_READY = 1, /* hardware ready and netdev registered */
516 STATE_DISABLED = 2, /* device disabled due to hardware errors */
517 STATE_RECOVERY = 3, /* device recovering from PCI error */
521 * Alignment of the skb->head which wraps a page-allocated RX buffer
523 * The skb allocated to wrap an rx_buffer can have this alignment. Since
524 * the data is memcpy'd from the rx_buf, it does not need to be equal to
527 #define EFX_PAGE_SKB_ALIGN 2
529 /* Forward declaration */
532 /* Pseudo bit-mask flow control field */
533 #define EFX_FC_RX FLOW_CTRL_RX
534 #define EFX_FC_TX FLOW_CTRL_TX
535 #define EFX_FC_AUTO 4
538 * struct efx_link_state - Current state of the link
540 * @fd: Link is full-duplex
541 * @fc: Actual flow control flags
542 * @speed: Link speed (Mbps)
544 struct efx_link_state {
551 static inline bool efx_link_state_equal(const struct efx_link_state *left,
552 const struct efx_link_state *right)
554 return left->up == right->up && left->fd == right->fd &&
555 left->fc == right->fc && left->speed == right->speed;
559 * struct efx_phy_operations - Efx PHY operations table
560 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
561 * efx->loopback_modes.
562 * @init: Initialise PHY
563 * @fini: Shut down PHY
564 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
565 * @poll: Update @link_state and report whether it changed.
566 * Serialised by the mac_lock.
567 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
568 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
569 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
570 * (only needed where AN bit is set in mmds)
571 * @test_alive: Test that PHY is 'alive' (online)
572 * @test_name: Get the name of a PHY-specific test/result
573 * @run_tests: Run tests and record results as appropriate (offline).
574 * Flags are the ethtool tests flags.
576 struct efx_phy_operations {
577 int (*probe) (struct efx_nic *efx);
578 int (*init) (struct efx_nic *efx);
579 void (*fini) (struct efx_nic *efx);
580 void (*remove) (struct efx_nic *efx);
581 int (*reconfigure) (struct efx_nic *efx);
582 bool (*poll) (struct efx_nic *efx);
583 void (*get_settings) (struct efx_nic *efx,
584 struct ethtool_cmd *ecmd);
585 int (*set_settings) (struct efx_nic *efx,
586 struct ethtool_cmd *ecmd);
587 void (*set_npage_adv) (struct efx_nic *efx, u32);
588 int (*test_alive) (struct efx_nic *efx);
589 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
590 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
591 int (*get_module_eeprom) (struct efx_nic *efx,
592 struct ethtool_eeprom *ee,
594 int (*get_module_info) (struct efx_nic *efx,
595 struct ethtool_modinfo *modinfo);
599 * enum efx_phy_mode - PHY operating mode flags
600 * @PHY_MODE_NORMAL: on and should pass traffic
601 * @PHY_MODE_TX_DISABLED: on with TX disabled
602 * @PHY_MODE_LOW_POWER: set to low power through MDIO
603 * @PHY_MODE_OFF: switched off through external control
604 * @PHY_MODE_SPECIAL: on but will not pass traffic
608 PHY_MODE_TX_DISABLED = 1,
609 PHY_MODE_LOW_POWER = 2,
611 PHY_MODE_SPECIAL = 8,
614 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
616 return !!(mode & ~PHY_MODE_TX_DISABLED);
620 * struct efx_hw_stat_desc - Description of a hardware statistic
621 * @name: Name of the statistic as visible through ethtool, or %NULL if
622 * it should not be exposed
623 * @dma_width: Width in bits (0 for non-DMA statistics)
624 * @offset: Offset within stats (ignored for non-DMA statistics)
626 struct efx_hw_stat_desc {
632 /* Number of bits used in a multicast filter hash address */
633 #define EFX_MCAST_HASH_BITS 8
635 /* Number of (single-bit) entries in a multicast filter hash */
636 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
638 /* An Efx multicast filter hash */
639 union efx_multicast_hash {
640 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
641 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
648 * struct efx_nic - an Efx NIC
649 * @name: Device name (net device name or bus id before net device registered)
650 * @pci_dev: The PCI device
651 * @type: Controller type attributes
652 * @legacy_irq: IRQ number
653 * @workqueue: Workqueue for port reconfigures and the HW monitor.
654 * Work items do not hold and must not acquire RTNL.
655 * @workqueue_name: Name of workqueue
656 * @reset_work: Scheduled reset workitem
657 * @membase_phys: Memory BAR value as physical address
658 * @membase: Memory BAR value
659 * @interrupt_mode: Interrupt mode
660 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
661 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
662 * @irq_rx_moderation: IRQ moderation time for RX event queues
663 * @msg_enable: Log message enable flags
664 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
665 * @reset_pending: Bitmask for pending resets
666 * @tx_queue: TX DMA queues
667 * @rx_queue: RX DMA queues
669 * @msi_context: Context for each MSI
670 * @extra_channel_types: Types of extra (non-traffic) channels that
671 * should be allocated for this NIC
672 * @rxq_entries: Size of receive queues requested by user.
673 * @txq_entries: Size of transmit queues requested by user.
674 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
675 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
676 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
677 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
678 * @sram_lim_qw: Qword address limit of SRAM
679 * @next_buffer_table: First available buffer table id
680 * @n_channels: Number of channels in use
681 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
682 * @n_tx_channels: Number of channels used for TX
683 * @rx_dma_len: Current maximum RX DMA length
684 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
685 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
686 * for use in sk_buff::truesize
687 * @rx_prefix_size: Size of RX prefix before packet data
688 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
689 * (valid only if @rx_prefix_size != 0; always negative)
690 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
691 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative)
692 * @rx_hash_key: Toeplitz hash key for RSS
693 * @rx_indir_table: Indirection table for RSS
694 * @rx_scatter: Scatter mode enabled for receives
695 * @int_error_count: Number of internal errors seen recently
696 * @int_error_expire: Time at which error count will be expired
697 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
698 * acknowledge but do nothing else.
699 * @irq_status: Interrupt status buffer
700 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
701 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
702 * @selftest_work: Work item for asynchronous self-test
703 * @mtd_list: List of MTDs attached to the NIC
704 * @nic_data: Hardware dependent state
705 * @mcdi: Management-Controller-to-Driver Interface state
706 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
707 * efx_monitor() and efx_reconfigure_port()
708 * @port_enabled: Port enabled indicator.
709 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
710 * efx_mac_work() with kernel interfaces. Safe to read under any
711 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
712 * be held to modify it.
713 * @port_initialized: Port initialized?
714 * @net_dev: Operating system network device. Consider holding the rtnl lock
715 * @stats_buffer: DMA buffer for statistics
716 * @phy_type: PHY type
717 * @phy_op: PHY interface
718 * @phy_data: PHY private data (including PHY-specific stats)
719 * @mdio: PHY MDIO interface
720 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
721 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
722 * @link_advertising: Autonegotiation advertising flags
723 * @link_state: Current state of the link
724 * @n_link_state_changes: Number of times the link has changed state
725 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
726 * Protected by @mac_lock.
727 * @multicast_hash: Multicast hash table for Falcon-arch.
728 * Protected by @mac_lock.
729 * @wanted_fc: Wanted flow control flags
730 * @fc_disable: When non-zero flow control is disabled. Typically used to
731 * ensure that network back pressure doesn't delay dma queue flushes.
732 * Serialised by the rtnl lock.
733 * @mac_work: Work item for changing MAC promiscuity and multicast hash
734 * @loopback_mode: Loopback status
735 * @loopback_modes: Supported loopback mode bitmask
736 * @loopback_selftest: Offline self-test private state
737 * @filter_lock: Filter table lock
738 * @filter_state: Architecture-dependent filter table state
739 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
740 * indexed by filter ID
741 * @rps_expire_index: Next index to check for expiry in @rps_flow_id
742 * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
743 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
744 * Decremented when the efx_flush_rx_queue() is called.
745 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
746 * completed (either success or failure). Not used when MCDI is used to
747 * flush receive queues.
748 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
749 * @vf: Array of &struct efx_vf objects.
750 * @vf_count: Number of VFs intended to be enabled.
751 * @vf_init_count: Number of VFs that have been fully initialised.
752 * @vi_scale: log2 number of vnics per VF.
753 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
754 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
755 * @local_addr_list: List of local addresses. Protected by %local_lock.
756 * @local_page_list: List of DMA addressable pages used to broadcast
757 * %local_addr_list. Protected by %local_lock.
758 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
759 * @peer_work: Work item to broadcast peer addresses to VMs.
760 * @ptp_data: PTP state data
761 * @monitor_work: Hardware monitor workitem
762 * @biu_lock: BIU (bus interface unit) lock
763 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
764 * field is used by efx_test_interrupts() to verify that an
765 * interrupt has occurred.
766 * @stats_lock: Statistics update lock. Must be held when calling
767 * efx_nic_type::{update,start,stop}_stats.
769 * This is stored in the private area of the &struct net_device.
772 /* The following fields should be written very rarely */
775 struct pci_dev *pci_dev;
776 unsigned int port_num;
777 const struct efx_nic_type *type;
779 bool eeh_disabled_legacy_irq;
780 struct workqueue_struct *workqueue;
781 char workqueue_name[16];
782 struct work_struct reset_work;
783 resource_size_t membase_phys;
784 void __iomem *membase;
786 enum efx_int_mode interrupt_mode;
787 unsigned int timer_quantum_ns;
788 bool irq_rx_adaptive;
789 unsigned int irq_rx_moderation;
792 enum nic_state state;
793 unsigned long reset_pending;
795 struct efx_channel *channel[EFX_MAX_CHANNELS];
796 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
797 const struct efx_channel_type *
798 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
800 unsigned rxq_entries;
801 unsigned txq_entries;
802 unsigned int txq_stop_thresh;
803 unsigned int txq_wake_thresh;
807 unsigned sram_lim_qw;
808 unsigned next_buffer_table;
810 unsigned int max_channels;
812 unsigned n_rx_channels;
814 unsigned tx_channel_offset;
815 unsigned n_tx_channels;
816 unsigned int rx_dma_len;
817 unsigned int rx_buffer_order;
818 unsigned int rx_buffer_truesize;
819 unsigned int rx_page_buf_step;
820 unsigned int rx_bufs_per_page;
821 unsigned int rx_pages_per_batch;
822 unsigned int rx_prefix_size;
823 int rx_packet_hash_offset;
824 int rx_packet_len_offset;
826 u32 rx_indir_table[128];
829 unsigned int_error_count;
830 unsigned long int_error_expire;
832 bool irq_soft_enabled;
833 struct efx_buffer irq_status;
834 unsigned irq_zero_count;
836 struct delayed_work selftest_work;
838 #ifdef CONFIG_SFC_MTD
839 struct list_head mtd_list;
843 struct efx_mcdi_data *mcdi;
845 struct mutex mac_lock;
846 struct work_struct mac_work;
849 bool port_initialized;
850 struct net_device *net_dev;
852 struct efx_buffer stats_buffer;
854 unsigned int phy_type;
855 const struct efx_phy_operations *phy_op;
857 struct mdio_if_info mdio;
858 unsigned int mdio_bus;
859 enum efx_phy_mode phy_mode;
861 u32 link_advertising;
862 struct efx_link_state link_state;
863 unsigned int n_link_state_changes;
866 union efx_multicast_hash multicast_hash;
871 enum efx_loopback_mode loopback_mode;
874 void *loopback_selftest;
876 spinlock_t filter_lock;
878 #ifdef CONFIG_RFS_ACCEL
880 unsigned int rps_expire_index;
883 atomic_t active_queues;
884 atomic_t rxq_flush_pending;
885 atomic_t rxq_flush_outstanding;
886 wait_queue_head_t flush_wq;
888 #ifdef CONFIG_SFC_SRIOV
889 struct efx_channel *vfdi_channel;
892 unsigned vf_init_count;
894 unsigned vf_buftbl_base;
895 struct efx_buffer vfdi_status;
896 struct list_head local_addr_list;
897 struct list_head local_page_list;
898 struct mutex local_lock;
899 struct work_struct peer_work;
902 struct efx_ptp_data *ptp_data;
904 /* The following fields may be written more often */
906 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
909 spinlock_t stats_lock;
912 static inline int efx_dev_registered(struct efx_nic *efx)
914 return efx->net_dev->reg_state == NETREG_REGISTERED;
917 static inline unsigned int efx_port_num(struct efx_nic *efx)
919 return efx->port_num;
922 struct efx_mtd_partition {
923 struct list_head node;
925 const char *dev_type_name;
926 const char *type_name;
927 char name[IFNAMSIZ + 20];
931 * struct efx_nic_type - Efx device type definition
932 * @mem_map_size: Get memory BAR mapped size
933 * @probe: Probe the controller
934 * @remove: Free resources allocated by probe()
935 * @init: Initialise the controller
936 * @dimension_resources: Dimension controller resources (buffer table,
937 * and VIs once the available interrupt resources are clear)
938 * @fini: Shut down the controller
939 * @monitor: Periodic function for polling link state and hardware monitor
940 * @map_reset_reason: Map ethtool reset reason to a reset method
941 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
942 * @reset: Reset the controller hardware and possibly the PHY. This will
943 * be called while the controller is uninitialised.
944 * @probe_port: Probe the MAC and PHY
945 * @remove_port: Free resources allocated by probe_port()
946 * @handle_global_event: Handle a "global" event (may be %NULL)
947 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
948 * @prepare_flush: Prepare the hardware for flushing the DMA queues
949 * (for Falcon architecture)
950 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
952 * @describe_stats: Describe statistics for ethtool
953 * @update_stats: Update statistics not provided by event handling.
954 * Either argument may be %NULL.
955 * @start_stats: Start the regular fetching of statistics
956 * @stop_stats: Stop the regular fetching of statistics
957 * @set_id_led: Set state of identifying LED or revert to automatic function
958 * @push_irq_moderation: Apply interrupt moderation value
959 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
960 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
961 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
962 * to the hardware. Serialised by the mac_lock.
963 * @check_mac_fault: Check MAC fault state. True if fault present.
964 * @get_wol: Get WoL configuration from driver state
965 * @set_wol: Push WoL configuration to the NIC
966 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
967 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
968 * expected to reset the NIC.
969 * @test_nvram: Test validity of NVRAM contents
970 * @mcdi_request: Send an MCDI request with the given header and SDU.
971 * The SDU length may be any value from 0 up to the protocol-
972 * defined maximum, but its buffer will be padded to a multiple
974 * @mcdi_poll_response: Test whether an MCDI response is available.
975 * @mcdi_read_response: Read the MCDI response PDU. The offset will
976 * be a multiple of 4. The length may not be, but the buffer
977 * will be padded so it is safe to round up.
978 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
979 * return an appropriate error code for aborting any current
980 * request; otherwise return 0.
981 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
982 * be separately enabled after this.
983 * @irq_test_generate: Generate a test IRQ
984 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
985 * queue must be separately disabled before this.
986 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
987 * a pointer to the &struct efx_msi_context for the channel.
988 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
989 * is a pointer to the &struct efx_nic.
990 * @tx_probe: Allocate resources for TX queue
991 * @tx_init: Initialise TX queue on the NIC
992 * @tx_remove: Free resources for TX queue
993 * @tx_write: Write TX descriptors and doorbell
994 * @rx_push_indir_table: Write RSS indirection table to the NIC
995 * @rx_probe: Allocate resources for RX queue
996 * @rx_init: Initialise RX queue on the NIC
997 * @rx_remove: Free resources for RX queue
998 * @rx_write: Write RX descriptors and doorbell
999 * @rx_defer_refill: Generate a refill reminder event
1000 * @ev_probe: Allocate resources for event queue
1001 * @ev_init: Initialise event queue on the NIC
1002 * @ev_fini: Deinitialise event queue on the NIC
1003 * @ev_remove: Free resources for event queue
1004 * @ev_process: Process events for a queue, up to the given NAPI quota
1005 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
1006 * @ev_test_generate: Generate a test event
1007 * @filter_table_probe: Probe filter capabilities and set up filter software state
1008 * @filter_table_restore: Restore filters removed from hardware
1009 * @filter_table_remove: Remove filters from hardware and tear down software state
1010 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1011 * @filter_insert: add or replace a filter
1012 * @filter_remove_safe: remove a filter by ID, carefully
1013 * @filter_get_safe: retrieve a filter by ID, carefully
1014 * @filter_clear_rx: remove RX filters by priority
1015 * @filter_count_rx_used: Get the number of filters in use at a given priority
1016 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
1017 * @filter_get_rx_ids: Get list of RX filters at a given priority
1018 * @filter_rfs_insert: Add or replace a filter for RFS. This must be
1019 * atomic. The hardware change may be asynchronous but should
1020 * not be delayed for long. It may fail if this can't be done
1022 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
1023 * This must check whether the specified table entry is used by RFS
1024 * and that rps_may_expire_flow() returns true for it.
1025 * @mtd_probe: Probe and add MTD partitions associated with this net device,
1026 * using efx_mtd_add()
1027 * @mtd_rename: Set an MTD partition name using the net device name
1028 * @mtd_read: Read from an MTD partition
1029 * @mtd_erase: Erase part of an MTD partition
1030 * @mtd_write: Write to an MTD partition
1031 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1032 * also notifies the driver that a writer has finished using this
1034 * @revision: Hardware architecture revision
1035 * @txd_ptr_tbl_base: TX descriptor ring base address
1036 * @rxd_ptr_tbl_base: RX descriptor ring base address
1037 * @buf_tbl_base: Buffer table base address
1038 * @evq_ptr_tbl_base: Event queue pointer table base address
1039 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1040 * @max_dma_mask: Maximum possible DMA mask
1041 * @rx_prefix_size: Size of RX prefix before packet data
1042 * @rx_hash_offset: Offset of RX flow hash within prefix
1043 * @rx_buffer_padding: Size of padding at end of RX packet
1044 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1045 * @always_rx_scatter: NIC will always scatter packets to multiple buffers
1046 * @max_interrupt_mode: Highest capability interrupt mode supported
1047 * from &enum efx_init_mode.
1048 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1049 * @offload_features: net_device feature flags for protocol offload
1050 * features implemented in hardware
1051 * @mcdi_max_ver: Maximum MCDI version supported
1053 struct efx_nic_type {
1054 unsigned int (*mem_map_size)(struct efx_nic *efx);
1055 int (*probe)(struct efx_nic *efx);
1056 void (*remove)(struct efx_nic *efx);
1057 int (*init)(struct efx_nic *efx);
1058 int (*dimension_resources)(struct efx_nic *efx);
1059 void (*fini)(struct efx_nic *efx);
1060 void (*monitor)(struct efx_nic *efx);
1061 enum reset_type (*map_reset_reason)(enum reset_type reason);
1062 int (*map_reset_flags)(u32 *flags);
1063 int (*reset)(struct efx_nic *efx, enum reset_type method);
1064 int (*probe_port)(struct efx_nic *efx);
1065 void (*remove_port)(struct efx_nic *efx);
1066 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
1067 int (*fini_dmaq)(struct efx_nic *efx);
1068 void (*prepare_flush)(struct efx_nic *efx);
1069 void (*finish_flush)(struct efx_nic *efx);
1070 size_t (*describe_stats)(struct efx_nic *efx, u8 *names);
1071 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,
1072 struct rtnl_link_stats64 *core_stats);
1073 void (*start_stats)(struct efx_nic *efx);
1074 void (*stop_stats)(struct efx_nic *efx);
1075 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
1076 void (*push_irq_moderation)(struct efx_channel *channel);
1077 int (*reconfigure_port)(struct efx_nic *efx);
1078 void (*prepare_enable_fc_tx)(struct efx_nic *efx);
1079 int (*reconfigure_mac)(struct efx_nic *efx);
1080 bool (*check_mac_fault)(struct efx_nic *efx);
1081 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
1082 int (*set_wol)(struct efx_nic *efx, u32 type);
1083 void (*resume_wol)(struct efx_nic *efx);
1084 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
1085 int (*test_nvram)(struct efx_nic *efx);
1086 void (*mcdi_request)(struct efx_nic *efx,
1087 const efx_dword_t *hdr, size_t hdr_len,
1088 const efx_dword_t *sdu, size_t sdu_len);
1089 bool (*mcdi_poll_response)(struct efx_nic *efx);
1090 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu,
1091 size_t pdu_offset, size_t pdu_len);
1092 int (*mcdi_poll_reboot)(struct efx_nic *efx);
1093 void (*irq_enable_master)(struct efx_nic *efx);
1094 void (*irq_test_generate)(struct efx_nic *efx);
1095 void (*irq_disable_non_ev)(struct efx_nic *efx);
1096 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id);
1097 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id);
1098 int (*tx_probe)(struct efx_tx_queue *tx_queue);
1099 void (*tx_init)(struct efx_tx_queue *tx_queue);
1100 void (*tx_remove)(struct efx_tx_queue *tx_queue);
1101 void (*tx_write)(struct efx_tx_queue *tx_queue);
1102 void (*rx_push_indir_table)(struct efx_nic *efx);
1103 int (*rx_probe)(struct efx_rx_queue *rx_queue);
1104 void (*rx_init)(struct efx_rx_queue *rx_queue);
1105 void (*rx_remove)(struct efx_rx_queue *rx_queue);
1106 void (*rx_write)(struct efx_rx_queue *rx_queue);
1107 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue);
1108 int (*ev_probe)(struct efx_channel *channel);
1109 int (*ev_init)(struct efx_channel *channel);
1110 void (*ev_fini)(struct efx_channel *channel);
1111 void (*ev_remove)(struct efx_channel *channel);
1112 int (*ev_process)(struct efx_channel *channel, int quota);
1113 void (*ev_read_ack)(struct efx_channel *channel);
1114 void (*ev_test_generate)(struct efx_channel *channel);
1115 int (*filter_table_probe)(struct efx_nic *efx);
1116 void (*filter_table_restore)(struct efx_nic *efx);
1117 void (*filter_table_remove)(struct efx_nic *efx);
1118 void (*filter_update_rx_scatter)(struct efx_nic *efx);
1119 s32 (*filter_insert)(struct efx_nic *efx,
1120 struct efx_filter_spec *spec, bool replace);
1121 int (*filter_remove_safe)(struct efx_nic *efx,
1122 enum efx_filter_priority priority,
1124 int (*filter_get_safe)(struct efx_nic *efx,
1125 enum efx_filter_priority priority,
1126 u32 filter_id, struct efx_filter_spec *);
1127 void (*filter_clear_rx)(struct efx_nic *efx,
1128 enum efx_filter_priority priority);
1129 u32 (*filter_count_rx_used)(struct efx_nic *efx,
1130 enum efx_filter_priority priority);
1131 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx);
1132 s32 (*filter_get_rx_ids)(struct efx_nic *efx,
1133 enum efx_filter_priority priority,
1134 u32 *buf, u32 size);
1135 #ifdef CONFIG_RFS_ACCEL
1136 s32 (*filter_rfs_insert)(struct efx_nic *efx,
1137 struct efx_filter_spec *spec);
1138 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id,
1139 unsigned int index);
1141 #ifdef CONFIG_SFC_MTD
1142 int (*mtd_probe)(struct efx_nic *efx);
1143 void (*mtd_rename)(struct efx_mtd_partition *part);
1144 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len,
1145 size_t *retlen, u8 *buffer);
1146 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len);
1147 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len,
1148 size_t *retlen, const u8 *buffer);
1149 int (*mtd_sync)(struct mtd_info *mtd);
1151 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time);
1154 unsigned int txd_ptr_tbl_base;
1155 unsigned int rxd_ptr_tbl_base;
1156 unsigned int buf_tbl_base;
1157 unsigned int evq_ptr_tbl_base;
1158 unsigned int evq_rptr_tbl_base;
1160 unsigned int rx_prefix_size;
1161 unsigned int rx_hash_offset;
1162 unsigned int rx_buffer_padding;
1163 bool can_rx_scatter;
1164 bool always_rx_scatter;
1165 unsigned int max_interrupt_mode;
1166 unsigned int timer_period_max;
1167 netdev_features_t offload_features;
1169 unsigned int max_rx_ip_filters;
1172 /**************************************************************************
1174 * Prototypes and inline functions
1176 *************************************************************************/
1178 static inline struct efx_channel *
1179 efx_get_channel(struct efx_nic *efx, unsigned index)
1181 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
1182 return efx->channel[index];
1185 /* Iterate over all used channels */
1186 #define efx_for_each_channel(_channel, _efx) \
1187 for (_channel = (_efx)->channel[0]; \
1189 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1190 (_efx)->channel[_channel->channel + 1] : NULL)
1192 /* Iterate over all used channels in reverse */
1193 #define efx_for_each_channel_rev(_channel, _efx) \
1194 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1196 _channel = _channel->channel ? \
1197 (_efx)->channel[_channel->channel - 1] : NULL)
1199 static inline struct efx_tx_queue *
1200 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1202 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1203 type >= EFX_TXQ_TYPES);
1204 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1207 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1209 return channel->channel - channel->efx->tx_channel_offset <
1210 channel->efx->n_tx_channels;
1213 static inline struct efx_tx_queue *
1214 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1216 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1217 type >= EFX_TXQ_TYPES);
1218 return &channel->tx_queue[type];
1221 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1223 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1224 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1227 /* Iterate over all TX queues belonging to a channel */
1228 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1229 if (!efx_channel_has_tx_queues(_channel)) \
1232 for (_tx_queue = (_channel)->tx_queue; \
1233 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1234 efx_tx_queue_used(_tx_queue); \
1237 /* Iterate over all possible TX queues belonging to a channel */
1238 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1239 if (!efx_channel_has_tx_queues(_channel)) \
1242 for (_tx_queue = (_channel)->tx_queue; \
1243 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1246 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1248 return channel->rx_queue.core_index >= 0;
1251 static inline struct efx_rx_queue *
1252 efx_channel_get_rx_queue(struct efx_channel *channel)
1254 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1255 return &channel->rx_queue;
1258 /* Iterate over all RX queues belonging to a channel */
1259 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1260 if (!efx_channel_has_rx_queue(_channel)) \
1263 for (_rx_queue = &(_channel)->rx_queue; \
1267 static inline struct efx_channel *
1268 efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1270 return container_of(rx_queue, struct efx_channel, rx_queue);
1273 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1275 return efx_rx_queue_channel(rx_queue)->channel;
1278 /* Returns a pointer to the specified receive buffer in the RX
1281 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1284 return &rx_queue->buffer[index];
1289 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1291 * This calculates the maximum frame length that will be used for a
1292 * given MTU. The frame length will be equal to the MTU plus a
1293 * constant amount of header space and padding. This is the quantity
1294 * that the net driver will program into the MAC as the maximum frame
1297 * The 10G MAC requires 8-byte alignment on the frame
1298 * length, so we round up to the nearest 8.
1300 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1301 * XGMII cycle). If the frame length reaches the maximum value in the
1302 * same cycle, the XMAC can miss the IPG altogether. We work around
1303 * this by adding a further 16 bytes.
1305 #define EFX_MAX_FRAME_LEN(mtu) \
1306 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1308 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1310 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1312 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1314 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1317 #endif /* EFX_NET_DRIVER_H */