1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
34 /**************************************************************************
38 **************************************************************************/
40 #define EFX_DRIVER_VERSION "3.2"
43 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
44 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
46 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
47 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
50 /**************************************************************************
54 **************************************************************************/
56 #define EFX_MAX_CHANNELS 32U
57 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
58 #define EFX_EXTRA_CHANNEL_IOV 0
59 #define EFX_EXTRA_CHANNEL_PTP 1
60 #define EFX_MAX_EXTRA_CHANNELS 2U
62 /* Checksum generation is a per-queue option in hardware, so each
63 * queue visible to the networking core is backed by two hardware TX
65 #define EFX_MAX_TX_TC 2
66 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
67 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
68 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
69 #define EFX_TXQ_TYPES 4
70 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
72 /* Maximum possible MTU the driver supports */
73 #define EFX_MAX_MTU (9 * 1024)
75 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
76 * and should be a multiple of the cache line size.
78 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
80 /* If possible, we should ensure cache line alignment at start and end
81 * of every buffer. Otherwise, we just need to ensure 4-byte
82 * alignment of the network header.
85 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
87 #define EFX_RX_BUF_ALIGNMENT 4
90 /* Forward declare Precision Time Protocol (PTP) support structure. */
93 struct efx_self_tests;
96 * struct efx_buffer - A general-purpose DMA buffer
97 * @addr: host base address of the buffer
98 * @dma_addr: DMA base address of the buffer
99 * @len: Buffer length, in bytes
101 * The NIC uses these buffers for its interrupt status registers and
111 * struct efx_special_buffer - DMA buffer entered into buffer table
112 * @buf: Standard &struct efx_buffer
113 * @index: Buffer index within controller;s buffer table
114 * @entries: Number of buffer table entries
116 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
117 * Event and descriptor rings are addressed via one or more buffer
118 * table entries (and so can be physically non-contiguous, although we
119 * currently do not take advantage of that). On Falcon and Siena we
120 * have to take care of allocating and initialising the entries
121 * ourselves. On later hardware this is managed by the firmware and
122 * @index and @entries are left as 0.
124 struct efx_special_buffer {
125 struct efx_buffer buf;
127 unsigned int entries;
131 * struct efx_tx_buffer - buffer state for a TX descriptor
132 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
133 * freed when descriptor completes
134 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
135 * freed when descriptor completes.
136 * @dma_addr: DMA address of the fragment.
137 * @flags: Flags for allocation and DMA mapping type
138 * @len: Length of this fragment.
139 * This field is zero when the queue slot is empty.
140 * @unmap_len: Length of this fragment to unmap
142 struct efx_tx_buffer {
144 const struct sk_buff *skb;
148 unsigned short flags;
150 unsigned short unmap_len;
152 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
153 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
154 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
155 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
158 * struct efx_tx_queue - An Efx TX queue
160 * This is a ring buffer of TX fragments.
161 * Since the TX completion path always executes on the same
162 * CPU and the xmit path can operate on different CPUs,
163 * performance is increased by ensuring that the completion
164 * path and the xmit path operate on different cache lines.
165 * This is particularly important if the xmit path is always
166 * executing on one CPU which is different from the completion
167 * path. There is also a cache line for members which are
168 * read but not written on the fast path.
170 * @efx: The associated Efx NIC
171 * @queue: DMA queue number
172 * @channel: The associated channel
173 * @core_txq: The networking core TX queue structure
174 * @buffer: The software buffer ring
175 * @tsoh_page: Array of pages of TSO header buffers
176 * @txd: The hardware descriptor ring
177 * @ptr_mask: The size of the ring minus 1.
178 * @initialised: Has hardware queue been initialised?
179 * @read_count: Current read pointer.
180 * This is the number of buffers that have been removed from both rings.
181 * @old_write_count: The value of @write_count when last checked.
182 * This is here for performance reasons. The xmit path will
183 * only get the up-to-date value of @write_count if this
184 * variable indicates that the queue is empty. This is to
185 * avoid cache-line ping-pong between the xmit path and the
187 * @insert_count: Current insert pointer
188 * This is the number of buffers that have been added to the
190 * @write_count: Current write pointer
191 * This is the number of buffers that have been added to the
193 * @old_read_count: The value of read_count when last checked.
194 * This is here for performance reasons. The xmit path will
195 * only get the up-to-date value of read_count if this
196 * variable indicates that the queue is full. This is to
197 * avoid cache-line ping-pong between the xmit path and the
199 * @tso_bursts: Number of times TSO xmit invoked by kernel
200 * @tso_long_headers: Number of packets with headers too long for standard
202 * @tso_packets: Number of packets via the TSO xmit path
203 * @pushes: Number of times the TX push feature has been used
204 * @empty_read_count: If the completion path has seen the queue as empty
205 * and the transmission path has not yet checked this, the value of
206 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
208 struct efx_tx_queue {
209 /* Members which don't change on the fast path */
210 struct efx_nic *efx ____cacheline_aligned_in_smp;
212 struct efx_channel *channel;
213 struct netdev_queue *core_txq;
214 struct efx_tx_buffer *buffer;
215 struct efx_buffer *tsoh_page;
216 struct efx_special_buffer txd;
217 unsigned int ptr_mask;
220 /* Members used mainly on the completion path */
221 unsigned int read_count ____cacheline_aligned_in_smp;
222 unsigned int old_write_count;
224 /* Members used only on the xmit path */
225 unsigned int insert_count ____cacheline_aligned_in_smp;
226 unsigned int write_count;
227 unsigned int old_read_count;
228 unsigned int tso_bursts;
229 unsigned int tso_long_headers;
230 unsigned int tso_packets;
233 /* Members shared between paths and sometimes updated */
234 unsigned int empty_read_count ____cacheline_aligned_in_smp;
235 #define EFX_EMPTY_COUNT_VALID 0x80000000
236 atomic_t flush_outstanding;
240 * struct efx_rx_buffer - An Efx RX data buffer
241 * @dma_addr: DMA base address of the buffer
242 * @page: The associated page buffer.
243 * Will be %NULL if the buffer slot is currently free.
244 * @page_offset: If pending: offset in @page of DMA base address.
245 * If completed: offset in @page of Ethernet header.
246 * @len: If pending: length for DMA descriptor.
247 * If completed: received length, excluding hash prefix.
248 * @flags: Flags for buffer and packet state. These are only set on the
249 * first buffer of a scattered packet.
251 struct efx_rx_buffer {
258 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
259 #define EFX_RX_PKT_CSUMMED 0x0002
260 #define EFX_RX_PKT_DISCARD 0x0004
261 #define EFX_RX_PKT_TCP 0x0040
264 * struct efx_rx_page_state - Page-based rx buffer state
266 * Inserted at the start of every page allocated for receive buffers.
267 * Used to facilitate sharing dma mappings between recycled rx buffers
268 * and those passed up to the kernel.
270 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
271 * When refcnt falls to zero, the page is unmapped for dma
272 * @dma_addr: The dma address of this page.
274 struct efx_rx_page_state {
278 unsigned int __pad[0] ____cacheline_aligned;
282 * struct efx_rx_queue - An Efx RX queue
283 * @efx: The associated Efx NIC
284 * @core_index: Index of network core RX queue. Will be >= 0 iff this
285 * is associated with a real RX queue.
286 * @buffer: The software buffer ring
287 * @rxd: The hardware descriptor ring
288 * @ptr_mask: The size of the ring minus 1.
289 * @enabled: Receive queue enabled indicator.
290 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
291 * @rxq_flush_pending.
292 * @added_count: Number of buffers added to the receive queue.
293 * @notified_count: Number of buffers given to NIC (<= @added_count).
294 * @removed_count: Number of buffers removed from the receive queue.
295 * @scatter_n: Number of buffers used by current packet
296 * @page_ring: The ring to store DMA mapped pages for reuse.
297 * @page_add: Counter to calculate the write pointer for the recycle ring.
298 * @page_remove: Counter to calculate the read pointer for the recycle ring.
299 * @page_recycle_count: The number of pages that have been recycled.
300 * @page_recycle_failed: The number of pages that couldn't be recycled because
301 * the kernel still held a reference to them.
302 * @page_recycle_full: The number of pages that were released because the
303 * recycle ring was full.
304 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
305 * @max_fill: RX descriptor maximum fill level (<= ring size)
306 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
308 * @min_fill: RX descriptor minimum non-zero fill level.
309 * This records the minimum fill level observed when a ring
310 * refill was triggered.
311 * @recycle_count: RX buffer recycle counter.
312 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
314 struct efx_rx_queue {
317 struct efx_rx_buffer *buffer;
318 struct efx_special_buffer rxd;
319 unsigned int ptr_mask;
323 unsigned int added_count;
324 unsigned int notified_count;
325 unsigned int removed_count;
326 unsigned int scatter_n;
327 struct page **page_ring;
328 unsigned int page_add;
329 unsigned int page_remove;
330 unsigned int page_recycle_count;
331 unsigned int page_recycle_failed;
332 unsigned int page_recycle_full;
333 unsigned int page_ptr_mask;
334 unsigned int max_fill;
335 unsigned int fast_fill_trigger;
336 unsigned int min_fill;
337 unsigned int min_overfill;
338 unsigned int recycle_count;
339 struct timer_list slow_fill;
340 unsigned int slow_fill_count;
343 enum efx_rx_alloc_method {
344 RX_ALLOC_METHOD_AUTO = 0,
345 RX_ALLOC_METHOD_SKB = 1,
346 RX_ALLOC_METHOD_PAGE = 2,
350 * struct efx_channel - An Efx channel
352 * A channel comprises an event queue, at least one TX queue, at least
353 * one RX queue, and an associated tasklet for processing the event
356 * @efx: Associated Efx NIC
357 * @channel: Channel instance number
358 * @type: Channel type definition
359 * @enabled: Channel enabled indicator
360 * @irq: IRQ number (MSI and MSI-X only)
361 * @irq_moderation: IRQ moderation value (in hardware ticks)
362 * @napi_dev: Net device used with NAPI
363 * @napi_str: NAPI control structure
364 * @eventq: Event queue buffer
365 * @eventq_mask: Event queue pointer mask
366 * @eventq_read_ptr: Event queue read pointer
367 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
368 * @irq_count: Number of IRQs since last adaptive moderation decision
369 * @irq_mod_score: IRQ moderation score
370 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
371 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
372 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
373 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
374 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
375 * @n_rx_overlength: Count of RX_OVERLENGTH errors
376 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
377 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
378 * lack of descriptors
379 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
380 * __efx_rx_packet(), or zero if there is none
381 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
382 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
383 * @rx_queue: RX queue for this channel
384 * @tx_queue: TX queues for this channel
389 const struct efx_channel_type *type;
392 unsigned int irq_moderation;
393 struct net_device *napi_dev;
394 struct napi_struct napi_str;
395 struct efx_special_buffer eventq;
396 unsigned int eventq_mask;
397 unsigned int eventq_read_ptr;
400 unsigned int irq_count;
401 unsigned int irq_mod_score;
402 #ifdef CONFIG_RFS_ACCEL
403 unsigned int rfs_filters_added;
406 unsigned n_rx_tobe_disc;
407 unsigned n_rx_ip_hdr_chksum_err;
408 unsigned n_rx_tcp_udp_chksum_err;
409 unsigned n_rx_mcast_mismatch;
410 unsigned n_rx_frm_trunc;
411 unsigned n_rx_overlength;
412 unsigned n_skbuff_leaks;
413 unsigned int n_rx_nodesc_trunc;
415 unsigned int rx_pkt_n_frags;
416 unsigned int rx_pkt_index;
418 struct efx_rx_queue rx_queue;
419 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
423 * struct efx_channel_type - distinguishes traffic and extra channels
424 * @handle_no_channel: Handle failure to allocate an extra channel
425 * @pre_probe: Set up extra state prior to initialisation
426 * @post_remove: Tear down extra state after finalisation, if allocated.
427 * May be called on channels that have not been probed.
428 * @get_name: Generate the channel's name (used for its IRQ handler)
429 * @copy: Copy the channel state prior to reallocation. May be %NULL if
430 * reallocation is not supported.
431 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
432 * @keep_eventq: Flag for whether event queue should be kept initialised
433 * while the device is stopped
435 struct efx_channel_type {
436 void (*handle_no_channel)(struct efx_nic *);
437 int (*pre_probe)(struct efx_channel *);
438 void (*post_remove)(struct efx_channel *);
439 void (*get_name)(struct efx_channel *, char *buf, size_t len);
440 struct efx_channel *(*copy)(const struct efx_channel *);
441 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
451 #define STRING_TABLE_LOOKUP(val, member) \
452 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
454 extern const char *const efx_loopback_mode_names[];
455 extern const unsigned int efx_loopback_mode_max;
456 #define LOOPBACK_MODE(efx) \
457 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
459 extern const char *const efx_reset_type_names[];
460 extern const unsigned int efx_reset_type_max;
461 #define RESET_TYPE(type) \
462 STRING_TABLE_LOOKUP(type, efx_reset_type)
465 /* Be careful if altering to correct macro below */
466 EFX_INT_MODE_MSIX = 0,
467 EFX_INT_MODE_MSI = 1,
468 EFX_INT_MODE_LEGACY = 2,
469 EFX_INT_MODE_MAX /* Insert any new items before this */
471 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
474 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
475 STATE_READY = 1, /* hardware ready and netdev registered */
476 STATE_DISABLED = 2, /* device disabled due to hardware errors */
477 STATE_RECOVERY = 3, /* device recovering from PCI error */
481 * Alignment of the skb->head which wraps a page-allocated RX buffer
483 * The skb allocated to wrap an rx_buffer can have this alignment. Since
484 * the data is memcpy'd from the rx_buf, it does not need to be equal to
487 #define EFX_PAGE_SKB_ALIGN 2
489 /* Forward declaration */
492 /* Pseudo bit-mask flow control field */
493 #define EFX_FC_RX FLOW_CTRL_RX
494 #define EFX_FC_TX FLOW_CTRL_TX
495 #define EFX_FC_AUTO 4
498 * struct efx_link_state - Current state of the link
500 * @fd: Link is full-duplex
501 * @fc: Actual flow control flags
502 * @speed: Link speed (Mbps)
504 struct efx_link_state {
511 static inline bool efx_link_state_equal(const struct efx_link_state *left,
512 const struct efx_link_state *right)
514 return left->up == right->up && left->fd == right->fd &&
515 left->fc == right->fc && left->speed == right->speed;
519 * struct efx_phy_operations - Efx PHY operations table
520 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
521 * efx->loopback_modes.
522 * @init: Initialise PHY
523 * @fini: Shut down PHY
524 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
525 * @poll: Update @link_state and report whether it changed.
526 * Serialised by the mac_lock.
527 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
528 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
529 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
530 * (only needed where AN bit is set in mmds)
531 * @test_alive: Test that PHY is 'alive' (online)
532 * @test_name: Get the name of a PHY-specific test/result
533 * @run_tests: Run tests and record results as appropriate (offline).
534 * Flags are the ethtool tests flags.
536 struct efx_phy_operations {
537 int (*probe) (struct efx_nic *efx);
538 int (*init) (struct efx_nic *efx);
539 void (*fini) (struct efx_nic *efx);
540 void (*remove) (struct efx_nic *efx);
541 int (*reconfigure) (struct efx_nic *efx);
542 bool (*poll) (struct efx_nic *efx);
543 void (*get_settings) (struct efx_nic *efx,
544 struct ethtool_cmd *ecmd);
545 int (*set_settings) (struct efx_nic *efx,
546 struct ethtool_cmd *ecmd);
547 void (*set_npage_adv) (struct efx_nic *efx, u32);
548 int (*test_alive) (struct efx_nic *efx);
549 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
550 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
551 int (*get_module_eeprom) (struct efx_nic *efx,
552 struct ethtool_eeprom *ee,
554 int (*get_module_info) (struct efx_nic *efx,
555 struct ethtool_modinfo *modinfo);
559 * enum efx_phy_mode - PHY operating mode flags
560 * @PHY_MODE_NORMAL: on and should pass traffic
561 * @PHY_MODE_TX_DISABLED: on with TX disabled
562 * @PHY_MODE_LOW_POWER: set to low power through MDIO
563 * @PHY_MODE_OFF: switched off through external control
564 * @PHY_MODE_SPECIAL: on but will not pass traffic
568 PHY_MODE_TX_DISABLED = 1,
569 PHY_MODE_LOW_POWER = 2,
571 PHY_MODE_SPECIAL = 8,
574 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
576 return !!(mode & ~PHY_MODE_TX_DISABLED);
580 * Efx extended statistics
582 * Not all statistics are provided by all supported MACs. The purpose
583 * is this structure is to contain the raw statistics provided by each
586 struct efx_mac_stats {
604 u64 tx_15xx_to_jumbo;
607 u64 tx_single_collision;
608 u64 tx_multiple_collision;
609 u64 tx_excessive_collision;
611 u64 tx_late_collision;
612 u64 tx_excessive_deferred;
614 u64 tx_mac_src_error;
634 u64 rx_15xx_to_jumbo;
637 u64 rx_bad_64_to_15xx;
638 u64 rx_bad_15xx_to_jumbo;
642 u64 rx_false_carrier;
646 u64 rx_internal_error;
650 /* Number of bits used in a multicast filter hash address */
651 #define EFX_MCAST_HASH_BITS 8
653 /* Number of (single-bit) entries in a multicast filter hash */
654 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
656 /* An Efx multicast filter hash */
657 union efx_multicast_hash {
658 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
659 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
662 struct efx_filter_state;
667 * struct efx_nic - an Efx NIC
668 * @name: Device name (net device name or bus id before net device registered)
669 * @pci_dev: The PCI device
670 * @type: Controller type attributes
671 * @legacy_irq: IRQ number
672 * @legacy_irq_enabled: Are IRQs enabled on NIC (INT_EN_KER register)?
673 * @workqueue: Workqueue for port reconfigures and the HW monitor.
674 * Work items do not hold and must not acquire RTNL.
675 * @workqueue_name: Name of workqueue
676 * @reset_work: Scheduled reset workitem
677 * @membase_phys: Memory BAR value as physical address
678 * @membase: Memory BAR value
679 * @interrupt_mode: Interrupt mode
680 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
681 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
682 * @irq_rx_moderation: IRQ moderation time for RX event queues
683 * @msg_enable: Log message enable flags
684 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
685 * @reset_pending: Bitmask for pending resets
686 * @tx_queue: TX DMA queues
687 * @rx_queue: RX DMA queues
689 * @channel_name: Names for channels and their IRQs
690 * @extra_channel_types: Types of extra (non-traffic) channels that
691 * should be allocated for this NIC
692 * @rxq_entries: Size of receive queues requested by user.
693 * @txq_entries: Size of transmit queues requested by user.
694 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
695 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
696 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
697 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
698 * @sram_lim_qw: Qword address limit of SRAM
699 * @next_buffer_table: First available buffer table id
700 * @n_channels: Number of channels in use
701 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
702 * @n_tx_channels: Number of channels used for TX
703 * @rx_dma_len: Current maximum RX DMA length
704 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
705 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
706 * for use in sk_buff::truesize
707 * @rx_hash_key: Toeplitz hash key for RSS
708 * @rx_indir_table: Indirection table for RSS
709 * @rx_scatter: Scatter mode enabled for receives
710 * @int_error_count: Number of internal errors seen recently
711 * @int_error_expire: Time at which error count will be expired
712 * @irq_status: Interrupt status buffer
713 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
714 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
715 * @selftest_work: Work item for asynchronous self-test
716 * @mtd_list: List of MTDs attached to the NIC
717 * @nic_data: Hardware dependent state
718 * @mcdi: Management-Controller-to-Driver Interface state
719 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
720 * efx_monitor() and efx_reconfigure_port()
721 * @port_enabled: Port enabled indicator.
722 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
723 * efx_mac_work() with kernel interfaces. Safe to read under any
724 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
725 * be held to modify it.
726 * @port_initialized: Port initialized?
727 * @net_dev: Operating system network device. Consider holding the rtnl lock
728 * @stats_buffer: DMA buffer for statistics
729 * @phy_type: PHY type
730 * @phy_op: PHY interface
731 * @phy_data: PHY private data (including PHY-specific stats)
732 * @mdio: PHY MDIO interface
733 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
734 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
735 * @link_advertising: Autonegotiation advertising flags
736 * @link_state: Current state of the link
737 * @n_link_state_changes: Number of times the link has changed state
738 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
739 * @multicast_hash: Multicast hash table
740 * @wanted_fc: Wanted flow control flags
741 * @fc_disable: When non-zero flow control is disabled. Typically used to
742 * ensure that network back pressure doesn't delay dma queue flushes.
743 * Serialised by the rtnl lock.
744 * @mac_work: Work item for changing MAC promiscuity and multicast hash
745 * @loopback_mode: Loopback status
746 * @loopback_modes: Supported loopback mode bitmask
747 * @loopback_selftest: Offline self-test private state
748 * @drain_pending: Count of RX and TX queues that haven't been flushed and drained.
749 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
750 * Decremented when the efx_flush_rx_queue() is called.
751 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
752 * completed (either success or failure). Not used when MCDI is used to
753 * flush receive queues.
754 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
755 * @vf: Array of &struct efx_vf objects.
756 * @vf_count: Number of VFs intended to be enabled.
757 * @vf_init_count: Number of VFs that have been fully initialised.
758 * @vi_scale: log2 number of vnics per VF.
759 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
760 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
761 * @local_addr_list: List of local addresses. Protected by %local_lock.
762 * @local_page_list: List of DMA addressable pages used to broadcast
763 * %local_addr_list. Protected by %local_lock.
764 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
765 * @peer_work: Work item to broadcast peer addresses to VMs.
766 * @ptp_data: PTP state data
767 * @monitor_work: Hardware monitor workitem
768 * @biu_lock: BIU (bus interface unit) lock
769 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
770 * field is used by efx_test_interrupts() to verify that an
771 * interrupt has occurred.
772 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
773 * @mac_stats: MAC statistics. These include all statistics the MACs
774 * can provide. Generic code converts these into a standard
775 * &struct net_device_stats.
776 * @stats_lock: Statistics update lock. Serialises statistics fetches
777 * and access to @mac_stats.
779 * This is stored in the private area of the &struct net_device.
782 /* The following fields should be written very rarely */
785 struct pci_dev *pci_dev;
786 unsigned int port_num;
787 const struct efx_nic_type *type;
789 bool legacy_irq_enabled;
790 bool eeh_disabled_legacy_irq;
791 struct workqueue_struct *workqueue;
792 char workqueue_name[16];
793 struct work_struct reset_work;
794 resource_size_t membase_phys;
795 void __iomem *membase;
797 enum efx_int_mode interrupt_mode;
798 unsigned int timer_quantum_ns;
799 bool irq_rx_adaptive;
800 unsigned int irq_rx_moderation;
803 enum nic_state state;
804 unsigned long reset_pending;
806 struct efx_channel *channel[EFX_MAX_CHANNELS];
807 char channel_name[EFX_MAX_CHANNELS][IFNAMSIZ + 6];
808 const struct efx_channel_type *
809 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
811 unsigned rxq_entries;
812 unsigned txq_entries;
813 unsigned int txq_stop_thresh;
814 unsigned int txq_wake_thresh;
818 unsigned sram_lim_qw;
819 unsigned next_buffer_table;
821 unsigned n_rx_channels;
823 unsigned tx_channel_offset;
824 unsigned n_tx_channels;
825 unsigned int rx_dma_len;
826 unsigned int rx_buffer_order;
827 unsigned int rx_buffer_truesize;
828 unsigned int rx_page_buf_step;
829 unsigned int rx_bufs_per_page;
830 unsigned int rx_pages_per_batch;
832 u32 rx_indir_table[128];
835 unsigned int_error_count;
836 unsigned long int_error_expire;
838 struct efx_buffer irq_status;
839 unsigned irq_zero_count;
841 struct delayed_work selftest_work;
843 #ifdef CONFIG_SFC_MTD
844 struct list_head mtd_list;
848 struct efx_mcdi_data *mcdi;
850 struct mutex mac_lock;
851 struct work_struct mac_work;
854 bool port_initialized;
855 struct net_device *net_dev;
857 struct efx_buffer stats_buffer;
859 unsigned int phy_type;
860 const struct efx_phy_operations *phy_op;
862 struct mdio_if_info mdio;
863 unsigned int mdio_bus;
864 enum efx_phy_mode phy_mode;
866 u32 link_advertising;
867 struct efx_link_state link_state;
868 unsigned int n_link_state_changes;
871 union efx_multicast_hash multicast_hash;
876 enum efx_loopback_mode loopback_mode;
879 void *loopback_selftest;
881 struct efx_filter_state *filter_state;
883 atomic_t drain_pending;
884 atomic_t rxq_flush_pending;
885 atomic_t rxq_flush_outstanding;
886 wait_queue_head_t flush_wq;
888 #ifdef CONFIG_SFC_SRIOV
889 struct efx_channel *vfdi_channel;
892 unsigned vf_init_count;
894 unsigned vf_buftbl_base;
895 struct efx_buffer vfdi_status;
896 struct list_head local_addr_list;
897 struct list_head local_page_list;
898 struct mutex local_lock;
899 struct work_struct peer_work;
902 struct efx_ptp_data *ptp_data;
904 /* The following fields may be written more often */
906 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
909 unsigned n_rx_nodesc_drop_cnt;
910 struct efx_mac_stats mac_stats;
911 spinlock_t stats_lock;
914 static inline int efx_dev_registered(struct efx_nic *efx)
916 return efx->net_dev->reg_state == NETREG_REGISTERED;
919 static inline unsigned int efx_port_num(struct efx_nic *efx)
921 return efx->port_num;
925 * struct efx_nic_type - Efx device type definition
926 * @probe: Probe the controller
927 * @remove: Free resources allocated by probe()
928 * @init: Initialise the controller
929 * @dimension_resources: Dimension controller resources (buffer table,
930 * and VIs once the available interrupt resources are clear)
931 * @fini: Shut down the controller
932 * @monitor: Periodic function for polling link state and hardware monitor
933 * @map_reset_reason: Map ethtool reset reason to a reset method
934 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
935 * @reset: Reset the controller hardware and possibly the PHY. This will
936 * be called while the controller is uninitialised.
937 * @probe_port: Probe the MAC and PHY
938 * @remove_port: Free resources allocated by probe_port()
939 * @handle_global_event: Handle a "global" event (may be %NULL)
940 * @prepare_flush: Prepare the hardware for flushing the DMA queues
941 * @finish_flush: Clean up after flushing the DMA queues
942 * @update_stats: Update statistics not provided by event handling
943 * @start_stats: Start the regular fetching of statistics
944 * @stop_stats: Stop the regular fetching of statistics
945 * @set_id_led: Set state of identifying LED or revert to automatic function
946 * @push_irq_moderation: Apply interrupt moderation value
947 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
948 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
949 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
950 * to the hardware. Serialised by the mac_lock.
951 * @check_mac_fault: Check MAC fault state. True if fault present.
952 * @get_wol: Get WoL configuration from driver state
953 * @set_wol: Push WoL configuration to the NIC
954 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
955 * @test_chip: Test registers. Should use efx_nic_test_registers(), and is
956 * expected to reset the NIC.
957 * @test_nvram: Test validity of NVRAM contents
958 * @mcdi_request: Send an MCDI request with the given header and SDU.
959 * The SDU length may be any value from 0 up to the protocol-
960 * defined maximum, but its buffer will be padded to a multiple
962 * @mcdi_poll_response: Test whether an MCDI response is available.
963 * @mcdi_read_response: Read the MCDI response PDU. The offset will
964 * be a multiple of 4. The length may not be, but the buffer
965 * will be padded so it is safe to round up.
966 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
967 * return an appropriate error code for aborting any current
968 * request; otherwise return 0.
969 * @revision: Hardware architecture revision
970 * @mem_map_size: Memory BAR mapped size
971 * @txd_ptr_tbl_base: TX descriptor ring base address
972 * @rxd_ptr_tbl_base: RX descriptor ring base address
973 * @buf_tbl_base: Buffer table base address
974 * @evq_ptr_tbl_base: Event queue pointer table base address
975 * @evq_rptr_tbl_base: Event queue read-pointer table base address
976 * @max_dma_mask: Maximum possible DMA mask
977 * @rx_buffer_hash_size: Size of hash at start of RX packet
978 * @rx_buffer_padding: Size of padding at end of RX packet
979 * @can_rx_scatter: NIC is able to scatter packet to multiple buffers
980 * @max_interrupt_mode: Highest capability interrupt mode supported
981 * from &enum efx_init_mode.
982 * @phys_addr_channels: Number of channels with physically addressed
984 * @timer_period_max: Maximum period of interrupt timer (in ticks)
985 * @offload_features: net_device feature flags for protocol offload
986 * features implemented in hardware
988 struct efx_nic_type {
989 int (*probe)(struct efx_nic *efx);
990 void (*remove)(struct efx_nic *efx);
991 int (*init)(struct efx_nic *efx);
992 void (*dimension_resources)(struct efx_nic *efx);
993 void (*fini)(struct efx_nic *efx);
994 void (*monitor)(struct efx_nic *efx);
995 enum reset_type (*map_reset_reason)(enum reset_type reason);
996 int (*map_reset_flags)(u32 *flags);
997 int (*reset)(struct efx_nic *efx, enum reset_type method);
998 int (*probe_port)(struct efx_nic *efx);
999 void (*remove_port)(struct efx_nic *efx);
1000 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
1001 void (*prepare_flush)(struct efx_nic *efx);
1002 void (*finish_flush)(struct efx_nic *efx);
1003 void (*update_stats)(struct efx_nic *efx);
1004 void (*start_stats)(struct efx_nic *efx);
1005 void (*stop_stats)(struct efx_nic *efx);
1006 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
1007 void (*push_irq_moderation)(struct efx_channel *channel);
1008 int (*reconfigure_port)(struct efx_nic *efx);
1009 void (*prepare_enable_fc_tx)(struct efx_nic *efx);
1010 int (*reconfigure_mac)(struct efx_nic *efx);
1011 bool (*check_mac_fault)(struct efx_nic *efx);
1012 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
1013 int (*set_wol)(struct efx_nic *efx, u32 type);
1014 void (*resume_wol)(struct efx_nic *efx);
1015 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
1016 int (*test_nvram)(struct efx_nic *efx);
1017 void (*mcdi_request)(struct efx_nic *efx,
1018 const efx_dword_t *hdr, size_t hdr_len,
1019 const efx_dword_t *sdu, size_t sdu_len);
1020 bool (*mcdi_poll_response)(struct efx_nic *efx);
1021 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu,
1022 size_t pdu_offset, size_t pdu_len);
1023 int (*mcdi_poll_reboot)(struct efx_nic *efx);
1026 unsigned int mem_map_size;
1027 unsigned int txd_ptr_tbl_base;
1028 unsigned int rxd_ptr_tbl_base;
1029 unsigned int buf_tbl_base;
1030 unsigned int evq_ptr_tbl_base;
1031 unsigned int evq_rptr_tbl_base;
1033 unsigned int rx_buffer_hash_size;
1034 unsigned int rx_buffer_padding;
1035 bool can_rx_scatter;
1036 unsigned int max_interrupt_mode;
1037 unsigned int phys_addr_channels;
1038 unsigned int timer_period_max;
1039 netdev_features_t offload_features;
1042 /**************************************************************************
1044 * Prototypes and inline functions
1046 *************************************************************************/
1048 static inline struct efx_channel *
1049 efx_get_channel(struct efx_nic *efx, unsigned index)
1051 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
1052 return efx->channel[index];
1055 /* Iterate over all used channels */
1056 #define efx_for_each_channel(_channel, _efx) \
1057 for (_channel = (_efx)->channel[0]; \
1059 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1060 (_efx)->channel[_channel->channel + 1] : NULL)
1062 /* Iterate over all used channels in reverse */
1063 #define efx_for_each_channel_rev(_channel, _efx) \
1064 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1066 _channel = _channel->channel ? \
1067 (_efx)->channel[_channel->channel - 1] : NULL)
1069 static inline struct efx_tx_queue *
1070 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1072 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1073 type >= EFX_TXQ_TYPES);
1074 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1077 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1079 return channel->channel - channel->efx->tx_channel_offset <
1080 channel->efx->n_tx_channels;
1083 static inline struct efx_tx_queue *
1084 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1086 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1087 type >= EFX_TXQ_TYPES);
1088 return &channel->tx_queue[type];
1091 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1093 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1094 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1097 /* Iterate over all TX queues belonging to a channel */
1098 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1099 if (!efx_channel_has_tx_queues(_channel)) \
1102 for (_tx_queue = (_channel)->tx_queue; \
1103 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1104 efx_tx_queue_used(_tx_queue); \
1107 /* Iterate over all possible TX queues belonging to a channel */
1108 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1109 if (!efx_channel_has_tx_queues(_channel)) \
1112 for (_tx_queue = (_channel)->tx_queue; \
1113 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1116 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1118 return channel->rx_queue.core_index >= 0;
1121 static inline struct efx_rx_queue *
1122 efx_channel_get_rx_queue(struct efx_channel *channel)
1124 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1125 return &channel->rx_queue;
1128 /* Iterate over all RX queues belonging to a channel */
1129 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1130 if (!efx_channel_has_rx_queue(_channel)) \
1133 for (_rx_queue = &(_channel)->rx_queue; \
1137 static inline struct efx_channel *
1138 efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1140 return container_of(rx_queue, struct efx_channel, rx_queue);
1143 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1145 return efx_rx_queue_channel(rx_queue)->channel;
1148 /* Returns a pointer to the specified receive buffer in the RX
1151 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1154 return &rx_queue->buffer[index];
1159 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1161 * This calculates the maximum frame length that will be used for a
1162 * given MTU. The frame length will be equal to the MTU plus a
1163 * constant amount of header space and padding. This is the quantity
1164 * that the net driver will program into the MAC as the maximum frame
1167 * The 10G MAC requires 8-byte alignment on the frame
1168 * length, so we round up to the nearest 8.
1170 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1171 * XGMII cycle). If the frame length reaches the maximum value in the
1172 * same cycle, the XMAC can miss the IPG altogether. We work around
1173 * this by adding a further 16 bytes.
1175 #define EFX_MAX_FRAME_LEN(mtu) \
1176 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1178 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1180 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1182 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1184 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1187 #endif /* EFX_NET_DRIVER_H */