1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/socket.h>
13 #include <linux/slab.h>
15 #include <linux/tcp.h>
16 #include <linux/udp.h>
17 #include <linux/prefetch.h>
18 #include <linux/moduleparam.h>
20 #include <net/checksum.h>
21 #include "net_driver.h"
25 #include "workarounds.h"
27 /* Number of RX descriptors pushed at once. */
28 #define EFX_RX_BATCH 8
30 /* Maximum size of a buffer sharing a page */
31 #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
33 /* Size of buffer allocated for skb header area. */
34 #define EFX_SKB_HEADERS 64u
37 * rx_alloc_method - RX buffer allocation method
39 * This driver supports two methods for allocating and using RX buffers:
40 * each RX buffer may be backed by an skb or by an order-n page.
42 * When GRO is in use then the second method has a lower overhead,
43 * since we don't have to allocate then free skbs on reassembled frames.
46 * - RX_ALLOC_METHOD_AUTO = 0
47 * - RX_ALLOC_METHOD_SKB = 1
48 * - RX_ALLOC_METHOD_PAGE = 2
50 * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count
51 * controlled by the parameters below.
53 * - Since pushing and popping descriptors are separated by the rx_queue
54 * size, so the watermarks should be ~rxd_size.
55 * - The performance win by using page-based allocation for GRO is less
56 * than the performance hit of using page-based allocation of non-GRO,
57 * so the watermarks should reflect this.
59 * Per channel we maintain a single variable, updated by each channel:
61 * rx_alloc_level += (gro_performed ? RX_ALLOC_FACTOR_GRO :
62 * RX_ALLOC_FACTOR_SKB)
63 * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which
64 * limits the hysteresis), and update the allocation strategy:
66 * rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_GRO ?
67 * RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
69 static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
71 #define RX_ALLOC_LEVEL_GRO 0x2000
72 #define RX_ALLOC_LEVEL_MAX 0x3000
73 #define RX_ALLOC_FACTOR_GRO 1
74 #define RX_ALLOC_FACTOR_SKB (-2)
76 /* This is the percentage fill level below which new RX descriptors
77 * will be added to the RX descriptor ring.
79 static unsigned int rx_refill_threshold = 90;
81 /* This is the percentage fill level to which an RX queue will be refilled
82 * when the "RX refill threshold" is reached.
84 static unsigned int rx_refill_limit = 95;
87 * RX maximum head room required.
89 * This must be at least 1 to prevent overflow and at least 2 to allow
92 #define EFX_RXD_HEAD_ROOM 2
94 /* Offset of ethernet header within page */
95 static inline unsigned int efx_rx_buf_offset(struct efx_nic *efx,
96 struct efx_rx_buffer *buf)
98 /* Offset is always within one page, so we don't need to consider
101 return ((unsigned int) buf->dma_addr & (PAGE_SIZE - 1)) +
102 efx->type->rx_buffer_hash_size;
104 static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
106 return PAGE_SIZE << efx->rx_buffer_order;
109 static u8 *efx_rx_buf_eh(struct efx_nic *efx, struct efx_rx_buffer *buf)
111 if (buf->flags & EFX_RX_BUF_PAGE)
112 return page_address(buf->u.page) + efx_rx_buf_offset(efx, buf);
114 return (u8 *)buf->u.skb->data + efx->type->rx_buffer_hash_size;
117 static inline u32 efx_rx_buf_hash(const u8 *eh)
119 /* The ethernet header is always directly after any hash. */
120 #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || NET_IP_ALIGN % 4 == 0
121 return __le32_to_cpup((const __le32 *)(eh - 4));
123 const u8 *data = eh - 4;
124 return (u32)data[0] |
132 * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers
134 * @rx_queue: Efx RX queue
136 * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a
137 * struct efx_rx_buffer for each one. Return a negative error code or 0
138 * on success. May fail having only inserted fewer than EFX_RX_BATCH
141 static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
143 struct efx_nic *efx = rx_queue->efx;
144 struct net_device *net_dev = efx->net_dev;
145 struct efx_rx_buffer *rx_buf;
147 int skb_len = efx->rx_buffer_len;
148 unsigned index, count;
150 for (count = 0; count < EFX_RX_BATCH; ++count) {
151 index = rx_queue->added_count & rx_queue->ptr_mask;
152 rx_buf = efx_rx_buffer(rx_queue, index);
154 rx_buf->u.skb = skb = netdev_alloc_skb(net_dev, skb_len);
158 /* Adjust the SKB for padding and checksum */
159 skb_reserve(skb, NET_IP_ALIGN);
160 rx_buf->len = skb_len - NET_IP_ALIGN;
162 skb->ip_summed = CHECKSUM_UNNECESSARY;
164 rx_buf->dma_addr = pci_map_single(efx->pci_dev,
165 skb->data, rx_buf->len,
167 if (unlikely(pci_dma_mapping_error(efx->pci_dev,
168 rx_buf->dma_addr))) {
169 dev_kfree_skb_any(skb);
170 rx_buf->u.skb = NULL;
174 ++rx_queue->added_count;
175 ++rx_queue->alloc_skb_count;
182 * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers
184 * @rx_queue: Efx RX queue
186 * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA,
187 * and populates struct efx_rx_buffers for each one. Return a negative error
188 * code or 0 on success. If a single page can be split between two buffers,
189 * then the page will either be inserted fully, or not at at all.
191 static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
193 struct efx_nic *efx = rx_queue->efx;
194 struct efx_rx_buffer *rx_buf;
197 struct efx_rx_page_state *state;
199 unsigned index, count;
201 /* We can split a page between two buffers */
202 BUILD_BUG_ON(EFX_RX_BATCH & 1);
204 for (count = 0; count < EFX_RX_BATCH; ++count) {
205 page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC,
206 efx->rx_buffer_order);
207 if (unlikely(page == NULL))
209 dma_addr = pci_map_page(efx->pci_dev, page, 0,
210 efx_rx_buf_size(efx),
212 if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) {
213 __free_pages(page, efx->rx_buffer_order);
216 page_addr = page_address(page);
219 state->dma_addr = dma_addr;
221 page_addr += sizeof(struct efx_rx_page_state);
222 dma_addr += sizeof(struct efx_rx_page_state);
225 index = rx_queue->added_count & rx_queue->ptr_mask;
226 rx_buf = efx_rx_buffer(rx_queue, index);
227 rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
228 rx_buf->u.page = page;
229 rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
230 rx_buf->flags = EFX_RX_BUF_PAGE;
231 ++rx_queue->added_count;
232 ++rx_queue->alloc_page_count;
235 if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
236 /* Use the second half of the page */
238 dma_addr += (PAGE_SIZE >> 1);
239 page_addr += (PAGE_SIZE >> 1);
248 static void efx_unmap_rx_buffer(struct efx_nic *efx,
249 struct efx_rx_buffer *rx_buf)
251 if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
252 struct efx_rx_page_state *state;
254 state = page_address(rx_buf->u.page);
255 if (--state->refcnt == 0) {
256 pci_unmap_page(efx->pci_dev,
258 efx_rx_buf_size(efx),
261 } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
262 pci_unmap_single(efx->pci_dev, rx_buf->dma_addr,
263 rx_buf->len, PCI_DMA_FROMDEVICE);
267 static void efx_free_rx_buffer(struct efx_nic *efx,
268 struct efx_rx_buffer *rx_buf)
270 if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
271 __free_pages(rx_buf->u.page, efx->rx_buffer_order);
272 rx_buf->u.page = NULL;
273 } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
274 dev_kfree_skb_any(rx_buf->u.skb);
275 rx_buf->u.skb = NULL;
279 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
280 struct efx_rx_buffer *rx_buf)
282 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
283 efx_free_rx_buffer(rx_queue->efx, rx_buf);
286 /* Attempt to resurrect the other receive buffer that used to share this page,
287 * which had previously been passed up to the kernel and freed. */
288 static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
289 struct efx_rx_buffer *rx_buf)
291 struct efx_rx_page_state *state = page_address(rx_buf->u.page);
292 struct efx_rx_buffer *new_buf;
293 unsigned fill_level, index;
295 /* +1 because efx_rx_packet() incremented removed_count. +1 because
296 * we'd like to insert an additional descriptor whilst leaving
297 * EFX_RXD_HEAD_ROOM for the non-recycle path */
298 fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
299 if (unlikely(fill_level > rx_queue->max_fill)) {
300 /* We could place "state" on a list, and drain the list in
301 * efx_fast_push_rx_descriptors(). For now, this will do. */
306 get_page(rx_buf->u.page);
308 index = rx_queue->added_count & rx_queue->ptr_mask;
309 new_buf = efx_rx_buffer(rx_queue, index);
310 new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1);
311 new_buf->u.page = rx_buf->u.page;
312 new_buf->len = rx_buf->len;
313 new_buf->flags = EFX_RX_BUF_PAGE;
314 ++rx_queue->added_count;
317 /* Recycle the given rx buffer directly back into the rx_queue. There is
318 * always room to add this buffer, because we've just popped a buffer. */
319 static void efx_recycle_rx_buffer(struct efx_channel *channel,
320 struct efx_rx_buffer *rx_buf)
322 struct efx_nic *efx = channel->efx;
323 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
324 struct efx_rx_buffer *new_buf;
327 rx_buf->flags &= EFX_RX_BUF_PAGE;
329 if ((rx_buf->flags & EFX_RX_BUF_PAGE) &&
330 efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
331 page_count(rx_buf->u.page) == 1)
332 efx_resurrect_rx_buffer(rx_queue, rx_buf);
334 index = rx_queue->added_count & rx_queue->ptr_mask;
335 new_buf = efx_rx_buffer(rx_queue, index);
337 memcpy(new_buf, rx_buf, sizeof(*new_buf));
338 rx_buf->u.page = NULL;
339 ++rx_queue->added_count;
343 * efx_fast_push_rx_descriptors - push new RX descriptors quickly
344 * @rx_queue: RX descriptor queue
345 * This will aim to fill the RX descriptor queue up to
346 * @rx_queue->@fast_fill_limit. If there is insufficient atomic
347 * memory to do so, a slow fill will be scheduled.
349 * The caller must provide serialisation (none is used here). In practise,
350 * this means this function must run from the NAPI handler, or be called
351 * when NAPI is disabled.
353 void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
355 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
359 /* Calculate current fill level, and exit if we don't need to fill */
360 fill_level = (rx_queue->added_count - rx_queue->removed_count);
361 EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
362 if (fill_level >= rx_queue->fast_fill_trigger)
365 /* Record minimum fill level */
366 if (unlikely(fill_level < rx_queue->min_fill)) {
368 rx_queue->min_fill = fill_level;
371 space = rx_queue->fast_fill_limit - fill_level;
372 if (space < EFX_RX_BATCH)
375 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
376 "RX queue %d fast-filling descriptor ring from"
377 " level %d to level %d using %s allocation\n",
378 efx_rx_queue_index(rx_queue), fill_level,
379 rx_queue->fast_fill_limit,
380 channel->rx_alloc_push_pages ? "page" : "skb");
383 if (channel->rx_alloc_push_pages)
384 rc = efx_init_rx_buffers_page(rx_queue);
386 rc = efx_init_rx_buffers_skb(rx_queue);
388 /* Ensure that we don't leave the rx queue empty */
389 if (rx_queue->added_count == rx_queue->removed_count)
390 efx_schedule_slow_fill(rx_queue);
393 } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH);
395 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
396 "RX queue %d fast-filled descriptor ring "
397 "to level %d\n", efx_rx_queue_index(rx_queue),
398 rx_queue->added_count - rx_queue->removed_count);
401 if (rx_queue->notified_count != rx_queue->added_count)
402 efx_nic_notify_rx_desc(rx_queue);
405 void efx_rx_slow_fill(unsigned long context)
407 struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
408 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
410 /* Post an event to cause NAPI to run and refill the queue */
411 efx_nic_generate_fill_event(channel);
412 ++rx_queue->slow_fill_count;
415 static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
416 struct efx_rx_buffer *rx_buf,
417 int len, bool *leak_packet)
419 struct efx_nic *efx = rx_queue->efx;
420 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
422 if (likely(len <= max_len))
425 /* The packet must be discarded, but this is only a fatal error
426 * if the caller indicated it was
428 rx_buf->flags |= EFX_RX_PKT_DISCARD;
430 if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
432 netif_err(efx, rx_err, efx->net_dev,
433 " RX queue %d seriously overlength "
434 "RX event (0x%x > 0x%x+0x%x). Leaking\n",
435 efx_rx_queue_index(rx_queue), len, max_len,
436 efx->type->rx_buffer_padding);
437 /* If this buffer was skb-allocated, then the meta
438 * data at the end of the skb will be trashed. So
439 * we have no choice but to leak the fragment.
441 *leak_packet = !(rx_buf->flags & EFX_RX_BUF_PAGE);
442 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
445 netif_err(efx, rx_err, efx->net_dev,
446 " RX queue %d overlength RX event "
448 efx_rx_queue_index(rx_queue), len, max_len);
451 efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
454 /* Pass a received packet up through the generic GRO stack
456 * Handles driverlink veto, and passes the fragment up via
457 * the appropriate GRO method
459 static void efx_rx_packet_gro(struct efx_channel *channel,
460 struct efx_rx_buffer *rx_buf,
463 struct napi_struct *napi = &channel->napi_str;
464 gro_result_t gro_result;
466 /* Pass the skb/page into the GRO engine */
467 if (rx_buf->flags & EFX_RX_BUF_PAGE) {
468 struct efx_nic *efx = channel->efx;
469 struct page *page = rx_buf->u.page;
472 rx_buf->u.page = NULL;
474 skb = napi_get_frags(napi);
480 if (efx->net_dev->features & NETIF_F_RXHASH)
481 skb->rxhash = efx_rx_buf_hash(eh);
483 skb_fill_page_desc(skb, 0, page,
484 efx_rx_buf_offset(efx, rx_buf), rx_buf->len);
486 skb->len = rx_buf->len;
487 skb->data_len = rx_buf->len;
488 skb->truesize += rx_buf->len;
489 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
490 CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
492 skb_record_rx_queue(skb, channel->channel);
494 gro_result = napi_gro_frags(napi);
496 struct sk_buff *skb = rx_buf->u.skb;
498 EFX_BUG_ON_PARANOID(!(rx_buf->flags & EFX_RX_PKT_CSUMMED));
499 rx_buf->u.skb = NULL;
501 gro_result = napi_gro_receive(napi, skb);
504 if (gro_result == GRO_NORMAL) {
505 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
506 } else if (gro_result != GRO_DROP) {
507 channel->rx_alloc_level += RX_ALLOC_FACTOR_GRO;
508 channel->irq_mod_score += 2;
512 void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
513 unsigned int len, u16 flags)
515 struct efx_nic *efx = rx_queue->efx;
516 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
517 struct efx_rx_buffer *rx_buf;
518 bool leak_packet = false;
520 rx_buf = efx_rx_buffer(rx_queue, index);
521 rx_buf->flags |= flags;
523 /* This allows the refill path to post another buffer.
524 * EFX_RXD_HEAD_ROOM ensures that the slot we are using
525 * isn't overwritten yet.
527 rx_queue->removed_count++;
529 /* Validate the length encoded in the event vs the descriptor pushed */
530 efx_rx_packet__check_len(rx_queue, rx_buf, len, &leak_packet);
532 netif_vdbg(efx, rx_status, efx->net_dev,
533 "RX queue %d received id %x at %llx+%x %s%s\n",
534 efx_rx_queue_index(rx_queue), index,
535 (unsigned long long)rx_buf->dma_addr, len,
536 (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
537 (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
539 /* Discard packet, if instructed to do so */
540 if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
541 if (unlikely(leak_packet))
542 channel->n_skbuff_leaks++;
544 efx_recycle_rx_buffer(channel, rx_buf);
546 /* Don't hold off the previous receive */
551 /* Release card resources - assumes all RX buffers consumed in-order
554 efx_unmap_rx_buffer(efx, rx_buf);
556 /* Prefetch nice and early so data will (hopefully) be in cache by
557 * the time we look at it.
559 prefetch(efx_rx_buf_eh(efx, rx_buf));
561 /* Pipeline receives so that we give time for packet headers to be
562 * prefetched into cache.
564 rx_buf->len = len - efx->type->rx_buffer_hash_size;
567 __efx_rx_packet(channel, channel->rx_pkt);
568 channel->rx_pkt = rx_buf;
571 static void efx_rx_deliver(struct efx_channel *channel,
572 struct efx_rx_buffer *rx_buf)
576 /* We now own the SKB */
578 rx_buf->u.skb = NULL;
580 /* Set the SKB flags */
581 skb_checksum_none_assert(skb);
583 /* Pass the packet up */
584 netif_receive_skb(skb);
586 /* Update allocation strategy method */
587 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
590 /* Handle a received packet. Second half: Touches packet payload. */
591 void __efx_rx_packet(struct efx_channel *channel, struct efx_rx_buffer *rx_buf)
593 struct efx_nic *efx = channel->efx;
594 u8 *eh = efx_rx_buf_eh(efx, rx_buf);
596 /* If we're in loopback test, then pass the packet directly to the
597 * loopback layer, and free the rx_buf here
599 if (unlikely(efx->loopback_selftest)) {
600 efx_loopback_rx_packet(efx, eh, rx_buf->len);
601 efx_free_rx_buffer(efx, rx_buf);
605 if (!(rx_buf->flags & EFX_RX_BUF_PAGE)) {
606 struct sk_buff *skb = rx_buf->u.skb;
608 prefetch(skb_shinfo(skb));
610 skb_reserve(skb, efx->type->rx_buffer_hash_size);
611 skb_put(skb, rx_buf->len);
613 if (efx->net_dev->features & NETIF_F_RXHASH)
614 skb->rxhash = efx_rx_buf_hash(eh);
616 /* Move past the ethernet header. rx_buf->data still points
617 * at the ethernet header */
618 skb->protocol = eth_type_trans(skb, efx->net_dev);
620 skb_record_rx_queue(skb, channel->channel);
623 if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
624 rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
626 if (likely(rx_buf->flags & (EFX_RX_BUF_PAGE | EFX_RX_PKT_CSUMMED)))
627 efx_rx_packet_gro(channel, rx_buf, eh);
629 efx_rx_deliver(channel, rx_buf);
632 void efx_rx_strategy(struct efx_channel *channel)
634 enum efx_rx_alloc_method method = rx_alloc_method;
636 /* Only makes sense to use page based allocation if GRO is enabled */
637 if (!(channel->efx->net_dev->features & NETIF_F_GRO)) {
638 method = RX_ALLOC_METHOD_SKB;
639 } else if (method == RX_ALLOC_METHOD_AUTO) {
640 /* Constrain the rx_alloc_level */
641 if (channel->rx_alloc_level < 0)
642 channel->rx_alloc_level = 0;
643 else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX)
644 channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX;
646 /* Decide on the allocation method */
647 method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_GRO) ?
648 RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB);
651 /* Push the option */
652 channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE);
655 int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
657 struct efx_nic *efx = rx_queue->efx;
658 unsigned int entries;
661 /* Create the smallest power-of-two aligned ring */
662 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
663 EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
664 rx_queue->ptr_mask = entries - 1;
666 netif_dbg(efx, probe, efx->net_dev,
667 "creating RX queue %d size %#x mask %#x\n",
668 efx_rx_queue_index(rx_queue), efx->rxq_entries,
671 /* Allocate RX buffers */
672 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
674 if (!rx_queue->buffer)
677 rc = efx_nic_probe_rx(rx_queue);
679 kfree(rx_queue->buffer);
680 rx_queue->buffer = NULL;
685 void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
687 struct efx_nic *efx = rx_queue->efx;
688 unsigned int max_fill, trigger, limit;
690 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
691 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
693 /* Initialise ptr fields */
694 rx_queue->added_count = 0;
695 rx_queue->notified_count = 0;
696 rx_queue->removed_count = 0;
697 rx_queue->min_fill = -1U;
699 /* Initialise limit fields */
700 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
701 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
702 limit = max_fill * min(rx_refill_limit, 100U) / 100U;
704 rx_queue->max_fill = max_fill;
705 rx_queue->fast_fill_trigger = trigger;
706 rx_queue->fast_fill_limit = limit;
708 /* Set up RX descriptor ring */
709 efx_nic_init_rx(rx_queue);
712 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
715 struct efx_rx_buffer *rx_buf;
717 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
718 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
720 del_timer_sync(&rx_queue->slow_fill);
721 efx_nic_fini_rx(rx_queue);
723 /* Release RX buffers NB start at index 0 not current HW ptr */
724 if (rx_queue->buffer) {
725 for (i = 0; i <= rx_queue->ptr_mask; i++) {
726 rx_buf = efx_rx_buffer(rx_queue, i);
727 efx_fini_rx_buffer(rx_queue, rx_buf);
732 void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
734 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
735 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
737 efx_nic_remove_rx(rx_queue);
739 kfree(rx_queue->buffer);
740 rx_queue->buffer = NULL;
744 module_param(rx_alloc_method, int, 0644);
745 MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");
747 module_param(rx_refill_threshold, uint, 0444);
748 MODULE_PARM_DESC(rx_refill_threshold,
749 "RX descriptor ring fast/slow fill threshold (%)");