2 * Texas Instruments 3-Port Ethernet Switch Address Lookup Engine
4 * Copyright (C) 2012 Texas Instruments
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/seq_file.h>
18 #include <linux/slab.h>
19 #include <linux/err.h>
21 #include <linux/stat.h>
22 #include <linux/sysfs.h>
23 #include <linux/etherdevice.h>
27 #define BITMASK(bits) (BIT(bits) - 1)
28 #define ALE_ENTRY_BITS 68
29 #define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32)
31 #define ALE_VERSION_MAJOR(rev) ((rev >> 8) & 0xff)
32 #define ALE_VERSION_MINOR(rev) (rev & 0xff)
35 #define ALE_IDVER 0x00
36 #define ALE_CONTROL 0x08
37 #define ALE_PRESCALE 0x10
38 #define ALE_UNKNOWNVLAN 0x18
39 #define ALE_TABLE_CONTROL 0x20
40 #define ALE_TABLE 0x34
41 #define ALE_PORTCTL 0x40
43 #define ALE_TABLE_WRITE BIT(31)
45 #define ALE_TYPE_FREE 0
46 #define ALE_TYPE_ADDR 1
47 #define ALE_TYPE_VLAN 2
48 #define ALE_TYPE_VLAN_ADDR 3
50 #define ALE_UCAST_PERSISTANT 0
51 #define ALE_UCAST_UNTOUCHED 1
52 #define ALE_UCAST_OUI 2
53 #define ALE_UCAST_TOUCHED 3
55 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
61 idx = 2 - idx; /* flip */
62 return (ale_entry[idx] >> start) & BITMASK(bits);
65 static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,
70 value &= BITMASK(bits);
73 idx = 2 - idx; /* flip */
74 ale_entry[idx] &= ~(BITMASK(bits) << start);
75 ale_entry[idx] |= (value << start);
78 #define DEFINE_ALE_FIELD(name, start, bits) \
79 static inline int cpsw_ale_get_##name(u32 *ale_entry) \
81 return cpsw_ale_get_field(ale_entry, start, bits); \
83 static inline void cpsw_ale_set_##name(u32 *ale_entry, u32 value) \
85 cpsw_ale_set_field(ale_entry, start, bits, value); \
88 DEFINE_ALE_FIELD(entry_type, 60, 2)
89 DEFINE_ALE_FIELD(vlan_id, 48, 12)
90 DEFINE_ALE_FIELD(mcast_state, 62, 2)
91 DEFINE_ALE_FIELD(port_mask, 66, 3)
92 DEFINE_ALE_FIELD(super, 65, 1)
93 DEFINE_ALE_FIELD(ucast_type, 62, 2)
94 DEFINE_ALE_FIELD(port_num, 66, 2)
95 DEFINE_ALE_FIELD(blocked, 65, 1)
96 DEFINE_ALE_FIELD(secure, 64, 1)
97 DEFINE_ALE_FIELD(vlan_untag_force, 24, 3)
98 DEFINE_ALE_FIELD(vlan_reg_mcast, 16, 3)
99 DEFINE_ALE_FIELD(vlan_unreg_mcast, 8, 3)
100 DEFINE_ALE_FIELD(vlan_member_list, 0, 3)
101 DEFINE_ALE_FIELD(mcast, 40, 1)
103 /* The MAC address field in the ALE entry cannot be macroized as above */
104 static inline void cpsw_ale_get_addr(u32 *ale_entry, u8 *addr)
108 for (i = 0; i < 6; i++)
109 addr[i] = cpsw_ale_get_field(ale_entry, 40 - 8*i, 8);
112 static inline void cpsw_ale_set_addr(u32 *ale_entry, u8 *addr)
116 for (i = 0; i < 6; i++)
117 cpsw_ale_set_field(ale_entry, 40 - 8*i, 8, addr[i]);
120 static int cpsw_ale_read(struct cpsw_ale *ale, int idx, u32 *ale_entry)
124 WARN_ON(idx > ale->params.ale_entries);
126 __raw_writel(idx, ale->params.ale_regs + ALE_TABLE_CONTROL);
128 for (i = 0; i < ALE_ENTRY_WORDS; i++)
129 ale_entry[i] = __raw_readl(ale->params.ale_regs +
135 static int cpsw_ale_write(struct cpsw_ale *ale, int idx, u32 *ale_entry)
139 WARN_ON(idx > ale->params.ale_entries);
141 for (i = 0; i < ALE_ENTRY_WORDS; i++)
142 __raw_writel(ale_entry[i], ale->params.ale_regs +
145 __raw_writel(idx | ALE_TABLE_WRITE, ale->params.ale_regs +
151 int cpsw_ale_match_addr(struct cpsw_ale *ale, u8 *addr, u16 vid)
153 u32 ale_entry[ALE_ENTRY_WORDS];
156 for (idx = 0; idx < ale->params.ale_entries; idx++) {
159 cpsw_ale_read(ale, idx, ale_entry);
160 type = cpsw_ale_get_entry_type(ale_entry);
161 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
163 if (cpsw_ale_get_vlan_id(ale_entry) != vid)
165 cpsw_ale_get_addr(ale_entry, entry_addr);
166 if (ether_addr_equal(entry_addr, addr))
172 int cpsw_ale_match_vlan(struct cpsw_ale *ale, u16 vid)
174 u32 ale_entry[ALE_ENTRY_WORDS];
177 for (idx = 0; idx < ale->params.ale_entries; idx++) {
178 cpsw_ale_read(ale, idx, ale_entry);
179 type = cpsw_ale_get_entry_type(ale_entry);
180 if (type != ALE_TYPE_VLAN)
182 if (cpsw_ale_get_vlan_id(ale_entry) == vid)
188 static int cpsw_ale_match_free(struct cpsw_ale *ale)
190 u32 ale_entry[ALE_ENTRY_WORDS];
193 for (idx = 0; idx < ale->params.ale_entries; idx++) {
194 cpsw_ale_read(ale, idx, ale_entry);
195 type = cpsw_ale_get_entry_type(ale_entry);
196 if (type == ALE_TYPE_FREE)
202 static int cpsw_ale_find_ageable(struct cpsw_ale *ale)
204 u32 ale_entry[ALE_ENTRY_WORDS];
207 for (idx = 0; idx < ale->params.ale_entries; idx++) {
208 cpsw_ale_read(ale, idx, ale_entry);
209 type = cpsw_ale_get_entry_type(ale_entry);
210 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
212 if (cpsw_ale_get_mcast(ale_entry))
214 type = cpsw_ale_get_ucast_type(ale_entry);
215 if (type != ALE_UCAST_PERSISTANT &&
216 type != ALE_UCAST_OUI)
222 static void cpsw_ale_flush_mcast(struct cpsw_ale *ale, u32 *ale_entry,
227 mask = cpsw_ale_get_port_mask(ale_entry);
228 if ((mask & port_mask) == 0)
229 return; /* ports dont intersect, not interested */
232 /* free if only remaining port is host port */
234 cpsw_ale_set_port_mask(ale_entry, mask);
236 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
239 int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask)
241 u32 ale_entry[ALE_ENTRY_WORDS];
244 for (idx = 0; idx < ale->params.ale_entries; idx++) {
245 cpsw_ale_read(ale, idx, ale_entry);
246 ret = cpsw_ale_get_entry_type(ale_entry);
247 if (ret != ALE_TYPE_ADDR && ret != ALE_TYPE_VLAN_ADDR)
250 if (cpsw_ale_get_mcast(ale_entry)) {
253 cpsw_ale_get_addr(ale_entry, addr);
254 if (!is_broadcast_ether_addr(addr))
255 cpsw_ale_flush_mcast(ale, ale_entry, port_mask);
258 cpsw_ale_write(ale, idx, ale_entry);
263 static void cpsw_ale_flush_ucast(struct cpsw_ale *ale, u32 *ale_entry,
268 port = cpsw_ale_get_port_num(ale_entry);
269 if ((BIT(port) & port_mask) == 0)
270 return; /* ports dont intersect, not interested */
271 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
274 int cpsw_ale_flush(struct cpsw_ale *ale, int port_mask)
276 u32 ale_entry[ALE_ENTRY_WORDS];
279 for (idx = 0; idx < ale->params.ale_entries; idx++) {
280 cpsw_ale_read(ale, idx, ale_entry);
281 ret = cpsw_ale_get_entry_type(ale_entry);
282 if (ret != ALE_TYPE_ADDR && ret != ALE_TYPE_VLAN_ADDR)
285 if (cpsw_ale_get_mcast(ale_entry))
286 cpsw_ale_flush_mcast(ale, ale_entry, port_mask);
288 cpsw_ale_flush_ucast(ale, ale_entry, port_mask);
290 cpsw_ale_write(ale, idx, ale_entry);
295 static inline void cpsw_ale_set_vlan_entry_type(u32 *ale_entry,
298 if (flags & ALE_VLAN) {
299 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN_ADDR);
300 cpsw_ale_set_vlan_id(ale_entry, vid);
302 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_ADDR);
306 int cpsw_ale_add_ucast(struct cpsw_ale *ale, u8 *addr, int port,
309 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
312 cpsw_ale_set_vlan_entry_type(ale_entry, flags, vid);
314 cpsw_ale_set_addr(ale_entry, addr);
315 cpsw_ale_set_ucast_type(ale_entry, ALE_UCAST_PERSISTANT);
316 cpsw_ale_set_secure(ale_entry, (flags & ALE_SECURE) ? 1 : 0);
317 cpsw_ale_set_blocked(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
318 cpsw_ale_set_port_num(ale_entry, port);
320 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
322 idx = cpsw_ale_match_free(ale);
324 idx = cpsw_ale_find_ageable(ale);
328 cpsw_ale_write(ale, idx, ale_entry);
332 int cpsw_ale_del_ucast(struct cpsw_ale *ale, u8 *addr, int port,
335 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
338 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
342 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
343 cpsw_ale_write(ale, idx, ale_entry);
347 int cpsw_ale_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
348 int flags, u16 vid, int mcast_state)
350 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
353 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
355 cpsw_ale_read(ale, idx, ale_entry);
357 cpsw_ale_set_vlan_entry_type(ale_entry, flags, vid);
359 cpsw_ale_set_addr(ale_entry, addr);
360 cpsw_ale_set_super(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
361 cpsw_ale_set_mcast_state(ale_entry, mcast_state);
363 mask = cpsw_ale_get_port_mask(ale_entry);
365 cpsw_ale_set_port_mask(ale_entry, port_mask);
368 idx = cpsw_ale_match_free(ale);
370 idx = cpsw_ale_find_ageable(ale);
374 cpsw_ale_write(ale, idx, ale_entry);
378 int cpsw_ale_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
381 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
384 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
388 cpsw_ale_read(ale, idx, ale_entry);
391 cpsw_ale_set_port_mask(ale_entry, port_mask);
393 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
395 cpsw_ale_write(ale, idx, ale_entry);
399 int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
400 int reg_mcast, int unreg_mcast)
402 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
405 idx = cpsw_ale_match_vlan(ale, vid);
407 cpsw_ale_read(ale, idx, ale_entry);
409 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN);
410 cpsw_ale_set_vlan_id(ale_entry, vid);
412 cpsw_ale_set_vlan_untag_force(ale_entry, untag);
413 cpsw_ale_set_vlan_reg_mcast(ale_entry, reg_mcast);
414 cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast);
415 cpsw_ale_set_vlan_member_list(ale_entry, port);
418 idx = cpsw_ale_match_free(ale);
420 idx = cpsw_ale_find_ageable(ale);
424 cpsw_ale_write(ale, idx, ale_entry);
428 int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port_mask)
430 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
433 idx = cpsw_ale_match_vlan(ale, vid);
437 cpsw_ale_read(ale, idx, ale_entry);
440 cpsw_ale_set_vlan_member_list(ale_entry, port_mask);
442 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
444 cpsw_ale_write(ale, idx, ale_entry);
448 struct ale_control_info {
450 int offset, port_offset;
451 int shift, port_shift;
455 static const struct ale_control_info ale_controls[ALE_NUM_CONTROLS] = {
458 .offset = ALE_CONTROL,
466 .offset = ALE_CONTROL,
474 .offset = ALE_CONTROL,
480 [ALE_P0_UNI_FLOOD] = {
481 .name = "port0_unicast_flood",
482 .offset = ALE_CONTROL,
488 [ALE_VLAN_NOLEARN] = {
489 .name = "vlan_nolearn",
490 .offset = ALE_CONTROL,
496 [ALE_NO_PORT_VLAN] = {
497 .name = "no_port_vlan",
498 .offset = ALE_CONTROL,
506 .offset = ALE_CONTROL,
514 .offset = ALE_CONTROL,
520 [ALE_RATE_LIMIT_TX] = {
521 .name = "rate_limit_tx",
522 .offset = ALE_CONTROL,
529 .name = "vlan_aware",
530 .offset = ALE_CONTROL,
536 [ALE_AUTH_ENABLE] = {
537 .name = "auth_enable",
538 .offset = ALE_CONTROL,
545 .name = "rate_limit",
546 .offset = ALE_CONTROL,
553 .name = "port_state",
554 .offset = ALE_PORTCTL,
560 [ALE_PORT_DROP_UNTAGGED] = {
561 .name = "drop_untagged",
562 .offset = ALE_PORTCTL,
568 [ALE_PORT_DROP_UNKNOWN_VLAN] = {
569 .name = "drop_unknown",
570 .offset = ALE_PORTCTL,
576 [ALE_PORT_NOLEARN] = {
578 .offset = ALE_PORTCTL,
584 [ALE_PORT_NO_SA_UPDATE] = {
585 .name = "no_source_update",
586 .offset = ALE_PORTCTL,
592 [ALE_PORT_MCAST_LIMIT] = {
593 .name = "mcast_limit",
594 .offset = ALE_PORTCTL,
600 [ALE_PORT_BCAST_LIMIT] = {
601 .name = "bcast_limit",
602 .offset = ALE_PORTCTL,
608 [ALE_PORT_UNKNOWN_VLAN_MEMBER] = {
609 .name = "unknown_vlan_member",
610 .offset = ALE_UNKNOWNVLAN,
616 [ALE_PORT_UNKNOWN_MCAST_FLOOD] = {
617 .name = "unknown_mcast_flood",
618 .offset = ALE_UNKNOWNVLAN,
624 [ALE_PORT_UNKNOWN_REG_MCAST_FLOOD] = {
625 .name = "unknown_reg_flood",
626 .offset = ALE_UNKNOWNVLAN,
632 [ALE_PORT_UNTAGGED_EGRESS] = {
633 .name = "untagged_egress",
634 .offset = ALE_UNKNOWNVLAN,
642 int cpsw_ale_control_set(struct cpsw_ale *ale, int port, int control,
645 const struct ale_control_info *info;
649 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
652 info = &ale_controls[control];
653 if (info->port_offset == 0 && info->port_shift == 0)
654 port = 0; /* global, port is a dont care */
656 if (port < 0 || port > ale->params.ale_ports)
659 mask = BITMASK(info->bits);
663 offset = info->offset + (port * info->port_offset);
664 shift = info->shift + (port * info->port_shift);
666 tmp = __raw_readl(ale->params.ale_regs + offset);
667 tmp = (tmp & ~(mask << shift)) | (value << shift);
668 __raw_writel(tmp, ale->params.ale_regs + offset);
673 int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control)
675 const struct ale_control_info *info;
679 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
682 info = &ale_controls[control];
683 if (info->port_offset == 0 && info->port_shift == 0)
684 port = 0; /* global, port is a dont care */
686 if (port < 0 || port > ale->params.ale_ports)
689 offset = info->offset + (port * info->port_offset);
690 shift = info->shift + (port * info->port_shift);
692 tmp = __raw_readl(ale->params.ale_regs + offset) >> shift;
693 return tmp & BITMASK(info->bits);
696 static void cpsw_ale_timer(unsigned long arg)
698 struct cpsw_ale *ale = (struct cpsw_ale *)arg;
700 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
703 ale->timer.expires = jiffies + ale->ageout;
704 add_timer(&ale->timer);
708 int cpsw_ale_set_ageout(struct cpsw_ale *ale, int ageout)
710 del_timer_sync(&ale->timer);
711 ale->ageout = ageout * HZ;
713 ale->timer.expires = jiffies + ale->ageout;
714 add_timer(&ale->timer);
719 void cpsw_ale_start(struct cpsw_ale *ale)
723 rev = __raw_readl(ale->params.ale_regs + ALE_IDVER);
724 dev_dbg(ale->params.dev, "initialized cpsw ale revision %d.%d\n",
725 ALE_VERSION_MAJOR(rev), ALE_VERSION_MINOR(rev));
726 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 1);
727 cpsw_ale_control_set(ale, 0, ALE_CLEAR, 1);
729 init_timer(&ale->timer);
730 ale->timer.data = (unsigned long)ale;
731 ale->timer.function = cpsw_ale_timer;
733 ale->timer.expires = jiffies + ale->ageout;
734 add_timer(&ale->timer);
738 void cpsw_ale_stop(struct cpsw_ale *ale)
740 del_timer_sync(&ale->timer);
743 struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params)
745 struct cpsw_ale *ale;
747 ale = kzalloc(sizeof(*ale), GFP_KERNEL);
751 ale->params = *params;
752 ale->ageout = ale->params.ale_ageout * HZ;
757 int cpsw_ale_destroy(struct cpsw_ale *ale)
762 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 0);