drivers/net/ethernet/ti/netcp_ethss.c

   1 /*
   2  * Keystone GBE and XGBE subsystem code
   3  *
   4  * Copyright (C) 2014 Texas Instruments Incorporated
   5  * Authors:     Sandeep Nair <sandeep_n@ti.com>
   6  *              Sandeep Paulraj <s-paulraj@ti.com>
   7  *              Cyril Chemparathy <cyril@ti.com>
   8  *              Santosh Shilimkar <santosh.shilimkar@ti.com>
   9  *              Wingman Kwok <w-kwok2@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation version 2.
  14  *
  15  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  16  * kind, whether express or implied; without even the implied warranty
  17  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  */
  20
  21 #include <linux/io.h>
  22 #include <linux/module.h>
  23 #include <linux/of_mdio.h>
  24 #include <linux/of_address.h>
  25 #include <linux/if_vlan.h>
  26 #include <linux/ethtool.h>
  27
  28 #include "cpsw_ale.h"
  29 #include "netcp.h"
  30
  31 #define NETCP_DRIVER_NAME               "TI KeyStone Ethernet Driver"
  32 #define NETCP_DRIVER_VERSION            "v1.0"
  33
  34 #define GBE_IDENT(reg)                  ((reg >> 16) & 0xffff)
  35 #define GBE_MAJOR_VERSION(reg)          (reg >> 8 & 0x7)
  36 #define GBE_MINOR_VERSION(reg)          (reg & 0xff)
  37 #define GBE_RTL_VERSION(reg)            ((reg >> 11) & 0x1f)
  38
  39 /* 1G Ethernet SS defines */
  40 #define GBE_MODULE_NAME                 "netcp-gbe"
  41 #define GBE_SS_VERSION_14               0x4ed21104
  42
  43 #define GBE_SS_REG_INDEX                0
  44 #define GBE_SGMII34_REG_INDEX           1
  45 #define GBE_SM_REG_INDEX                2
  46 /* offset relative to base of GBE_SS_REG_INDEX */
  47 #define GBE13_SGMII_MODULE_OFFSET       0x100
  48 /* offset relative to base of GBE_SM_REG_INDEX */
  49 #define GBE13_HOST_PORT_OFFSET          0x34
  50 #define GBE13_SLAVE_PORT_OFFSET         0x60
  51 #define GBE13_EMAC_OFFSET               0x100
  52 #define GBE13_SLAVE_PORT2_OFFSET        0x200
  53 #define GBE13_HW_STATS_OFFSET           0x300
  54 #define GBE13_ALE_OFFSET                0x600
  55 #define GBE13_HOST_PORT_NUM             0
  56 #define GBE13_NUM_ALE_ENTRIES           1024
  57
  58 /* 1G Ethernet NU SS defines */
  59 #define GBENU_MODULE_NAME               "netcp-gbenu"
  60 #define GBE_SS_ID_NU                    0x4ee6
  61 #define GBE_SS_ID_2U                    0x4ee8
  62
  63 #define IS_SS_ID_MU(d) \
  64         ((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \
  65          (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U))
  66
  67 #define IS_SS_ID_NU(d) \
  68         (GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU)
  69
  70 #define GBENU_SS_REG_INDEX              0
  71 #define GBENU_SM_REG_INDEX              1
  72 #define GBENU_SGMII_MODULE_OFFSET       0x100
  73 #define GBENU_HOST_PORT_OFFSET          0x1000
  74 #define GBENU_SLAVE_PORT_OFFSET         0x2000
  75 #define GBENU_EMAC_OFFSET               0x2330
  76 #define GBENU_HW_STATS_OFFSET           0x1a000
  77 #define GBENU_ALE_OFFSET                0x1e000
  78 #define GBENU_HOST_PORT_NUM             0
  79 #define GBENU_NUM_ALE_ENTRIES           1024
  80
  81 /* 10G Ethernet SS defines */
  82 #define XGBE_MODULE_NAME                "netcp-xgbe"
  83 #define XGBE_SS_VERSION_10              0x4ee42100
  84
  85 #define XGBE_SS_REG_INDEX               0
  86 #define XGBE_SM_REG_INDEX               1
  87 #define XGBE_SERDES_REG_INDEX           2
  88
  89 /* offset relative to base of XGBE_SS_REG_INDEX */
  90 #define XGBE10_SGMII_MODULE_OFFSET      0x100
  91 /* offset relative to base of XGBE_SM_REG_INDEX */
  92 #define XGBE10_HOST_PORT_OFFSET         0x34
  93 #define XGBE10_SLAVE_PORT_OFFSET        0x64
  94 #define XGBE10_EMAC_OFFSET              0x400
  95 #define XGBE10_ALE_OFFSET               0x700
  96 #define XGBE10_HW_STATS_OFFSET          0x800
  97 #define XGBE10_HOST_PORT_NUM            0
  98 #define XGBE10_NUM_ALE_ENTRIES          1024
  99
 100 #define GBE_TIMER_INTERVAL                      (HZ / 2)
 101
 102 /* Soft reset register values */
 103 #define SOFT_RESET_MASK                         BIT(0)
 104 #define SOFT_RESET                              BIT(0)
 105 #define DEVICE_EMACSL_RESET_POLL_COUNT          100
 106 #define GMACSL_RET_WARN_RESET_INCOMPLETE        -2
 107
 108 #define MACSL_RX_ENABLE_CSF                     BIT(23)
 109 #define MACSL_ENABLE_EXT_CTL                    BIT(18)
 110 #define MACSL_XGMII_ENABLE                      BIT(13)
 111 #define MACSL_XGIG_MODE                         BIT(8)
 112 #define MACSL_GIG_MODE                          BIT(7)
 113 #define MACSL_GMII_ENABLE                       BIT(5)
 114 #define MACSL_FULLDUPLEX                        BIT(0)
 115
 116 #define GBE_CTL_P0_ENABLE                       BIT(2)
 117 #define GBE13_REG_VAL_STAT_ENABLE_ALL           0xff
 118 #define XGBE_REG_VAL_STAT_ENABLE_ALL            0xf
 119 #define GBE_STATS_CD_SEL                        BIT(28)
 120
 121 #define GBE_PORT_MASK(x)                        (BIT(x) - 1)
 122 #define GBE_MASK_NO_PORTS                       0
 123
 124 #define GBE_DEF_1G_MAC_CONTROL                                  \
 125                 (MACSL_GIG_MODE | MACSL_GMII_ENABLE |           \
 126                  MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF)
 127
 128 #define GBE_DEF_10G_MAC_CONTROL                         \
 129                 (MACSL_XGIG_MODE | MACSL_XGMII_ENABLE |         \
 130                  MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF)
 131
 132 #define GBE_STATSA_MODULE                       0
 133 #define GBE_STATSB_MODULE                       1
 134 #define GBE_STATSC_MODULE                       2
 135 #define GBE_STATSD_MODULE                       3
 136
 137 #define GBENU_STATS0_MODULE                     0
 138 #define GBENU_STATS1_MODULE                     1
 139 #define GBENU_STATS2_MODULE                     2
 140 #define GBENU_STATS3_MODULE                     3
 141 #define GBENU_STATS4_MODULE                     4
 142 #define GBENU_STATS5_MODULE                     5
 143 #define GBENU_STATS6_MODULE                     6
 144 #define GBENU_STATS7_MODULE                     7
 145 #define GBENU_STATS8_MODULE                     8
 146
 147 #define XGBE_STATS0_MODULE                      0
 148 #define XGBE_STATS1_MODULE                      1
 149 #define XGBE_STATS2_MODULE                      2
 150
 151 /* s: 0-based slave_port */
 152 #define SGMII_BASE(s) \
 153         (((s) < 2) ? gbe_dev->sgmii_port_regs : gbe_dev->sgmii_port34_regs)
 154
 155 #define GBE_TX_QUEUE                            648
 156 #define GBE_TXHOOK_ORDER                        0
 157 #define GBE_DEFAULT_ALE_AGEOUT                  30
 158 #define SLAVE_LINK_IS_XGMII(s) ((s)->link_interface >= XGMII_LINK_MAC_PHY)
 159 #define NETCP_LINK_STATE_INVALID                -1
 160
 161 #define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
 162                 offsetof(struct gbe##_##rb, rn)
 163 #define GBENU_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
 164                 offsetof(struct gbenu##_##rb, rn)
 165 #define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
 166                 offsetof(struct xgbe##_##rb, rn)
 167 #define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn)
 168
 169 #define HOST_TX_PRI_MAP_DEFAULT                 0x00000000
 170
 171 struct xgbe_ss_regs {
 172         u32     id_ver;
 173         u32     synce_count;
 174         u32     synce_mux;
 175         u32     control;
 176 };
 177
 178 struct xgbe_switch_regs {
 179         u32     id_ver;
 180         u32     control;
 181         u32     emcontrol;
 182         u32     stat_port_en;
 183         u32     ptype;
 184         u32     soft_idle;
 185         u32     thru_rate;
 186         u32     gap_thresh;
 187         u32     tx_start_wds;
 188         u32     flow_control;
 189         u32     cppi_thresh;
 190 };
 191
 192 struct xgbe_port_regs {
 193         u32     blk_cnt;
 194         u32     port_vlan;
 195         u32     tx_pri_map;
 196         u32     sa_lo;
 197         u32     sa_hi;
 198         u32     ts_ctl;
 199         u32     ts_seq_ltype;
 200         u32     ts_vlan;
 201         u32     ts_ctl_ltype2;
 202         u32     ts_ctl2;
 203         u32     control;
 204 };
 205
 206 struct xgbe_host_port_regs {
 207         u32     blk_cnt;
 208         u32     port_vlan;
 209         u32     tx_pri_map;
 210         u32     src_id;
 211         u32     rx_pri_map;
 212         u32     rx_maxlen;
 213 };
 214
 215 struct xgbe_emac_regs {
 216         u32     id_ver;
 217         u32     mac_control;
 218         u32     mac_status;
 219         u32     soft_reset;
 220         u32     rx_maxlen;
 221         u32     __reserved_0;
 222         u32     rx_pause;
 223         u32     tx_pause;
 224         u32     em_control;
 225         u32     __reserved_1;
 226         u32     tx_gap;
 227         u32     rsvd[4];
 228 };
 229
 230 struct xgbe_host_hw_stats {
 231         u32     rx_good_frames;
 232         u32     rx_broadcast_frames;
 233         u32     rx_multicast_frames;
 234         u32     __rsvd_0[3];
 235         u32     rx_oversized_frames;
 236         u32     __rsvd_1;
 237         u32     rx_undersized_frames;
 238         u32     __rsvd_2;
 239         u32     overrun_type4;
 240         u32     overrun_type5;
 241         u32     rx_bytes;
 242         u32     tx_good_frames;
 243         u32     tx_broadcast_frames;
 244         u32     tx_multicast_frames;
 245         u32     __rsvd_3[9];
 246         u32     tx_bytes;
 247         u32     tx_64byte_frames;
 248         u32     tx_65_to_127byte_frames;
 249         u32     tx_128_to_255byte_frames;
 250         u32     tx_256_to_511byte_frames;
 251         u32     tx_512_to_1023byte_frames;
 252         u32     tx_1024byte_frames;
 253         u32     net_bytes;
 254         u32     rx_sof_overruns;
 255         u32     rx_mof_overruns;
 256         u32     rx_dma_overruns;
 257 };
 258
 259 struct xgbe_hw_stats {
 260         u32     rx_good_frames;
 261         u32     rx_broadcast_frames;
 262         u32     rx_multicast_frames;
 263         u32     rx_pause_frames;
 264         u32     rx_crc_errors;
 265         u32     rx_align_code_errors;
 266         u32     rx_oversized_frames;
 267         u32     rx_jabber_frames;
 268         u32     rx_undersized_frames;
 269         u32     rx_fragments;
 270         u32     overrun_type4;
 271         u32     overrun_type5;
 272         u32     rx_bytes;
 273         u32     tx_good_frames;
 274         u32     tx_broadcast_frames;
 275         u32     tx_multicast_frames;
 276         u32     tx_pause_frames;
 277         u32     tx_deferred_frames;
 278         u32     tx_collision_frames;
 279         u32     tx_single_coll_frames;
 280         u32     tx_mult_coll_frames;
 281         u32     tx_excessive_collisions;
 282         u32     tx_late_collisions;
 283         u32     tx_underrun;
 284         u32     tx_carrier_sense_errors;
 285         u32     tx_bytes;
 286         u32     tx_64byte_frames;
 287         u32     tx_65_to_127byte_frames;
 288         u32     tx_128_to_255byte_frames;
 289         u32     tx_256_to_511byte_frames;
 290         u32     tx_512_to_1023byte_frames;
 291         u32     tx_1024byte_frames;
 292         u32     net_bytes;
 293         u32     rx_sof_overruns;
 294         u32     rx_mof_overruns;
 295         u32     rx_dma_overruns;
 296 };
 297
 298 struct gbenu_ss_regs {
 299         u32     id_ver;
 300         u32     synce_count;            /* NU */
 301         u32     synce_mux;              /* NU */
 302         u32     control;                /* 2U */
 303         u32     __rsvd_0[2];            /* 2U */
 304         u32     rgmii_status;           /* 2U */
 305         u32     ss_status;              /* 2U */
 306 };
 307
 308 struct gbenu_switch_regs {
 309         u32     id_ver;
 310         u32     control;
 311         u32     __rsvd_0[2];
 312         u32     emcontrol;
 313         u32     stat_port_en;
 314         u32     ptype;                  /* NU */
 315         u32     soft_idle;
 316         u32     thru_rate;              /* NU */
 317         u32     gap_thresh;             /* NU */
 318         u32     tx_start_wds;           /* NU */
 319         u32     eee_prescale;           /* 2U */
 320         u32     tx_g_oflow_thresh_set;  /* NU */
 321         u32     tx_g_oflow_thresh_clr;  /* NU */
 322         u32     tx_g_buf_thresh_set_l;  /* NU */
 323         u32     tx_g_buf_thresh_set_h;  /* NU */
 324         u32     tx_g_buf_thresh_clr_l;  /* NU */
 325         u32     tx_g_buf_thresh_clr_h;  /* NU */
 326 };
 327
 328 struct gbenu_port_regs {
 329         u32     __rsvd_0;
 330         u32     control;
 331         u32     max_blks;               /* 2U */
 332         u32     mem_align1;
 333         u32     blk_cnt;
 334         u32     port_vlan;
 335         u32     tx_pri_map;             /* NU */
 336         u32     pri_ctl;                /* 2U */
 337         u32     rx_pri_map;
 338         u32     rx_maxlen;
 339         u32     tx_blks_pri;            /* NU */
 340         u32     __rsvd_1;
 341         u32     idle2lpi;               /* 2U */
 342         u32     lpi2idle;               /* 2U */
 343         u32     eee_status;             /* 2U */
 344         u32     __rsvd_2;
 345         u32     __rsvd_3[176];          /* NU: more to add */
 346         u32     __rsvd_4[2];
 347         u32     sa_lo;
 348         u32     sa_hi;
 349         u32     ts_ctl;
 350         u32     ts_seq_ltype;
 351         u32     ts_vlan;
 352         u32     ts_ctl_ltype2;
 353         u32     ts_ctl2;
 354 };
 355
 356 struct gbenu_host_port_regs {
 357         u32     __rsvd_0;
 358         u32     control;
 359         u32     flow_id_offset;         /* 2U */
 360         u32     __rsvd_1;
 361         u32     blk_cnt;
 362         u32     port_vlan;
 363         u32     tx_pri_map;             /* NU */
 364         u32     pri_ctl;
 365         u32     rx_pri_map;
 366         u32     rx_maxlen;
 367         u32     tx_blks_pri;            /* NU */
 368         u32     __rsvd_2;
 369         u32     idle2lpi;               /* 2U */
 370         u32     lpi2wake;               /* 2U */
 371         u32     eee_status;             /* 2U */
 372         u32     __rsvd_3;
 373         u32     __rsvd_4[184];          /* NU */
 374         u32     host_blks_pri;          /* NU */
 375 };
 376
 377 struct gbenu_emac_regs {
 378         u32     mac_control;
 379         u32     mac_status;
 380         u32     soft_reset;
 381         u32     boff_test;
 382         u32     rx_pause;
 383         u32     __rsvd_0[11];           /* NU */
 384         u32     tx_pause;
 385         u32     __rsvd_1[11];           /* NU */
 386         u32     em_control;
 387         u32     tx_gap;
 388 };
 389
 390 /* Some hw stat regs are applicable to slave port only.
 391  * This is handled by gbenu_et_stats struct.  Also some
 392  * are for SS version NU and some are for 2U.
 393  */
 394 struct gbenu_hw_stats {
 395         u32     rx_good_frames;
 396         u32     rx_broadcast_frames;
 397         u32     rx_multicast_frames;
 398         u32     rx_pause_frames;                /* slave */
 399         u32     rx_crc_errors;
 400         u32     rx_align_code_errors;           /* slave */
 401         u32     rx_oversized_frames;
 402         u32     rx_jabber_frames;               /* slave */
 403         u32     rx_undersized_frames;
 404         u32     rx_fragments;                   /* slave */
 405         u32     ale_drop;
 406         u32     ale_overrun_drop;
 407         u32     rx_bytes;
 408         u32     tx_good_frames;
 409         u32     tx_broadcast_frames;
 410         u32     tx_multicast_frames;
 411         u32     tx_pause_frames;                /* slave */
 412         u32     tx_deferred_frames;             /* slave */
 413         u32     tx_collision_frames;            /* slave */
 414         u32     tx_single_coll_frames;          /* slave */
 415         u32     tx_mult_coll_frames;            /* slave */
 416         u32     tx_excessive_collisions;        /* slave */
 417         u32     tx_late_collisions;             /* slave */
 418         u32     rx_ipg_error;                   /* slave 10G only */
 419         u32     tx_carrier_sense_errors;        /* slave */
 420         u32     tx_bytes;
 421         u32     tx_64B_frames;
 422         u32     tx_65_to_127B_frames;
 423         u32     tx_128_to_255B_frames;
 424         u32     tx_256_to_511B_frames;
 425         u32     tx_512_to_1023B_frames;
 426         u32     tx_1024B_frames;
 427         u32     net_bytes;
 428         u32     rx_bottom_fifo_drop;
 429         u32     rx_port_mask_drop;
 430         u32     rx_top_fifo_drop;
 431         u32     ale_rate_limit_drop;
 432         u32     ale_vid_ingress_drop;
 433         u32     ale_da_eq_sa_drop;
 434         u32     __rsvd_0[3];
 435         u32     ale_unknown_ucast;
 436         u32     ale_unknown_ucast_bytes;
 437         u32     ale_unknown_mcast;
 438         u32     ale_unknown_mcast_bytes;
 439         u32     ale_unknown_bcast;
 440         u32     ale_unknown_bcast_bytes;
 441         u32     ale_pol_match;
 442         u32     ale_pol_match_red;              /* NU */
 443         u32     ale_pol_match_yellow;           /* NU */
 444         u32     __rsvd_1[44];
 445         u32     tx_mem_protect_err;
 446         /* following NU only */
 447         u32     tx_pri0;
 448         u32     tx_pri1;
 449         u32     tx_pri2;
 450         u32     tx_pri3;
 451         u32     tx_pri4;
 452         u32     tx_pri5;
 453         u32     tx_pri6;
 454         u32     tx_pri7;
 455         u32     tx_pri0_bcnt;
 456         u32     tx_pri1_bcnt;
 457         u32     tx_pri2_bcnt;
 458         u32     tx_pri3_bcnt;
 459         u32     tx_pri4_bcnt;
 460         u32     tx_pri5_bcnt;
 461         u32     tx_pri6_bcnt;
 462         u32     tx_pri7_bcnt;
 463         u32     tx_pri0_drop;
 464         u32     tx_pri1_drop;
 465         u32     tx_pri2_drop;
 466         u32     tx_pri3_drop;
 467         u32     tx_pri4_drop;
 468         u32     tx_pri5_drop;
 469         u32     tx_pri6_drop;
 470         u32     tx_pri7_drop;
 471         u32     tx_pri0_drop_bcnt;
 472         u32     tx_pri1_drop_bcnt;
 473         u32     tx_pri2_drop_bcnt;
 474         u32     tx_pri3_drop_bcnt;
 475         u32     tx_pri4_drop_bcnt;
 476         u32     tx_pri5_drop_bcnt;
 477         u32     tx_pri6_drop_bcnt;
 478         u32     tx_pri7_drop_bcnt;
 479 };
 480
 481 #define GBENU_HW_STATS_REG_MAP_SZ       0x200
 482
 483 struct gbe_ss_regs {
 484         u32     id_ver;
 485         u32     synce_count;
 486         u32     synce_mux;
 487 };
 488
 489 struct gbe_ss_regs_ofs {
 490         u16     id_ver;
 491         u16     control;
 492 };
 493
 494 struct gbe_switch_regs {
 495         u32     id_ver;
 496         u32     control;
 497         u32     soft_reset;
 498         u32     stat_port_en;
 499         u32     ptype;
 500         u32     soft_idle;
 501         u32     thru_rate;
 502         u32     gap_thresh;
 503         u32     tx_start_wds;
 504         u32     flow_control;
 505 };
 506
 507 struct gbe_switch_regs_ofs {
 508         u16     id_ver;
 509         u16     control;
 510         u16     soft_reset;
 511         u16     emcontrol;
 512         u16     stat_port_en;
 513         u16     ptype;
 514         u16     flow_control;
 515 };
 516
 517 struct gbe_port_regs {
 518         u32     max_blks;
 519         u32     blk_cnt;
 520         u32     port_vlan;
 521         u32     tx_pri_map;
 522         u32     sa_lo;
 523         u32     sa_hi;
 524         u32     ts_ctl;
 525         u32     ts_seq_ltype;
 526         u32     ts_vlan;
 527         u32     ts_ctl_ltype2;
 528         u32     ts_ctl2;
 529 };
 530
 531 struct gbe_port_regs_ofs {
 532         u16     port_vlan;
 533         u16     tx_pri_map;
 534         u16     sa_lo;
 535         u16     sa_hi;
 536         u16     ts_ctl;
 537         u16     ts_seq_ltype;
 538         u16     ts_vlan;
 539         u16     ts_ctl_ltype2;
 540         u16     ts_ctl2;
 541         u16     rx_maxlen;      /* 2U, NU */
 542 };
 543
 544 struct gbe_host_port_regs {
 545         u32     src_id;
 546         u32     port_vlan;
 547         u32     rx_pri_map;
 548         u32     rx_maxlen;
 549 };
 550
 551 struct gbe_host_port_regs_ofs {
 552         u16     port_vlan;
 553         u16     tx_pri_map;
 554         u16     rx_maxlen;
 555 };
 556
 557 struct gbe_emac_regs {
 558         u32     id_ver;
 559         u32     mac_control;
 560         u32     mac_status;
 561         u32     soft_reset;
 562         u32     rx_maxlen;
 563         u32     __reserved_0;
 564         u32     rx_pause;
 565         u32     tx_pause;
 566         u32     __reserved_1;
 567         u32     rx_pri_map;
 568         u32     rsvd[6];
 569 };
 570
 571 struct gbe_emac_regs_ofs {
 572         u16     mac_control;
 573         u16     soft_reset;
 574         u16     rx_maxlen;
 575 };
 576
 577 struct gbe_hw_stats {
 578         u32     rx_good_frames;
 579         u32     rx_broadcast_frames;
 580         u32     rx_multicast_frames;
 581         u32     rx_pause_frames;
 582         u32     rx_crc_errors;
 583         u32     rx_align_code_errors;
 584         u32     rx_oversized_frames;
 585         u32     rx_jabber_frames;
 586         u32     rx_undersized_frames;
 587         u32     rx_fragments;
 588         u32     __pad_0[2];
 589         u32     rx_bytes;
 590         u32     tx_good_frames;
 591         u32     tx_broadcast_frames;
 592         u32     tx_multicast_frames;
 593         u32     tx_pause_frames;
 594         u32     tx_deferred_frames;
 595         u32     tx_collision_frames;
 596         u32     tx_single_coll_frames;
 597         u32     tx_mult_coll_frames;
 598         u32     tx_excessive_collisions;
 599         u32     tx_late_collisions;
 600         u32     tx_underrun;
 601         u32     tx_carrier_sense_errors;
 602         u32     tx_bytes;
 603         u32     tx_64byte_frames;
 604         u32     tx_65_to_127byte_frames;
 605         u32     tx_128_to_255byte_frames;
 606         u32     tx_256_to_511byte_frames;
 607         u32     tx_512_to_1023byte_frames;
 608         u32     tx_1024byte_frames;
 609         u32     net_bytes;
 610         u32     rx_sof_overruns;
 611         u32     rx_mof_overruns;
 612         u32     rx_dma_overruns;
 613 };
 614
 615 #define GBE_MAX_HW_STAT_MODS                    9
 616 #define GBE_HW_STATS_REG_MAP_SZ                 0x100
 617
 618 struct gbe_slave {
 619         void __iomem                    *port_regs;
 620         void __iomem                    *emac_regs;
 621         struct gbe_port_regs_ofs        port_regs_ofs;
 622         struct gbe_emac_regs_ofs        emac_regs_ofs;
 623         int                             slave_num; /* 0 based logical number */
 624         int                             port_num;  /* actual port number */
 625         atomic_t                        link_state;
 626         bool                            open;
 627         struct phy_device               *phy;
 628         u32                             link_interface;
 629         u32                             mac_control;
 630         u8                              phy_port_t;
 631         struct device_node              *phy_node;
 632         struct list_head                slave_list;
 633 };
 634
 635 struct gbe_priv {
 636         struct device                   *dev;
 637         struct netcp_device             *netcp_device;
 638         struct timer_list               timer;
 639         u32                             num_slaves;
 640         u32                             ale_entries;
 641         u32                             ale_ports;
 642         bool                            enable_ale;
 643         u8                              max_num_slaves;
 644         u8                              max_num_ports; /* max_num_slaves + 1 */
 645         struct netcp_tx_pipe            tx_pipe;
 646
 647         int                             host_port;
 648         u32                             rx_packet_max;
 649         u32                             ss_version;
 650         u32                             stats_en_mask;
 651
 652         void __iomem                    *ss_regs;
 653         void __iomem                    *switch_regs;
 654         void __iomem                    *host_port_regs;
 655         void __iomem                    *ale_reg;
 656         void __iomem                    *sgmii_port_regs;
 657         void __iomem                    *sgmii_port34_regs;
 658         void __iomem                    *xgbe_serdes_regs;
 659         void __iomem                    *hw_stats_regs[GBE_MAX_HW_STAT_MODS];
 660
 661         struct gbe_ss_regs_ofs          ss_regs_ofs;
 662         struct gbe_switch_regs_ofs      switch_regs_ofs;
 663         struct gbe_host_port_regs_ofs   host_port_regs_ofs;
 664
 665         struct cpsw_ale                 *ale;
 666         unsigned int                    tx_queue_id;
 667         const char                      *dma_chan_name;
 668
 669         struct list_head                gbe_intf_head;
 670         struct list_head                secondary_slaves;
 671         struct net_device               *dummy_ndev;
 672
 673         u64                             *hw_stats;
 674         const struct netcp_ethtool_stat *et_stats;
 675         int                             num_et_stats;
 676         /*  Lock for updating the hwstats */
 677         spinlock_t                      hw_stats_lock;
 678 };
 679
 680 struct gbe_intf {
 681         struct net_device       *ndev;
 682         struct device           *dev;
 683         struct gbe_priv         *gbe_dev;
 684         struct netcp_tx_pipe    tx_pipe;
 685         struct gbe_slave        *slave;
 686         struct list_head        gbe_intf_list;
 687         unsigned long           active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 688 };
 689
 690 static struct netcp_module gbe_module;
 691 static struct netcp_module xgbe_module;
 692
 693 /* Statistic management */
 694 struct netcp_ethtool_stat {
 695         char desc[ETH_GSTRING_LEN];
 696         int type;
 697         u32 size;
 698         int offset;
 699 };
 700
 701 #define GBE_STATSA_INFO(field)                                          \
 702 {                                                                       \
 703         "GBE_A:"#field, GBE_STATSA_MODULE,                              \
 704         FIELD_SIZEOF(struct gbe_hw_stats, field),                       \
 705         offsetof(struct gbe_hw_stats, field)                            \
 706 }
 707
 708 #define GBE_STATSB_INFO(field)                                          \
 709 {                                                                       \
 710         "GBE_B:"#field, GBE_STATSB_MODULE,                              \
 711         FIELD_SIZEOF(struct gbe_hw_stats, field),                       \
 712         offsetof(struct gbe_hw_stats, field)                            \
 713 }
 714
 715 #define GBE_STATSC_INFO(field)                                          \
 716 {                                                                       \
 717         "GBE_C:"#field, GBE_STATSC_MODULE,                              \
 718         FIELD_SIZEOF(struct gbe_hw_stats, field),                       \
 719         offsetof(struct gbe_hw_stats, field)                            \
 720 }
 721
 722 #define GBE_STATSD_INFO(field)                                          \
 723 {                                                                       \
 724         "GBE_D:"#field, GBE_STATSD_MODULE,                              \
 725         FIELD_SIZEOF(struct gbe_hw_stats, field),                       \
 726         offsetof(struct gbe_hw_stats, field)                            \
 727 }
 728
 729 static const struct netcp_ethtool_stat gbe13_et_stats[] = {
 730         /* GBE module A */
 731         GBE_STATSA_INFO(rx_good_frames),
 732         GBE_STATSA_INFO(rx_broadcast_frames),
 733         GBE_STATSA_INFO(rx_multicast_frames),
 734         GBE_STATSA_INFO(rx_pause_frames),
 735         GBE_STATSA_INFO(rx_crc_errors),
 736         GBE_STATSA_INFO(rx_align_code_errors),
 737         GBE_STATSA_INFO(rx_oversized_frames),
 738         GBE_STATSA_INFO(rx_jabber_frames),
 739         GBE_STATSA_INFO(rx_undersized_frames),
 740         GBE_STATSA_INFO(rx_fragments),
 741         GBE_STATSA_INFO(rx_bytes),
 742         GBE_STATSA_INFO(tx_good_frames),
 743         GBE_STATSA_INFO(tx_broadcast_frames),
 744         GBE_STATSA_INFO(tx_multicast_frames),
 745         GBE_STATSA_INFO(tx_pause_frames),
 746         GBE_STATSA_INFO(tx_deferred_frames),
 747         GBE_STATSA_INFO(tx_collision_frames),
 748         GBE_STATSA_INFO(tx_single_coll_frames),
 749         GBE_STATSA_INFO(tx_mult_coll_frames),
 750         GBE_STATSA_INFO(tx_excessive_collisions),
 751         GBE_STATSA_INFO(tx_late_collisions),
 752         GBE_STATSA_INFO(tx_underrun),
 753         GBE_STATSA_INFO(tx_carrier_sense_errors),
 754         GBE_STATSA_INFO(tx_bytes),
 755         GBE_STATSA_INFO(tx_64byte_frames),
 756         GBE_STATSA_INFO(tx_65_to_127byte_frames),
 757         GBE_STATSA_INFO(tx_128_to_255byte_frames),
 758         GBE_STATSA_INFO(tx_256_to_511byte_frames),
 759         GBE_STATSA_INFO(tx_512_to_1023byte_frames),
 760         GBE_STATSA_INFO(tx_1024byte_frames),
 761         GBE_STATSA_INFO(net_bytes),
 762         GBE_STATSA_INFO(rx_sof_overruns),
 763         GBE_STATSA_INFO(rx_mof_overruns),
 764         GBE_STATSA_INFO(rx_dma_overruns),
 765         /* GBE module B */
 766         GBE_STATSB_INFO(rx_good_frames),
 767         GBE_STATSB_INFO(rx_broadcast_frames),
 768         GBE_STATSB_INFO(rx_multicast_frames),
 769         GBE_STATSB_INFO(rx_pause_frames),
 770         GBE_STATSB_INFO(rx_crc_errors),
 771         GBE_STATSB_INFO(rx_align_code_errors),
 772         GBE_STATSB_INFO(rx_oversized_frames),
 773         GBE_STATSB_INFO(rx_jabber_frames),
 774         GBE_STATSB_INFO(rx_undersized_frames),
 775         GBE_STATSB_INFO(rx_fragments),
 776         GBE_STATSB_INFO(rx_bytes),
 777         GBE_STATSB_INFO(tx_good_frames),
 778         GBE_STATSB_INFO(tx_broadcast_frames),
 779         GBE_STATSB_INFO(tx_multicast_frames),
 780         GBE_STATSB_INFO(tx_pause_frames),
 781         GBE_STATSB_INFO(tx_deferred_frames),
 782         GBE_STATSB_INFO(tx_collision_frames),
 783         GBE_STATSB_INFO(tx_single_coll_frames),
 784         GBE_STATSB_INFO(tx_mult_coll_frames),
 785         GBE_STATSB_INFO(tx_excessive_collisions),
 786         GBE_STATSB_INFO(tx_late_collisions),
 787         GBE_STATSB_INFO(tx_underrun),
 788         GBE_STATSB_INFO(tx_carrier_sense_errors),
 789         GBE_STATSB_INFO(tx_bytes),
 790         GBE_STATSB_INFO(tx_64byte_frames),
 791         GBE_STATSB_INFO(tx_65_to_127byte_frames),
 792         GBE_STATSB_INFO(tx_128_to_255byte_frames),
 793         GBE_STATSB_INFO(tx_256_to_511byte_frames),
 794         GBE_STATSB_INFO(tx_512_to_1023byte_frames),
 795         GBE_STATSB_INFO(tx_1024byte_frames),
 796         GBE_STATSB_INFO(net_bytes),
 797         GBE_STATSB_INFO(rx_sof_overruns),
 798         GBE_STATSB_INFO(rx_mof_overruns),
 799         GBE_STATSB_INFO(rx_dma_overruns),
 800         /* GBE module C */
 801         GBE_STATSC_INFO(rx_good_frames),
 802         GBE_STATSC_INFO(rx_broadcast_frames),
 803         GBE_STATSC_INFO(rx_multicast_frames),
 804         GBE_STATSC_INFO(rx_pause_frames),
 805         GBE_STATSC_INFO(rx_crc_errors),
 806         GBE_STATSC_INFO(rx_align_code_errors),
 807         GBE_STATSC_INFO(rx_oversized_frames),
 808         GBE_STATSC_INFO(rx_jabber_frames),
 809         GBE_STATSC_INFO(rx_undersized_frames),
 810         GBE_STATSC_INFO(rx_fragments),
 811         GBE_STATSC_INFO(rx_bytes),
 812         GBE_STATSC_INFO(tx_good_frames),
 813         GBE_STATSC_INFO(tx_broadcast_frames),
 814         GBE_STATSC_INFO(tx_multicast_frames),
 815         GBE_STATSC_INFO(tx_pause_frames),
 816         GBE_STATSC_INFO(tx_deferred_frames),
 817         GBE_STATSC_INFO(tx_collision_frames),
 818         GBE_STATSC_INFO(tx_single_coll_frames),
 819         GBE_STATSC_INFO(tx_mult_coll_frames),
 820         GBE_STATSC_INFO(tx_excessive_collisions),
 821         GBE_STATSC_INFO(tx_late_collisions),
 822         GBE_STATSC_INFO(tx_underrun),
 823         GBE_STATSC_INFO(tx_carrier_sense_errors),
 824         GBE_STATSC_INFO(tx_bytes),
 825         GBE_STATSC_INFO(tx_64byte_frames),
 826         GBE_STATSC_INFO(tx_65_to_127byte_frames),
 827         GBE_STATSC_INFO(tx_128_to_255byte_frames),
 828         GBE_STATSC_INFO(tx_256_to_511byte_frames),
 829         GBE_STATSC_INFO(tx_512_to_1023byte_frames),
 830         GBE_STATSC_INFO(tx_1024byte_frames),
 831         GBE_STATSC_INFO(net_bytes),
 832         GBE_STATSC_INFO(rx_sof_overruns),
 833         GBE_STATSC_INFO(rx_mof_overruns),
 834         GBE_STATSC_INFO(rx_dma_overruns),
 835         /* GBE module D */
 836         GBE_STATSD_INFO(rx_good_frames),
 837         GBE_STATSD_INFO(rx_broadcast_frames),
 838         GBE_STATSD_INFO(rx_multicast_frames),
 839         GBE_STATSD_INFO(rx_pause_frames),
 840         GBE_STATSD_INFO(rx_crc_errors),
 841         GBE_STATSD_INFO(rx_align_code_errors),
 842         GBE_STATSD_INFO(rx_oversized_frames),
 843         GBE_STATSD_INFO(rx_jabber_frames),
 844         GBE_STATSD_INFO(rx_undersized_frames),
 845         GBE_STATSD_INFO(rx_fragments),
 846         GBE_STATSD_INFO(rx_bytes),
 847         GBE_STATSD_INFO(tx_good_frames),
 848         GBE_STATSD_INFO(tx_broadcast_frames),
 849         GBE_STATSD_INFO(tx_multicast_frames),
 850         GBE_STATSD_INFO(tx_pause_frames),
 851         GBE_STATSD_INFO(tx_deferred_frames),
 852         GBE_STATSD_INFO(tx_collision_frames),
 853         GBE_STATSD_INFO(tx_single_coll_frames),
 854         GBE_STATSD_INFO(tx_mult_coll_frames),
 855         GBE_STATSD_INFO(tx_excessive_collisions),
 856         GBE_STATSD_INFO(tx_late_collisions),
 857         GBE_STATSD_INFO(tx_underrun),
 858         GBE_STATSD_INFO(tx_carrier_sense_errors),
 859         GBE_STATSD_INFO(tx_bytes),
 860         GBE_STATSD_INFO(tx_64byte_frames),
 861         GBE_STATSD_INFO(tx_65_to_127byte_frames),
 862         GBE_STATSD_INFO(tx_128_to_255byte_frames),
 863         GBE_STATSD_INFO(tx_256_to_511byte_frames),
 864         GBE_STATSD_INFO(tx_512_to_1023byte_frames),
 865         GBE_STATSD_INFO(tx_1024byte_frames),
 866         GBE_STATSD_INFO(net_bytes),
 867         GBE_STATSD_INFO(rx_sof_overruns),
 868         GBE_STATSD_INFO(rx_mof_overruns),
 869         GBE_STATSD_INFO(rx_dma_overruns),
 870 };
 871
 872 /* This is the size of entries in GBENU_STATS_HOST */
 873 #define GBENU_ET_STATS_HOST_SIZE        33
 874
 875 #define GBENU_STATS_HOST(field)                                 \
 876 {                                                               \
 877         "GBE_HOST:"#field, GBENU_STATS0_MODULE,                 \
 878         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 879         offsetof(struct gbenu_hw_stats, field)                  \
 880 }
 881
 882 /* This is the size of entries in GBENU_STATS_HOST */
 883 #define GBENU_ET_STATS_PORT_SIZE        46
 884
 885 #define GBENU_STATS_P1(field)                                   \
 886 {                                                               \
 887         "GBE_P1:"#field, GBENU_STATS1_MODULE,                   \
 888         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 889         offsetof(struct gbenu_hw_stats, field)                  \
 890 }
 891
 892 #define GBENU_STATS_P2(field)                                   \
 893 {                                                               \
 894         "GBE_P2:"#field, GBENU_STATS2_MODULE,                   \
 895         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 896         offsetof(struct gbenu_hw_stats, field)                  \
 897 }
 898
 899 #define GBENU_STATS_P3(field)                                   \
 900 {                                                               \
 901         "GBE_P3:"#field, GBENU_STATS3_MODULE,                   \
 902         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 903         offsetof(struct gbenu_hw_stats, field)                  \
 904 }
 905
 906 #define GBENU_STATS_P4(field)                                   \
 907 {                                                               \
 908         "GBE_P4:"#field, GBENU_STATS4_MODULE,                   \
 909         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 910         offsetof(struct gbenu_hw_stats, field)                  \
 911 }
 912
 913 #define GBENU_STATS_P5(field)                                   \
 914 {                                                               \
 915         "GBE_P5:"#field, GBENU_STATS5_MODULE,                   \
 916         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 917         offsetof(struct gbenu_hw_stats, field)                  \
 918 }
 919
 920 #define GBENU_STATS_P6(field)                                   \
 921 {                                                               \
 922         "GBE_P6:"#field, GBENU_STATS6_MODULE,                   \
 923         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 924         offsetof(struct gbenu_hw_stats, field)                  \
 925 }
 926
 927 #define GBENU_STATS_P7(field)                                   \
 928 {                                                               \
 929         "GBE_P7:"#field, GBENU_STATS7_MODULE,                   \
 930         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 931         offsetof(struct gbenu_hw_stats, field)                  \
 932 }
 933
 934 #define GBENU_STATS_P8(field)                                   \
 935 {                                                               \
 936         "GBE_P8:"#field, GBENU_STATS8_MODULE,                   \
 937         FIELD_SIZEOF(struct gbenu_hw_stats, field),             \
 938         offsetof(struct gbenu_hw_stats, field)                  \
 939 }
 940
 941 static const struct netcp_ethtool_stat gbenu_et_stats[] = {
 942         /* GBENU Host Module */
 943         GBENU_STATS_HOST(rx_good_frames),
 944         GBENU_STATS_HOST(rx_broadcast_frames),
 945         GBENU_STATS_HOST(rx_multicast_frames),
 946         GBENU_STATS_HOST(rx_crc_errors),
 947         GBENU_STATS_HOST(rx_oversized_frames),
 948         GBENU_STATS_HOST(rx_undersized_frames),
 949         GBENU_STATS_HOST(ale_drop),
 950         GBENU_STATS_HOST(ale_overrun_drop),
 951         GBENU_STATS_HOST(rx_bytes),
 952         GBENU_STATS_HOST(tx_good_frames),
 953         GBENU_STATS_HOST(tx_broadcast_frames),
 954         GBENU_STATS_HOST(tx_multicast_frames),
 955         GBENU_STATS_HOST(tx_bytes),
 956         GBENU_STATS_HOST(tx_64B_frames),
 957         GBENU_STATS_HOST(tx_65_to_127B_frames),
 958         GBENU_STATS_HOST(tx_128_to_255B_frames),
 959         GBENU_STATS_HOST(tx_256_to_511B_frames),
 960         GBENU_STATS_HOST(tx_512_to_1023B_frames),
 961         GBENU_STATS_HOST(tx_1024B_frames),
 962         GBENU_STATS_HOST(net_bytes),
 963         GBENU_STATS_HOST(rx_bottom_fifo_drop),
 964         GBENU_STATS_HOST(rx_port_mask_drop),
 965         GBENU_STATS_HOST(rx_top_fifo_drop),
 966         GBENU_STATS_HOST(ale_rate_limit_drop),
 967         GBENU_STATS_HOST(ale_vid_ingress_drop),
 968         GBENU_STATS_HOST(ale_da_eq_sa_drop),
 969         GBENU_STATS_HOST(ale_unknown_ucast),
 970         GBENU_STATS_HOST(ale_unknown_ucast_bytes),
 971         GBENU_STATS_HOST(ale_unknown_mcast),
 972         GBENU_STATS_HOST(ale_unknown_mcast_bytes),
 973         GBENU_STATS_HOST(ale_unknown_bcast),
 974         GBENU_STATS_HOST(ale_unknown_bcast_bytes),
 975         GBENU_STATS_HOST(tx_mem_protect_err),
 976         /* GBENU Module 1 */
 977         GBENU_STATS_P1(rx_good_frames),
 978         GBENU_STATS_P1(rx_broadcast_frames),
 979         GBENU_STATS_P1(rx_multicast_frames),
 980         GBENU_STATS_P1(rx_pause_frames),
 981         GBENU_STATS_P1(rx_crc_errors),
 982         GBENU_STATS_P1(rx_align_code_errors),
 983         GBENU_STATS_P1(rx_oversized_frames),
 984         GBENU_STATS_P1(rx_jabber_frames),
 985         GBENU_STATS_P1(rx_undersized_frames),
 986         GBENU_STATS_P1(rx_fragments),
 987         GBENU_STATS_P1(ale_drop),
 988         GBENU_STATS_P1(ale_overrun_drop),
 989         GBENU_STATS_P1(rx_bytes),
 990         GBENU_STATS_P1(tx_good_frames),
 991         GBENU_STATS_P1(tx_broadcast_frames),
 992         GBENU_STATS_P1(tx_multicast_frames),
 993         GBENU_STATS_P1(tx_pause_frames),
 994         GBENU_STATS_P1(tx_deferred_frames),
 995         GBENU_STATS_P1(tx_collision_frames),
 996         GBENU_STATS_P1(tx_single_coll_frames),
 997         GBENU_STATS_P1(tx_mult_coll_frames),
 998         GBENU_STATS_P1(tx_excessive_collisions),
 999         GBENU_STATS_P1(tx_late_collisions),
1000         GBENU_STATS_P1(rx_ipg_error),
1001         GBENU_STATS_P1(tx_carrier_sense_errors),
1002         GBENU_STATS_P1(tx_bytes),
1003         GBENU_STATS_P1(tx_64B_frames),
1004         GBENU_STATS_P1(tx_65_to_127B_frames),
1005         GBENU_STATS_P1(tx_128_to_255B_frames),
1006         GBENU_STATS_P1(tx_256_to_511B_frames),
1007         GBENU_STATS_P1(tx_512_to_1023B_frames),
1008         GBENU_STATS_P1(tx_1024B_frames),
1009         GBENU_STATS_P1(net_bytes),
1010         GBENU_STATS_P1(rx_bottom_fifo_drop),
1011         GBENU_STATS_P1(rx_port_mask_drop),
1012         GBENU_STATS_P1(rx_top_fifo_drop),
1013         GBENU_STATS_P1(ale_rate_limit_drop),
1014         GBENU_STATS_P1(ale_vid_ingress_drop),
1015         GBENU_STATS_P1(ale_da_eq_sa_drop),
1016         GBENU_STATS_P1(ale_unknown_ucast),
1017         GBENU_STATS_P1(ale_unknown_ucast_bytes),
1018         GBENU_STATS_P1(ale_unknown_mcast),
1019         GBENU_STATS_P1(ale_unknown_mcast_bytes),
1020         GBENU_STATS_P1(ale_unknown_bcast),
1021         GBENU_STATS_P1(ale_unknown_bcast_bytes),
1022         GBENU_STATS_P1(tx_mem_protect_err),
1023         /* GBENU Module 2 */
1024         GBENU_STATS_P2(rx_good_frames),
1025         GBENU_STATS_P2(rx_broadcast_frames),
1026         GBENU_STATS_P2(rx_multicast_frames),
1027         GBENU_STATS_P2(rx_pause_frames),
1028         GBENU_STATS_P2(rx_crc_errors),
1029         GBENU_STATS_P2(rx_align_code_errors),
1030         GBENU_STATS_P2(rx_oversized_frames),
1031         GBENU_STATS_P2(rx_jabber_frames),
1032         GBENU_STATS_P2(rx_undersized_frames),
1033         GBENU_STATS_P2(rx_fragments),
1034         GBENU_STATS_P2(ale_drop),
1035         GBENU_STATS_P2(ale_overrun_drop),
1036         GBENU_STATS_P2(rx_bytes),
1037         GBENU_STATS_P2(tx_good_frames),
1038         GBENU_STATS_P2(tx_broadcast_frames),
1039         GBENU_STATS_P2(tx_multicast_frames),
1040         GBENU_STATS_P2(tx_pause_frames),
1041         GBENU_STATS_P2(tx_deferred_frames),
1042         GBENU_STATS_P2(tx_collision_frames),
1043         GBENU_STATS_P2(tx_single_coll_frames),
1044         GBENU_STATS_P2(tx_mult_coll_frames),
1045         GBENU_STATS_P2(tx_excessive_collisions),
1046         GBENU_STATS_P2(tx_late_collisions),
1047         GBENU_STATS_P2(rx_ipg_error),
1048         GBENU_STATS_P2(tx_carrier_sense_errors),
1049         GBENU_STATS_P2(tx_bytes),
1050         GBENU_STATS_P2(tx_64B_frames),
1051         GBENU_STATS_P2(tx_65_to_127B_frames),
1052         GBENU_STATS_P2(tx_128_to_255B_frames),
1053         GBENU_STATS_P2(tx_256_to_511B_frames),
1054         GBENU_STATS_P2(tx_512_to_1023B_frames),
1055         GBENU_STATS_P2(tx_1024B_frames),
1056         GBENU_STATS_P2(net_bytes),
1057         GBENU_STATS_P2(rx_bottom_fifo_drop),
1058         GBENU_STATS_P2(rx_port_mask_drop),
1059         GBENU_STATS_P2(rx_top_fifo_drop),
1060         GBENU_STATS_P2(ale_rate_limit_drop),
1061         GBENU_STATS_P2(ale_vid_ingress_drop),
1062         GBENU_STATS_P2(ale_da_eq_sa_drop),
1063         GBENU_STATS_P2(ale_unknown_ucast),
1064         GBENU_STATS_P2(ale_unknown_ucast_bytes),
1065         GBENU_STATS_P2(ale_unknown_mcast),
1066         GBENU_STATS_P2(ale_unknown_mcast_bytes),
1067         GBENU_STATS_P2(ale_unknown_bcast),
1068         GBENU_STATS_P2(ale_unknown_bcast_bytes),
1069         GBENU_STATS_P2(tx_mem_protect_err),
1070         /* GBENU Module 3 */
1071         GBENU_STATS_P3(rx_good_frames),
1072         GBENU_STATS_P3(rx_broadcast_frames),
1073         GBENU_STATS_P3(rx_multicast_frames),
1074         GBENU_STATS_P3(rx_pause_frames),
1075         GBENU_STATS_P3(rx_crc_errors),
1076         GBENU_STATS_P3(rx_align_code_errors),
1077         GBENU_STATS_P3(rx_oversized_frames),
1078         GBENU_STATS_P3(rx_jabber_frames),
1079         GBENU_STATS_P3(rx_undersized_frames),
1080         GBENU_STATS_P3(rx_fragments),
1081         GBENU_STATS_P3(ale_drop),
1082         GBENU_STATS_P3(ale_overrun_drop),
1083         GBENU_STATS_P3(rx_bytes),
1084         GBENU_STATS_P3(tx_good_frames),
1085         GBENU_STATS_P3(tx_broadcast_frames),
1086         GBENU_STATS_P3(tx_multicast_frames),
1087         GBENU_STATS_P3(tx_pause_frames),
1088         GBENU_STATS_P3(tx_deferred_frames),
1089         GBENU_STATS_P3(tx_collision_frames),
1090         GBENU_STATS_P3(tx_single_coll_frames),
1091         GBENU_STATS_P3(tx_mult_coll_frames),
1092         GBENU_STATS_P3(tx_excessive_collisions),
1093         GBENU_STATS_P3(tx_late_collisions),
1094         GBENU_STATS_P3(rx_ipg_error),
1095         GBENU_STATS_P3(tx_carrier_sense_errors),
1096         GBENU_STATS_P3(tx_bytes),
1097         GBENU_STATS_P3(tx_64B_frames),
1098         GBENU_STATS_P3(tx_65_to_127B_frames),
1099         GBENU_STATS_P3(tx_128_to_255B_frames),
1100         GBENU_STATS_P3(tx_256_to_511B_frames),
1101         GBENU_STATS_P3(tx_512_to_1023B_frames),
1102         GBENU_STATS_P3(tx_1024B_frames),
1103         GBENU_STATS_P3(net_bytes),
1104         GBENU_STATS_P3(rx_bottom_fifo_drop),
1105         GBENU_STATS_P3(rx_port_mask_drop),
1106         GBENU_STATS_P3(rx_top_fifo_drop),
1107         GBENU_STATS_P3(ale_rate_limit_drop),
1108         GBENU_STATS_P3(ale_vid_ingress_drop),
1109         GBENU_STATS_P3(ale_da_eq_sa_drop),
1110         GBENU_STATS_P3(ale_unknown_ucast),
1111         GBENU_STATS_P3(ale_unknown_ucast_bytes),
1112         GBENU_STATS_P3(ale_unknown_mcast),
1113         GBENU_STATS_P3(ale_unknown_mcast_bytes),
1114         GBENU_STATS_P3(ale_unknown_bcast),
1115         GBENU_STATS_P3(ale_unknown_bcast_bytes),
1116         GBENU_STATS_P3(tx_mem_protect_err),
1117         /* GBENU Module 4 */
1118         GBENU_STATS_P4(rx_good_frames),
1119         GBENU_STATS_P4(rx_broadcast_frames),
1120         GBENU_STATS_P4(rx_multicast_frames),
1121         GBENU_STATS_P4(rx_pause_frames),
1122         GBENU_STATS_P4(rx_crc_errors),
1123         GBENU_STATS_P4(rx_align_code_errors),
1124         GBENU_STATS_P4(rx_oversized_frames),
1125         GBENU_STATS_P4(rx_jabber_frames),
1126         GBENU_STATS_P4(rx_undersized_frames),
1127         GBENU_STATS_P4(rx_fragments),
1128         GBENU_STATS_P4(ale_drop),
1129         GBENU_STATS_P4(ale_overrun_drop),
1130         GBENU_STATS_P4(rx_bytes),
1131         GBENU_STATS_P4(tx_good_frames),
1132         GBENU_STATS_P4(tx_broadcast_frames),
1133         GBENU_STATS_P4(tx_multicast_frames),
1134         GBENU_STATS_P4(tx_pause_frames),
1135         GBENU_STATS_P4(tx_deferred_frames),
1136         GBENU_STATS_P4(tx_collision_frames),
1137         GBENU_STATS_P4(tx_single_coll_frames),
1138         GBENU_STATS_P4(tx_mult_coll_frames),
1139         GBENU_STATS_P4(tx_excessive_collisions),
1140         GBENU_STATS_P4(tx_late_collisions),
1141         GBENU_STATS_P4(rx_ipg_error),
1142         GBENU_STATS_P4(tx_carrier_sense_errors),
1143         GBENU_STATS_P4(tx_bytes),
1144         GBENU_STATS_P4(tx_64B_frames),
1145         GBENU_STATS_P4(tx_65_to_127B_frames),
1146         GBENU_STATS_P4(tx_128_to_255B_frames),
1147         GBENU_STATS_P4(tx_256_to_511B_frames),
1148         GBENU_STATS_P4(tx_512_to_1023B_frames),
1149         GBENU_STATS_P4(tx_1024B_frames),
1150         GBENU_STATS_P4(net_bytes),
1151         GBENU_STATS_P4(rx_bottom_fifo_drop),
1152         GBENU_STATS_P4(rx_port_mask_drop),
1153         GBENU_STATS_P4(rx_top_fifo_drop),
1154         GBENU_STATS_P4(ale_rate_limit_drop),
1155         GBENU_STATS_P4(ale_vid_ingress_drop),
1156         GBENU_STATS_P4(ale_da_eq_sa_drop),
1157         GBENU_STATS_P4(ale_unknown_ucast),
1158         GBENU_STATS_P4(ale_unknown_ucast_bytes),
1159         GBENU_STATS_P4(ale_unknown_mcast),
1160         GBENU_STATS_P4(ale_unknown_mcast_bytes),
1161         GBENU_STATS_P4(ale_unknown_bcast),
1162         GBENU_STATS_P4(ale_unknown_bcast_bytes),
1163         GBENU_STATS_P4(tx_mem_protect_err),
1164         /* GBENU Module 5 */
1165         GBENU_STATS_P5(rx_good_frames),
1166         GBENU_STATS_P5(rx_broadcast_frames),
1167         GBENU_STATS_P5(rx_multicast_frames),
1168         GBENU_STATS_P5(rx_pause_frames),
1169         GBENU_STATS_P5(rx_crc_errors),
1170         GBENU_STATS_P5(rx_align_code_errors),
1171         GBENU_STATS_P5(rx_oversized_frames),
1172         GBENU_STATS_P5(rx_jabber_frames),
1173         GBENU_STATS_P5(rx_undersized_frames),
1174         GBENU_STATS_P5(rx_fragments),
1175         GBENU_STATS_P5(ale_drop),
1176         GBENU_STATS_P5(ale_overrun_drop),
1177         GBENU_STATS_P5(rx_bytes),
1178         GBENU_STATS_P5(tx_good_frames),
1179         GBENU_STATS_P5(tx_broadcast_frames),
1180         GBENU_STATS_P5(tx_multicast_frames),
1181         GBENU_STATS_P5(tx_pause_frames),
1182         GBENU_STATS_P5(tx_deferred_frames),
1183         GBENU_STATS_P5(tx_collision_frames),
1184         GBENU_STATS_P5(tx_single_coll_frames),
1185         GBENU_STATS_P5(tx_mult_coll_frames),
1186         GBENU_STATS_P5(tx_excessive_collisions),
1187         GBENU_STATS_P5(tx_late_collisions),
1188         GBENU_STATS_P5(rx_ipg_error),
1189         GBENU_STATS_P5(tx_carrier_sense_errors),
1190         GBENU_STATS_P5(tx_bytes),
1191         GBENU_STATS_P5(tx_64B_frames),
1192         GBENU_STATS_P5(tx_65_to_127B_frames),
1193         GBENU_STATS_P5(tx_128_to_255B_frames),
1194         GBENU_STATS_P5(tx_256_to_511B_frames),
1195         GBENU_STATS_P5(tx_512_to_1023B_frames),
1196         GBENU_STATS_P5(tx_1024B_frames),
1197         GBENU_STATS_P5(net_bytes),
1198         GBENU_STATS_P5(rx_bottom_fifo_drop),
1199         GBENU_STATS_P5(rx_port_mask_drop),
1200         GBENU_STATS_P5(rx_top_fifo_drop),
1201         GBENU_STATS_P5(ale_rate_limit_drop),
1202         GBENU_STATS_P5(ale_vid_ingress_drop),
1203         GBENU_STATS_P5(ale_da_eq_sa_drop),
1204         GBENU_STATS_P5(ale_unknown_ucast),
1205         GBENU_STATS_P5(ale_unknown_ucast_bytes),
1206         GBENU_STATS_P5(ale_unknown_mcast),
1207         GBENU_STATS_P5(ale_unknown_mcast_bytes),
1208         GBENU_STATS_P5(ale_unknown_bcast),
1209         GBENU_STATS_P5(ale_unknown_bcast_bytes),
1210         GBENU_STATS_P5(tx_mem_protect_err),
1211         /* GBENU Module 6 */
1212         GBENU_STATS_P6(rx_good_frames),
1213         GBENU_STATS_P6(rx_broadcast_frames),
1214         GBENU_STATS_P6(rx_multicast_frames),
1215         GBENU_STATS_P6(rx_pause_frames),
1216         GBENU_STATS_P6(rx_crc_errors),
1217         GBENU_STATS_P6(rx_align_code_errors),
1218         GBENU_STATS_P6(rx_oversized_frames),
1219         GBENU_STATS_P6(rx_jabber_frames),
1220         GBENU_STATS_P6(rx_undersized_frames),
1221         GBENU_STATS_P6(rx_fragments),
1222         GBENU_STATS_P6(ale_drop),
1223         GBENU_STATS_P6(ale_overrun_drop),
1224         GBENU_STATS_P6(rx_bytes),
1225         GBENU_STATS_P6(tx_good_frames),
1226         GBENU_STATS_P6(tx_broadcast_frames),
1227         GBENU_STATS_P6(tx_multicast_frames),
1228         GBENU_STATS_P6(tx_pause_frames),
1229         GBENU_STATS_P6(tx_deferred_frames),
1230         GBENU_STATS_P6(tx_collision_frames),
1231         GBENU_STATS_P6(tx_single_coll_frames),
1232         GBENU_STATS_P6(tx_mult_coll_frames),
1233         GBENU_STATS_P6(tx_excessive_collisions),
1234         GBENU_STATS_P6(tx_late_collisions),
1235         GBENU_STATS_P6(rx_ipg_error),
1236         GBENU_STATS_P6(tx_carrier_sense_errors),
1237         GBENU_STATS_P6(tx_bytes),
1238         GBENU_STATS_P6(tx_64B_frames),
1239         GBENU_STATS_P6(tx_65_to_127B_frames),
1240         GBENU_STATS_P6(tx_128_to_255B_frames),
1241         GBENU_STATS_P6(tx_256_to_511B_frames),
1242         GBENU_STATS_P6(tx_512_to_1023B_frames),
1243         GBENU_STATS_P6(tx_1024B_frames),
1244         GBENU_STATS_P6(net_bytes),
1245         GBENU_STATS_P6(rx_bottom_fifo_drop),
1246         GBENU_STATS_P6(rx_port_mask_drop),
1247         GBENU_STATS_P6(rx_top_fifo_drop),
1248         GBENU_STATS_P6(ale_rate_limit_drop),
1249         GBENU_STATS_P6(ale_vid_ingress_drop),
1250         GBENU_STATS_P6(ale_da_eq_sa_drop),
1251         GBENU_STATS_P6(ale_unknown_ucast),
1252         GBENU_STATS_P6(ale_unknown_ucast_bytes),
1253         GBENU_STATS_P6(ale_unknown_mcast),
1254         GBENU_STATS_P6(ale_unknown_mcast_bytes),
1255         GBENU_STATS_P6(ale_unknown_bcast),
1256         GBENU_STATS_P6(ale_unknown_bcast_bytes),
1257         GBENU_STATS_P6(tx_mem_protect_err),
1258         /* GBENU Module 7 */
1259         GBENU_STATS_P7(rx_good_frames),
1260         GBENU_STATS_P7(rx_broadcast_frames),
1261         GBENU_STATS_P7(rx_multicast_frames),
1262         GBENU_STATS_P7(rx_pause_frames),
1263         GBENU_STATS_P7(rx_crc_errors),
1264         GBENU_STATS_P7(rx_align_code_errors),
1265         GBENU_STATS_P7(rx_oversized_frames),
1266         GBENU_STATS_P7(rx_jabber_frames),
1267         GBENU_STATS_P7(rx_undersized_frames),
1268         GBENU_STATS_P7(rx_fragments),
1269         GBENU_STATS_P7(ale_drop),
1270         GBENU_STATS_P7(ale_overrun_drop),
1271         GBENU_STATS_P7(rx_bytes),
1272         GBENU_STATS_P7(tx_good_frames),
1273         GBENU_STATS_P7(tx_broadcast_frames),
1274         GBENU_STATS_P7(tx_multicast_frames),
1275         GBENU_STATS_P7(tx_pause_frames),
1276         GBENU_STATS_P7(tx_deferred_frames),
1277         GBENU_STATS_P7(tx_collision_frames),
1278         GBENU_STATS_P7(tx_single_coll_frames),
1279         GBENU_STATS_P7(tx_mult_coll_frames),
1280         GBENU_STATS_P7(tx_excessive_collisions),
1281         GBENU_STATS_P7(tx_late_collisions),
1282         GBENU_STATS_P7(rx_ipg_error),
1283         GBENU_STATS_P7(tx_carrier_sense_errors),
1284         GBENU_STATS_P7(tx_bytes),
1285         GBENU_STATS_P7(tx_64B_frames),
1286         GBENU_STATS_P7(tx_65_to_127B_frames),
1287         GBENU_STATS_P7(tx_128_to_255B_frames),
1288         GBENU_STATS_P7(tx_256_to_511B_frames),
1289         GBENU_STATS_P7(tx_512_to_1023B_frames),
1290         GBENU_STATS_P7(tx_1024B_frames),
1291         GBENU_STATS_P7(net_bytes),
1292         GBENU_STATS_P7(rx_bottom_fifo_drop),
1293         GBENU_STATS_P7(rx_port_mask_drop),
1294         GBENU_STATS_P7(rx_top_fifo_drop),
1295         GBENU_STATS_P7(ale_rate_limit_drop),
1296         GBENU_STATS_P7(ale_vid_ingress_drop),
1297         GBENU_STATS_P7(ale_da_eq_sa_drop),
1298         GBENU_STATS_P7(ale_unknown_ucast),
1299         GBENU_STATS_P7(ale_unknown_ucast_bytes),
1300         GBENU_STATS_P7(ale_unknown_mcast),
1301         GBENU_STATS_P7(ale_unknown_mcast_bytes),
1302         GBENU_STATS_P7(ale_unknown_bcast),
1303         GBENU_STATS_P7(ale_unknown_bcast_bytes),
1304         GBENU_STATS_P7(tx_mem_protect_err),
1305         /* GBENU Module 8 */
1306         GBENU_STATS_P8(rx_good_frames),
1307         GBENU_STATS_P8(rx_broadcast_frames),
1308         GBENU_STATS_P8(rx_multicast_frames),
1309         GBENU_STATS_P8(rx_pause_frames),
1310         GBENU_STATS_P8(rx_crc_errors),
1311         GBENU_STATS_P8(rx_align_code_errors),
1312         GBENU_STATS_P8(rx_oversized_frames),
1313         GBENU_STATS_P8(rx_jabber_frames),
1314         GBENU_STATS_P8(rx_undersized_frames),
1315         GBENU_STATS_P8(rx_fragments),
1316         GBENU_STATS_P8(ale_drop),
1317         GBENU_STATS_P8(ale_overrun_drop),
1318         GBENU_STATS_P8(rx_bytes),
1319         GBENU_STATS_P8(tx_good_frames),
1320         GBENU_STATS_P8(tx_broadcast_frames),
1321         GBENU_STATS_P8(tx_multicast_frames),
1322         GBENU_STATS_P8(tx_pause_frames),
1323         GBENU_STATS_P8(tx_deferred_frames),
1324         GBENU_STATS_P8(tx_collision_frames),
1325         GBENU_STATS_P8(tx_single_coll_frames),
1326         GBENU_STATS_P8(tx_mult_coll_frames),
1327         GBENU_STATS_P8(tx_excessive_collisions),
1328         GBENU_STATS_P8(tx_late_collisions),
1329         GBENU_STATS_P8(rx_ipg_error),
1330         GBENU_STATS_P8(tx_carrier_sense_errors),
1331         GBENU_STATS_P8(tx_bytes),
1332         GBENU_STATS_P8(tx_64B_frames),
1333         GBENU_STATS_P8(tx_65_to_127B_frames),
1334         GBENU_STATS_P8(tx_128_to_255B_frames),
1335         GBENU_STATS_P8(tx_256_to_511B_frames),
1336         GBENU_STATS_P8(tx_512_to_1023B_frames),
1337         GBENU_STATS_P8(tx_1024B_frames),
1338         GBENU_STATS_P8(net_bytes),
1339         GBENU_STATS_P8(rx_bottom_fifo_drop),
1340         GBENU_STATS_P8(rx_port_mask_drop),
1341         GBENU_STATS_P8(rx_top_fifo_drop),
1342         GBENU_STATS_P8(ale_rate_limit_drop),
1343         GBENU_STATS_P8(ale_vid_ingress_drop),
1344         GBENU_STATS_P8(ale_da_eq_sa_drop),
1345         GBENU_STATS_P8(ale_unknown_ucast),
1346         GBENU_STATS_P8(ale_unknown_ucast_bytes),
1347         GBENU_STATS_P8(ale_unknown_mcast),
1348         GBENU_STATS_P8(ale_unknown_mcast_bytes),
1349         GBENU_STATS_P8(ale_unknown_bcast),
1350         GBENU_STATS_P8(ale_unknown_bcast_bytes),
1351         GBENU_STATS_P8(tx_mem_protect_err),
1352 };
1353
1354 #define XGBE_STATS0_INFO(field)                         \
1355 {                                                       \
1356         "GBE_0:"#field, XGBE_STATS0_MODULE,             \
1357         FIELD_SIZEOF(struct xgbe_hw_stats, field),      \
1358         offsetof(struct xgbe_hw_stats, field)           \
1359 }
1360
1361 #define XGBE_STATS1_INFO(field)                         \
1362 {                                                       \
1363         "GBE_1:"#field, XGBE_STATS1_MODULE,             \
1364         FIELD_SIZEOF(struct xgbe_hw_stats, field),      \
1365         offsetof(struct xgbe_hw_stats, field)           \
1366 }
1367
1368 #define XGBE_STATS2_INFO(field)                         \
1369 {                                                       \
1370         "GBE_2:"#field, XGBE_STATS2_MODULE,             \
1371         FIELD_SIZEOF(struct xgbe_hw_stats, field),      \
1372         offsetof(struct xgbe_hw_stats, field)           \
1373 }
1374
1375 static const struct netcp_ethtool_stat xgbe10_et_stats[] = {
1376         /* GBE module 0 */
1377         XGBE_STATS0_INFO(rx_good_frames),
1378         XGBE_STATS0_INFO(rx_broadcast_frames),
1379         XGBE_STATS0_INFO(rx_multicast_frames),
1380         XGBE_STATS0_INFO(rx_oversized_frames),
1381         XGBE_STATS0_INFO(rx_undersized_frames),
1382         XGBE_STATS0_INFO(overrun_type4),
1383         XGBE_STATS0_INFO(overrun_type5),
1384         XGBE_STATS0_INFO(rx_bytes),
1385         XGBE_STATS0_INFO(tx_good_frames),
1386         XGBE_STATS0_INFO(tx_broadcast_frames),
1387         XGBE_STATS0_INFO(tx_multicast_frames),
1388         XGBE_STATS0_INFO(tx_bytes),
1389         XGBE_STATS0_INFO(tx_64byte_frames),
1390         XGBE_STATS0_INFO(tx_65_to_127byte_frames),
1391         XGBE_STATS0_INFO(tx_128_to_255byte_frames),
1392         XGBE_STATS0_INFO(tx_256_to_511byte_frames),
1393         XGBE_STATS0_INFO(tx_512_to_1023byte_frames),
1394         XGBE_STATS0_INFO(tx_1024byte_frames),
1395         XGBE_STATS0_INFO(net_bytes),
1396         XGBE_STATS0_INFO(rx_sof_overruns),
1397         XGBE_STATS0_INFO(rx_mof_overruns),
1398         XGBE_STATS0_INFO(rx_dma_overruns),
1399         /* XGBE module 1 */
1400         XGBE_STATS1_INFO(rx_good_frames),
1401         XGBE_STATS1_INFO(rx_broadcast_frames),
1402         XGBE_STATS1_INFO(rx_multicast_frames),
1403         XGBE_STATS1_INFO(rx_pause_frames),
1404         XGBE_STATS1_INFO(rx_crc_errors),
1405         XGBE_STATS1_INFO(rx_align_code_errors),
1406         XGBE_STATS1_INFO(rx_oversized_frames),
1407         XGBE_STATS1_INFO(rx_jabber_frames),
1408         XGBE_STATS1_INFO(rx_undersized_frames),
1409         XGBE_STATS1_INFO(rx_fragments),
1410         XGBE_STATS1_INFO(overrun_type4),
1411         XGBE_STATS1_INFO(overrun_type5),
1412         XGBE_STATS1_INFO(rx_bytes),
1413         XGBE_STATS1_INFO(tx_good_frames),
1414         XGBE_STATS1_INFO(tx_broadcast_frames),
1415         XGBE_STATS1_INFO(tx_multicast_frames),
1416         XGBE_STATS1_INFO(tx_pause_frames),
1417         XGBE_STATS1_INFO(tx_deferred_frames),
1418         XGBE_STATS1_INFO(tx_collision_frames),
1419         XGBE_STATS1_INFO(tx_single_coll_frames),
1420         XGBE_STATS1_INFO(tx_mult_coll_frames),
1421         XGBE_STATS1_INFO(tx_excessive_collisions),
1422         XGBE_STATS1_INFO(tx_late_collisions),
1423         XGBE_STATS1_INFO(tx_underrun),
1424         XGBE_STATS1_INFO(tx_carrier_sense_errors),
1425         XGBE_STATS1_INFO(tx_bytes),
1426         XGBE_STATS1_INFO(tx_64byte_frames),
1427         XGBE_STATS1_INFO(tx_65_to_127byte_frames),
1428         XGBE_STATS1_INFO(tx_128_to_255byte_frames),
1429         XGBE_STATS1_INFO(tx_256_to_511byte_frames),
1430         XGBE_STATS1_INFO(tx_512_to_1023byte_frames),
1431         XGBE_STATS1_INFO(tx_1024byte_frames),
1432         XGBE_STATS1_INFO(net_bytes),
1433         XGBE_STATS1_INFO(rx_sof_overruns),
1434         XGBE_STATS1_INFO(rx_mof_overruns),
1435         XGBE_STATS1_INFO(rx_dma_overruns),
1436         /* XGBE module 2 */
1437         XGBE_STATS2_INFO(rx_good_frames),
1438         XGBE_STATS2_INFO(rx_broadcast_frames),
1439         XGBE_STATS2_INFO(rx_multicast_frames),
1440         XGBE_STATS2_INFO(rx_pause_frames),
1441         XGBE_STATS2_INFO(rx_crc_errors),
1442         XGBE_STATS2_INFO(rx_align_code_errors),
1443         XGBE_STATS2_INFO(rx_oversized_frames),
1444         XGBE_STATS2_INFO(rx_jabber_frames),
1445         XGBE_STATS2_INFO(rx_undersized_frames),
1446         XGBE_STATS2_INFO(rx_fragments),
1447         XGBE_STATS2_INFO(overrun_type4),
1448         XGBE_STATS2_INFO(overrun_type5),
1449         XGBE_STATS2_INFO(rx_bytes),
1450         XGBE_STATS2_INFO(tx_good_frames),
1451         XGBE_STATS2_INFO(tx_broadcast_frames),
1452         XGBE_STATS2_INFO(tx_multicast_frames),
1453         XGBE_STATS2_INFO(tx_pause_frames),
1454         XGBE_STATS2_INFO(tx_deferred_frames),
1455         XGBE_STATS2_INFO(tx_collision_frames),
1456         XGBE_STATS2_INFO(tx_single_coll_frames),
1457         XGBE_STATS2_INFO(tx_mult_coll_frames),
1458         XGBE_STATS2_INFO(tx_excessive_collisions),
1459         XGBE_STATS2_INFO(tx_late_collisions),
1460         XGBE_STATS2_INFO(tx_underrun),
1461         XGBE_STATS2_INFO(tx_carrier_sense_errors),
1462         XGBE_STATS2_INFO(tx_bytes),
1463         XGBE_STATS2_INFO(tx_64byte_frames),
1464         XGBE_STATS2_INFO(tx_65_to_127byte_frames),
1465         XGBE_STATS2_INFO(tx_128_to_255byte_frames),
1466         XGBE_STATS2_INFO(tx_256_to_511byte_frames),
1467         XGBE_STATS2_INFO(tx_512_to_1023byte_frames),
1468         XGBE_STATS2_INFO(tx_1024byte_frames),
1469         XGBE_STATS2_INFO(net_bytes),
1470         XGBE_STATS2_INFO(rx_sof_overruns),
1471         XGBE_STATS2_INFO(rx_mof_overruns),
1472         XGBE_STATS2_INFO(rx_dma_overruns),
1473 };
1474
1475 #define for_each_intf(i, priv) \
1476         list_for_each_entry((i), &(priv)->gbe_intf_head, gbe_intf_list)
1477
1478 #define for_each_sec_slave(slave, priv) \
1479         list_for_each_entry((slave), &(priv)->secondary_slaves, slave_list)
1480
1481 #define first_sec_slave(priv)                                   \
1482         list_first_entry(&priv->secondary_slaves, \
1483                         struct gbe_slave, slave_list)
1484
1485 static void keystone_get_drvinfo(struct net_device *ndev,
1486                                  struct ethtool_drvinfo *info)
1487 {
1488         strncpy(info->driver, NETCP_DRIVER_NAME, sizeof(info->driver));
1489         strncpy(info->version, NETCP_DRIVER_VERSION, sizeof(info->version));
1490 }
1491
1492 static u32 keystone_get_msglevel(struct net_device *ndev)
1493 {
1494         struct netcp_intf *netcp = netdev_priv(ndev);
1495
1496         return netcp->msg_enable;
1497 }
1498
1499 static void keystone_set_msglevel(struct net_device *ndev, u32 value)
1500 {
1501         struct netcp_intf *netcp = netdev_priv(ndev);
1502
1503         netcp->msg_enable = value;
1504 }
1505
1506 static void keystone_get_stat_strings(struct net_device *ndev,
1507                                       uint32_t stringset, uint8_t *data)
1508 {
1509         struct netcp_intf *netcp = netdev_priv(ndev);
1510         struct gbe_intf *gbe_intf;
1511         struct gbe_priv *gbe_dev;
1512         int i;
1513
1514         gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1515         if (!gbe_intf)
1516                 return;
1517         gbe_dev = gbe_intf->gbe_dev;
1518
1519         switch (stringset) {
1520         case ETH_SS_STATS:
1521                 for (i = 0; i < gbe_dev->num_et_stats; i++) {
1522                         memcpy(data, gbe_dev->et_stats[i].desc,
1523                                ETH_GSTRING_LEN);
1524                         data += ETH_GSTRING_LEN;
1525                 }
1526                 break;
1527         case ETH_SS_TEST:
1528                 break;
1529         }
1530 }
1531
1532 static int keystone_get_sset_count(struct net_device *ndev, int stringset)
1533 {
1534         struct netcp_intf *netcp = netdev_priv(ndev);
1535         struct gbe_intf *gbe_intf;
1536         struct gbe_priv *gbe_dev;
1537
1538         gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1539         if (!gbe_intf)
1540                 return -EINVAL;
1541         gbe_dev = gbe_intf->gbe_dev;
1542
1543         switch (stringset) {
1544         case ETH_SS_TEST:
1545                 return 0;
1546         case ETH_SS_STATS:
1547                 return gbe_dev->num_et_stats;
1548         default:
1549                 return -EINVAL;
1550         }
1551 }
1552
1553 static void gbe_update_stats(struct gbe_priv *gbe_dev, uint64_t *data)
1554 {
1555         void __iomem *base = NULL;
1556         u32  __iomem *p;
1557         u32 tmp = 0;
1558         int i;
1559
1560         for (i = 0; i < gbe_dev->num_et_stats; i++) {
1561                 base = gbe_dev->hw_stats_regs[gbe_dev->et_stats[i].type];
1562                 p = base + gbe_dev->et_stats[i].offset;
1563                 tmp = readl(p);
1564                 gbe_dev->hw_stats[i] = gbe_dev->hw_stats[i] + tmp;
1565                 if (data)
1566                         data[i] = gbe_dev->hw_stats[i];
1567                 /* write-to-decrement:
1568                  * new register value = old register value - write value
1569                  */
1570                 writel(tmp, p);
1571         }
1572 }
1573
1574 static void gbe_update_stats_ver14(struct gbe_priv *gbe_dev, uint64_t *data)
1575 {
1576         void __iomem *gbe_statsa = gbe_dev->hw_stats_regs[0];
1577         void __iomem *gbe_statsb = gbe_dev->hw_stats_regs[1];
1578         u64 *hw_stats = &gbe_dev->hw_stats[0];
1579         void __iomem *base = NULL;
1580         u32  __iomem *p;
1581         u32 tmp = 0, val, pair_size = (gbe_dev->num_et_stats / 2);
1582         int i, j, pair;
1583
1584         for (pair = 0; pair < 2; pair++) {
1585                 val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
1586
1587                 if (pair == 0)
1588                         val &= ~GBE_STATS_CD_SEL;
1589                 else
1590                         val |= GBE_STATS_CD_SEL;
1591
1592                 /* make the stat modules visible */
1593                 writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
1594
1595                 for (i = 0; i < pair_size; i++) {
1596                         j = pair * pair_size + i;
1597                         switch (gbe_dev->et_stats[j].type) {
1598                         case GBE_STATSA_MODULE:
1599                         case GBE_STATSC_MODULE:
1600                                 base = gbe_statsa;
1601                         break;
1602                         case GBE_STATSB_MODULE:
1603                         case GBE_STATSD_MODULE:
1604                                 base  = gbe_statsb;
1605                         break;
1606                         }
1607
1608                         p = base + gbe_dev->et_stats[j].offset;
1609                         tmp = readl(p);
1610                         hw_stats[j] += tmp;
1611                         if (data)
1612                                 data[j] = hw_stats[j];
1613                         /* write-to-decrement:
1614                          * new register value = old register value - write value
1615                          */
1616                         writel(tmp, p);
1617                 }
1618         }
1619 }
1620
1621 static void keystone_get_ethtool_stats(struct net_device *ndev,
1622                                        struct ethtool_stats *stats,
1623                                        uint64_t *data)
1624 {
1625         struct netcp_intf *netcp = netdev_priv(ndev);
1626         struct gbe_intf *gbe_intf;
1627         struct gbe_priv *gbe_dev;
1628
1629         gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1630         if (!gbe_intf)
1631                 return;
1632
1633         gbe_dev = gbe_intf->gbe_dev;
1634         spin_lock_bh(&gbe_dev->hw_stats_lock);
1635         if (gbe_dev->ss_version == GBE_SS_VERSION_14)
1636                 gbe_update_stats_ver14(gbe_dev, data);
1637         else
1638                 gbe_update_stats(gbe_dev, data);
1639         spin_unlock_bh(&gbe_dev->hw_stats_lock);
1640 }
1641
1642 static int keystone_get_settings(struct net_device *ndev,
1643                                  struct ethtool_cmd *cmd)
1644 {
1645         struct netcp_intf *netcp = netdev_priv(ndev);
1646         struct phy_device *phy = ndev->phydev;
1647         struct gbe_intf *gbe_intf;
1648         int ret;
1649
1650         if (!phy)
1651                 return -EINVAL;
1652
1653         gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1654         if (!gbe_intf)
1655                 return -EINVAL;
1656
1657         if (!gbe_intf->slave)
1658                 return -EINVAL;
1659
1660         ret = phy_ethtool_gset(phy, cmd);
1661         if (!ret)
1662                 cmd->port = gbe_intf->slave->phy_port_t;
1663
1664         return ret;
1665 }
1666
1667 static int keystone_set_settings(struct net_device *ndev,
1668                                  struct ethtool_cmd *cmd)
1669 {
1670         struct netcp_intf *netcp = netdev_priv(ndev);
1671         struct phy_device *phy = ndev->phydev;
1672         struct gbe_intf *gbe_intf;
1673         u32 features = cmd->advertising & cmd->supported;
1674
1675         if (!phy)
1676                 return -EINVAL;
1677
1678         gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1679         if (!gbe_intf)
1680                 return -EINVAL;
1681
1682         if (!gbe_intf->slave)
1683                 return -EINVAL;
1684
1685         if (cmd->port != gbe_intf->slave->phy_port_t) {
1686                 if ((cmd->port == PORT_TP) && !(features & ADVERTISED_TP))
1687                         return -EINVAL;
1688
1689                 if ((cmd->port == PORT_AUI) && !(features & ADVERTISED_AUI))
1690                         return -EINVAL;
1691
1692                 if ((cmd->port == PORT_BNC) && !(features & ADVERTISED_BNC))
1693                         return -EINVAL;
1694
1695                 if ((cmd->port == PORT_MII) && !(features & ADVERTISED_MII))
1696                         return -EINVAL;
1697
1698                 if ((cmd->port == PORT_FIBRE) && !(features & ADVERTISED_FIBRE))
1699                         return -EINVAL;
1700         }
1701
1702         gbe_intf->slave->phy_port_t = cmd->port;
1703         return phy_ethtool_sset(phy, cmd);
1704 }
1705
1706 static const struct ethtool_ops keystone_ethtool_ops = {
1707         .get_drvinfo            = keystone_get_drvinfo,
1708         .get_link               = ethtool_op_get_link,
1709         .get_msglevel           = keystone_get_msglevel,
1710         .set_msglevel           = keystone_set_msglevel,
1711         .get_strings            = keystone_get_stat_strings,
1712         .get_sset_count         = keystone_get_sset_count,
1713         .get_ethtool_stats      = keystone_get_ethtool_stats,
1714         .get_settings           = keystone_get_settings,
1715         .set_settings           = keystone_set_settings,
1716 };
1717
1718 #define mac_hi(mac)     (((mac)[0] << 0) | ((mac)[1] << 8) |    \
1719                          ((mac)[2] << 16) | ((mac)[3] << 24))
1720 #define mac_lo(mac)     (((mac)[4] << 0) | ((mac)[5] << 8))
1721
1722 static void gbe_set_slave_mac(struct gbe_slave *slave,
1723                               struct gbe_intf *gbe_intf)
1724 {
1725         struct net_device *ndev = gbe_intf->ndev;
1726
1727         writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi));
1728         writel(mac_lo(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_lo));
1729 }
1730
1731 static int gbe_get_slave_port(struct gbe_priv *priv, u32 slave_num)
1732 {
1733         if (priv->host_port == 0)
1734                 return slave_num + 1;
1735
1736         return slave_num;
1737 }
1738
1739 static void netcp_ethss_link_state_action(struct gbe_priv *gbe_dev,
1740                                           struct net_device *ndev,
1741                                           struct gbe_slave *slave,
1742                                           int up)
1743 {
1744         struct phy_device *phy = slave->phy;
1745         u32 mac_control = 0;
1746
1747         if (up) {
1748                 mac_control = slave->mac_control;
1749                 if (phy && (phy->speed == SPEED_1000)) {
1750                         mac_control |= MACSL_GIG_MODE;
1751                         mac_control &= ~MACSL_XGIG_MODE;
1752                 } else if (phy && (phy->speed == SPEED_10000)) {
1753                         mac_control |= MACSL_XGIG_MODE;
1754                         mac_control &= ~MACSL_GIG_MODE;
1755                 }
1756
1757                 writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
1758                                                  mac_control));
1759
1760                 cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
1761                                      ALE_PORT_STATE,
1762                                      ALE_PORT_STATE_FORWARD);
1763
1764                 if (ndev && slave->open &&
1765                     slave->link_interface != SGMII_LINK_MAC_PHY &&
1766                     slave->link_interface != XGMII_LINK_MAC_PHY)
1767                         netif_carrier_on(ndev);
1768         } else {
1769                 writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
1770                                                  mac_control));
1771                 cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
1772                                      ALE_PORT_STATE,
1773                                      ALE_PORT_STATE_DISABLE);
1774                 if (ndev &&
1775                     slave->link_interface != SGMII_LINK_MAC_PHY &&
1776                     slave->link_interface != XGMII_LINK_MAC_PHY)
1777                         netif_carrier_off(ndev);
1778         }
1779
1780         if (phy)
1781                 phy_print_status(phy);
1782 }
1783
1784 static bool gbe_phy_link_status(struct gbe_slave *slave)
1785 {
1786          return !slave->phy || slave->phy->link;
1787 }
1788
1789 static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev,
1790                                           struct gbe_slave *slave,
1791                                           struct net_device *ndev)
1792 {
1793         int sp = slave->slave_num;
1794         int phy_link_state, sgmii_link_state = 1, link_state;
1795
1796         if (!slave->open)
1797                 return;
1798
1799         if (!SLAVE_LINK_IS_XGMII(slave)) {
1800                 if (gbe_dev->ss_version == GBE_SS_VERSION_14)
1801                         sgmii_link_state =
1802                                 netcp_sgmii_get_port_link(SGMII_BASE(sp), sp);
1803                 else
1804                         sgmii_link_state =
1805                                 netcp_sgmii_get_port_link(
1806                                                 gbe_dev->sgmii_port_regs, sp);
1807         }
1808
1809         phy_link_state = gbe_phy_link_status(slave);
1810         link_state = phy_link_state & sgmii_link_state;
1811
1812         if (atomic_xchg(&slave->link_state, link_state) != link_state)
1813                 netcp_ethss_link_state_action(gbe_dev, ndev, slave,
1814                                               link_state);
1815 }
1816
1817 static void xgbe_adjust_link(struct net_device *ndev)
1818 {
1819         struct netcp_intf *netcp = netdev_priv(ndev);
1820         struct gbe_intf *gbe_intf;
1821
1822         gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp);
1823         if (!gbe_intf)
1824                 return;
1825
1826         netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
1827                                       ndev);
1828 }
1829
1830 static void gbe_adjust_link(struct net_device *ndev)
1831 {
1832         struct netcp_intf *netcp = netdev_priv(ndev);
1833         struct gbe_intf *gbe_intf;
1834
1835         gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1836         if (!gbe_intf)
1837                 return;
1838
1839         netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
1840                                       ndev);
1841 }
1842
1843 static void gbe_adjust_link_sec_slaves(struct net_device *ndev)
1844 {
1845         struct gbe_priv *gbe_dev = netdev_priv(ndev);
1846         struct gbe_slave *slave;
1847
1848         for_each_sec_slave(slave, gbe_dev)
1849                 netcp_ethss_update_link_state(gbe_dev, slave, NULL);
1850 }
1851
1852 /* Reset EMAC
1853  * Soft reset is set and polled until clear, or until a timeout occurs
1854  */
1855 static int gbe_port_reset(struct gbe_slave *slave)
1856 {
1857         u32 i, v;
1858
1859         /* Set the soft reset bit */
1860         writel(SOFT_RESET, GBE_REG_ADDR(slave, emac_regs, soft_reset));
1861
1862         /* Wait for the bit to clear */
1863         for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) {
1864                 v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset));
1865                 if ((v & SOFT_RESET_MASK) != SOFT_RESET)
1866                         return 0;
1867         }
1868
1869         /* Timeout on the reset */
1870         return GMACSL_RET_WARN_RESET_INCOMPLETE;
1871 }
1872
1873 /* Configure EMAC */
1874 static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
1875                             int max_rx_len)
1876 {
1877         void __iomem *rx_maxlen_reg;
1878         u32 xgmii_mode;
1879
1880         if (max_rx_len > NETCP_MAX_FRAME_SIZE)
1881                 max_rx_len = NETCP_MAX_FRAME_SIZE;
1882
1883         /* Enable correct MII mode at SS level */
1884         if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) &&
1885             (slave->link_interface >= XGMII_LINK_MAC_PHY)) {
1886                 xgmii_mode = readl(GBE_REG_ADDR(gbe_dev, ss_regs, control));
1887                 xgmii_mode |= (1 << slave->slave_num);
1888                 writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control));
1889         }
1890
1891         if (IS_SS_ID_MU(gbe_dev))
1892                 rx_maxlen_reg = GBE_REG_ADDR(slave, port_regs, rx_maxlen);
1893         else
1894                 rx_maxlen_reg = GBE_REG_ADDR(slave, emac_regs, rx_maxlen);
1895
1896         writel(max_rx_len, rx_maxlen_reg);
1897         writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));
1898 }
1899
1900 static void gbe_slave_stop(struct gbe_intf *intf)
1901 {
1902         struct gbe_priv *gbe_dev = intf->gbe_dev;
1903         struct gbe_slave *slave = intf->slave;
1904
1905         gbe_port_reset(slave);
1906         /* Disable forwarding */
1907         cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
1908                              ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
1909         cpsw_ale_del_mcast(gbe_dev->ale, intf->ndev->broadcast,
1910                            1 << slave->port_num, 0, 0);
1911
1912         if (!slave->phy)
1913                 return;
1914
1915         phy_stop(slave->phy);
1916         phy_disconnect(slave->phy);
1917         slave->phy = NULL;
1918 }
1919
1920 static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave)
1921 {
1922         void __iomem *sgmii_port_regs;
1923
1924         sgmii_port_regs = priv->sgmii_port_regs;
1925         if ((priv->ss_version == GBE_SS_VERSION_14) && (slave->slave_num >= 2))
1926                 sgmii_port_regs = priv->sgmii_port34_regs;
1927
1928         if (!SLAVE_LINK_IS_XGMII(slave)) {
1929                 netcp_sgmii_reset(sgmii_port_regs, slave->slave_num);
1930                 netcp_sgmii_config(sgmii_port_regs, slave->slave_num,
1931                                    slave->link_interface);
1932         }
1933 }
1934
1935 static int gbe_slave_open(struct gbe_intf *gbe_intf)
1936 {
1937         struct gbe_priv *priv = gbe_intf->gbe_dev;
1938         struct gbe_slave *slave = gbe_intf->slave;
1939         phy_interface_t phy_mode;
1940         bool has_phy = false;
1941
1942         void (*hndlr)(struct net_device *) = gbe_adjust_link;
1943
1944         gbe_sgmii_config(priv, slave);
1945         gbe_port_reset(slave);
1946         gbe_port_config(priv, slave, priv->rx_packet_max);
1947         gbe_set_slave_mac(slave, gbe_intf);
1948         /* enable forwarding */
1949         cpsw_ale_control_set(priv->ale, slave->port_num,
1950                              ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
1951         cpsw_ale_add_mcast(priv->ale, gbe_intf->ndev->broadcast,
1952                            1 << slave->port_num, 0, 0, ALE_MCAST_FWD_2);
1953
1954         if (slave->link_interface == SGMII_LINK_MAC_PHY) {
1955                 has_phy = true;
1956                 phy_mode = PHY_INTERFACE_MODE_SGMII;
1957                 slave->phy_port_t = PORT_MII;
1958         } else if (slave->link_interface == XGMII_LINK_MAC_PHY) {
1959                 has_phy = true;
1960                 phy_mode = PHY_INTERFACE_MODE_NA;
1961                 slave->phy_port_t = PORT_FIBRE;
1962         }
1963
1964         if (has_phy) {
1965                 if (priv->ss_version == XGBE_SS_VERSION_10)
1966                         hndlr = xgbe_adjust_link;
1967
1968                 slave->phy = of_phy_connect(gbe_intf->ndev,
1969                                             slave->phy_node,
1970                                             hndlr, 0,
1971                                             phy_mode);
1972                 if (!slave->phy) {
1973                         dev_err(priv->dev, "phy not found on slave %d\n",
1974                                 slave->slave_num);
1975                         return -ENODEV;
1976                 }
1977                 dev_dbg(priv->dev, "phy found: id is: 0x%s\n",
1978                         dev_name(&slave->phy->dev));
1979                 phy_start(slave->phy);
1980                 phy_read_status(slave->phy);
1981         }
1982         return 0;
1983 }
1984
1985 static void gbe_init_host_port(struct gbe_priv *priv)
1986 {
1987         int bypass_en = 1;
1988
1989         /* Host Tx Pri */
1990         if (IS_SS_ID_NU(priv))
1991                 writel(HOST_TX_PRI_MAP_DEFAULT,
1992                        GBE_REG_ADDR(priv, host_port_regs, tx_pri_map));
1993
1994         /* Max length register */
1995         writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs,
1996                                                   rx_maxlen));
1997
1998         cpsw_ale_start(priv->ale);
1999
2000         if (priv->enable_ale)
2001                 bypass_en = 0;
2002
2003         cpsw_ale_control_set(priv->ale, 0, ALE_BYPASS, bypass_en);
2004
2005         cpsw_ale_control_set(priv->ale, 0, ALE_NO_PORT_VLAN, 1);
2006
2007         cpsw_ale_control_set(priv->ale, priv->host_port,
2008                              ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
2009
2010         cpsw_ale_control_set(priv->ale, 0,
2011                              ALE_PORT_UNKNOWN_VLAN_MEMBER,
2012                              GBE_PORT_MASK(priv->ale_ports));
2013
2014         cpsw_ale_control_set(priv->ale, 0,
2015                              ALE_PORT_UNKNOWN_MCAST_FLOOD,
2016                              GBE_PORT_MASK(priv->ale_ports - 1));
2017
2018         cpsw_ale_control_set(priv->ale, 0,
2019                              ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
2020                              GBE_PORT_MASK(priv->ale_ports));
2021
2022         cpsw_ale_control_set(priv->ale, 0,
2023                              ALE_PORT_UNTAGGED_EGRESS,
2024                              GBE_PORT_MASK(priv->ale_ports));
2025 }
2026
2027 static void gbe_add_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2028 {
2029         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2030         u16 vlan_id;
2031
2032         cpsw_ale_add_mcast(gbe_dev->ale, addr,
2033                            GBE_PORT_MASK(gbe_dev->ale_ports), 0, 0,
2034                            ALE_MCAST_FWD_2);
2035         for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
2036                 cpsw_ale_add_mcast(gbe_dev->ale, addr,
2037                                    GBE_PORT_MASK(gbe_dev->ale_ports),
2038                                    ALE_VLAN, vlan_id, ALE_MCAST_FWD_2);
2039         }
2040 }
2041
2042 static void gbe_add_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2043 {
2044         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2045         u16 vlan_id;
2046
2047         cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
2048
2049         for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID)
2050                 cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
2051                                    ALE_VLAN, vlan_id);
2052 }
2053
2054 static void gbe_del_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2055 {
2056         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2057         u16 vlan_id;
2058
2059         cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, 0, 0);
2060
2061         for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
2062                 cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, ALE_VLAN, vlan_id);
2063         }
2064 }
2065
2066 static void gbe_del_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2067 {
2068         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2069         u16 vlan_id;
2070
2071         cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
2072
2073         for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
2074                 cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
2075                                    ALE_VLAN, vlan_id);
2076         }
2077 }
2078
2079 static int gbe_add_addr(void *intf_priv, struct netcp_addr *naddr)
2080 {
2081         struct gbe_intf *gbe_intf = intf_priv;
2082         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2083
2084         dev_dbg(gbe_dev->dev, "ethss adding address %pM, type %d\n",
2085                 naddr->addr, naddr->type);
2086
2087         switch (naddr->type) {
2088         case ADDR_MCAST:
2089         case ADDR_BCAST:
2090                 gbe_add_mcast_addr(gbe_intf, naddr->addr);
2091                 break;
2092         case ADDR_UCAST:
2093         case ADDR_DEV:
2094                 gbe_add_ucast_addr(gbe_intf, naddr->addr);
2095                 break;
2096         case ADDR_ANY:
2097                 /* nothing to do for promiscuous */
2098         default:
2099                 break;
2100         }
2101
2102         return 0;
2103 }
2104
2105 static int gbe_del_addr(void *intf_priv, struct netcp_addr *naddr)
2106 {
2107         struct gbe_intf *gbe_intf = intf_priv;
2108         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2109
2110         dev_dbg(gbe_dev->dev, "ethss deleting address %pM, type %d\n",
2111                 naddr->addr, naddr->type);
2112
2113         switch (naddr->type) {
2114         case ADDR_MCAST:
2115         case ADDR_BCAST:
2116                 gbe_del_mcast_addr(gbe_intf, naddr->addr);
2117                 break;
2118         case ADDR_UCAST:
2119         case ADDR_DEV:
2120                 gbe_del_ucast_addr(gbe_intf, naddr->addr);
2121                 break;
2122         case ADDR_ANY:
2123                 /* nothing to do for promiscuous */
2124         default:
2125                 break;
2126         }
2127
2128         return 0;
2129 }
2130
2131 static int gbe_add_vid(void *intf_priv, int vid)
2132 {
2133         struct gbe_intf *gbe_intf = intf_priv;
2134         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2135
2136         set_bit(vid, gbe_intf->active_vlans);
2137
2138         cpsw_ale_add_vlan(gbe_dev->ale, vid,
2139                           GBE_PORT_MASK(gbe_dev->ale_ports),
2140                           GBE_MASK_NO_PORTS,
2141                           GBE_PORT_MASK(gbe_dev->ale_ports),
2142                           GBE_PORT_MASK(gbe_dev->ale_ports - 1));
2143
2144         return 0;
2145 }
2146
2147 static int gbe_del_vid(void *intf_priv, int vid)
2148 {
2149         struct gbe_intf *gbe_intf = intf_priv;
2150         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2151
2152         cpsw_ale_del_vlan(gbe_dev->ale, vid, 0);
2153         clear_bit(vid, gbe_intf->active_vlans);
2154         return 0;
2155 }
2156
2157 static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)
2158 {
2159         struct gbe_intf *gbe_intf = intf_priv;
2160         struct phy_device *phy = gbe_intf->slave->phy;
2161         int ret = -EOPNOTSUPP;
2162
2163         if (phy)
2164                 ret = phy_mii_ioctl(phy, req, cmd);
2165
2166         return ret;
2167 }
2168
2169 static void netcp_ethss_timer(unsigned long arg)
2170 {
2171         struct gbe_priv *gbe_dev = (struct gbe_priv *)arg;
2172         struct gbe_intf *gbe_intf;
2173         struct gbe_slave *slave;
2174
2175         /* Check & update SGMII link state of interfaces */
2176         for_each_intf(gbe_intf, gbe_dev) {
2177                 if (!gbe_intf->slave->open)
2178                         continue;
2179                 netcp_ethss_update_link_state(gbe_dev, gbe_intf->slave,
2180                                               gbe_intf->ndev);
2181         }
2182
2183         /* Check & update SGMII link state of secondary ports */
2184         for_each_sec_slave(slave, gbe_dev) {
2185                 netcp_ethss_update_link_state(gbe_dev, slave, NULL);
2186         }
2187
2188         /* A timer runs as a BH, no need to block them */
2189         spin_lock(&gbe_dev->hw_stats_lock);
2190
2191         if (gbe_dev->ss_version == GBE_SS_VERSION_14)
2192                 gbe_update_stats_ver14(gbe_dev, NULL);
2193         else
2194                 gbe_update_stats(gbe_dev, NULL);
2195
2196         spin_unlock(&gbe_dev->hw_stats_lock);
2197
2198         gbe_dev->timer.expires  = jiffies + GBE_TIMER_INTERVAL;
2199         add_timer(&gbe_dev->timer);
2200 }
2201
2202 static int gbe_tx_hook(int order, void *data, struct netcp_packet *p_info)
2203 {
2204         struct gbe_intf *gbe_intf = data;
2205
2206         p_info->tx_pipe = &gbe_intf->tx_pipe;
2207         return 0;
2208 }
2209
2210 static int gbe_open(void *intf_priv, struct net_device *ndev)
2211 {
2212         struct gbe_intf *gbe_intf = intf_priv;
2213         struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2214         struct netcp_intf *netcp = netdev_priv(ndev);
2215         struct gbe_slave *slave = gbe_intf->slave;
2216         int port_num = slave->port_num;
2217         u32 reg;
2218         int ret;
2219
2220         reg = readl(GBE_REG_ADDR(gbe_dev, switch_regs, id_ver));
2221         dev_dbg(gbe_dev->dev, "initializing gbe version %d.%d (%d) GBE identification value 0x%x\n",
2222                 GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg),
2223                 GBE_RTL_VERSION(reg), GBE_IDENT(reg));
2224
2225         /* For 10G and on NetCP 1.5, use directed to port */
2226         if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) || IS_SS_ID_MU(gbe_dev))
2227                 gbe_intf->tx_pipe.flags = SWITCH_TO_PORT_IN_TAGINFO;
2228
2229         if (gbe_dev->enable_ale)
2230                 gbe_intf->tx_pipe.switch_to_port = 0;
2231         else
2232                 gbe_intf->tx_pipe.switch_to_port = port_num;
2233
2234         dev_dbg(gbe_dev->dev,
2235                 "opened TX channel %s: %p with to port %d, flags %d\n",
2236                 gbe_intf->tx_pipe.dma_chan_name,
2237                 gbe_intf->tx_pipe.dma_channel,
2238                 gbe_intf->tx_pipe.switch_to_port,
2239                 gbe_intf->tx_pipe.flags);
2240
2241         gbe_slave_stop(gbe_intf);
2242
2243         /* disable priority elevation and enable statistics on all ports */
2244         writel(0, GBE_REG_ADDR(gbe_dev, switch_regs, ptype));
2245
2246         /* Control register */
2247         writel(GBE_CTL_P0_ENABLE, GBE_REG_ADDR(gbe_dev, switch_regs, control));
2248
2249         /* All statistics enabled and STAT AB visible by default */
2250         writel(gbe_dev->stats_en_mask, GBE_REG_ADDR(gbe_dev, switch_regs,
2251                                                     stat_port_en));
2252
2253         ret = gbe_slave_open(gbe_intf);
2254         if (ret)
2255                 goto fail;
2256
2257         netcp_register_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
2258                               gbe_intf);
2259
2260         slave->open = true;
2261         netcp_ethss_update_link_state(gbe_dev, slave, ndev);
2262         return 0;
2263
2264 fail:
2265         gbe_slave_stop(gbe_intf);
2266         return ret;
2267 }
2268
2269 static int gbe_close(void *intf_priv, struct net_device *ndev)
2270 {
2271         struct gbe_intf *gbe_intf = intf_priv;
2272         struct netcp_intf *netcp = netdev_priv(ndev);
2273
2274         gbe_slave_stop(gbe_intf);
2275         netcp_unregister_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
2276                                 gbe_intf);
2277
2278         gbe_intf->slave->open = false;
2279         atomic_set(&gbe_intf->slave->link_state, NETCP_LINK_STATE_INVALID);
2280         return 0;
2281 }
2282
2283 static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
2284                       struct device_node *node)
2285 {
2286         int port_reg_num;
2287         u32 port_reg_ofs, emac_reg_ofs;
2288         u32 port_reg_blk_sz, emac_reg_blk_sz;
2289
2290         if (of_property_read_u32(node, "slave-port", &slave->slave_num)) {
2291                 dev_err(gbe_dev->dev, "missing slave-port parameter\n");
2292                 return -EINVAL;
2293         }
2294
2295         if (of_property_read_u32(node, "link-interface",
2296                                  &slave->link_interface)) {
2297                 dev_warn(gbe_dev->dev,
2298                          "missing link-interface value defaulting to 1G mac-phy link\n");
2299                 slave->link_interface = SGMII_LINK_MAC_PHY;
2300         }
2301
2302         slave->open = false;
2303         slave->phy_node = of_parse_phandle(node, "phy-handle", 0);
2304         slave->port_num = gbe_get_slave_port(gbe_dev, slave->slave_num);
2305
2306         if (slave->link_interface >= XGMII_LINK_MAC_PHY)
2307                 slave->mac_control = GBE_DEF_10G_MAC_CONTROL;
2308         else
2309                 slave->mac_control = GBE_DEF_1G_MAC_CONTROL;
2310
2311         /* Emac regs memmap are contiguous but port regs are not */
2312         port_reg_num = slave->slave_num;
2313         if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
2314                 if (slave->slave_num > 1) {
2315                         port_reg_ofs = GBE13_SLAVE_PORT2_OFFSET;
2316                         port_reg_num -= 2;
2317                 } else {
2318                         port_reg_ofs = GBE13_SLAVE_PORT_OFFSET;
2319                 }
2320                 emac_reg_ofs = GBE13_EMAC_OFFSET;
2321                 port_reg_blk_sz = 0x30;
2322                 emac_reg_blk_sz = 0x40;
2323         } else if (IS_SS_ID_MU(gbe_dev)) {
2324                 port_reg_ofs = GBENU_SLAVE_PORT_OFFSET;
2325                 emac_reg_ofs = GBENU_EMAC_OFFSET;
2326                 port_reg_blk_sz = 0x1000;
2327                 emac_reg_blk_sz = 0x1000;
2328         } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
2329                 port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET;
2330                 emac_reg_ofs = XGBE10_EMAC_OFFSET;
2331                 port_reg_blk_sz = 0x30;
2332                 emac_reg_blk_sz = 0x40;
2333         } else {
2334                 dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n",
2335                         gbe_dev->ss_version);
2336                 return -EINVAL;
2337         }
2338
2339         slave->port_regs = gbe_dev->switch_regs + port_reg_ofs +
2340                                 (port_reg_blk_sz * port_reg_num);
2341         slave->emac_regs = gbe_dev->switch_regs + emac_reg_ofs +
2342                                 (emac_reg_blk_sz * slave->slave_num);
2343
2344         if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
2345                 /* Initialize  slave port register offsets */
2346                 GBE_SET_REG_OFS(slave, port_regs, port_vlan);
2347                 GBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
2348                 GBE_SET_REG_OFS(slave, port_regs, sa_lo);
2349                 GBE_SET_REG_OFS(slave, port_regs, sa_hi);
2350                 GBE_SET_REG_OFS(slave, port_regs, ts_ctl);
2351                 GBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
2352                 GBE_SET_REG_OFS(slave, port_regs, ts_vlan);
2353                 GBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
2354                 GBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
2355
2356                 /* Initialize EMAC register offsets */
2357                 GBE_SET_REG_OFS(slave, emac_regs, mac_control);
2358                 GBE_SET_REG_OFS(slave, emac_regs, soft_reset);
2359                 GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
2360
2361         } else if (IS_SS_ID_MU(gbe_dev)) {
2362                 /* Initialize  slave port register offsets */
2363                 GBENU_SET_REG_OFS(slave, port_regs, port_vlan);
2364                 GBENU_SET_REG_OFS(slave, port_regs, tx_pri_map);
2365                 GBENU_SET_REG_OFS(slave, port_regs, sa_lo);
2366                 GBENU_SET_REG_OFS(slave, port_regs, sa_hi);
2367                 GBENU_SET_REG_OFS(slave, port_regs, ts_ctl);
2368                 GBENU_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
2369                 GBENU_SET_REG_OFS(slave, port_regs, ts_vlan);
2370                 GBENU_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
2371                 GBENU_SET_REG_OFS(slave, port_regs, ts_ctl2);
2372                 GBENU_SET_REG_OFS(slave, port_regs, rx_maxlen);
2373
2374                 /* Initialize EMAC register offsets */
2375                 GBENU_SET_REG_OFS(slave, emac_regs, mac_control);
2376                 GBENU_SET_REG_OFS(slave, emac_regs, soft_reset);
2377
2378         } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
2379                 /* Initialize  slave port register offsets */
2380                 XGBE_SET_REG_OFS(slave, port_regs, port_vlan);
2381                 XGBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
2382                 XGBE_SET_REG_OFS(slave, port_regs, sa_lo);
2383                 XGBE_SET_REG_OFS(slave, port_regs, sa_hi);
2384                 XGBE_SET_REG_OFS(slave, port_regs, ts_ctl);
2385                 XGBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
2386                 XGBE_SET_REG_OFS(slave, port_regs, ts_vlan);
2387                 XGBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
2388                 XGBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
2389
2390                 /* Initialize EMAC register offsets */
2391                 XGBE_SET_REG_OFS(slave, emac_regs, mac_control);
2392                 XGBE_SET_REG_OFS(slave, emac_regs, soft_reset);
2393                 XGBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
2394         }
2395
2396         atomic_set(&slave->link_state, NETCP_LINK_STATE_INVALID);
2397         return 0;
2398 }
2399
2400 static void init_secondary_ports(struct gbe_priv *gbe_dev,
2401                                  struct device_node *node)
2402 {
2403         struct device *dev = gbe_dev->dev;
2404         phy_interface_t phy_mode;
2405         struct gbe_priv **priv;
2406         struct device_node *port;
2407         struct gbe_slave *slave;
2408         bool mac_phy_link = false;
2409
2410         for_each_child_of_node(node, port) {
2411                 slave = devm_kzalloc(dev, sizeof(*slave), GFP_KERNEL);
2412                 if (!slave) {
2413                         dev_err(dev,
2414                                 "memomry alloc failed for secondary port(%s), skipping...\n",
2415                                 port->name);
2416                         continue;
2417                 }
2418
2419                 if (init_slave(gbe_dev, slave, port)) {
2420                         dev_err(dev,
2421                                 "Failed to initialize secondary port(%s), skipping...\n",
2422                                 port->name);
2423                         devm_kfree(dev, slave);
2424                         continue;
2425                 }
2426
2427                 gbe_sgmii_config(gbe_dev, slave);
2428                 gbe_port_reset(slave);
2429                 gbe_port_config(gbe_dev, slave, gbe_dev->rx_packet_max);
2430                 list_add_tail(&slave->slave_list, &gbe_dev->secondary_slaves);
2431                 gbe_dev->num_slaves++;
2432                 if ((slave->link_interface == SGMII_LINK_MAC_PHY) ||
2433                     (slave->link_interface == XGMII_LINK_MAC_PHY))
2434                         mac_phy_link = true;
2435
2436                 slave->open = true;
2437                 if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves)
2438                         break;
2439         }
2440
2441         /* of_phy_connect() is needed only for MAC-PHY interface */
2442         if (!mac_phy_link)
2443                 return;
2444
2445         /* Allocate dummy netdev device for attaching to phy device */
2446         gbe_dev->dummy_ndev = alloc_netdev(sizeof(gbe_dev), "dummy",
2447                                         NET_NAME_UNKNOWN, ether_setup);
2448         if (!gbe_dev->dummy_ndev) {
2449                 dev_err(dev,
2450                         "Failed to allocate dummy netdev for secondary ports, skipping phy_connect()...\n");
2451                 return;
2452         }
2453         priv = netdev_priv(gbe_dev->dummy_ndev);
2454         *priv = gbe_dev;
2455
2456         if (slave->link_interface == SGMII_LINK_MAC_PHY) {
2457                 phy_mode = PHY_INTERFACE_MODE_SGMII;
2458                 slave->phy_port_t = PORT_MII;
2459         } else {
2460                 phy_mode = PHY_INTERFACE_MODE_NA;
2461                 slave->phy_port_t = PORT_FIBRE;
2462         }
2463
2464         for_each_sec_slave(slave, gbe_dev) {
2465                 if ((slave->link_interface != SGMII_LINK_MAC_PHY) &&
2466                     (slave->link_interface != XGMII_LINK_MAC_PHY))
2467                         continue;
2468                 slave->phy =
2469                         of_phy_connect(gbe_dev->dummy_ndev,
2470                                        slave->phy_node,
2471                                        gbe_adjust_link_sec_slaves,
2472                                        0, phy_mode);
2473                 if (!slave->phy) {
2474                         dev_err(dev, "phy not found for slave %d\n",
2475                                 slave->slave_num);
2476                         slave->phy = NULL;
2477                 } else {
2478                         dev_dbg(dev, "phy found: id is: 0x%s\n",
2479                                 dev_name(&slave->phy->dev));
2480                         phy_start(slave->phy);
2481                         phy_read_status(slave->phy);
2482                 }
2483         }
2484 }
2485
2486 static void free_secondary_ports(struct gbe_priv *gbe_dev)
2487 {
2488         struct gbe_slave *slave;
2489
2490         for (;;) {
2491                 slave = first_sec_slave(gbe_dev);
2492                 if (!slave)
2493                         break;
2494                 if (slave->phy)
2495                         phy_disconnect(slave->phy);
2496                 list_del(&slave->slave_list);
2497         }
2498         if (gbe_dev->dummy_ndev)
2499                 free_netdev(gbe_dev->dummy_ndev);
2500 }
2501
2502 static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev,
2503                                  struct device_node *node)
2504 {
2505         struct resource res;
2506         void __iomem *regs;
2507         int ret, i;
2508
2509         ret = of_address_to_resource(node, XGBE_SS_REG_INDEX, &res);
2510         if (ret) {
2511                 dev_err(gbe_dev->dev,
2512                         "Can't xlate xgbe of node(%s) ss address at %d\n",
2513                         node->name, XGBE_SS_REG_INDEX);
2514                 return ret;
2515         }
2516
2517         regs = devm_ioremap_resource(gbe_dev->dev, &res);
2518         if (IS_ERR(regs)) {
2519                 dev_err(gbe_dev->dev, "Failed to map xgbe ss register base\n");
2520                 return PTR_ERR(regs);
2521         }
2522         gbe_dev->ss_regs = regs;
2523
2524         ret = of_address_to_resource(node, XGBE_SM_REG_INDEX, &res);
2525         if (ret) {
2526                 dev_err(gbe_dev->dev,
2527                         "Can't xlate xgbe of node(%s) sm address at %d\n",
2528                         node->name, XGBE_SM_REG_INDEX);
2529                 return ret;
2530         }
2531
2532         regs = devm_ioremap_resource(gbe_dev->dev, &res);
2533         if (IS_ERR(regs)) {
2534                 dev_err(gbe_dev->dev, "Failed to map xgbe sm register base\n");
2535                 return PTR_ERR(regs);
2536         }
2537         gbe_dev->switch_regs = regs;
2538
2539         ret = of_address_to_resource(node, XGBE_SERDES_REG_INDEX, &res);
2540         if (ret) {
2541                 dev_err(gbe_dev->dev,
2542                         "Can't xlate xgbe serdes of node(%s) address at %d\n",
2543                         node->name, XGBE_SERDES_REG_INDEX);
2544                 return ret;
2545         }
2546
2547         regs = devm_ioremap_resource(gbe_dev->dev, &res);
2548         if (IS_ERR(regs)) {
2549                 dev_err(gbe_dev->dev, "Failed to map xgbe serdes register base\n");
2550                 return PTR_ERR(regs);
2551         }
2552         gbe_dev->xgbe_serdes_regs = regs;
2553
2554         gbe_dev->et_stats = xgbe10_et_stats;
2555         gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats);
2556
2557         gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
2558                                          gbe_dev->num_et_stats * sizeof(u64),
2559                                          GFP_KERNEL);
2560         if (!gbe_dev->hw_stats) {
2561                 dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
2562                 return -ENOMEM;
2563         }
2564
2565         gbe_dev->ss_version = XGBE_SS_VERSION_10;
2566         gbe_dev->sgmii_port_regs = gbe_dev->ss_regs +
2567                                         XGBE10_SGMII_MODULE_OFFSET;
2568         gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET;
2569
2570         for (i = 0; i < gbe_dev->max_num_ports; i++)
2571                 gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
2572                         XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i);
2573
2574         gbe_dev->ale_reg = gbe_dev->switch_regs + XGBE10_ALE_OFFSET;
2575         gbe_dev->ale_ports = gbe_dev->max_num_ports;
2576         gbe_dev->host_port = XGBE10_HOST_PORT_NUM;
2577         gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES;
2578         gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;
2579
2580         /* Subsystem registers */
2581         XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
2582         XGBE_SET_REG_OFS(gbe_dev, ss_regs, control);
2583
2584         /* Switch module registers */
2585         XGBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
2586         XGBE_SET_REG_OFS(gbe_dev, switch_regs, control);
2587         XGBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
2588         XGBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
2589         XGBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
2590
2591         /* Host port registers */
2592         XGBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
2593         XGBE_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
2594         XGBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
2595         return 0;
2596 }
2597
2598 static int get_gbe_resource_version(struct gbe_priv *gbe_dev,
2599                                     struct device_node *node)
2600 {
2601         struct resource res;
2602         void __iomem *regs;
2603         int ret;
2604
2605         ret = of_address_to_resource(node, GBE_SS_REG_INDEX, &res);
2606         if (ret) {
2607                 dev_err(gbe_dev->dev,
2608                         "Can't translate of node(%s) of gbe ss address at %d\n",
2609                         node->name, GBE_SS_REG_INDEX);
2610                 return ret;
2611         }
2612
2613         regs = devm_ioremap_resource(gbe_dev->dev, &res);
2614         if (IS_ERR(regs)) {
2615                 dev_err(gbe_dev->dev, "Failed to map gbe register base\n");
2616                 return PTR_ERR(regs);
2617         }
2618         gbe_dev->ss_regs = regs;
2619         gbe_dev->ss_version = readl(gbe_dev->ss_regs);
2620         return 0;
2621 }
2622
2623 static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev,
2624                                 struct device_node *node)
2625 {
2626         struct resource res;
2627         void __iomem *regs;
2628         int i, ret;
2629
2630         ret = of_address_to_resource(node, GBE_SGMII34_REG_INDEX, &res);
2631         if (ret) {
2632                 dev_err(gbe_dev->dev,
2633                         "Can't translate of gbe node(%s) address at index %d\n",
2634                         node->name, GBE_SGMII34_REG_INDEX);
2635                 return ret;
2636         }
2637
2638         regs = devm_ioremap_resource(gbe_dev->dev, &res);
2639         if (IS_ERR(regs)) {
2640                 dev_err(gbe_dev->dev,
2641                         "Failed to map gbe sgmii port34 register base\n");
2642                 return PTR_ERR(regs);
2643         }
2644         gbe_dev->sgmii_port34_regs = regs;
2645
2646         ret = of_address_to_resource(node, GBE_SM_REG_INDEX, &res);
2647         if (ret) {
2648                 dev_err(gbe_dev->dev,
2649                         "Can't translate of gbe node(%s) address at index %d\n",
2650                         node->name, GBE_SM_REG_INDEX);
2651                 return ret;
2652         }
2653
2654         regs = devm_ioremap_resource(gbe_dev->dev, &res);
2655         if (IS_ERR(regs)) {
2656                 dev_err(gbe_dev->dev,
2657                         "Failed to map gbe switch module register base\n");
2658                 return PTR_ERR(regs);
2659         }
2660         gbe_dev->switch_regs = regs;
2661
2662         gbe_dev->et_stats = gbe13_et_stats;
2663         gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats);
2664
2665         gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
2666                                          gbe_dev->num_et_stats * sizeof(u64),
2667                                          GFP_KERNEL);
2668         if (!gbe_dev->hw_stats) {
2669                 dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
2670                 return -ENOMEM;
2671         }
2672
2673         gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBE13_SGMII_MODULE_OFFSET;
2674         gbe_dev->host_port_regs = gbe_dev->switch_regs + GBE13_HOST_PORT_OFFSET;
2675
2676         /* K2HK has only 2 hw stats modules visible at a time, so
2677          * module 0 & 2 points to one base and
2678          * module 1 & 3 points to the other base
2679          */
2680         for (i = 0; i < gbe_dev->max_num_slaves; i++) {
2681                 gbe_dev->hw_stats_regs[i] =
2682                         gbe_dev->switch_regs + GBE13_HW_STATS_OFFSET +
2683                         (GBE_HW_STATS_REG_MAP_SZ * (i & 0x1));
2684         }
2685
2686         gbe_dev->ale_reg = gbe_dev->switch_regs + GBE13_ALE_OFFSET;
2687         gbe_dev->ale_ports = gbe_dev->max_num_ports;
2688         gbe_dev->host_port = GBE13_HOST_PORT_NUM;
2689         gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
2690         gbe_dev->stats_en_mask = GBE13_REG_VAL_STAT_ENABLE_ALL;
2691
2692         /* Subsystem registers */
2693         GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
2694
2695         /* Switch module registers */
2696         GBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
2697         GBE_SET_REG_OFS(gbe_dev, switch_regs, control);
2698         GBE_SET_REG_OFS(gbe_dev, switch_regs, soft_reset);
2699         GBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
2700         GBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
2701         GBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
2702
2703         /* Host port registers */
2704         GBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
2705         GBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
2706         return 0;
2707 }
2708
2709 static int set_gbenu_ethss_priv(struct gbe_priv *gbe_dev,
2710                                 struct device_node *node)
2711 {
2712         struct resource res;
2713         void __iomem *regs;
2714         int i, ret;
2715
2716         gbe_dev->et_stats = gbenu_et_stats;
2717
2718         if (IS_SS_ID_NU(gbe_dev))
2719                 gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
2720                         (gbe_dev->max_num_slaves * GBENU_ET_STATS_PORT_SIZE);
2721         else
2722                 gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
2723                                         GBENU_ET_STATS_PORT_SIZE;
2724
2725         gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
2726                                          gbe_dev->num_et_stats * sizeof(u64),
2727                                          GFP_KERNEL);
2728         if (!gbe_dev->hw_stats) {
2729                 dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
2730                 return -ENOMEM;
2731         }
2732
2733         ret = of_address_to_resource(node, GBENU_SM_REG_INDEX, &res);
2734         if (ret) {
2735                 dev_err(gbe_dev->dev,
2736                         "Can't translate of gbenu node(%s) addr at index %d\n",
2737                         node->name, GBENU_SM_REG_INDEX);
2738                 return ret;
2739         }
2740
2741         regs = devm_ioremap_resource(gbe_dev->dev, &res);
2742         if (IS_ERR(regs)) {
2743                 dev_err(gbe_dev->dev,
2744                         "Failed to map gbenu switch module register base\n");
2745                 return PTR_ERR(regs);
2746         }
2747         gbe_dev->switch_regs = regs;
2748
2749         gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET;
2750         gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET;
2751
2752         for (i = 0; i < (gbe_dev->max_num_ports); i++)
2753                 gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
2754                         GBENU_HW_STATS_OFFSET + (GBENU_HW_STATS_REG_MAP_SZ * i);
2755
2756         gbe_dev->ale_reg = gbe_dev->switch_regs + GBENU_ALE_OFFSET;
2757         gbe_dev->ale_ports = gbe_dev->max_num_ports;
2758         gbe_dev->host_port = GBENU_HOST_PORT_NUM;
2759         gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
2760         gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;
2761
2762         /* Subsystem registers */
2763         GBENU_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
2764
2765         /* Switch module registers */
2766         GBENU_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
2767         GBENU_SET_REG_OFS(gbe_dev, switch_regs, control);
2768         GBENU_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
2769         GBENU_SET_REG_OFS(gbe_dev, switch_regs, ptype);
2770
2771         /* Host port registers */
2772         GBENU_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
2773         GBENU_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
2774
2775         /* For NU only.  2U does not need tx_pri_map.
2776          * NU cppi port 0 tx pkt streaming interface has (n-1)*8 egress threads
2777          * while 2U has only 1 such thread
2778          */
2779         GBENU_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
2780         return 0;
2781 }
2782
2783 static int gbe_probe(struct netcp_device *netcp_device, struct device *dev,
2784                      struct device_node *node, void **inst_priv)
2785 {
2786         struct device_node *interfaces, *interface;
2787         struct device_node *secondary_ports;
2788         struct cpsw_ale_params ale_params;
2789         struct gbe_priv *gbe_dev;
2790         u32 slave_num;
2791         int ret = 0;
2792
2793         if (!node) {
2794                 dev_err(dev, "device tree info unavailable\n");
2795                 return -ENODEV;
2796         }
2797
2798         gbe_dev = devm_kzalloc(dev, sizeof(struct gbe_priv), GFP_KERNEL);
2799         if (!gbe_dev)
2800                 return -ENOMEM;
2801
2802         if (of_device_is_compatible(node, "ti,netcp-gbe-5") ||
2803             of_device_is_compatible(node, "ti,netcp-gbe")) {
2804                 gbe_dev->max_num_slaves = 4;
2805         } else if (of_device_is_compatible(node, "ti,netcp-gbe-9")) {
2806                 gbe_dev->max_num_slaves = 8;
2807         } else if (of_device_is_compatible(node, "ti,netcp-gbe-2")) {
2808                 gbe_dev->max_num_slaves = 1;
2809         } else if (of_device_is_compatible(node, "ti,netcp-xgbe")) {
2810                 gbe_dev->max_num_slaves = 2;
2811         } else {
2812                 dev_err(dev, "device tree node for unknown device\n");
2813                 return -EINVAL;
2814         }
2815         gbe_dev->max_num_ports = gbe_dev->max_num_slaves + 1;
2816
2817         gbe_dev->dev = dev;
2818         gbe_dev->netcp_device = netcp_device;
2819         gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE;
2820
2821         /* init the hw stats lock */
2822         spin_lock_init(&gbe_dev->hw_stats_lock);
2823
2824         if (of_find_property(node, "enable-ale", NULL)) {
2825                 gbe_dev->enable_ale = true;
2826                 dev_info(dev, "ALE enabled\n");
2827         } else {
2828                 gbe_dev->enable_ale = false;
2829                 dev_dbg(dev, "ALE bypass enabled*\n");
2830         }
2831
2832         ret = of_property_read_u32(node, "tx-queue",
2833                                    &gbe_dev->tx_queue_id);
2834         if (ret < 0) {
2835                 dev_err(dev, "missing tx_queue parameter\n");
2836                 gbe_dev->tx_queue_id = GBE_TX_QUEUE;
2837         }
2838
2839         ret = of_property_read_string(node, "tx-channel",
2840                                       &gbe_dev->dma_chan_name);
2841         if (ret < 0) {
2842                 dev_err(dev, "missing \"tx-channel\" parameter\n");
2843                 ret = -ENODEV;
2844                 goto quit;
2845         }
2846
2847         if (!strcmp(node->name, "gbe")) {
2848                 ret = get_gbe_resource_version(gbe_dev, node);
2849                 if (ret)
2850                         goto quit;
2851
2852                 dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version);
2853
2854                 if (gbe_dev->ss_version == GBE_SS_VERSION_14)
2855                         ret = set_gbe_ethss14_priv(gbe_dev, node);
2856                 else if (IS_SS_ID_MU(gbe_dev))
2857                         ret = set_gbenu_ethss_priv(gbe_dev, node);
2858                 else
2859                         ret = -ENODEV;
2860
2861                 if (ret)
2862                         goto quit;
2863         } else if (!strcmp(node->name, "xgbe")) {
2864                 ret = set_xgbe_ethss10_priv(gbe_dev, node);
2865                 if (ret)
2866                         goto quit;
2867                 ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs,
2868                                              gbe_dev->ss_regs);
2869                 if (ret)
2870                         goto quit;
2871         } else {
2872                 dev_err(dev, "unknown GBE node(%s)\n", node->name);
2873                 ret = -ENODEV;
2874                 goto quit;
2875         }
2876
2877         interfaces = of_get_child_by_name(node, "interfaces");
2878         if (!interfaces)
2879                 dev_err(dev, "could not find interfaces\n");
2880
2881         ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device,
2882                                 gbe_dev->dma_chan_name, gbe_dev->tx_queue_id);
2883         if (ret)
2884                 goto quit;
2885
2886         ret = netcp_txpipe_open(&gbe_dev->tx_pipe);
2887         if (ret)
2888                 goto quit;
2889
2890         /* Create network interfaces */
2891         INIT_LIST_HEAD(&gbe_dev->gbe_intf_head);
2892         for_each_child_of_node(interfaces, interface) {
2893                 ret = of_property_read_u32(interface, "slave-port", &slave_num);
2894                 if (ret) {
2895                         dev_err(dev, "missing slave-port parameter, skipping interface configuration for %s\n",
2896                                 interface->name);
2897                         continue;
2898                 }
2899                 gbe_dev->num_slaves++;
2900                 if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves)
2901                         break;
2902         }
2903
2904         if (!gbe_dev->num_slaves)
2905                 dev_warn(dev, "No network interface configured\n");
2906
2907         /* Initialize Secondary slave ports */
2908         secondary_ports = of_get_child_by_name(node, "secondary-slave-ports");
2909         INIT_LIST_HEAD(&gbe_dev->secondary_slaves);
2910         if (secondary_ports && (gbe_dev->num_slaves <  gbe_dev->max_num_slaves))
2911                 init_secondary_ports(gbe_dev, secondary_ports);
2912         of_node_put(secondary_ports);
2913
2914         if (!gbe_dev->num_slaves) {
2915                 dev_err(dev, "No network interface or secondary ports configured\n");
2916                 ret = -ENODEV;
2917                 goto quit;
2918         }
2919
2920         memset(&ale_params, 0, sizeof(ale_params));
2921         ale_params.dev          = gbe_dev->dev;
2922         ale_params.ale_regs     = gbe_dev->ale_reg;
2923         ale_params.ale_ageout   = GBE_DEFAULT_ALE_AGEOUT;
2924         ale_params.ale_entries  = gbe_dev->ale_entries;
2925         ale_params.ale_ports    = gbe_dev->ale_ports;
2926
2927         gbe_dev->ale = cpsw_ale_create(&ale_params);
2928         if (!gbe_dev->ale) {
2929                 dev_err(gbe_dev->dev, "error initializing ale engine\n");
2930                 ret = -ENODEV;
2931                 goto quit;
2932         } else {
2933                 dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n");
2934         }
2935
2936         /* initialize host port */
2937         gbe_init_host_port(gbe_dev);
2938
2939         init_timer(&gbe_dev->timer);
2940         gbe_dev->timer.data      = (unsigned long)gbe_dev;
2941         gbe_dev->timer.function = netcp_ethss_timer;
2942         gbe_dev->timer.expires   = jiffies + GBE_TIMER_INTERVAL;
2943         add_timer(&gbe_dev->timer);
2944         *inst_priv = gbe_dev;
2945         return 0;
2946
2947 quit:
2948         if (gbe_dev->hw_stats)
2949                 devm_kfree(dev, gbe_dev->hw_stats);
2950         cpsw_ale_destroy(gbe_dev->ale);
2951         if (gbe_dev->ss_regs)
2952                 devm_iounmap(dev, gbe_dev->ss_regs);
2953         of_node_put(interfaces);
2954         devm_kfree(dev, gbe_dev);
2955         return ret;
2956 }
2957
2958 static int gbe_attach(void *inst_priv, struct net_device *ndev,
2959                       struct device_node *node, void **intf_priv)
2960 {
2961         struct gbe_priv *gbe_dev = inst_priv;
2962         struct gbe_intf *gbe_intf;
2963         int ret;
2964
2965         if (!node) {
2966                 dev_err(gbe_dev->dev, "interface node not available\n");
2967                 return -ENODEV;
2968         }
2969
2970         gbe_intf = devm_kzalloc(gbe_dev->dev, sizeof(*gbe_intf), GFP_KERNEL);
2971         if (!gbe_intf)
2972                 return -ENOMEM;
2973
2974         gbe_intf->ndev = ndev;
2975         gbe_intf->dev = gbe_dev->dev;
2976         gbe_intf->gbe_dev = gbe_dev;
2977
2978         gbe_intf->slave = devm_kzalloc(gbe_dev->dev,
2979                                         sizeof(*gbe_intf->slave),
2980                                         GFP_KERNEL);
2981         if (!gbe_intf->slave) {
2982                 ret = -ENOMEM;
2983                 goto fail;
2984         }
2985
2986         if (init_slave(gbe_dev, gbe_intf->slave, node)) {
2987                 ret = -ENODEV;
2988                 goto fail;
2989         }
2990
2991         gbe_intf->tx_pipe = gbe_dev->tx_pipe;
2992         ndev->ethtool_ops = &keystone_ethtool_ops;
2993         list_add_tail(&gbe_intf->gbe_intf_list, &gbe_dev->gbe_intf_head);
2994         *intf_priv = gbe_intf;
2995         return 0;
2996
2997 fail:
2998         if (gbe_intf->slave)
2999                 devm_kfree(gbe_dev->dev, gbe_intf->slave);
3000         if (gbe_intf)
3001                 devm_kfree(gbe_dev->dev, gbe_intf);
3002         return ret;
3003 }
3004
3005 static int gbe_release(void *intf_priv)
3006 {
3007         struct gbe_intf *gbe_intf = intf_priv;
3008
3009         gbe_intf->ndev->ethtool_ops = NULL;
3010         list_del(&gbe_intf->gbe_intf_list);
3011         devm_kfree(gbe_intf->dev, gbe_intf->slave);
3012         devm_kfree(gbe_intf->dev, gbe_intf);
3013         return 0;
3014 }
3015
3016 static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv)
3017 {
3018         struct gbe_priv *gbe_dev = inst_priv;
3019
3020         del_timer_sync(&gbe_dev->timer);
3021         cpsw_ale_stop(gbe_dev->ale);
3022         cpsw_ale_destroy(gbe_dev->ale);
3023         netcp_txpipe_close(&gbe_dev->tx_pipe);
3024         free_secondary_ports(gbe_dev);
3025
3026         if (!list_empty(&gbe_dev->gbe_intf_head))
3027                 dev_alert(gbe_dev->dev, "unreleased ethss interfaces present\n");
3028
3029         devm_kfree(gbe_dev->dev, gbe_dev->hw_stats);
3030         devm_iounmap(gbe_dev->dev, gbe_dev->ss_regs);
3031         memset(gbe_dev, 0x00, sizeof(*gbe_dev));
3032         devm_kfree(gbe_dev->dev, gbe_dev);
3033         return 0;
3034 }
3035
3036 static struct netcp_module gbe_module = {
3037         .name           = GBE_MODULE_NAME,
3038         .owner          = THIS_MODULE,
3039         .primary        = true,
3040         .probe          = gbe_probe,
3041         .open           = gbe_open,
3042         .close          = gbe_close,
3043         .remove         = gbe_remove,
3044         .attach         = gbe_attach,
3045         .release        = gbe_release,
3046         .add_addr       = gbe_add_addr,
3047         .del_addr       = gbe_del_addr,
3048         .add_vid        = gbe_add_vid,
3049         .del_vid        = gbe_del_vid,
3050         .ioctl          = gbe_ioctl,
3051 };
3052
3053 static struct netcp_module xgbe_module = {
3054         .name           = XGBE_MODULE_NAME,
3055         .owner          = THIS_MODULE,
3056         .primary        = true,
3057         .probe          = gbe_probe,
3058         .open           = gbe_open,
3059         .close          = gbe_close,
3060         .remove         = gbe_remove,
3061         .attach         = gbe_attach,
3062         .release        = gbe_release,
3063         .add_addr       = gbe_add_addr,
3064         .del_addr       = gbe_del_addr,
3065         .add_vid        = gbe_add_vid,
3066         .del_vid        = gbe_del_vid,
3067         .ioctl          = gbe_ioctl,
3068 };
3069
3070 static int __init keystone_gbe_init(void)
3071 {
3072         int ret;
3073
3074         ret = netcp_register_module(&gbe_module);
3075         if (ret)
3076                 return ret;
3077
3078         ret = netcp_register_module(&xgbe_module);
3079         if (ret)
3080                 return ret;
3081
3082         return 0;
3083 }
3084 module_init(keystone_gbe_init);
3085
3086 static void __exit keystone_gbe_exit(void)
3087 {
3088         netcp_unregister_module(&gbe_module);
3089         netcp_unregister_module(&xgbe_module);
3090 }
3091 module_exit(keystone_gbe_exit);
3092
3093 MODULE_LICENSE("GPL v2");
3094 MODULE_DESCRIPTION("TI NETCP ETHSS driver for Keystone SOCs");
3095 MODULE_AUTHOR("Sandeep Nair <sandeep_n@ti.com");