1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 [link no longer provides useful info -jgarzik]
25 http://www.parl.clemson.edu/~keithu/hamachi.html
29 #define DRV_NAME "hamachi"
30 #define DRV_VERSION "2.1"
31 #define DRV_RELDATE "Sept 11, 2006"
34 /* A few user-configurable values. */
36 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
38 #define hamachi_debug debug
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
40 static int max_interrupt_work = 40;
42 /* Default values selected by testing on a dual processor PIII-450 */
43 /* These six interrupt control parameters may be set directly when loading the
44 * module, or through the rx_params and tx_params variables
46 static int max_rx_latency = 0x11;
47 static int max_rx_gap = 0x05;
48 static int min_rx_pkt = 0x18;
49 static int max_tx_latency = 0x00;
50 static int max_tx_gap = 0x00;
51 static int min_tx_pkt = 0x30;
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
57 static int rx_copybreak;
59 /* An override for the hardware detection of bus width.
60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
61 Add 2 to disable parity detection.
66 /* Used to pass the media type, etc.
67 These exist for driver interoperability.
68 No media types are currently defined.
69 - The lower 4 bits are reserved for the media type.
70 - The next three bits may be set to one of the following:
71 0x00000000 : Autodetect PCI bus
72 0x00000010 : Force 32 bit PCI bus
73 0x00000020 : Disable parity detection
74 0x00000040 : Force 64 bit PCI bus
76 - The next bit can be used to force half-duplex. This is a bad
77 idea since no known implementations implement half-duplex, and,
78 in general, half-duplex for gigabit ethernet is a bad idea.
79 0x00000080 : Force half-duplex
80 Default is full-duplex.
81 - In the original driver, the ninth bit could be used to force
82 full-duplex. Maintain that for compatibility
83 0x00000200 : Force full-duplex
85 #define MAX_UNITS 8 /* More are supported, limit only on options */
86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
89 * interruput management. Parameters will be loaded as specified into
90 * the TxIntControl and RxIntControl registers.
92 * The registers are arranged as follows:
93 * 23 - 16 15 - 8 7 - 0
94 * _________________________________
95 * | min_pkt | max_gap | max_latency |
96 * ---------------------------------
97 * min_pkt : The minimum number of packets processed between
99 * max_gap : The maximum inter-packet gap in units of 8.192 us
100 * max_latency : The absolute time between interrupts in units of 8.192 us
103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
106 /* Operational parameters that are set at compile time. */
108 /* Keep the ring sizes a power of two for compile efficiency.
109 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
110 Making the Tx ring too large decreases the effectiveness of channel
111 bonding and packet priority.
112 There are no ill effects from too-large receive rings, except for
113 excessive memory usage */
114 /* Empirically it appears that the Tx ring needs to be a little bigger
115 for these Gbit adapters or you get into an overrun condition really
116 easily. Also, things appear to work a bit better in back-to-back
117 configurations if the Rx ring is 8 times the size of the Tx ring
119 #define TX_RING_SIZE 64
120 #define RX_RING_SIZE 512
121 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
122 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
129 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
130 /* #define ADDRLEN 64 */
133 * RX_CHECKSUM turns on card-generated receive checksum generation for
134 * TCP and UDP packets. Otherwise the upper layers do the calculation.
135 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
136 * easy mechanism by which to tell the TCP/UDP stack that it need not
137 * generate checksums for this device. But if somebody can find a way
138 * to get that to work, most of the card work is in here already.
139 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
144 /* Operational parameters that usually are not changed. */
145 /* Time in jiffies before concluding the transmitter is hung. */
146 #define TX_TIMEOUT (5*HZ)
148 #include <linux/module.h>
149 #include <linux/kernel.h>
150 #include <linux/string.h>
151 #include <linux/timer.h>
152 #include <linux/time.h>
153 #include <linux/errno.h>
154 #include <linux/ioport.h>
155 #include <linux/slab.h>
156 #include <linux/interrupt.h>
157 #include <linux/pci.h>
158 #include <linux/init.h>
159 #include <linux/ethtool.h>
160 #include <linux/mii.h>
161 #include <linux/netdevice.h>
162 #include <linux/etherdevice.h>
163 #include <linux/skbuff.h>
164 #include <linux/ip.h>
165 #include <linux/delay.h>
166 #include <linux/bitops.h>
168 #include <asm/uaccess.h>
169 #include <asm/processor.h> /* Processor type for cache alignment. */
171 #include <asm/unaligned.h>
172 #include <asm/cache.h>
174 static char version[] __devinitdata =
175 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
176 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
177 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
180 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
181 we need it for hardware checksumming support. FYI... some of
182 the definitions in <netinet/ip.h> conflict/duplicate those in
183 other linux headers causing many compiler warnings.
186 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
189 /* Define IP_OFFSET to be IPOPT_OFFSET */
192 #define IP_OFFSET IPOPT_OFFSET
198 #define RUN_AT(x) (jiffies + (x))
204 /* Condensed bus+endian portability operations. */
206 #define cpu_to_leXX(addr) cpu_to_le64(addr)
208 #define cpu_to_leXX(addr) cpu_to_le32(addr)
215 I. Board Compatibility
217 This device driver is designed for the Packet Engines "Hamachi"
218 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
221 II. Board-specific settings
223 No jumpers exist on the board. The chip supports software correction of
224 various motherboard wiring errors, however this driver does not support
227 III. Driver operation
231 The Hamachi uses a typical descriptor based bus-master architecture.
232 The descriptor list is similar to that used by the Digital Tulip.
233 This driver uses two statically allocated fixed-size descriptor lists
234 formed into rings by a branch from the final descriptor to the beginning of
235 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
237 This driver uses a zero-copy receive and transmit scheme similar my other
239 The driver allocates full frame size skbuffs for the Rx ring buffers at
240 open() time and passes the skb->data field to the Hamachi as receive data
241 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
242 a fresh skbuff is allocated and the frame is copied to the new skbuff.
243 When the incoming frame is larger, the skbuff is passed directly up the
244 protocol stack and replaced by a newly allocated skbuff.
246 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
247 using a full-sized skbuff for small frames vs. the copying costs of larger
248 frames. Gigabit cards are typically used on generously configured machines
249 and the underfilled buffers have negligible impact compared to the benefit of
250 a single allocation size, so the default value of zero results in never
253 IIIb/c. Transmit/Receive Structure
255 The Rx and Tx descriptor structure are straight-forward, with no historical
256 baggage that must be explained. Unlike the awkward DBDMA structure, there
257 are no unused fields or option bits that had only one allowable setting.
259 Two details should be noted about the descriptors: The chip supports both 32
260 bit and 64 bit address structures, and the length field is overwritten on
261 the receive descriptors. The descriptor length is set in the control word
262 for each channel. The development driver uses 32 bit addresses only, however
263 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
265 IIId. Synchronization
267 This driver is very similar to my other network drivers.
268 The driver runs as two independent, single-threaded flows of control. One
269 is the send-packet routine, which enforces single-threaded use by the
270 dev->tbusy flag. The other thread is the interrupt handler, which is single
271 threaded by the hardware and other software.
273 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
274 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
275 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
276 the 'hmp->tx_full' flag.
278 The interrupt handler has exclusive control over the Rx ring and records stats
279 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
280 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
281 clears both the tx_full and tbusy flags.
285 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
289 Hamachi Engineering Design Specification, 5/15/97
290 (Note: This version was marked "Confidential".)
298 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
299 to help avoid some stall conditions -- this needs further research.
301 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
302 the Tx ring and is called from hamachi_start_xmit (this used to be
303 called from hamachi_interrupt but it tends to delay execution of the
304 interrupt handler and thus reduce bandwidth by reducing the latency
305 between hamachi_rx()'s). Notably, some modification has been made so
306 that the cleaning loop checks only to make sure that the DescOwn bit
307 isn't set in the status flag since the card is not required
308 to set the entire flag to zero after processing.
310 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
311 checked before attempting to add a buffer to the ring. If the ring is full
312 an attempt is made to free any dirty buffers and thus find space for
313 the new buffer or the function returns non-zero which should case the
314 scheduler to reschedule the buffer later.
316 01/15/1999 EPK Some adjustments were made to the chip initialization.
317 End-to-end flow control should now be fully active and the interrupt
318 algorithm vars have been changed. These could probably use further tuning.
320 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
321 set the rx and tx latencies for the Hamachi interrupts. If you're having
322 problems with network stalls, try setting these to higher values.
323 Valid values are 0x00 through 0xff.
325 01/15/1999 EPK In general, the overall bandwidth has increased and
326 latencies are better (sometimes by a factor of 2). Stalls are rare at
327 this point, however there still appears to be a bug somewhere between the
328 hardware and driver. TCP checksum errors under load also appear to be
329 eliminated at this point.
331 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
332 Rx and Tx rings. This appears to have been affecting whether a particular
333 peer-to-peer connection would hang under high load. I believe the Rx
334 rings was typically getting set correctly, but the Tx ring wasn't getting
335 the DescEndRing bit set during initialization. ??? Does this mean the
336 hamachi card is using the DescEndRing in processing even if a particular
337 slot isn't in use -- hypothetically, the card might be searching the
338 entire Tx ring for slots with the DescOwn bit set and then processing
339 them. If the DescEndRing bit isn't set, then it might just wander off
340 through memory until it hits a chunk of data with that bit set
341 and then looping back.
343 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
344 problem (TxCmd and RxCmd need only to be set when idle or stopped.
346 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
347 (Michel Mueller pointed out the ``permanently busy'' potential
350 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
352 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
353 incorrectly defined and corrected (as per Michel Mueller).
355 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
356 were available before reseting the tbusy and tx_full flags
357 (as per Michel Mueller).
359 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
361 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
364 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
365 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
366 re-structuring I would like to do.
368 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
369 parameters on a dual P3-450 setup yielded the new default interrupt
370 mitigation parameters. Tx should interrupt VERY infrequently due to
371 Eric's scheme. Rx should be more often...
373 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
374 nicely with non-linux machines.
376 03/13/2000 KDU Experimented with some of the configuration values:
378 -It seems that enabling PCI performance commands for descriptors
379 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
380 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
381 leave them that way until I hear further feedback.
383 -Increasing the PCI_LATENCY_TIMER to 130
384 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
385 degrade performance. Leaving default at 64 pending further information.
387 03/14/2000 KDU Further tuning:
389 -adjusted boguscnt in hamachi_rx() to depend on interrupt
390 mitigation parameters chosen.
392 -Selected a set of interrupt parameters based on some extensive testing.
393 These may change with more testing.
397 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
398 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
401 -fix the reset procedure. It doesn't quite work.
404 /* A few values that may be tweaked. */
405 /* Size of each temporary Rx buffer, calculated as:
406 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
407 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
408 * 2 more because we use skb_reserve.
410 #define PKT_BUF_SZ 1538
412 /* For now, this is going to be set to the maximum size of an ethernet
413 * packet. Eventually, we may want to make it a variable that is
416 #define MAX_FRAME_SIZE 1518
418 /* The rest of these values should never change. */
420 static void hamachi_timer(unsigned long data);
422 enum capability_flags {CanHaveMII=1, };
423 static const struct chip_info {
424 u16 vendor_id, device_id, device_id_mask, pad;
426 void (*media_timer)(unsigned long data);
429 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
433 /* Offsets to the Hamachi registers. Various sizes. */
434 enum hamachi_offsets {
435 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
436 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
437 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
438 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
439 TxChecksum=0x074, RxChecksum=0x076,
440 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
441 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
443 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
444 /* See enum MII_offsets below. */
445 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
446 AddrMode=0x0D0, StationAddr=0x0D2,
447 /* Gigabit AutoNegotiation. */
448 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
449 ANLinkPartnerAbility=0x0EA,
450 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
454 /* Offsets to the MII-mode registers. */
456 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
460 /* Bits in the interrupt status/mask registers. */
461 enum intr_status_bits {
462 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
463 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
464 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
466 /* The Hamachi Rx and Tx buffer descriptors. */
467 struct hamachi_desc {
477 /* Bits in hamachi_desc.status_n_length */
478 enum desc_status_bits {
479 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
483 #define PRIV_ALIGN 15 /* Required alignment mask */
485 struct hamachi_private {
486 /* Descriptor rings first for alignment. Tx requires a second descriptor
488 struct hamachi_desc *rx_ring;
489 struct hamachi_desc *tx_ring;
490 struct sk_buff* rx_skbuff[RX_RING_SIZE];
491 struct sk_buff* tx_skbuff[TX_RING_SIZE];
492 dma_addr_t tx_ring_dma;
493 dma_addr_t rx_ring_dma;
494 struct net_device_stats stats;
495 struct timer_list timer; /* Media selection timer. */
496 /* Frequently used and paired value: keep adjacent for cache effect. */
499 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
500 unsigned int cur_tx, dirty_tx;
501 unsigned int rx_buf_sz; /* Based on MTU+slack. */
502 unsigned int tx_full:1; /* The Tx queue is full. */
503 unsigned int duplex_lock:1;
504 unsigned int default_port:4; /* Last dev->if_port value. */
505 /* MII transceiver section. */
506 int mii_cnt; /* MII device addresses. */
507 struct mii_if_info mii_if; /* MII lib hooks/info */
508 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
509 u32 rx_int_var, tx_int_var; /* interrupt control variables */
510 u32 option; /* Hold on to a copy of the options */
511 struct pci_dev *pci_dev;
515 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
516 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
517 MODULE_LICENSE("GPL");
519 module_param(max_interrupt_work, int, 0);
520 module_param(mtu, int, 0);
521 module_param(debug, int, 0);
522 module_param(min_rx_pkt, int, 0);
523 module_param(max_rx_gap, int, 0);
524 module_param(max_rx_latency, int, 0);
525 module_param(min_tx_pkt, int, 0);
526 module_param(max_tx_gap, int, 0);
527 module_param(max_tx_latency, int, 0);
528 module_param(rx_copybreak, int, 0);
529 module_param_array(rx_params, int, NULL, 0);
530 module_param_array(tx_params, int, NULL, 0);
531 module_param_array(options, int, NULL, 0);
532 module_param_array(full_duplex, int, NULL, 0);
533 module_param(force32, int, 0);
534 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
535 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
536 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
537 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
538 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
539 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
540 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
541 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
542 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
543 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
544 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
545 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
546 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
547 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
548 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
550 static int read_eeprom(void __iomem *ioaddr, int location);
551 static int mdio_read(struct net_device *dev, int phy_id, int location);
552 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
553 static int hamachi_open(struct net_device *dev);
554 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
555 static void hamachi_timer(unsigned long data);
556 static void hamachi_tx_timeout(struct net_device *dev);
557 static void hamachi_init_ring(struct net_device *dev);
558 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
559 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
560 static int hamachi_rx(struct net_device *dev);
561 static inline int hamachi_tx(struct net_device *dev);
562 static void hamachi_error(struct net_device *dev, int intr_status);
563 static int hamachi_close(struct net_device *dev);
564 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
565 static void set_rx_mode(struct net_device *dev);
566 static const struct ethtool_ops ethtool_ops;
567 static const struct ethtool_ops ethtool_ops_no_mii;
569 static int __devinit hamachi_init_one (struct pci_dev *pdev,
570 const struct pci_device_id *ent)
572 struct hamachi_private *hmp;
573 int option, i, rx_int_var, tx_int_var, boguscnt;
574 int chip_id = ent->driver_data;
576 void __iomem *ioaddr;
579 struct net_device *dev;
584 /* when built into the kernel, we only print version if device is found */
586 static int printed_version;
587 if (!printed_version++)
591 if (pci_enable_device(pdev)) {
596 base = pci_resource_start(pdev, 0);
597 #ifdef __alpha__ /* Really "64 bit addrs" */
598 base |= (pci_resource_start(pdev, 1) << 32);
601 pci_set_master(pdev);
603 i = pci_request_regions(pdev, DRV_NAME);
608 ioaddr = ioremap(base, 0x400);
610 goto err_out_release;
612 dev = alloc_etherdev(sizeof(struct hamachi_private));
614 goto err_out_iounmap;
616 SET_NETDEV_DEV(dev, &pdev->dev);
619 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
620 dev->hard_header_len += 8; /* for cksum tag */
623 for (i = 0; i < 6; i++)
624 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
625 : readb(ioaddr + StationAddr + i);
627 #if ! defined(final_version)
628 if (hamachi_debug > 4)
629 for (i = 0; i < 0x10; i++)
631 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
634 hmp = netdev_priv(dev);
635 spin_lock_init(&hmp->lock);
637 hmp->mii_if.dev = dev;
638 hmp->mii_if.mdio_read = mdio_read;
639 hmp->mii_if.mdio_write = mdio_write;
640 hmp->mii_if.phy_id_mask = 0x1f;
641 hmp->mii_if.reg_num_mask = 0x1f;
643 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
645 goto err_out_cleardev;
646 hmp->tx_ring = (struct hamachi_desc *)ring_space;
647 hmp->tx_ring_dma = ring_dma;
649 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
651 goto err_out_unmap_tx;
652 hmp->rx_ring = (struct hamachi_desc *)ring_space;
653 hmp->rx_ring_dma = ring_dma;
655 /* Check for options being passed in */
656 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
658 option = dev->mem_start;
660 /* If the bus size is misidentified, do the following. */
661 force32 = force32 ? force32 :
662 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
664 writeb(force32, ioaddr + VirtualJumpers);
666 /* Hmmm, do we really need to reset the chip???. */
667 writeb(0x01, ioaddr + ChipReset);
669 /* After a reset, the clock speed measurement of the PCI bus will not
670 * be valid for a moment. Wait for a little while until it is. If
671 * it takes more than 10ms, forget it.
674 i = readb(ioaddr + PCIClkMeas);
675 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
677 i = readb(ioaddr + PCIClkMeas);
681 dev->base_addr = (unsigned long)ioaddr;
683 pci_set_drvdata(pdev, dev);
685 hmp->chip_id = chip_id;
688 /* The lower four bits are the media type. */
690 hmp->option = option;
692 hmp->mii_if.full_duplex = 1;
693 else if (option & 0x080)
694 hmp->mii_if.full_duplex = 0;
695 hmp->default_port = option & 15;
696 if (hmp->default_port)
697 hmp->mii_if.force_media = 1;
699 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
700 hmp->mii_if.full_duplex = 1;
702 /* lock the duplex mode if someone specified a value */
703 if (hmp->mii_if.full_duplex || (option & 0x080))
704 hmp->duplex_lock = 1;
706 /* Set interrupt tuning parameters */
707 max_rx_latency = max_rx_latency & 0x00ff;
708 max_rx_gap = max_rx_gap & 0x00ff;
709 min_rx_pkt = min_rx_pkt & 0x00ff;
710 max_tx_latency = max_tx_latency & 0x00ff;
711 max_tx_gap = max_tx_gap & 0x00ff;
712 min_tx_pkt = min_tx_pkt & 0x00ff;
714 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
715 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
716 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
717 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
718 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
719 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
722 /* The Hamachi-specific entries in the device structure. */
723 dev->open = &hamachi_open;
724 dev->hard_start_xmit = &hamachi_start_xmit;
725 dev->stop = &hamachi_close;
726 dev->get_stats = &hamachi_get_stats;
727 dev->set_multicast_list = &set_rx_mode;
728 dev->do_ioctl = &netdev_ioctl;
729 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
730 SET_ETHTOOL_OPS(dev, ðtool_ops);
732 SET_ETHTOOL_OPS(dev, ðtool_ops_no_mii);
733 dev->tx_timeout = &hamachi_tx_timeout;
734 dev->watchdog_timeo = TX_TIMEOUT;
738 i = register_netdev(dev);
741 goto err_out_unmap_rx;
744 printk(KERN_INFO "%s: %s type %x at %p, ",
745 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
747 for (i = 0; i < 5; i++)
748 printk("%2.2x:", dev->dev_addr[i]);
749 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
750 i = readb(ioaddr + PCIClkMeas);
751 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
752 "%2.2x, LPA %4.4x.\n",
753 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
754 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
755 readw(ioaddr + ANLinkPartnerAbility));
757 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
758 int phy, phy_idx = 0;
759 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
760 int mii_status = mdio_read(dev, phy, MII_BMSR);
761 if (mii_status != 0xffff &&
762 mii_status != 0x0000) {
763 hmp->phys[phy_idx++] = phy;
764 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
765 printk(KERN_INFO "%s: MII PHY found at address %d, status "
766 "0x%4.4x advertising %4.4x.\n",
767 dev->name, phy, mii_status, hmp->mii_if.advertising);
770 hmp->mii_cnt = phy_idx;
771 if (hmp->mii_cnt > 0)
772 hmp->mii_if.phy_id = hmp->phys[0];
774 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
776 /* Configure gigabit autonegotiation. */
777 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
778 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
779 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
785 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
788 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
795 pci_release_regions(pdev);
800 static int __devinit read_eeprom(void __iomem *ioaddr, int location)
802 int bogus_cnt = 1000;
804 /* We should check busy first - per docs -KDU */
805 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
806 writew(location, ioaddr + EEAddr);
807 writeb(0x02, ioaddr + EECmdStatus);
809 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
810 if (hamachi_debug > 5)
811 printk(" EEPROM status is %2.2x after %d ticks.\n",
812 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
813 return readb(ioaddr + EEData);
816 /* MII Managemen Data I/O accesses.
817 These routines assume the MDIO controller is idle, and do not exit until
818 the command is finished. */
820 static int mdio_read(struct net_device *dev, int phy_id, int location)
822 struct hamachi_private *hmp = netdev_priv(dev);
823 void __iomem *ioaddr = hmp->base;
826 /* We should check busy first - per docs -KDU */
827 for (i = 10000; i >= 0; i--)
828 if ((readw(ioaddr + MII_Status) & 1) == 0)
830 writew((phy_id<<8) + location, ioaddr + MII_Addr);
831 writew(0x0001, ioaddr + MII_Cmd);
832 for (i = 10000; i >= 0; i--)
833 if ((readw(ioaddr + MII_Status) & 1) == 0)
835 return readw(ioaddr + MII_Rd_Data);
838 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
840 struct hamachi_private *hmp = netdev_priv(dev);
841 void __iomem *ioaddr = hmp->base;
844 /* We should check busy first - per docs -KDU */
845 for (i = 10000; i >= 0; i--)
846 if ((readw(ioaddr + MII_Status) & 1) == 0)
848 writew((phy_id<<8) + location, ioaddr + MII_Addr);
849 writew(value, ioaddr + MII_Wr_Data);
851 /* Wait for the command to finish. */
852 for (i = 10000; i >= 0; i--)
853 if ((readw(ioaddr + MII_Status) & 1) == 0)
859 static int hamachi_open(struct net_device *dev)
861 struct hamachi_private *hmp = netdev_priv(dev);
862 void __iomem *ioaddr = hmp->base;
864 u32 rx_int_var, tx_int_var;
867 i = request_irq(dev->irq, &hamachi_interrupt, IRQF_SHARED, dev->name, dev);
871 if (hamachi_debug > 1)
872 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
873 dev->name, dev->irq);
875 hamachi_init_ring(dev);
878 /* writellll anyone ? */
879 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
880 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
881 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
882 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
884 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
885 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
888 /* TODO: It would make sense to organize this as words since the card
889 * documentation does. -KDU
891 for (i = 0; i < 6; i++)
892 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
894 /* Initialize other registers: with so many this eventually this will
895 converted to an offset/value list. */
897 /* Configure the FIFO */
898 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
902 writew(0x0000, ioaddr + FIFOcfg);
905 /* Configure the FIFO for 512K external, 16K used for Tx. */
906 writew(0x0028, ioaddr + FIFOcfg);
909 /* Configure the FIFO for 1024 external, 32K used for Tx. */
910 writew(0x004C, ioaddr + FIFOcfg);
913 /* Configure the FIFO for 2048 external, 32K used for Tx. */
914 writew(0x006C, ioaddr + FIFOcfg);
917 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
919 /* Default to no FIFO */
920 writew(0x0000, ioaddr + FIFOcfg);
924 if (dev->if_port == 0)
925 dev->if_port = hmp->default_port;
928 /* Setting the Rx mode will start the Rx process. */
929 /* If someone didn't choose a duplex, default to full-duplex */
930 if (hmp->duplex_lock != 1)
931 hmp->mii_if.full_duplex = 1;
933 /* always 1, takes no more time to do it */
934 writew(0x0001, ioaddr + RxChecksum);
936 writew(0x0001, ioaddr + TxChecksum);
938 writew(0x0000, ioaddr + TxChecksum);
940 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
941 writew(0x215F, ioaddr + MACCnfg);
942 writew(0x000C, ioaddr + FrameGap0);
943 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
944 writew(0x1018, ioaddr + FrameGap1);
945 /* Why do we enable receives/transmits here? -KDU */
946 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
947 /* Enable automatic generation of flow control frames, period 0xffff. */
948 writel(0x0030FFFF, ioaddr + FlowCtrl);
949 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
951 /* Enable legacy links. */
952 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
953 /* Initial Link LED to blinking red. */
954 writeb(0x03, ioaddr + LEDCtrl);
956 /* Configure interrupt mitigation. This has a great effect on
957 performance, so systems tuning should start here!. */
959 rx_int_var = hmp->rx_int_var;
960 tx_int_var = hmp->tx_int_var;
962 if (hamachi_debug > 1) {
963 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
964 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
965 (tx_int_var & 0x00ff0000) >> 16);
966 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
967 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
968 (rx_int_var & 0x00ff0000) >> 16);
969 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
972 writel(tx_int_var, ioaddr + TxIntrCtrl);
973 writel(rx_int_var, ioaddr + RxIntrCtrl);
977 netif_start_queue(dev);
979 /* Enable interrupts by setting the interrupt mask. */
980 writel(0x80878787, ioaddr + InterruptEnable);
981 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
983 /* Configure and start the DMA channels. */
984 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
986 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
987 writew(0x005D, ioaddr + TxDMACtrl);
989 writew(0x001D, ioaddr + RxDMACtrl);
990 writew(0x001D, ioaddr + TxDMACtrl);
992 writew(0x0001, ioaddr + RxCmd);
994 if (hamachi_debug > 2) {
995 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
996 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
998 /* Set the timer to check for link beat. */
999 init_timer(&hmp->timer);
1000 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1001 hmp->timer.data = (unsigned long)dev;
1002 hmp->timer.function = &hamachi_timer; /* timer handler */
1003 add_timer(&hmp->timer);
1008 static inline int hamachi_tx(struct net_device *dev)
1010 struct hamachi_private *hmp = netdev_priv(dev);
1012 /* Update the dirty pointer until we find an entry that is
1013 still owned by the card */
1014 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1015 int entry = hmp->dirty_tx % TX_RING_SIZE;
1016 struct sk_buff *skb;
1018 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1020 /* Free the original skb. */
1021 skb = hmp->tx_skbuff[entry];
1023 pci_unmap_single(hmp->pci_dev,
1024 hmp->tx_ring[entry].addr, skb->len,
1027 hmp->tx_skbuff[entry] = NULL;
1029 hmp->tx_ring[entry].status_n_length = 0;
1030 if (entry >= TX_RING_SIZE-1)
1031 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1032 cpu_to_le32(DescEndRing);
1033 hmp->stats.tx_packets++;
1039 static void hamachi_timer(unsigned long data)
1041 struct net_device *dev = (struct net_device *)data;
1042 struct hamachi_private *hmp = netdev_priv(dev);
1043 void __iomem *ioaddr = hmp->base;
1044 int next_tick = 10*HZ;
1046 if (hamachi_debug > 2) {
1047 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1048 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1049 readw(ioaddr + ANLinkPartnerAbility));
1050 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1051 "%4.4x %4.4x %4.4x.\n", dev->name,
1052 readw(ioaddr + 0x0e0),
1053 readw(ioaddr + 0x0e2),
1054 readw(ioaddr + 0x0e4),
1055 readw(ioaddr + 0x0e6),
1056 readw(ioaddr + 0x0e8),
1057 readw(ioaddr + 0x0eA));
1059 /* We could do something here... nah. */
1060 hmp->timer.expires = RUN_AT(next_tick);
1061 add_timer(&hmp->timer);
1064 static void hamachi_tx_timeout(struct net_device *dev)
1067 struct hamachi_private *hmp = netdev_priv(dev);
1068 void __iomem *ioaddr = hmp->base;
1070 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1071 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1075 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1076 for (i = 0; i < RX_RING_SIZE; i++)
1077 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1078 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1079 for (i = 0; i < TX_RING_SIZE; i++)
1080 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1084 /* Reinit the hardware and make sure the Rx and Tx processes
1088 /* The right way to do Reset. -KDU
1089 * -Clear OWN bit in all Rx/Tx descriptors
1090 * -Wait 50 uS for channels to go idle
1091 * -Turn off MAC receiver
1095 for (i = 0; i < RX_RING_SIZE; i++)
1096 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1098 /* Presume that all packets in the Tx queue are gone if we have to
1099 * re-init the hardware.
1101 for (i = 0; i < TX_RING_SIZE; i++){
1102 struct sk_buff *skb;
1104 if (i >= TX_RING_SIZE - 1)
1105 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1107 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1109 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1110 skb = hmp->tx_skbuff[i];
1112 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1113 skb->len, PCI_DMA_TODEVICE);
1115 hmp->tx_skbuff[i] = NULL;
1119 udelay(60); /* Sleep 60 us just for safety sake */
1120 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1122 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1125 hmp->cur_rx = hmp->cur_tx = 0;
1126 hmp->dirty_rx = hmp->dirty_tx = 0;
1127 /* Rx packets are also presumed lost; however, we need to make sure a
1128 * ring of buffers is in tact. -KDU
1130 for (i = 0; i < RX_RING_SIZE; i++){
1131 struct sk_buff *skb = hmp->rx_skbuff[i];
1134 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1135 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1137 hmp->rx_skbuff[i] = NULL;
1140 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1141 for (i = 0; i < RX_RING_SIZE; i++) {
1142 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1143 hmp->rx_skbuff[i] = skb;
1146 skb->dev = dev; /* Mark as being used by this device. */
1147 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1148 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1149 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1150 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1151 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1153 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1154 /* Mark the last entry as wrapping the ring. */
1155 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1157 /* Trigger an immediate transmit demand. */
1158 dev->trans_start = jiffies;
1159 hmp->stats.tx_errors++;
1161 /* Restart the chip's Tx/Rx processes . */
1162 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1163 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1164 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1166 netif_wake_queue(dev);
1170 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1171 static void hamachi_init_ring(struct net_device *dev)
1173 struct hamachi_private *hmp = netdev_priv(dev);
1177 hmp->cur_rx = hmp->cur_tx = 0;
1178 hmp->dirty_rx = hmp->dirty_tx = 0;
1181 /* This is wrong. I'm not sure what the original plan was, but this
1182 * is wrong. An MTU of 1 gets you a buffer of 1536, while an MTU
1183 * of 1501 gets a buffer of 1533? -KDU
1185 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1187 /* My attempt at a reasonable correction */
1188 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1189 * card needs room to do 8 byte alignment, +2 so we can reserve
1190 * the first 2 bytes, and +16 gets room for the status word from the
1193 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1194 (((dev->mtu+26+7) & ~7) + 2 + 16));
1196 /* Initialize all Rx descriptors. */
1197 for (i = 0; i < RX_RING_SIZE; i++) {
1198 hmp->rx_ring[i].status_n_length = 0;
1199 hmp->rx_skbuff[i] = NULL;
1201 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1202 for (i = 0; i < RX_RING_SIZE; i++) {
1203 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1204 hmp->rx_skbuff[i] = skb;
1207 skb->dev = dev; /* Mark as being used by this device. */
1208 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1209 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1210 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1211 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1212 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1213 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1215 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1216 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1218 for (i = 0; i < TX_RING_SIZE; i++) {
1219 hmp->tx_skbuff[i] = NULL;
1220 hmp->tx_ring[i].status_n_length = 0;
1222 /* Mark the last entry of the ring */
1223 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1230 #define csum_add(it, val) \
1232 it += (u16) (val); \
1233 if (it & 0xffff0000) { \
1238 /* printk("add %04x --> %04x\n", val, it); \ */
1240 /* uh->len already network format, do not swap */
1241 #define pseudo_csum_udp(sum,ih,uh) do { \
1243 csum_add(sum, (ih)->saddr >> 16); \
1244 csum_add(sum, (ih)->saddr & 0xffff); \
1245 csum_add(sum, (ih)->daddr >> 16); \
1246 csum_add(sum, (ih)->daddr & 0xffff); \
1247 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1248 csum_add(sum, (uh)->len); \
1252 #define pseudo_csum_tcp(sum,ih,len) do { \
1254 csum_add(sum, (ih)->saddr >> 16); \
1255 csum_add(sum, (ih)->saddr & 0xffff); \
1256 csum_add(sum, (ih)->daddr >> 16); \
1257 csum_add(sum, (ih)->daddr & 0xffff); \
1258 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1259 csum_add(sum, htons(len)); \
1263 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1265 struct hamachi_private *hmp = netdev_priv(dev);
1269 /* Ok, now make sure that the queue has space before trying to
1270 add another skbuff. if we return non-zero the scheduler
1271 should interpret this as a queue full and requeue the buffer
1275 /* We should NEVER reach this point -KDU */
1276 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1278 /* Wake the potentially-idle transmit channel. */
1279 /* If we don't need to read status, DON'T -KDU */
1280 status=readw(hmp->base + TxStatus);
1281 if( !(status & 0x0001) || (status & 0x0002))
1282 writew(0x0001, hmp->base + TxCmd);
1286 /* Caution: the write order is important here, set the field
1287 with the "ownership" bits last. */
1289 /* Calculate the next Tx descriptor entry. */
1290 entry = hmp->cur_tx % TX_RING_SIZE;
1292 hmp->tx_skbuff[entry] = skb;
1296 /* tack on checksum tag */
1298 struct ethhdr *eh = (struct ethhdr *)skb->data;
1299 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1300 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1301 if (ih->protocol == IPPROTO_UDP) {
1303 = (struct udphdr *)((char *)ih + ih->ihl*4);
1304 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1306 pseudo_csum_udp(pseudo, ih, uh);
1307 pseudo = htons(pseudo);
1308 printk("udp cksum was %04x, sending pseudo %04x\n",
1310 uh->check = 0; /* zero out uh->check before card calc */
1312 * start at 14 (skip ethhdr), store at offset (uh->check),
1313 * use pseudo value given.
1315 tagval = (14 << 24) | (offset << 16) | pseudo;
1316 } else if (ih->protocol == IPPROTO_TCP) {
1317 printk("tcp, no auto cksum\n");
1320 *(u32 *)skb_push(skb, 8) = tagval;
1324 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1325 skb->data, skb->len, PCI_DMA_TODEVICE));
1327 /* Hmmmm, could probably put a DescIntr on these, but the way
1328 the driver is currently coded makes Tx interrupts unnecessary
1329 since the clearing of the Tx ring is handled by the start_xmit
1330 routine. This organization helps mitigate the interrupts a
1331 bit and probably renders the max_tx_latency param useless.
1333 Update: Putting a DescIntr bit on all of the descriptors and
1334 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1336 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1337 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1338 DescEndPacket | DescEndRing | DescIntr | skb->len);
1340 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1341 DescEndPacket | DescIntr | skb->len);
1344 /* Non-x86 Todo: explicitly flush cache lines here. */
1346 /* Wake the potentially-idle transmit channel. */
1347 /* If we don't need to read status, DON'T -KDU */
1348 status=readw(hmp->base + TxStatus);
1349 if( !(status & 0x0001) || (status & 0x0002))
1350 writew(0x0001, hmp->base + TxCmd);
1352 /* Immediately before returning, let's clear as many entries as we can. */
1355 /* We should kick the bottom half here, since we are not accepting
1356 * interrupts with every packet. i.e. realize that Gigabit ethernet
1357 * can transmit faster than ordinary machines can load packets;
1358 * hence, any packet that got put off because we were in the transmit
1359 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1361 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1362 netif_wake_queue(dev); /* Typical path */
1365 netif_stop_queue(dev);
1367 dev->trans_start = jiffies;
1369 if (hamachi_debug > 4) {
1370 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1371 dev->name, hmp->cur_tx, entry);
1376 /* The interrupt handler does all of the Rx thread work and cleans up
1377 after the Tx thread. */
1378 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1380 struct net_device *dev = dev_instance;
1381 struct hamachi_private *hmp = netdev_priv(dev);
1382 void __iomem *ioaddr = hmp->base;
1383 long boguscnt = max_interrupt_work;
1386 #ifndef final_version /* Can never occur. */
1388 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1393 spin_lock(&hmp->lock);
1396 u32 intr_status = readl(ioaddr + InterruptClear);
1398 if (hamachi_debug > 4)
1399 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1400 dev->name, intr_status);
1402 if (intr_status == 0)
1407 if (intr_status & IntrRxDone)
1410 if (intr_status & IntrTxDone){
1411 /* This code should RARELY need to execute. After all, this is
1412 * a gigabit link, it should consume packets as fast as we put
1413 * them in AND we clear the Tx ring in hamachi_start_xmit().
1416 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1417 int entry = hmp->dirty_tx % TX_RING_SIZE;
1418 struct sk_buff *skb;
1420 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1422 skb = hmp->tx_skbuff[entry];
1423 /* Free the original skb. */
1425 pci_unmap_single(hmp->pci_dev,
1426 hmp->tx_ring[entry].addr,
1429 dev_kfree_skb_irq(skb);
1430 hmp->tx_skbuff[entry] = NULL;
1432 hmp->tx_ring[entry].status_n_length = 0;
1433 if (entry >= TX_RING_SIZE-1)
1434 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1435 cpu_to_le32(DescEndRing);
1436 hmp->stats.tx_packets++;
1438 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1439 /* The ring is no longer full */
1441 netif_wake_queue(dev);
1444 netif_wake_queue(dev);
1449 /* Abnormal error summary/uncommon events handlers. */
1451 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1452 LinkChange | NegotiationChange | StatsMax))
1453 hamachi_error(dev, intr_status);
1455 if (--boguscnt < 0) {
1456 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1457 dev->name, intr_status);
1462 if (hamachi_debug > 3)
1463 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1464 dev->name, readl(ioaddr + IntrStatus));
1466 #ifndef final_version
1467 /* Code that should never be run! Perhaps remove after testing.. */
1469 static int stopit = 10;
1470 if (dev->start == 0 && --stopit < 0) {
1471 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1478 spin_unlock(&hmp->lock);
1479 return IRQ_RETVAL(handled);
1482 /* This routine is logically part of the interrupt handler, but separated
1483 for clarity and better register allocation. */
1484 static int hamachi_rx(struct net_device *dev)
1486 struct hamachi_private *hmp = netdev_priv(dev);
1487 int entry = hmp->cur_rx % RX_RING_SIZE;
1488 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1490 if (hamachi_debug > 4) {
1491 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1492 entry, hmp->rx_ring[entry].status_n_length);
1495 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1497 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1498 u32 desc_status = le32_to_cpu(desc->status_n_length);
1499 u16 data_size = desc_status; /* Implicit truncate */
1503 if (desc_status & DescOwn)
1505 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1508 PCI_DMA_FROMDEVICE);
1509 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1510 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1511 if (hamachi_debug > 4)
1512 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1516 if ( ! (desc_status & DescEndPacket)) {
1517 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1518 "multiple buffers, entry %#x length %d status %4.4x!\n",
1519 dev->name, hmp->cur_rx, data_size, desc_status);
1520 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1521 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1522 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1524 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1525 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1526 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1527 hmp->stats.rx_length_errors++;
1528 } /* else Omit for prototype errata??? */
1529 if (frame_status & 0x00380000) {
1530 /* There was an error. */
1531 if (hamachi_debug > 2)
1532 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1534 hmp->stats.rx_errors++;
1535 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1536 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1537 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1538 if (frame_status < 0) hmp->stats.rx_dropped++;
1540 struct sk_buff *skb;
1542 u16 pkt_len = (frame_status & 0x07ff) - 4;
1544 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1548 #ifndef final_version
1549 if (hamachi_debug > 4)
1550 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1551 " of %d, bogus_cnt %d.\n",
1552 pkt_len, data_size, boguscnt);
1553 if (hamachi_debug > 5)
1554 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1556 *(s32*)&(buf_addr[data_size - 20]),
1557 *(s32*)&(buf_addr[data_size - 16]),
1558 *(s32*)&(buf_addr[data_size - 12]),
1559 *(s32*)&(buf_addr[data_size - 8]),
1560 *(s32*)&(buf_addr[data_size - 4]));
1562 /* Check if the packet is long enough to accept without copying
1563 to a minimally-sized skbuff. */
1564 if (pkt_len < rx_copybreak
1565 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1567 printk(KERN_ERR "%s: rx_copybreak non-zero "
1568 "not good with RX_CHECKSUM\n", dev->name);
1570 skb_reserve(skb, 2); /* 16 byte align the IP header */
1571 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1572 hmp->rx_ring[entry].addr,
1574 PCI_DMA_FROMDEVICE);
1575 /* Call copy + cksum if available. */
1576 #if 1 || USE_IP_COPYSUM
1577 skb_copy_to_linear_data(skb,
1578 hmp->rx_skbuff[entry]->data, pkt_len);
1579 skb_put(skb, pkt_len);
1581 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1582 + entry*sizeof(*desc), pkt_len);
1584 pci_dma_sync_single_for_device(hmp->pci_dev,
1585 hmp->rx_ring[entry].addr,
1587 PCI_DMA_FROMDEVICE);
1589 pci_unmap_single(hmp->pci_dev,
1590 hmp->rx_ring[entry].addr,
1591 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1592 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1593 hmp->rx_skbuff[entry] = NULL;
1595 skb->protocol = eth_type_trans(skb, dev);
1599 /* TCP or UDP on ipv4, DIX encoding */
1600 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1601 struct iphdr *ih = (struct iphdr *) skb->data;
1602 /* Check that IP packet is at least 46 bytes, otherwise,
1603 * there may be pad bytes included in the hardware checksum.
1604 * This wouldn't happen if everyone padded with 0.
1606 if (ntohs(ih->tot_len) >= 46){
1607 /* don't worry about frags */
1608 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1609 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1610 u32 *p = (u32 *) &buf_addr[data_size - 20];
1611 register u32 crc, p_r, p_r1;
1621 crc = (p_r & 0xffff) + (p_r >> 16);
1624 crc = (p_r >> 16) + (p_r & 0xffff)
1625 + (p_r1 >> 16 & 0xff00);
1628 crc = p_r + (p_r1 >> 16);
1631 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1633 default: /*NOTREACHED*/ crc = 0;
1635 if (crc & 0xffff0000) {
1639 /* tcp/udp will add in pseudo */
1640 skb->csum = ntohs(pfck & 0xffff);
1641 if (skb->csum > crc)
1644 skb->csum += (~crc & 0xffff);
1646 * could do the pseudo myself and return
1647 * CHECKSUM_UNNECESSARY
1649 skb->ip_summed = CHECKSUM_COMPLETE;
1653 #endif /* RX_CHECKSUM */
1656 dev->last_rx = jiffies;
1657 hmp->stats.rx_packets++;
1659 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1662 /* Refill the Rx ring buffers. */
1663 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1664 struct hamachi_desc *desc;
1666 entry = hmp->dirty_rx % RX_RING_SIZE;
1667 desc = &(hmp->rx_ring[entry]);
1668 if (hmp->rx_skbuff[entry] == NULL) {
1669 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1671 hmp->rx_skbuff[entry] = skb;
1673 break; /* Better luck next round. */
1674 skb->dev = dev; /* Mark as being used by this device. */
1675 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1676 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1677 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1679 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1680 if (entry >= RX_RING_SIZE-1)
1681 desc->status_n_length |= cpu_to_le32(DescOwn |
1682 DescEndPacket | DescEndRing | DescIntr);
1684 desc->status_n_length |= cpu_to_le32(DescOwn |
1685 DescEndPacket | DescIntr);
1688 /* Restart Rx engine if stopped. */
1689 /* If we don't need to check status, don't. -KDU */
1690 if (readw(hmp->base + RxStatus) & 0x0002)
1691 writew(0x0001, hmp->base + RxCmd);
1696 /* This is more properly named "uncommon interrupt events", as it covers more
1697 than just errors. */
1698 static void hamachi_error(struct net_device *dev, int intr_status)
1700 struct hamachi_private *hmp = netdev_priv(dev);
1701 void __iomem *ioaddr = hmp->base;
1703 if (intr_status & (LinkChange|NegotiationChange)) {
1704 if (hamachi_debug > 1)
1705 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1706 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1707 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1708 readw(ioaddr + ANLinkPartnerAbility),
1709 readl(ioaddr + IntrStatus));
1710 if (readw(ioaddr + ANStatus) & 0x20)
1711 writeb(0x01, ioaddr + LEDCtrl);
1713 writeb(0x03, ioaddr + LEDCtrl);
1715 if (intr_status & StatsMax) {
1716 hamachi_get_stats(dev);
1717 /* Read the overflow bits to clear. */
1718 readl(ioaddr + 0x370);
1719 readl(ioaddr + 0x3F0);
1721 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1723 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1724 dev->name, intr_status);
1725 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1726 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1727 hmp->stats.tx_fifo_errors++;
1728 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1729 hmp->stats.rx_fifo_errors++;
1732 static int hamachi_close(struct net_device *dev)
1734 struct hamachi_private *hmp = netdev_priv(dev);
1735 void __iomem *ioaddr = hmp->base;
1736 struct sk_buff *skb;
1739 netif_stop_queue(dev);
1741 if (hamachi_debug > 1) {
1742 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1743 dev->name, readw(ioaddr + TxStatus),
1744 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1745 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1746 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1749 /* Disable interrupts by clearing the interrupt mask. */
1750 writel(0x0000, ioaddr + InterruptEnable);
1752 /* Stop the chip's Tx and Rx processes. */
1753 writel(2, ioaddr + RxCmd);
1754 writew(2, ioaddr + TxCmd);
1757 if (hamachi_debug > 2) {
1758 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1759 (int)hmp->tx_ring_dma);
1760 for (i = 0; i < TX_RING_SIZE; i++)
1761 printk(" %c #%d desc. %8.8x %8.8x.\n",
1762 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1763 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1764 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1765 (int)hmp->rx_ring_dma);
1766 for (i = 0; i < RX_RING_SIZE; i++) {
1767 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1768 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1769 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1770 if (hamachi_debug > 6) {
1771 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1773 hmp->rx_skbuff[i]->data;
1776 for (j = 0; j < 0x50; j++)
1777 printk(" %4.4x", addr[j]);
1783 #endif /* __i386__ debugging only */
1785 free_irq(dev->irq, dev);
1787 del_timer_sync(&hmp->timer);
1789 /* Free all the skbuffs in the Rx queue. */
1790 for (i = 0; i < RX_RING_SIZE; i++) {
1791 skb = hmp->rx_skbuff[i];
1792 hmp->rx_ring[i].status_n_length = 0;
1793 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1795 pci_unmap_single(hmp->pci_dev,
1796 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1797 PCI_DMA_FROMDEVICE);
1799 hmp->rx_skbuff[i] = NULL;
1802 for (i = 0; i < TX_RING_SIZE; i++) {
1803 skb = hmp->tx_skbuff[i];
1805 pci_unmap_single(hmp->pci_dev,
1806 hmp->tx_ring[i].addr, skb->len,
1809 hmp->tx_skbuff[i] = NULL;
1813 writeb(0x00, ioaddr + LEDCtrl);
1818 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1820 struct hamachi_private *hmp = netdev_priv(dev);
1821 void __iomem *ioaddr = hmp->base;
1823 /* We should lock this segment of code for SMP eventually, although
1824 the vulnerability window is very small and statistics are
1826 /* Ok, what goes here? This appears to be stuck at 21 packets
1827 according to ifconfig. It does get incremented in hamachi_tx(),
1828 so I think I'll comment it out here and see if better things
1831 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1833 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1834 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1835 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1837 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1838 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1839 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1840 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1841 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1846 static void set_rx_mode(struct net_device *dev)
1848 struct hamachi_private *hmp = netdev_priv(dev);
1849 void __iomem *ioaddr = hmp->base;
1851 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1852 writew(0x000F, ioaddr + AddrMode);
1853 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1854 /* Too many to match, or accept all multicasts. */
1855 writew(0x000B, ioaddr + AddrMode);
1856 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1857 struct dev_mc_list *mclist;
1859 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1860 i++, mclist = mclist->next) {
1861 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1862 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1863 ioaddr + 0x104 + i*8);
1865 /* Clear remaining entries. */
1867 writel(0, ioaddr + 0x104 + i*8);
1868 writew(0x0003, ioaddr + AddrMode);
1869 } else { /* Normal, unicast/broadcast-only mode. */
1870 writew(0x0001, ioaddr + AddrMode);
1874 static int check_if_running(struct net_device *dev)
1876 if (!netif_running(dev))
1881 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1883 struct hamachi_private *np = netdev_priv(dev);
1884 strcpy(info->driver, DRV_NAME);
1885 strcpy(info->version, DRV_VERSION);
1886 strcpy(info->bus_info, pci_name(np->pci_dev));
1889 static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1891 struct hamachi_private *np = netdev_priv(dev);
1892 spin_lock_irq(&np->lock);
1893 mii_ethtool_gset(&np->mii_if, ecmd);
1894 spin_unlock_irq(&np->lock);
1898 static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1900 struct hamachi_private *np = netdev_priv(dev);
1902 spin_lock_irq(&np->lock);
1903 res = mii_ethtool_sset(&np->mii_if, ecmd);
1904 spin_unlock_irq(&np->lock);
1908 static int hamachi_nway_reset(struct net_device *dev)
1910 struct hamachi_private *np = netdev_priv(dev);
1911 return mii_nway_restart(&np->mii_if);
1914 static u32 hamachi_get_link(struct net_device *dev)
1916 struct hamachi_private *np = netdev_priv(dev);
1917 return mii_link_ok(&np->mii_if);
1920 static const struct ethtool_ops ethtool_ops = {
1921 .begin = check_if_running,
1922 .get_drvinfo = hamachi_get_drvinfo,
1923 .get_settings = hamachi_get_settings,
1924 .set_settings = hamachi_set_settings,
1925 .nway_reset = hamachi_nway_reset,
1926 .get_link = hamachi_get_link,
1929 static const struct ethtool_ops ethtool_ops_no_mii = {
1930 .begin = check_if_running,
1931 .get_drvinfo = hamachi_get_drvinfo,
1934 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1936 struct hamachi_private *np = netdev_priv(dev);
1937 struct mii_ioctl_data *data = if_mii(rq);
1940 if (!netif_running(dev))
1943 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1944 u32 *d = (u32 *)&rq->ifr_ifru;
1945 /* Should add this check here or an ordinary user can do nasty
1948 * TODO: Shut down the Rx and Tx engines while doing this.
1950 if (!capable(CAP_NET_ADMIN))
1952 writel(d[0], np->base + TxIntrCtrl);
1953 writel(d[1], np->base + RxIntrCtrl);
1954 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1955 (u32) readl(np->base + TxIntrCtrl),
1956 (u32) readl(np->base + RxIntrCtrl));
1961 spin_lock_irq(&np->lock);
1962 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1963 spin_unlock_irq(&np->lock);
1970 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1972 struct net_device *dev = pci_get_drvdata(pdev);
1975 struct hamachi_private *hmp = netdev_priv(dev);
1977 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1979 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1981 unregister_netdev(dev);
1984 pci_release_regions(pdev);
1985 pci_set_drvdata(pdev, NULL);
1989 static struct pci_device_id hamachi_pci_tbl[] = {
1990 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1993 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1995 static struct pci_driver hamachi_driver = {
1997 .id_table = hamachi_pci_tbl,
1998 .probe = hamachi_init_one,
1999 .remove = __devexit_p(hamachi_remove_one),
2002 static int __init hamachi_init (void)
2004 /* when a module, this is printed whether or not devices are found in probe */
2008 return pci_register_driver(&hamachi_driver);
2011 static void __exit hamachi_exit (void)
2013 pci_unregister_driver(&hamachi_driver);
2017 module_init(hamachi_init);
2018 module_exit(hamachi_exit);