drivers/net/ieee802154/at86rf230.c

   1 /*
   2  * AT86RF230/RF231 driver
   3  *
   4  * Copyright (C) 2009-2012 Siemens AG
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2
   8  * as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * Written by:
  16  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  17  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  18  * Alexander Aring <aar@pengutronix.de>
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/irq.h>
  24 #include <linux/gpio.h>
  25 #include <linux/delay.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/spi/spi.h>
  28 #include <linux/spi/at86rf230.h>
  29 #include <linux/regmap.h>
  30 #include <linux/skbuff.h>
  31 #include <linux/of_gpio.h>
  32 #include <linux/ieee802154.h>
  33
  34 #include <net/mac802154.h>
  35 #include <net/cfg802154.h>
  36
  37 struct at86rf230_local;
  38 /* at86rf2xx chip depend data.
  39  * All timings are in us.
  40  */
  41 struct at86rf2xx_chip_data {
  42         u16 t_sleep_cycle;
  43         u16 t_channel_switch;
  44         u16 t_reset_to_off;
  45         u16 t_off_to_aack;
  46         u16 t_off_to_tx_on;
  47         u16 t_frame;
  48         u16 t_p_ack;
  49         /* short interframe spacing time */
  50         u16 t_sifs;
  51         /* long interframe spacing time */
  52         u16 t_lifs;
  53         /* completion timeout for tx in msecs */
  54         u16 t_tx_timeout;
  55         int rssi_base_val;
  56
  57         int (*set_channel)(struct at86rf230_local *, u8, u8);
  58         int (*get_desense_steps)(struct at86rf230_local *, s32);
  59 };
  60
  61 #define AT86RF2XX_MAX_BUF (127 + 3)
  62
  63 struct at86rf230_state_change {
  64         struct at86rf230_local *lp;
  65
  66         struct spi_message msg;
  67         struct spi_transfer trx;
  68         u8 buf[AT86RF2XX_MAX_BUF];
  69
  70         void (*complete)(void *context);
  71         u8 from_state;
  72         u8 to_state;
  73
  74         bool irq_enable;
  75 };
  76
  77 struct at86rf230_local {
  78         struct spi_device *spi;
  79
  80         struct ieee802154_hw *hw;
  81         struct at86rf2xx_chip_data *data;
  82         struct regmap *regmap;
  83
  84         struct completion state_complete;
  85         struct at86rf230_state_change state;
  86
  87         struct at86rf230_state_change irq;
  88
  89         bool tx_aret;
  90         s8 max_frame_retries;
  91         bool is_tx;
  92         /* spinlock for is_tx protection */
  93         spinlock_t lock;
  94         struct sk_buff *tx_skb;
  95         struct at86rf230_state_change tx;
  96 };
  97
  98 #define RG_TRX_STATUS   (0x01)
  99 #define SR_TRX_STATUS           0x01, 0x1f, 0
 100 #define SR_RESERVED_01_3        0x01, 0x20, 5
 101 #define SR_CCA_STATUS           0x01, 0x40, 6
 102 #define SR_CCA_DONE             0x01, 0x80, 7
 103 #define RG_TRX_STATE    (0x02)
 104 #define SR_TRX_CMD              0x02, 0x1f, 0
 105 #define SR_TRAC_STATUS          0x02, 0xe0, 5
 106 #define RG_TRX_CTRL_0   (0x03)
 107 #define SR_CLKM_CTRL            0x03, 0x07, 0
 108 #define SR_CLKM_SHA_SEL         0x03, 0x08, 3
 109 #define SR_PAD_IO_CLKM          0x03, 0x30, 4
 110 #define SR_PAD_IO               0x03, 0xc0, 6
 111 #define RG_TRX_CTRL_1   (0x04)
 112 #define SR_IRQ_POLARITY         0x04, 0x01, 0
 113 #define SR_IRQ_MASK_MODE        0x04, 0x02, 1
 114 #define SR_SPI_CMD_MODE         0x04, 0x0c, 2
 115 #define SR_RX_BL_CTRL           0x04, 0x10, 4
 116 #define SR_TX_AUTO_CRC_ON       0x04, 0x20, 5
 117 #define SR_IRQ_2_EXT_EN         0x04, 0x40, 6
 118 #define SR_PA_EXT_EN            0x04, 0x80, 7
 119 #define RG_PHY_TX_PWR   (0x05)
 120 #define SR_TX_PWR               0x05, 0x0f, 0
 121 #define SR_PA_LT                0x05, 0x30, 4
 122 #define SR_PA_BUF_LT            0x05, 0xc0, 6
 123 #define RG_PHY_RSSI     (0x06)
 124 #define SR_RSSI                 0x06, 0x1f, 0
 125 #define SR_RND_VALUE            0x06, 0x60, 5
 126 #define SR_RX_CRC_VALID         0x06, 0x80, 7
 127 #define RG_PHY_ED_LEVEL (0x07)
 128 #define SR_ED_LEVEL             0x07, 0xff, 0
 129 #define RG_PHY_CC_CCA   (0x08)
 130 #define SR_CHANNEL              0x08, 0x1f, 0
 131 #define SR_CCA_MODE             0x08, 0x60, 5
 132 #define SR_CCA_REQUEST          0x08, 0x80, 7
 133 #define RG_CCA_THRES    (0x09)
 134 #define SR_CCA_ED_THRES         0x09, 0x0f, 0
 135 #define SR_RESERVED_09_1        0x09, 0xf0, 4
 136 #define RG_RX_CTRL      (0x0a)
 137 #define SR_PDT_THRES            0x0a, 0x0f, 0
 138 #define SR_RESERVED_0a_1        0x0a, 0xf0, 4
 139 #define RG_SFD_VALUE    (0x0b)
 140 #define SR_SFD_VALUE            0x0b, 0xff, 0
 141 #define RG_TRX_CTRL_2   (0x0c)
 142 #define SR_OQPSK_DATA_RATE      0x0c, 0x03, 0
 143 #define SR_SUB_MODE             0x0c, 0x04, 2
 144 #define SR_BPSK_QPSK            0x0c, 0x08, 3
 145 #define SR_OQPSK_SUB1_RC_EN     0x0c, 0x10, 4
 146 #define SR_RESERVED_0c_5        0x0c, 0x60, 5
 147 #define SR_RX_SAFE_MODE         0x0c, 0x80, 7
 148 #define RG_ANT_DIV      (0x0d)
 149 #define SR_ANT_CTRL             0x0d, 0x03, 0
 150 #define SR_ANT_EXT_SW_EN        0x0d, 0x04, 2
 151 #define SR_ANT_DIV_EN           0x0d, 0x08, 3
 152 #define SR_RESERVED_0d_2        0x0d, 0x70, 4
 153 #define SR_ANT_SEL              0x0d, 0x80, 7
 154 #define RG_IRQ_MASK     (0x0e)
 155 #define SR_IRQ_MASK             0x0e, 0xff, 0
 156 #define RG_IRQ_STATUS   (0x0f)
 157 #define SR_IRQ_0_PLL_LOCK       0x0f, 0x01, 0
 158 #define SR_IRQ_1_PLL_UNLOCK     0x0f, 0x02, 1
 159 #define SR_IRQ_2_RX_START       0x0f, 0x04, 2
 160 #define SR_IRQ_3_TRX_END        0x0f, 0x08, 3
 161 #define SR_IRQ_4_CCA_ED_DONE    0x0f, 0x10, 4
 162 #define SR_IRQ_5_AMI            0x0f, 0x20, 5
 163 #define SR_IRQ_6_TRX_UR         0x0f, 0x40, 6
 164 #define SR_IRQ_7_BAT_LOW        0x0f, 0x80, 7
 165 #define RG_VREG_CTRL    (0x10)
 166 #define SR_RESERVED_10_6        0x10, 0x03, 0
 167 #define SR_DVDD_OK              0x10, 0x04, 2
 168 #define SR_DVREG_EXT            0x10, 0x08, 3
 169 #define SR_RESERVED_10_3        0x10, 0x30, 4
 170 #define SR_AVDD_OK              0x10, 0x40, 6
 171 #define SR_AVREG_EXT            0x10, 0x80, 7
 172 #define RG_BATMON       (0x11)
 173 #define SR_BATMON_VTH           0x11, 0x0f, 0
 174 #define SR_BATMON_HR            0x11, 0x10, 4
 175 #define SR_BATMON_OK            0x11, 0x20, 5
 176 #define SR_RESERVED_11_1        0x11, 0xc0, 6
 177 #define RG_XOSC_CTRL    (0x12)
 178 #define SR_XTAL_TRIM            0x12, 0x0f, 0
 179 #define SR_XTAL_MODE            0x12, 0xf0, 4
 180 #define RG_RX_SYN       (0x15)
 181 #define SR_RX_PDT_LEVEL         0x15, 0x0f, 0
 182 #define SR_RESERVED_15_2        0x15, 0x70, 4
 183 #define SR_RX_PDT_DIS           0x15, 0x80, 7
 184 #define RG_XAH_CTRL_1   (0x17)
 185 #define SR_RESERVED_17_8        0x17, 0x01, 0
 186 #define SR_AACK_PROM_MODE       0x17, 0x02, 1
 187 #define SR_AACK_ACK_TIME        0x17, 0x04, 2
 188 #define SR_RESERVED_17_5        0x17, 0x08, 3
 189 #define SR_AACK_UPLD_RES_FT     0x17, 0x10, 4
 190 #define SR_AACK_FLTR_RES_FT     0x17, 0x20, 5
 191 #define SR_CSMA_LBT_MODE        0x17, 0x40, 6
 192 #define SR_RESERVED_17_1        0x17, 0x80, 7
 193 #define RG_FTN_CTRL     (0x18)
 194 #define SR_RESERVED_18_2        0x18, 0x7f, 0
 195 #define SR_FTN_START            0x18, 0x80, 7
 196 #define RG_PLL_CF       (0x1a)
 197 #define SR_RESERVED_1a_2        0x1a, 0x7f, 0
 198 #define SR_PLL_CF_START         0x1a, 0x80, 7
 199 #define RG_PLL_DCU      (0x1b)
 200 #define SR_RESERVED_1b_3        0x1b, 0x3f, 0
 201 #define SR_RESERVED_1b_2        0x1b, 0x40, 6
 202 #define SR_PLL_DCU_START        0x1b, 0x80, 7
 203 #define RG_PART_NUM     (0x1c)
 204 #define SR_PART_NUM             0x1c, 0xff, 0
 205 #define RG_VERSION_NUM  (0x1d)
 206 #define SR_VERSION_NUM          0x1d, 0xff, 0
 207 #define RG_MAN_ID_0     (0x1e)
 208 #define SR_MAN_ID_0             0x1e, 0xff, 0
 209 #define RG_MAN_ID_1     (0x1f)
 210 #define SR_MAN_ID_1             0x1f, 0xff, 0
 211 #define RG_SHORT_ADDR_0 (0x20)
 212 #define SR_SHORT_ADDR_0         0x20, 0xff, 0
 213 #define RG_SHORT_ADDR_1 (0x21)
 214 #define SR_SHORT_ADDR_1         0x21, 0xff, 0
 215 #define RG_PAN_ID_0     (0x22)
 216 #define SR_PAN_ID_0             0x22, 0xff, 0
 217 #define RG_PAN_ID_1     (0x23)
 218 #define SR_PAN_ID_1             0x23, 0xff, 0
 219 #define RG_IEEE_ADDR_0  (0x24)
 220 #define SR_IEEE_ADDR_0          0x24, 0xff, 0
 221 #define RG_IEEE_ADDR_1  (0x25)
 222 #define SR_IEEE_ADDR_1          0x25, 0xff, 0
 223 #define RG_IEEE_ADDR_2  (0x26)
 224 #define SR_IEEE_ADDR_2          0x26, 0xff, 0
 225 #define RG_IEEE_ADDR_3  (0x27)
 226 #define SR_IEEE_ADDR_3          0x27, 0xff, 0
 227 #define RG_IEEE_ADDR_4  (0x28)
 228 #define SR_IEEE_ADDR_4          0x28, 0xff, 0
 229 #define RG_IEEE_ADDR_5  (0x29)
 230 #define SR_IEEE_ADDR_5          0x29, 0xff, 0
 231 #define RG_IEEE_ADDR_6  (0x2a)
 232 #define SR_IEEE_ADDR_6          0x2a, 0xff, 0
 233 #define RG_IEEE_ADDR_7  (0x2b)
 234 #define SR_IEEE_ADDR_7          0x2b, 0xff, 0
 235 #define RG_XAH_CTRL_0   (0x2c)
 236 #define SR_SLOTTED_OPERATION    0x2c, 0x01, 0
 237 #define SR_MAX_CSMA_RETRIES     0x2c, 0x0e, 1
 238 #define SR_MAX_FRAME_RETRIES    0x2c, 0xf0, 4
 239 #define RG_CSMA_SEED_0  (0x2d)
 240 #define SR_CSMA_SEED_0          0x2d, 0xff, 0
 241 #define RG_CSMA_SEED_1  (0x2e)
 242 #define SR_CSMA_SEED_1          0x2e, 0x07, 0
 243 #define SR_AACK_I_AM_COORD      0x2e, 0x08, 3
 244 #define SR_AACK_DIS_ACK         0x2e, 0x10, 4
 245 #define SR_AACK_SET_PD          0x2e, 0x20, 5
 246 #define SR_AACK_FVN_MODE        0x2e, 0xc0, 6
 247 #define RG_CSMA_BE      (0x2f)
 248 #define SR_MIN_BE               0x2f, 0x0f, 0
 249 #define SR_MAX_BE               0x2f, 0xf0, 4
 250
 251 #define CMD_REG         0x80
 252 #define CMD_REG_MASK    0x3f
 253 #define CMD_WRITE       0x40
 254 #define CMD_FB          0x20
 255
 256 #define IRQ_BAT_LOW     (1 << 7)
 257 #define IRQ_TRX_UR      (1 << 6)
 258 #define IRQ_AMI         (1 << 5)
 259 #define IRQ_CCA_ED      (1 << 4)
 260 #define IRQ_TRX_END     (1 << 3)
 261 #define IRQ_RX_START    (1 << 2)
 262 #define IRQ_PLL_UNL     (1 << 1)
 263 #define IRQ_PLL_LOCK    (1 << 0)
 264
 265 #define IRQ_ACTIVE_HIGH 0
 266 #define IRQ_ACTIVE_LOW  1
 267
 268 #define STATE_P_ON              0x00    /* BUSY */
 269 #define STATE_BUSY_RX           0x01
 270 #define STATE_BUSY_TX           0x02
 271 #define STATE_FORCE_TRX_OFF     0x03
 272 #define STATE_FORCE_TX_ON       0x04    /* IDLE */
 273 /* 0x05 */                              /* INVALID_PARAMETER */
 274 #define STATE_RX_ON             0x06
 275 /* 0x07 */                              /* SUCCESS */
 276 #define STATE_TRX_OFF           0x08
 277 #define STATE_TX_ON             0x09
 278 /* 0x0a - 0x0e */                       /* 0x0a - UNSUPPORTED_ATTRIBUTE */
 279 #define STATE_SLEEP             0x0F
 280 #define STATE_PREP_DEEP_SLEEP   0x10
 281 #define STATE_BUSY_RX_AACK      0x11
 282 #define STATE_BUSY_TX_ARET      0x12
 283 #define STATE_RX_AACK_ON        0x16
 284 #define STATE_TX_ARET_ON        0x19
 285 #define STATE_RX_ON_NOCLK       0x1C
 286 #define STATE_RX_AACK_ON_NOCLK  0x1D
 287 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
 288 #define STATE_TRANSITION_IN_PROGRESS 0x1F
 289
 290 #define AT86RF2XX_NUMREGS 0x3F
 291
 292 static void
 293 at86rf230_async_state_change(struct at86rf230_local *lp,
 294                              struct at86rf230_state_change *ctx,
 295                              const u8 state, void (*complete)(void *context),
 296                              const bool irq_enable);
 297
 298 static inline int
 299 __at86rf230_write(struct at86rf230_local *lp,
 300                   unsigned int addr, unsigned int data)
 301 {
 302         return regmap_write(lp->regmap, addr, data);
 303 }
 304
 305 static inline int
 306 __at86rf230_read(struct at86rf230_local *lp,
 307                  unsigned int addr, unsigned int *data)
 308 {
 309         return regmap_read(lp->regmap, addr, data);
 310 }
 311
 312 static inline int
 313 at86rf230_read_subreg(struct at86rf230_local *lp,
 314                       unsigned int addr, unsigned int mask,
 315                       unsigned int shift, unsigned int *data)
 316 {
 317         int rc;
 318
 319         rc = __at86rf230_read(lp, addr, data);
 320         if (rc > 0)
 321                 *data = (*data & mask) >> shift;
 322
 323         return rc;
 324 }
 325
 326 static inline int
 327 at86rf230_write_subreg(struct at86rf230_local *lp,
 328                        unsigned int addr, unsigned int mask,
 329                        unsigned int shift, unsigned int data)
 330 {
 331         return regmap_update_bits(lp->regmap, addr, mask, data << shift);
 332 }
 333
 334 static bool
 335 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
 336 {
 337         switch (reg) {
 338         case RG_TRX_STATE:
 339         case RG_TRX_CTRL_0:
 340         case RG_TRX_CTRL_1:
 341         case RG_PHY_TX_PWR:
 342         case RG_PHY_ED_LEVEL:
 343         case RG_PHY_CC_CCA:
 344         case RG_CCA_THRES:
 345         case RG_RX_CTRL:
 346         case RG_SFD_VALUE:
 347         case RG_TRX_CTRL_2:
 348         case RG_ANT_DIV:
 349         case RG_IRQ_MASK:
 350         case RG_VREG_CTRL:
 351         case RG_BATMON:
 352         case RG_XOSC_CTRL:
 353         case RG_RX_SYN:
 354         case RG_XAH_CTRL_1:
 355         case RG_FTN_CTRL:
 356         case RG_PLL_CF:
 357         case RG_PLL_DCU:
 358         case RG_SHORT_ADDR_0:
 359         case RG_SHORT_ADDR_1:
 360         case RG_PAN_ID_0:
 361         case RG_PAN_ID_1:
 362         case RG_IEEE_ADDR_0:
 363         case RG_IEEE_ADDR_1:
 364         case RG_IEEE_ADDR_2:
 365         case RG_IEEE_ADDR_3:
 366         case RG_IEEE_ADDR_4:
 367         case RG_IEEE_ADDR_5:
 368         case RG_IEEE_ADDR_6:
 369         case RG_IEEE_ADDR_7:
 370         case RG_XAH_CTRL_0:
 371         case RG_CSMA_SEED_0:
 372         case RG_CSMA_SEED_1:
 373         case RG_CSMA_BE:
 374                 return true;
 375         default:
 376                 return false;
 377         }
 378 }
 379
 380 static bool
 381 at86rf230_reg_readable(struct device *dev, unsigned int reg)
 382 {
 383         bool rc;
 384
 385         /* all writeable are also readable */
 386         rc = at86rf230_reg_writeable(dev, reg);
 387         if (rc)
 388                 return rc;
 389
 390         /* readonly regs */
 391         switch (reg) {
 392         case RG_TRX_STATUS:
 393         case RG_PHY_RSSI:
 394         case RG_IRQ_STATUS:
 395         case RG_PART_NUM:
 396         case RG_VERSION_NUM:
 397         case RG_MAN_ID_1:
 398         case RG_MAN_ID_0:
 399                 return true;
 400         default:
 401                 return false;
 402         }
 403 }
 404
 405 static bool
 406 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
 407 {
 408         /* can be changed during runtime */
 409         switch (reg) {
 410         case RG_TRX_STATUS:
 411         case RG_TRX_STATE:
 412         case RG_PHY_RSSI:
 413         case RG_PHY_ED_LEVEL:
 414         case RG_IRQ_STATUS:
 415         case RG_VREG_CTRL:
 416                 return true;
 417         default:
 418                 return false;
 419         }
 420 }
 421
 422 static bool
 423 at86rf230_reg_precious(struct device *dev, unsigned int reg)
 424 {
 425         /* don't clear irq line on read */
 426         switch (reg) {
 427         case RG_IRQ_STATUS:
 428                 return true;
 429         default:
 430                 return false;
 431         }
 432 }
 433
 434 static struct regmap_config at86rf230_regmap_spi_config = {
 435         .reg_bits = 8,
 436         .val_bits = 8,
 437         .write_flag_mask = CMD_REG | CMD_WRITE,
 438         .read_flag_mask = CMD_REG,
 439         .cache_type = REGCACHE_RBTREE,
 440         .max_register = AT86RF2XX_NUMREGS,
 441         .writeable_reg = at86rf230_reg_writeable,
 442         .readable_reg = at86rf230_reg_readable,
 443         .volatile_reg = at86rf230_reg_volatile,
 444         .precious_reg = at86rf230_reg_precious,
 445 };
 446
 447 static void
 448 at86rf230_async_error_recover(void *context)
 449 {
 450         struct at86rf230_state_change *ctx = context;
 451         struct at86rf230_local *lp = ctx->lp;
 452
 453         at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
 454         ieee802154_wake_queue(lp->hw);
 455 }
 456
 457 static void
 458 at86rf230_async_error(struct at86rf230_local *lp,
 459                       struct at86rf230_state_change *ctx, int rc)
 460 {
 461         dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
 462
 463         at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 464                                      at86rf230_async_error_recover, false);
 465 }
 466
 467 /* Generic function to get some register value in async mode */
 468 static void
 469 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
 470                          struct at86rf230_state_change *ctx,
 471                          void (*complete)(void *context),
 472                          const bool irq_enable)
 473 {
 474         int rc;
 475
 476         u8 *tx_buf = ctx->buf;
 477
 478         tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
 479         ctx->trx.len = 2;
 480         ctx->msg.complete = complete;
 481         ctx->irq_enable = irq_enable;
 482         rc = spi_async(lp->spi, &ctx->msg);
 483         if (rc) {
 484                 if (irq_enable)
 485                         enable_irq(lp->spi->irq);
 486
 487                 at86rf230_async_error(lp, ctx, rc);
 488         }
 489 }
 490
 491 static void
 492 at86rf230_async_state_assert(void *context)
 493 {
 494         struct at86rf230_state_change *ctx = context;
 495         struct at86rf230_local *lp = ctx->lp;
 496         const u8 *buf = ctx->buf;
 497         const u8 trx_state = buf[1] & 0x1f;
 498
 499         /* Assert state change */
 500         if (trx_state != ctx->to_state) {
 501                 /* Special handling if transceiver state is in
 502                  * STATE_BUSY_RX_AACK and a SHR was detected.
 503                  */
 504                 if  (trx_state == STATE_BUSY_RX_AACK) {
 505                         /* Undocumented race condition. If we send a state
 506                          * change to STATE_RX_AACK_ON the transceiver could
 507                          * change his state automatically to STATE_BUSY_RX_AACK
 508                          * if a SHR was detected. This is not an error, but we
 509                          * can't assert this.
 510                          */
 511                         if (ctx->to_state == STATE_RX_AACK_ON)
 512                                 goto done;
 513
 514                         /* If we change to STATE_TX_ON without forcing and
 515                          * transceiver state is STATE_BUSY_RX_AACK, we wait
 516                          * 'tFrame + tPAck' receiving time. In this time the
 517                          * PDU should be received. If the transceiver is still
 518                          * in STATE_BUSY_RX_AACK, we run a force state change
 519                          * to STATE_TX_ON. This is a timeout handling, if the
 520                          * transceiver stucks in STATE_BUSY_RX_AACK.
 521                          */
 522                         if (ctx->to_state == STATE_TX_ON) {
 523                                 at86rf230_async_state_change(lp, ctx,
 524                                                              STATE_FORCE_TX_ON,
 525                                                              ctx->complete,
 526                                                              ctx->irq_enable);
 527                                 return;
 528                         }
 529                 }
 530
 531
 532                 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
 533                          ctx->from_state, ctx->to_state, trx_state);
 534         }
 535
 536 done:
 537         if (ctx->complete)
 538                 ctx->complete(context);
 539 }
 540
 541 /* Do state change timing delay. */
 542 static void
 543 at86rf230_async_state_delay(void *context)
 544 {
 545         struct at86rf230_state_change *ctx = context;
 546         struct at86rf230_local *lp = ctx->lp;
 547         struct at86rf2xx_chip_data *c = lp->data;
 548         bool force = false;
 549
 550         /* The force state changes are will show as normal states in the
 551          * state status subregister. We change the to_state to the
 552          * corresponding one and remember if it was a force change, this
 553          * differs if we do a state change from STATE_BUSY_RX_AACK.
 554          */
 555         switch (ctx->to_state) {
 556         case STATE_FORCE_TX_ON:
 557                 ctx->to_state = STATE_TX_ON;
 558                 force = true;
 559                 break;
 560         case STATE_FORCE_TRX_OFF:
 561                 ctx->to_state = STATE_TRX_OFF;
 562                 force = true;
 563                 break;
 564         default:
 565                 break;
 566         }
 567
 568         switch (ctx->from_state) {
 569         case STATE_TRX_OFF:
 570                 switch (ctx->to_state) {
 571                 case STATE_RX_AACK_ON:
 572                         usleep_range(c->t_off_to_aack, c->t_off_to_aack + 10);
 573                         goto change;
 574                 case STATE_TX_ON:
 575                         usleep_range(c->t_off_to_tx_on,
 576                                      c->t_off_to_tx_on + 10);
 577                         goto change;
 578                 default:
 579                         break;
 580                 }
 581                 break;
 582         case STATE_BUSY_RX_AACK:
 583                 switch (ctx->to_state) {
 584                 case STATE_TX_ON:
 585                         /* Wait for worst case receiving time if we
 586                          * didn't make a force change from BUSY_RX_AACK
 587                          * to TX_ON.
 588                          */
 589                         if (!force) {
 590                                 usleep_range(c->t_frame + c->t_p_ack,
 591                                              c->t_frame + c->t_p_ack + 1000);
 592                                 goto change;
 593                         }
 594                         break;
 595                 default:
 596                         break;
 597                 }
 598                 break;
 599         /* Default value, means RESET state */
 600         case STATE_P_ON:
 601                 switch (ctx->to_state) {
 602                 case STATE_TRX_OFF:
 603                         usleep_range(c->t_reset_to_off, c->t_reset_to_off + 10);
 604                         goto change;
 605                 default:
 606                         break;
 607                 }
 608                 break;
 609         default:
 610                 break;
 611         }
 612
 613         /* Default delay is 1us in the most cases */
 614         udelay(1);
 615
 616 change:
 617         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 618                                  at86rf230_async_state_assert,
 619                                  ctx->irq_enable);
 620 }
 621
 622 static void
 623 at86rf230_async_state_change_start(void *context)
 624 {
 625         struct at86rf230_state_change *ctx = context;
 626         struct at86rf230_local *lp = ctx->lp;
 627         u8 *buf = ctx->buf;
 628         const u8 trx_state = buf[1] & 0x1f;
 629         int rc;
 630
 631         /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
 632         if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
 633                 udelay(1);
 634                 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 635                                          at86rf230_async_state_change_start,
 636                                          ctx->irq_enable);
 637                 return;
 638         }
 639
 640         /* Check if we already are in the state which we change in */
 641         if (trx_state == ctx->to_state) {
 642                 if (ctx->complete)
 643                         ctx->complete(context);
 644                 return;
 645         }
 646
 647         /* Set current state to the context of state change */
 648         ctx->from_state = trx_state;
 649
 650         /* Going into the next step for a state change which do a timing
 651          * relevant delay.
 652          */
 653         buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 654         buf[1] = ctx->to_state;
 655         ctx->trx.len = 2;
 656         ctx->msg.complete = at86rf230_async_state_delay;
 657         rc = spi_async(lp->spi, &ctx->msg);
 658         if (rc) {
 659                 if (ctx->irq_enable)
 660                         enable_irq(lp->spi->irq);
 661
 662                 at86rf230_async_error(lp, &lp->state, rc);
 663         }
 664 }
 665
 666 static void
 667 at86rf230_async_state_change(struct at86rf230_local *lp,
 668                              struct at86rf230_state_change *ctx,
 669                              const u8 state, void (*complete)(void *context),
 670                              const bool irq_enable)
 671 {
 672         /* Initialization for the state change context */
 673         ctx->to_state = state;
 674         ctx->complete = complete;
 675         ctx->irq_enable = irq_enable;
 676         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 677                                  at86rf230_async_state_change_start,
 678                                  irq_enable);
 679 }
 680
 681 static void
 682 at86rf230_sync_state_change_complete(void *context)
 683 {
 684         struct at86rf230_state_change *ctx = context;
 685         struct at86rf230_local *lp = ctx->lp;
 686
 687         complete(&lp->state_complete);
 688 }
 689
 690 /* This function do a sync framework above the async state change.
 691  * Some callbacks of the IEEE 802.15.4 driver interface need to be
 692  * handled synchronously.
 693  */
 694 static int
 695 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
 696 {
 697         int rc;
 698
 699         at86rf230_async_state_change(lp, &lp->state, state,
 700                                      at86rf230_sync_state_change_complete,
 701                                      false);
 702
 703         rc = wait_for_completion_timeout(&lp->state_complete,
 704                                          msecs_to_jiffies(100));
 705         if (!rc) {
 706                 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
 707                 return -ETIMEDOUT;
 708         }
 709
 710         return 0;
 711 }
 712
 713 static void
 714 at86rf230_tx_complete(void *context)
 715 {
 716         struct at86rf230_state_change *ctx = context;
 717         struct at86rf230_local *lp = ctx->lp;
 718         struct sk_buff *skb = lp->tx_skb;
 719
 720         enable_irq(lp->spi->irq);
 721
 722         if (lp->max_frame_retries <= 0) {
 723                 /* Interfame spacing time, which is phy depend.
 724                  * TODO
 725                  * Move this handling in MAC 802.15.4 layer.
 726                  * This is currently a workaround to avoid fragmenation issues.
 727                  */
 728                 if (skb->len > 18)
 729                         udelay(lp->data->t_lifs);
 730                 else
 731                         udelay(lp->data->t_sifs);
 732         }
 733
 734         ieee802154_xmit_complete(lp->hw, skb);
 735 }
 736
 737 static void
 738 at86rf230_tx_on(void *context)
 739 {
 740         struct at86rf230_state_change *ctx = context;
 741         struct at86rf230_local *lp = ctx->lp;
 742
 743         at86rf230_async_state_change(lp, &lp->irq, STATE_RX_AACK_ON,
 744                                      at86rf230_tx_complete, true);
 745 }
 746
 747 static void
 748 at86rf230_tx_trac_error(void *context)
 749 {
 750         struct at86rf230_state_change *ctx = context;
 751         struct at86rf230_local *lp = ctx->lp;
 752
 753         at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
 754                                      at86rf230_tx_on, true);
 755 }
 756
 757 static void
 758 at86rf230_tx_trac_check(void *context)
 759 {
 760         struct at86rf230_state_change *ctx = context;
 761         struct at86rf230_local *lp = ctx->lp;
 762         const u8 *buf = ctx->buf;
 763         const u8 trac = (buf[1] & 0xe0) >> 5;
 764
 765         /* If trac status is different than zero we need to do a state change
 766          * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver
 767          * state to TX_ON.
 768          */
 769         if (trac) {
 770                 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 771                                              at86rf230_tx_trac_error, true);
 772                 return;
 773         }
 774
 775         at86rf230_tx_on(context);
 776 }
 777
 778
 779 static void
 780 at86rf230_tx_trac_status(void *context)
 781 {
 782         struct at86rf230_state_change *ctx = context;
 783         struct at86rf230_local *lp = ctx->lp;
 784
 785         at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
 786                                  at86rf230_tx_trac_check, true);
 787 }
 788
 789 static void
 790 at86rf230_rx(struct at86rf230_local *lp,
 791              const u8 *data, const u8 len, const u8 lqi)
 792 {
 793         struct sk_buff *skb;
 794         u8 rx_local_buf[AT86RF2XX_MAX_BUF];
 795
 796         memcpy(rx_local_buf, data, len);
 797         enable_irq(lp->spi->irq);
 798
 799         skb = dev_alloc_skb(IEEE802154_MTU);
 800         if (!skb) {
 801                 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
 802                 return;
 803         }
 804
 805         memcpy(skb_put(skb, len), rx_local_buf, len);
 806         ieee802154_rx_irqsafe(lp->hw, skb, lqi);
 807 }
 808
 809 static void
 810 at86rf230_rx_read_frame_complete(void *context)
 811 {
 812         struct at86rf230_state_change *ctx = context;
 813         struct at86rf230_local *lp = ctx->lp;
 814         const u8 *buf = lp->irq.buf;
 815         u8 len = buf[1];
 816
 817         if (!ieee802154_is_valid_psdu_len(len)) {
 818                 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
 819                 len = IEEE802154_MTU;
 820         }
 821
 822         at86rf230_rx(lp, buf + 2, len, buf[2 + len]);
 823 }
 824
 825 static void
 826 at86rf230_rx_read_frame(struct at86rf230_local *lp)
 827 {
 828         int rc;
 829
 830         u8 *buf = lp->irq.buf;
 831
 832         buf[0] = CMD_FB;
 833         lp->irq.trx.len = AT86RF2XX_MAX_BUF;
 834         lp->irq.msg.complete = at86rf230_rx_read_frame_complete;
 835         rc = spi_async(lp->spi, &lp->irq.msg);
 836         if (rc) {
 837                 enable_irq(lp->spi->irq);
 838                 at86rf230_async_error(lp, &lp->irq, rc);
 839         }
 840 }
 841
 842 static void
 843 at86rf230_rx_trac_check(void *context)
 844 {
 845         struct at86rf230_state_change *ctx = context;
 846         struct at86rf230_local *lp = ctx->lp;
 847
 848         /* Possible check on trac status here. This could be useful to make
 849          * some stats why receive is failed. Not used at the moment, but it's
 850          * maybe timing relevant. Datasheet doesn't say anything about this.
 851          * The programming guide say do it so.
 852          */
 853
 854         at86rf230_rx_read_frame(lp);
 855 }
 856
 857 static void
 858 at86rf230_irq_trx_end(struct at86rf230_local *lp)
 859 {
 860         spin_lock(&lp->lock);
 861         if (lp->is_tx) {
 862                 lp->is_tx = 0;
 863                 spin_unlock(&lp->lock);
 864
 865                 if (lp->tx_aret)
 866                         at86rf230_async_state_change(lp, &lp->irq,
 867                                                      STATE_FORCE_TX_ON,
 868                                                      at86rf230_tx_trac_status,
 869                                                      true);
 870                 else
 871                         at86rf230_async_state_change(lp, &lp->irq,
 872                                                      STATE_RX_AACK_ON,
 873                                                      at86rf230_tx_complete,
 874                                                      true);
 875         } else {
 876                 spin_unlock(&lp->lock);
 877                 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
 878                                          at86rf230_rx_trac_check, true);
 879         }
 880 }
 881
 882 static void
 883 at86rf230_irq_status(void *context)
 884 {
 885         struct at86rf230_state_change *ctx = context;
 886         struct at86rf230_local *lp = ctx->lp;
 887         const u8 *buf = lp->irq.buf;
 888         const u8 irq = buf[1];
 889
 890         if (irq & IRQ_TRX_END) {
 891                 at86rf230_irq_trx_end(lp);
 892         } else {
 893                 enable_irq(lp->spi->irq);
 894                 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
 895                         irq);
 896         }
 897 }
 898
 899 static irqreturn_t at86rf230_isr(int irq, void *data)
 900 {
 901         struct at86rf230_local *lp = data;
 902         struct at86rf230_state_change *ctx = &lp->irq;
 903         u8 *buf = ctx->buf;
 904         int rc;
 905
 906         disable_irq_nosync(irq);
 907
 908         buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
 909         ctx->trx.len = 2;
 910         ctx->msg.complete = at86rf230_irq_status;
 911         rc = spi_async(lp->spi, &ctx->msg);
 912         if (rc) {
 913                 enable_irq(irq);
 914                 at86rf230_async_error(lp, ctx, rc);
 915                 return IRQ_NONE;
 916         }
 917
 918         return IRQ_HANDLED;
 919 }
 920
 921 static void
 922 at86rf230_write_frame_complete(void *context)
 923 {
 924         struct at86rf230_state_change *ctx = context;
 925         struct at86rf230_local *lp = ctx->lp;
 926         u8 *buf = ctx->buf;
 927         int rc;
 928
 929         buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 930         buf[1] = STATE_BUSY_TX;
 931         ctx->trx.len = 2;
 932         ctx->msg.complete = NULL;
 933         rc = spi_async(lp->spi, &ctx->msg);
 934         if (rc)
 935                 at86rf230_async_error(lp, ctx, rc);
 936 }
 937
 938 static void
 939 at86rf230_write_frame(void *context)
 940 {
 941         struct at86rf230_state_change *ctx = context;
 942         struct at86rf230_local *lp = ctx->lp;
 943         struct sk_buff *skb = lp->tx_skb;
 944         u8 *buf = lp->tx.buf;
 945         int rc;
 946
 947         spin_lock(&lp->lock);
 948         lp->is_tx = 1;
 949         spin_unlock(&lp->lock);
 950
 951         buf[0] = CMD_FB | CMD_WRITE;
 952         buf[1] = skb->len + 2;
 953         memcpy(buf + 2, skb->data, skb->len);
 954         lp->tx.trx.len = skb->len + 2;
 955         lp->tx.msg.complete = at86rf230_write_frame_complete;
 956         rc = spi_async(lp->spi, &lp->tx.msg);
 957         if (rc)
 958                 at86rf230_async_error(lp, ctx, rc);
 959 }
 960
 961 static void
 962 at86rf230_xmit_tx_on(void *context)
 963 {
 964         struct at86rf230_state_change *ctx = context;
 965         struct at86rf230_local *lp = ctx->lp;
 966
 967         at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
 968                                      at86rf230_write_frame, false);
 969 }
 970
 971 static int
 972 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
 973 {
 974         struct at86rf230_local *lp = hw->priv;
 975         struct at86rf230_state_change *ctx = &lp->tx;
 976
 977         void (*tx_complete)(void *context) = at86rf230_write_frame;
 978
 979         lp->tx_skb = skb;
 980
 981         /* In ARET mode we need to go into STATE_TX_ARET_ON after we
 982          * are in STATE_TX_ON. The pfad differs here, so we change
 983          * the complete handler.
 984          */
 985         if (lp->tx_aret)
 986                 tx_complete = at86rf230_xmit_tx_on;
 987
 988         at86rf230_async_state_change(lp, ctx, STATE_TX_ON, tx_complete, false);
 989
 990         return 0;
 991 }
 992
 993 static int
 994 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
 995 {
 996         BUG_ON(!level);
 997         *level = 0xbe;
 998         return 0;
 999 }
1000
1001 static int
1002 at86rf230_start(struct ieee802154_hw *hw)
1003 {
1004         return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON);
1005 }
1006
1007 static void
1008 at86rf230_stop(struct ieee802154_hw *hw)
1009 {
1010         at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF);
1011 }
1012
1013 static int
1014 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1015 {
1016         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1017 }
1018
1019 static int
1020 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1021 {
1022         int rc;
1023
1024         if (channel == 0)
1025                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1026         else
1027                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1028         if (rc < 0)
1029                 return rc;
1030
1031         if (page == 0) {
1032                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1033                 lp->data->rssi_base_val = -100;
1034         } else {
1035                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1036                 lp->data->rssi_base_val = -98;
1037         }
1038         if (rc < 0)
1039                 return rc;
1040
1041         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1042 }
1043
1044 static int
1045 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1046 {
1047         struct at86rf230_local *lp = hw->priv;
1048         int rc;
1049
1050         rc = lp->data->set_channel(lp, page, channel);
1051         /* Wait for PLL */
1052         usleep_range(lp->data->t_channel_switch,
1053                      lp->data->t_channel_switch + 10);
1054         return rc;
1055 }
1056
1057 static int
1058 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1059                            struct ieee802154_hw_addr_filt *filt,
1060                            unsigned long changed)
1061 {
1062         struct at86rf230_local *lp = hw->priv;
1063
1064         if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1065                 u16 addr = le16_to_cpu(filt->short_addr);
1066
1067                 dev_vdbg(&lp->spi->dev,
1068                         "at86rf230_set_hw_addr_filt called for saddr\n");
1069                 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1070                 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1071         }
1072
1073         if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1074                 u16 pan = le16_to_cpu(filt->pan_id);
1075
1076                 dev_vdbg(&lp->spi->dev,
1077                         "at86rf230_set_hw_addr_filt called for pan id\n");
1078                 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1079                 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1080         }
1081
1082         if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1083                 u8 i, addr[8];
1084
1085                 memcpy(addr, &filt->ieee_addr, 8);
1086                 dev_vdbg(&lp->spi->dev,
1087                         "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1088                 for (i = 0; i < 8; i++)
1089                         __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1090         }
1091
1092         if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1093                 dev_vdbg(&lp->spi->dev,
1094                         "at86rf230_set_hw_addr_filt called for panc change\n");
1095                 if (filt->pan_coord)
1096                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1097                 else
1098                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1099         }
1100
1101         return 0;
1102 }
1103
1104 static int
1105 at86rf230_set_txpower(struct ieee802154_hw *hw, int db)
1106 {
1107         struct at86rf230_local *lp = hw->priv;
1108
1109         /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1110          * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1111          * 0dB.
1112          * thus, supported values for db range from -26 to 5, for 31dB of
1113          * reduction to 0dB of reduction.
1114          */
1115         if (db > 5 || db < -26)
1116                 return -EINVAL;
1117
1118         db = -(db - 5);
1119
1120         return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
1121 }
1122
1123 static int
1124 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1125 {
1126         struct at86rf230_local *lp = hw->priv;
1127
1128         return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1129 }
1130
1131 static int
1132 at86rf230_set_cca_mode(struct ieee802154_hw *hw, u8 mode)
1133 {
1134         struct at86rf230_local *lp = hw->priv;
1135
1136         return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
1137 }
1138
1139 static int
1140 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level)
1141 {
1142         return (level - lp->data->rssi_base_val) * 100 / 207;
1143 }
1144
1145 static int
1146 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level)
1147 {
1148         return (level - lp->data->rssi_base_val) / 2;
1149 }
1150
1151 static int
1152 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
1153 {
1154         struct at86rf230_local *lp = hw->priv;
1155
1156         if (level < lp->data->rssi_base_val || level > 30)
1157                 return -EINVAL;
1158
1159         return at86rf230_write_subreg(lp, SR_CCA_ED_THRES,
1160                                       lp->data->get_desense_steps(lp, level));
1161 }
1162
1163 static int
1164 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1165                           u8 retries)
1166 {
1167         struct at86rf230_local *lp = hw->priv;
1168         int rc;
1169
1170         if (retries > 5)
1171                 return -EINVAL;
1172
1173         rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1174         if (rc)
1175                 return rc;
1176
1177         rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1178         if (rc)
1179                 return rc;
1180
1181         return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1182 }
1183
1184 static int
1185 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1186 {
1187         struct at86rf230_local *lp = hw->priv;
1188         int rc = 0;
1189
1190         if (retries < -1 || retries > 15)
1191                 return -EINVAL;
1192
1193         lp->tx_aret = retries >= 0;
1194         lp->max_frame_retries = retries;
1195
1196         if (retries >= 0)
1197                 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1198
1199         return rc;
1200 }
1201
1202 static int
1203 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1204 {
1205         struct at86rf230_local *lp = hw->priv;
1206         int rc;
1207
1208         if (on) {
1209                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1210                 if (rc < 0)
1211                         return rc;
1212
1213                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1214                 if (rc < 0)
1215                         return rc;
1216         } else {
1217                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1218                 if (rc < 0)
1219                         return rc;
1220
1221                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1222                 if (rc < 0)
1223                         return rc;
1224         }
1225
1226         return 0;
1227 }
1228
1229 static const struct ieee802154_ops at86rf230_ops = {
1230         .owner = THIS_MODULE,
1231         .xmit_async = at86rf230_xmit,
1232         .ed = at86rf230_ed,
1233         .set_channel = at86rf230_channel,
1234         .start = at86rf230_start,
1235         .stop = at86rf230_stop,
1236         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1237         .set_txpower = at86rf230_set_txpower,
1238         .set_lbt = at86rf230_set_lbt,
1239         .set_cca_mode = at86rf230_set_cca_mode,
1240         .set_cca_ed_level = at86rf230_set_cca_ed_level,
1241         .set_csma_params = at86rf230_set_csma_params,
1242         .set_frame_retries = at86rf230_set_frame_retries,
1243         .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1244 };
1245
1246 static struct at86rf2xx_chip_data at86rf233_data = {
1247         .t_sleep_cycle = 330,
1248         .t_channel_switch = 11,
1249         .t_reset_to_off = 26,
1250         .t_off_to_aack = 80,
1251         .t_off_to_tx_on = 80,
1252         .t_frame = 4096,
1253         .t_p_ack = 545,
1254         .t_sifs = 192,
1255         .t_lifs = 640,
1256         .t_tx_timeout = 2000,
1257         .rssi_base_val = -91,
1258         .set_channel = at86rf23x_set_channel,
1259         .get_desense_steps = at86rf23x_get_desens_steps
1260 };
1261
1262 static struct at86rf2xx_chip_data at86rf231_data = {
1263         .t_sleep_cycle = 330,
1264         .t_channel_switch = 24,
1265         .t_reset_to_off = 37,
1266         .t_off_to_aack = 110,
1267         .t_off_to_tx_on = 110,
1268         .t_frame = 4096,
1269         .t_p_ack = 545,
1270         .t_sifs = 192,
1271         .t_lifs = 640,
1272         .t_tx_timeout = 2000,
1273         .rssi_base_val = -91,
1274         .set_channel = at86rf23x_set_channel,
1275         .get_desense_steps = at86rf23x_get_desens_steps
1276 };
1277
1278 static struct at86rf2xx_chip_data at86rf212_data = {
1279         .t_sleep_cycle = 330,
1280         .t_channel_switch = 11,
1281         .t_reset_to_off = 26,
1282         .t_off_to_aack = 200,
1283         .t_off_to_tx_on = 200,
1284         .t_frame = 4096,
1285         .t_p_ack = 545,
1286         .t_sifs = 192,
1287         .t_lifs = 640,
1288         .t_tx_timeout = 2000,
1289         .rssi_base_val = -100,
1290         .set_channel = at86rf212_set_channel,
1291         .get_desense_steps = at86rf212_get_desens_steps
1292 };
1293
1294 static int at86rf230_hw_init(struct at86rf230_local *lp)
1295 {
1296         int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1297         unsigned int dvdd;
1298         u8 csma_seed[2];
1299
1300         rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1301         if (rc)
1302                 return rc;
1303
1304         irq_type = irq_get_trigger_type(lp->spi->irq);
1305         if (irq_type == IRQ_TYPE_EDGE_FALLING)
1306                 irq_pol = IRQ_ACTIVE_LOW;
1307
1308         rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1309         if (rc)
1310                 return rc;
1311
1312         rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1313         if (rc)
1314                 return rc;
1315
1316         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1317         if (rc)
1318                 return rc;
1319
1320         get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1321         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1322         if (rc)
1323                 return rc;
1324         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1325         if (rc)
1326                 return rc;
1327
1328         /* CLKM changes are applied immediately */
1329         rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1330         if (rc)
1331                 return rc;
1332
1333         /* Turn CLKM Off */
1334         rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1335         if (rc)
1336                 return rc;
1337         /* Wait the next SLEEP cycle */
1338         usleep_range(lp->data->t_sleep_cycle,
1339                      lp->data->t_sleep_cycle + 100);
1340
1341         rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1342         if (rc)
1343                 return rc;
1344         if (!dvdd) {
1345                 dev_err(&lp->spi->dev, "DVDD error\n");
1346                 return -EINVAL;
1347         }
1348
1349         /* Force setting slotted operation bit to 0. Sometimes the atben
1350          * sets this bit and I don't know why. We set this always force
1351          * to zero while probing.
1352          */
1353         return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1354 }
1355
1356 static struct at86rf230_platform_data *
1357 at86rf230_get_pdata(struct spi_device *spi)
1358 {
1359         struct at86rf230_platform_data *pdata;
1360
1361         if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1362                 return spi->dev.platform_data;
1363
1364         pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1365         if (!pdata)
1366                 goto done;
1367
1368         pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1369         pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1370
1371         spi->dev.platform_data = pdata;
1372 done:
1373         return pdata;
1374 }
1375
1376 static int
1377 at86rf230_detect_device(struct at86rf230_local *lp)
1378 {
1379         unsigned int part, version, val;
1380         u16 man_id = 0;
1381         const char *chip;
1382         int rc;
1383
1384         rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1385         if (rc)
1386                 return rc;
1387         man_id |= val;
1388
1389         rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1390         if (rc)
1391                 return rc;
1392         man_id |= (val << 8);
1393
1394         rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1395         if (rc)
1396                 return rc;
1397
1398         rc = __at86rf230_read(lp, RG_PART_NUM, &version);
1399         if (rc)
1400                 return rc;
1401
1402         if (man_id != 0x001f) {
1403                 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1404                         man_id >> 8, man_id & 0xFF);
1405                 return -EINVAL;
1406         }
1407
1408         lp->hw->extra_tx_headroom = 0;
1409         lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AACK |
1410                         IEEE802154_HW_TXPOWER | IEEE802154_HW_ARET |
1411                         IEEE802154_HW_AFILT | IEEE802154_HW_PROMISCUOUS;
1412
1413         switch (part) {
1414         case 2:
1415                 chip = "at86rf230";
1416                 rc = -ENOTSUPP;
1417                 break;
1418         case 3:
1419                 chip = "at86rf231";
1420                 lp->data = &at86rf231_data;
1421                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1422                 lp->hw->phy->current_channel = 11;
1423                 break;
1424         case 7:
1425                 chip = "at86rf212";
1426                 if (version == 1) {
1427                         lp->data = &at86rf212_data;
1428                         lp->hw->flags |= IEEE802154_HW_LBT;
1429                         lp->hw->phy->channels_supported[0] = 0x00007FF;
1430                         lp->hw->phy->channels_supported[2] = 0x00007FF;
1431                         lp->hw->phy->current_channel = 5;
1432                 } else {
1433                         rc = -ENOTSUPP;
1434                 }
1435                 break;
1436         case 11:
1437                 chip = "at86rf233";
1438                 lp->data = &at86rf233_data;
1439                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1440                 lp->hw->phy->current_channel = 13;
1441                 break;
1442         default:
1443                 chip = "unkown";
1444                 rc = -ENOTSUPP;
1445                 break;
1446         }
1447
1448         dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1449
1450         return rc;
1451 }
1452
1453 static void
1454 at86rf230_setup_spi_messages(struct at86rf230_local *lp)
1455 {
1456         lp->state.lp = lp;
1457         spi_message_init(&lp->state.msg);
1458         lp->state.msg.context = &lp->state;
1459         lp->state.trx.tx_buf = lp->state.buf;
1460         lp->state.trx.rx_buf = lp->state.buf;
1461         spi_message_add_tail(&lp->state.trx, &lp->state.msg);
1462
1463         lp->irq.lp = lp;
1464         spi_message_init(&lp->irq.msg);
1465         lp->irq.msg.context = &lp->irq;
1466         lp->irq.trx.tx_buf = lp->irq.buf;
1467         lp->irq.trx.rx_buf = lp->irq.buf;
1468         spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
1469
1470         lp->tx.lp = lp;
1471         spi_message_init(&lp->tx.msg);
1472         lp->tx.msg.context = &lp->tx;
1473         lp->tx.trx.tx_buf = lp->tx.buf;
1474         lp->tx.trx.rx_buf = lp->tx.buf;
1475         spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
1476 }
1477
1478 static int at86rf230_probe(struct spi_device *spi)
1479 {
1480         struct at86rf230_platform_data *pdata;
1481         struct ieee802154_hw *hw;
1482         struct at86rf230_local *lp;
1483         unsigned int status;
1484         int rc, irq_type;
1485
1486         if (!spi->irq) {
1487                 dev_err(&spi->dev, "no IRQ specified\n");
1488                 return -EINVAL;
1489         }
1490
1491         pdata = at86rf230_get_pdata(spi);
1492         if (!pdata) {
1493                 dev_err(&spi->dev, "no platform_data\n");
1494                 return -EINVAL;
1495         }
1496
1497         if (gpio_is_valid(pdata->rstn)) {
1498                 rc = devm_gpio_request_one(&spi->dev, pdata->rstn,
1499                                            GPIOF_OUT_INIT_HIGH, "rstn");
1500                 if (rc)
1501                         return rc;
1502         }
1503
1504         if (gpio_is_valid(pdata->slp_tr)) {
1505                 rc = devm_gpio_request_one(&spi->dev, pdata->slp_tr,
1506                                            GPIOF_OUT_INIT_LOW, "slp_tr");
1507                 if (rc)
1508                         return rc;
1509         }
1510
1511         /* Reset */
1512         if (gpio_is_valid(pdata->rstn)) {
1513                 udelay(1);
1514                 gpio_set_value(pdata->rstn, 0);
1515                 udelay(1);
1516                 gpio_set_value(pdata->rstn, 1);
1517                 usleep_range(120, 240);
1518         }
1519
1520         hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1521         if (!hw)
1522                 return -ENOMEM;
1523
1524         lp = hw->priv;
1525         lp->hw = hw;
1526         lp->spi = spi;
1527         hw->parent = &spi->dev;
1528         hw->vif_data_size = sizeof(*lp);
1529         ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1530
1531         lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1532         if (IS_ERR(lp->regmap)) {
1533                 rc = PTR_ERR(lp->regmap);
1534                 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1535                         rc);
1536                 goto free_dev;
1537         }
1538
1539         at86rf230_setup_spi_messages(lp);
1540
1541         rc = at86rf230_detect_device(lp);
1542         if (rc < 0)
1543                 goto free_dev;
1544
1545         spin_lock_init(&lp->lock);
1546         init_completion(&lp->state_complete);
1547
1548         spi_set_drvdata(spi, lp);
1549
1550         rc = at86rf230_hw_init(lp);
1551         if (rc)
1552                 goto free_dev;
1553
1554         /* Read irq status register to reset irq line */
1555         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1556         if (rc)
1557                 goto free_dev;
1558
1559         irq_type = irq_get_trigger_type(spi->irq);
1560         if (!irq_type)
1561                 irq_type = IRQF_TRIGGER_RISING;
1562
1563         rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1564                               IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1565         if (rc)
1566                 goto free_dev;
1567
1568         rc = ieee802154_register_hw(lp->hw);
1569         if (rc)
1570                 goto free_dev;
1571
1572         return rc;
1573
1574 free_dev:
1575         ieee802154_free_hw(lp->hw);
1576
1577         return rc;
1578 }
1579
1580 static int at86rf230_remove(struct spi_device *spi)
1581 {
1582         struct at86rf230_local *lp = spi_get_drvdata(spi);
1583
1584         /* mask all at86rf230 irq's */
1585         at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1586         ieee802154_unregister_hw(lp->hw);
1587         ieee802154_free_hw(lp->hw);
1588         dev_dbg(&spi->dev, "unregistered at86rf230\n");
1589
1590         return 0;
1591 }
1592
1593 static const struct of_device_id at86rf230_of_match[] = {
1594         { .compatible = "atmel,at86rf230", },
1595         { .compatible = "atmel,at86rf231", },
1596         { .compatible = "atmel,at86rf233", },
1597         { .compatible = "atmel,at86rf212", },
1598         { },
1599 };
1600 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1601
1602 static const struct spi_device_id at86rf230_device_id[] = {
1603         { .name = "at86rf230", },
1604         { .name = "at86rf231", },
1605         { .name = "at86rf233", },
1606         { .name = "at86rf212", },
1607         { },
1608 };
1609 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1610
1611 static struct spi_driver at86rf230_driver = {
1612         .id_table = at86rf230_device_id,
1613         .driver = {
1614                 .of_match_table = of_match_ptr(at86rf230_of_match),
1615                 .name   = "at86rf230",
1616                 .owner  = THIS_MODULE,
1617         },
1618         .probe      = at86rf230_probe,
1619         .remove     = at86rf230_remove,
1620 };
1621
1622 module_spi_driver(at86rf230_driver);
1623
1624 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1625 MODULE_LICENSE("GPL v2");