1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
34 #include <linux/netdevice.h>
36 #include "e1000_regs.h"
37 #include "e1000_defines.h"
41 #define E1000_DEV_ID_82576 0x10C9
42 #define E1000_DEV_ID_82576_FIBER 0x10E6
43 #define E1000_DEV_ID_82576_SERDES 0x10E7
44 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
45 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
46 #define E1000_DEV_ID_82576_NS 0x150A
47 #define E1000_DEV_ID_82576_NS_SERDES 0x1518
48 #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
49 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
50 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
51 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
52 #define E1000_DEV_ID_82580_COPPER 0x150E
53 #define E1000_DEV_ID_82580_FIBER 0x150F
54 #define E1000_DEV_ID_82580_SERDES 0x1510
55 #define E1000_DEV_ID_82580_SGMII 0x1511
56 #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
57 #define E1000_DEV_ID_DH89XXCC_SGMII 0x0436
58 #define E1000_DEV_ID_DH89XXCC_SERDES 0x0438
59 #define E1000_DEV_ID_I350_COPPER 0x1521
60 #define E1000_DEV_ID_I350_FIBER 0x1522
61 #define E1000_DEV_ID_I350_SERDES 0x1523
62 #define E1000_DEV_ID_I350_SGMII 0x1524
64 #define E1000_REVISION_2 2
65 #define E1000_REVISION_4 4
67 #define E1000_FUNC_0 0
68 #define E1000_FUNC_1 1
69 #define E1000_FUNC_2 2
70 #define E1000_FUNC_3 3
72 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0
73 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3
74 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2 6
75 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3 9
83 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
86 enum e1000_media_type {
87 e1000_media_type_unknown = 0,
88 e1000_media_type_copper = 1,
89 e1000_media_type_internal_serdes = 2,
94 e1000_nvm_unknown = 0,
101 enum e1000_nvm_override {
102 e1000_nvm_override_none = 0,
103 e1000_nvm_override_spi_small,
104 e1000_nvm_override_spi_large,
107 enum e1000_phy_type {
108 e1000_phy_unknown = 0,
119 enum e1000_bus_type {
120 e1000_bus_type_unknown = 0,
123 e1000_bus_type_pci_express,
124 e1000_bus_type_reserved
127 enum e1000_bus_speed {
128 e1000_bus_speed_unknown = 0,
134 e1000_bus_speed_2500,
135 e1000_bus_speed_5000,
136 e1000_bus_speed_reserved
139 enum e1000_bus_width {
140 e1000_bus_width_unknown = 0,
141 e1000_bus_width_pcie_x1,
142 e1000_bus_width_pcie_x2,
143 e1000_bus_width_pcie_x4 = 4,
144 e1000_bus_width_pcie_x8 = 8,
147 e1000_bus_width_reserved
150 enum e1000_1000t_rx_status {
151 e1000_1000t_rx_status_not_ok = 0,
152 e1000_1000t_rx_status_ok,
153 e1000_1000t_rx_status_undefined = 0xFF
156 enum e1000_rev_polarity {
157 e1000_rev_polarity_normal = 0,
158 e1000_rev_polarity_reversed,
159 e1000_rev_polarity_undefined = 0xFF
167 e1000_fc_default = 0xFF
170 /* Statistics counters collected by the MAC */
171 struct e1000_hw_stats {
250 struct e1000_phy_stats {
255 struct e1000_host_mng_dhcp_cookie {
266 /* Host Interface "Rev 1" */
267 struct e1000_host_command_header {
274 #define E1000_HI_MAX_DATA_LENGTH 252
275 struct e1000_host_command_info {
276 struct e1000_host_command_header command_header;
277 u8 command_data[E1000_HI_MAX_DATA_LENGTH];
280 /* Host Interface "Rev 2" */
281 struct e1000_host_mng_command_header {
289 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
290 struct e1000_host_mng_command_info {
291 struct e1000_host_mng_command_header command_header;
292 u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
295 #include "e1000_mac.h"
296 #include "e1000_phy.h"
297 #include "e1000_nvm.h"
298 #include "e1000_mbx.h"
300 struct e1000_mac_operations {
301 s32 (*check_for_link)(struct e1000_hw *);
302 s32 (*reset_hw)(struct e1000_hw *);
303 s32 (*init_hw)(struct e1000_hw *);
304 bool (*check_mng_mode)(struct e1000_hw *);
305 s32 (*setup_physical_interface)(struct e1000_hw *);
306 void (*rar_set)(struct e1000_hw *, u8 *, u32);
307 s32 (*read_mac_addr)(struct e1000_hw *);
308 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
311 struct e1000_phy_operations {
312 s32 (*acquire)(struct e1000_hw *);
313 s32 (*check_polarity)(struct e1000_hw *);
314 s32 (*check_reset_block)(struct e1000_hw *);
315 s32 (*force_speed_duplex)(struct e1000_hw *);
316 s32 (*get_cfg_done)(struct e1000_hw *hw);
317 s32 (*get_cable_length)(struct e1000_hw *);
318 s32 (*get_phy_info)(struct e1000_hw *);
319 s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
320 void (*release)(struct e1000_hw *);
321 s32 (*reset)(struct e1000_hw *);
322 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
323 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
324 s32 (*write_reg)(struct e1000_hw *, u32, u16);
327 struct e1000_nvm_operations {
328 s32 (*acquire)(struct e1000_hw *);
329 s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
330 void (*release)(struct e1000_hw *);
331 s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
335 s32 (*get_invariants)(struct e1000_hw *);
336 struct e1000_mac_operations *mac_ops;
337 struct e1000_phy_operations *phy_ops;
338 struct e1000_nvm_operations *nvm_ops;
341 extern const struct e1000_info e1000_82575_info;
343 struct e1000_mac_info {
344 struct e1000_mac_operations ops;
349 enum e1000_mac_type type;
360 /* Maximum size of the MTA register table in all supported adapters */
361 #define MAX_MTA_REG 128
362 u32 mta_shadow[MAX_MTA_REG];
365 u8 forced_speed_duplex;
368 bool arc_subsystem_valid;
369 bool asf_firmware_present;
372 bool disable_hw_init_bits;
373 bool get_link_status;
374 bool ifs_params_forced;
376 bool report_tx_early;
377 bool serdes_has_link;
378 bool tx_pkt_filtering;
381 struct e1000_phy_info {
382 struct e1000_phy_operations ops;
384 enum e1000_phy_type type;
386 enum e1000_1000t_rx_status local_rx;
387 enum e1000_1000t_rx_status remote_rx;
388 enum e1000_ms_type ms_type;
389 enum e1000_ms_type original_ms_type;
390 enum e1000_rev_polarity cable_polarity;
391 enum e1000_smart_speed smart_speed;
395 u32 reset_delay_us; /* in usec */
398 enum e1000_media_type media_type;
400 u16 autoneg_advertised;
403 u16 max_cable_length;
404 u16 min_cable_length;
408 bool disable_polarity_correction;
410 bool polarity_correction;
412 bool speed_downgraded;
413 bool autoneg_wait_to_complete;
416 struct e1000_nvm_info {
417 struct e1000_nvm_operations ops;
419 enum e1000_nvm_type type;
420 enum e1000_nvm_override override;
432 struct e1000_bus_info {
433 enum e1000_bus_type type;
434 enum e1000_bus_speed speed;
435 enum e1000_bus_width width;
443 struct e1000_fc_info {
444 u32 high_water; /* Flow control high-water mark */
445 u32 low_water; /* Flow control low-water mark */
446 u16 pause_time; /* Flow control pause timer */
447 bool send_xon; /* Flow control send XON */
448 bool strict_ieee; /* Strict IEEE mode */
449 enum e1000_fc_mode current_mode; /* Type of flow control */
450 enum e1000_fc_mode requested_mode;
453 struct e1000_mbx_operations {
454 s32 (*init_params)(struct e1000_hw *hw);
455 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
456 s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
457 s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
458 s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
459 s32 (*check_for_msg)(struct e1000_hw *, u16);
460 s32 (*check_for_ack)(struct e1000_hw *, u16);
461 s32 (*check_for_rst)(struct e1000_hw *, u16);
464 struct e1000_mbx_stats {
473 struct e1000_mbx_info {
474 struct e1000_mbx_operations ops;
475 struct e1000_mbx_stats stats;
481 struct e1000_dev_spec_82575 {
483 bool global_device_reset;
490 u8 __iomem *flash_address;
491 unsigned long io_base;
493 struct e1000_mac_info mac;
494 struct e1000_fc_info fc;
495 struct e1000_phy_info phy;
496 struct e1000_nvm_info nvm;
497 struct e1000_bus_info bus;
498 struct e1000_mbx_info mbx;
499 struct e1000_host_mng_dhcp_cookie mng_cookie;
502 struct e1000_dev_spec_82575 _82575;
506 u16 subsystem_vendor_id;
507 u16 subsystem_device_id;
513 extern struct net_device *igb_get_hw_dev(struct e1000_hw *hw);
514 #define hw_dbg(format, arg...) \
515 netdev_dbg(igb_get_hw_dev(hw), format, ##arg)
517 /* These functions must be implemented by drivers */
518 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
519 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
520 #endif /* _E1000_HW_H_ */