1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
35 #include "e1000_regs.h"
36 #include "e1000_defines.h"
40 #define E1000_DEV_ID_82576 0x10C9
41 #define E1000_DEV_ID_82576_FIBER 0x10E6
42 #define E1000_DEV_ID_82576_SERDES 0x10E7
43 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
44 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
45 #define E1000_DEV_ID_82576_NS 0x150A
46 #define E1000_DEV_ID_82576_NS_SERDES 0x1518
47 #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
48 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
49 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
50 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
51 #define E1000_DEV_ID_82580_COPPER 0x150E
52 #define E1000_DEV_ID_82580_FIBER 0x150F
53 #define E1000_DEV_ID_82580_SERDES 0x1510
54 #define E1000_DEV_ID_82580_SGMII 0x1511
55 #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
57 #define E1000_REVISION_2 2
58 #define E1000_REVISION_4 4
60 #define E1000_FUNC_0 0
61 #define E1000_FUNC_1 1
62 #define E1000_FUNC_2 2
63 #define E1000_FUNC_3 3
65 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0
66 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3
67 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2 6
68 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3 9
75 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
78 enum e1000_media_type {
79 e1000_media_type_unknown = 0,
80 e1000_media_type_copper = 1,
81 e1000_media_type_internal_serdes = 2,
86 e1000_nvm_unknown = 0,
93 enum e1000_nvm_override {
94 e1000_nvm_override_none = 0,
95 e1000_nvm_override_spi_small,
96 e1000_nvm_override_spi_large,
100 e1000_phy_unknown = 0,
111 enum e1000_bus_type {
112 e1000_bus_type_unknown = 0,
115 e1000_bus_type_pci_express,
116 e1000_bus_type_reserved
119 enum e1000_bus_speed {
120 e1000_bus_speed_unknown = 0,
126 e1000_bus_speed_2500,
127 e1000_bus_speed_5000,
128 e1000_bus_speed_reserved
131 enum e1000_bus_width {
132 e1000_bus_width_unknown = 0,
133 e1000_bus_width_pcie_x1,
134 e1000_bus_width_pcie_x2,
135 e1000_bus_width_pcie_x4 = 4,
136 e1000_bus_width_pcie_x8 = 8,
139 e1000_bus_width_reserved
142 enum e1000_1000t_rx_status {
143 e1000_1000t_rx_status_not_ok = 0,
144 e1000_1000t_rx_status_ok,
145 e1000_1000t_rx_status_undefined = 0xFF
148 enum e1000_rev_polarity {
149 e1000_rev_polarity_normal = 0,
150 e1000_rev_polarity_reversed,
151 e1000_rev_polarity_undefined = 0xFF
159 e1000_fc_default = 0xFF
162 /* Statistics counters collected by the MAC */
163 struct e1000_hw_stats {
242 struct e1000_phy_stats {
247 struct e1000_host_mng_dhcp_cookie {
258 /* Host Interface "Rev 1" */
259 struct e1000_host_command_header {
266 #define E1000_HI_MAX_DATA_LENGTH 252
267 struct e1000_host_command_info {
268 struct e1000_host_command_header command_header;
269 u8 command_data[E1000_HI_MAX_DATA_LENGTH];
272 /* Host Interface "Rev 2" */
273 struct e1000_host_mng_command_header {
281 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
282 struct e1000_host_mng_command_info {
283 struct e1000_host_mng_command_header command_header;
284 u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
287 #include "e1000_mac.h"
288 #include "e1000_phy.h"
289 #include "e1000_nvm.h"
290 #include "e1000_mbx.h"
292 struct e1000_mac_operations {
293 s32 (*check_for_link)(struct e1000_hw *);
294 s32 (*reset_hw)(struct e1000_hw *);
295 s32 (*init_hw)(struct e1000_hw *);
296 bool (*check_mng_mode)(struct e1000_hw *);
297 s32 (*setup_physical_interface)(struct e1000_hw *);
298 void (*rar_set)(struct e1000_hw *, u8 *, u32);
299 s32 (*read_mac_addr)(struct e1000_hw *);
300 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
303 struct e1000_phy_operations {
304 s32 (*acquire)(struct e1000_hw *);
305 s32 (*check_polarity)(struct e1000_hw *);
306 s32 (*check_reset_block)(struct e1000_hw *);
307 s32 (*force_speed_duplex)(struct e1000_hw *);
308 s32 (*get_cfg_done)(struct e1000_hw *hw);
309 s32 (*get_cable_length)(struct e1000_hw *);
310 s32 (*get_phy_info)(struct e1000_hw *);
311 s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
312 void (*release)(struct e1000_hw *);
313 s32 (*reset)(struct e1000_hw *);
314 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
315 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
316 s32 (*write_reg)(struct e1000_hw *, u32, u16);
319 struct e1000_nvm_operations {
320 s32 (*acquire)(struct e1000_hw *);
321 s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
322 void (*release)(struct e1000_hw *);
323 s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
327 s32 (*get_invariants)(struct e1000_hw *);
328 struct e1000_mac_operations *mac_ops;
329 struct e1000_phy_operations *phy_ops;
330 struct e1000_nvm_operations *nvm_ops;
333 extern const struct e1000_info e1000_82575_info;
335 struct e1000_mac_info {
336 struct e1000_mac_operations ops;
341 enum e1000_mac_type type;
352 /* Maximum size of the MTA register table in all supported adapters */
353 #define MAX_MTA_REG 128
354 u32 mta_shadow[MAX_MTA_REG];
357 u8 forced_speed_duplex;
360 bool arc_subsystem_valid;
361 bool asf_firmware_present;
364 bool disable_hw_init_bits;
365 bool get_link_status;
366 bool ifs_params_forced;
368 bool report_tx_early;
369 bool serdes_has_link;
370 bool tx_pkt_filtering;
373 struct e1000_phy_info {
374 struct e1000_phy_operations ops;
376 enum e1000_phy_type type;
378 enum e1000_1000t_rx_status local_rx;
379 enum e1000_1000t_rx_status remote_rx;
380 enum e1000_ms_type ms_type;
381 enum e1000_ms_type original_ms_type;
382 enum e1000_rev_polarity cable_polarity;
383 enum e1000_smart_speed smart_speed;
387 u32 reset_delay_us; /* in usec */
390 enum e1000_media_type media_type;
392 u16 autoneg_advertised;
395 u16 max_cable_length;
396 u16 min_cable_length;
400 bool disable_polarity_correction;
402 bool polarity_correction;
404 bool speed_downgraded;
405 bool autoneg_wait_to_complete;
408 struct e1000_nvm_info {
409 struct e1000_nvm_operations ops;
411 enum e1000_nvm_type type;
412 enum e1000_nvm_override override;
424 struct e1000_bus_info {
425 enum e1000_bus_type type;
426 enum e1000_bus_speed speed;
427 enum e1000_bus_width width;
435 struct e1000_fc_info {
436 u32 high_water; /* Flow control high-water mark */
437 u32 low_water; /* Flow control low-water mark */
438 u16 pause_time; /* Flow control pause timer */
439 bool send_xon; /* Flow control send XON */
440 bool strict_ieee; /* Strict IEEE mode */
441 enum e1000_fc_mode current_mode; /* Type of flow control */
442 enum e1000_fc_mode requested_mode;
445 struct e1000_mbx_operations {
446 s32 (*init_params)(struct e1000_hw *hw);
447 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
448 s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
449 s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
450 s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
451 s32 (*check_for_msg)(struct e1000_hw *, u16);
452 s32 (*check_for_ack)(struct e1000_hw *, u16);
453 s32 (*check_for_rst)(struct e1000_hw *, u16);
456 struct e1000_mbx_stats {
465 struct e1000_mbx_info {
466 struct e1000_mbx_operations ops;
467 struct e1000_mbx_stats stats;
473 struct e1000_dev_spec_82575 {
475 bool global_device_reset;
482 u8 __iomem *flash_address;
483 unsigned long io_base;
485 struct e1000_mac_info mac;
486 struct e1000_fc_info fc;
487 struct e1000_phy_info phy;
488 struct e1000_nvm_info nvm;
489 struct e1000_bus_info bus;
490 struct e1000_mbx_info mbx;
491 struct e1000_host_mng_dhcp_cookie mng_cookie;
494 struct e1000_dev_spec_82575 _82575;
498 u16 subsystem_vendor_id;
499 u16 subsystem_device_id;
506 extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
507 #define hw_dbg(format, arg...) \
508 printk(KERN_DEBUG "%s: " format, igb_get_hw_dev_name(hw), ##arg)
510 #define hw_dbg(format, arg...)
513 /* These functions must be implemented by drivers */
514 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
515 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);