4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (C) 2009 Renesas Solutions Corp.
9 * Copyright 2006-2009 Analog Devices Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
19 * This driver is very simple.
20 * So, it doesn't have below support now
22 * - DMA transfer support
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <net/irda/wrapper.h>
29 #include <net/irda/irda_device.h>
31 #define DRIVER_NAME "sh_irda"
33 #if defined(CONFIG_ARCH_SH7367) || defined(CONFIG_ARCH_SH7377)
34 #define __IRDARAM_LEN 0x13FF
36 #define __IRDARAM_LEN 0x1039
39 #define IRTMR 0x1F00 /* Transfer mode */
40 #define IRCFR 0x1F02 /* Configuration */
41 #define IRCTR 0x1F04 /* IR control */
42 #define IRTFLR 0x1F20 /* Transmit frame length */
43 #define IRTCTR 0x1F22 /* Transmit control */
44 #define IRRFLR 0x1F40 /* Receive frame length */
45 #define IRRCTR 0x1F42 /* Receive control */
46 #define SIRISR 0x1F60 /* SIR-UART mode interrupt source */
47 #define SIRIMR 0x1F62 /* SIR-UART mode interrupt mask */
48 #define SIRICR 0x1F64 /* SIR-UART mode interrupt clear */
49 #define SIRBCR 0x1F68 /* SIR-UART mode baud rate count */
50 #define MFIRISR 0x1F70 /* MIR/FIR mode interrupt source */
51 #define MFIRIMR 0x1F72 /* MIR/FIR mode interrupt mask */
52 #define MFIRICR 0x1F74 /* MIR/FIR mode interrupt clear */
53 #define CRCCTR 0x1F80 /* CRC engine control */
54 #define CRCIR 0x1F86 /* CRC engine input data */
55 #define CRCCR 0x1F8A /* CRC engine calculation */
56 #define CRCOR 0x1F8E /* CRC engine output data */
57 #define FIFOCP 0x1FC0 /* FIFO current pointer */
58 #define FIFOFP 0x1FC2 /* FIFO follow pointer */
59 #define FIFORSMSK 0x1FC4 /* FIFO receive status mask */
60 #define FIFORSOR 0x1FC6 /* FIFO receive status OR */
61 #define FIFOSEL 0x1FC8 /* FIFO select */
62 #define FIFORS 0x1FCA /* FIFO receive status */
63 #define FIFORFL 0x1FCC /* FIFO receive frame length */
64 #define FIFORAMCP 0x1FCE /* FIFO RAM current pointer */
65 #define FIFORAMFP 0x1FD0 /* FIFO RAM follow pointer */
66 #define BIFCTL 0x1FD2 /* BUS interface control */
67 #define IRDARAM 0x0000 /* IrDA buffer RAM */
68 #define IRDARAM_LEN __IRDARAM_LEN /* - 8/16/32 (read-only for 32) */
71 #define TMD_MASK (0x3 << 14) /* Transfer Mode */
72 #define TMD_SIR (0x0 << 14)
73 #define TMD_MIR (0x3 << 14)
74 #define TMD_FIR (0x2 << 14)
76 #define FIFORIM (1 << 8) /* FIFO receive interrupt mask */
77 #define MIM (1 << 4) /* MIR/FIR Interrupt Mask */
78 #define SIM (1 << 0) /* SIR Interrupt Mask */
79 #define xIM_MASK (FIFORIM | MIM | SIM)
82 #define RTO_SHIFT 8 /* shift for Receive Timeout */
83 #define RTO (0x3 << RTO_SHIFT)
86 #define ARMOD (1 << 15) /* Auto-Receive Mode */
87 #define TE (1 << 0) /* Transmit Enable */
90 #define RFL_MASK (0x1FFF) /* mask for Receive Frame Length */
93 #define RE (1 << 0) /* Receive Enable */
96 * SIRISR, SIRIMR, SIRICR,
97 * MFIRISR, MFIRIMR, MFIRICR
99 #define FRE (1 << 15) /* Frame Receive End */
100 #define TROV (1 << 11) /* Transfer Area Overflow */
101 #define xIR_9 (1 << 9)
102 #define TOT xIR_9 /* for SIR Timeout */
103 #define ABTD xIR_9 /* for MIR/FIR Abort Detection */
104 #define xIR_8 (1 << 8)
105 #define FER xIR_8 /* for SIR Framing Error */
106 #define CRCER xIR_8 /* for MIR/FIR CRC error */
107 #define FTE (1 << 7) /* Frame Transmit End */
108 #define xIR_MASK (FRE | TROV | xIR_9 | xIR_8 | FTE)
111 #define BRC_MASK (0x3F) /* mask for Baud Rate Count */
114 #define CRC_RST (1 << 15) /* CRC Engine Reset */
115 #define CRC_CT_MASK 0x0FFF /* mask for CRC Engine Input Data Count */
118 #define CRC_IN_MASK 0x0FFF /* mask for CRC Engine Input Data */
120 /************************************************************************
126 ************************************************************************/
135 struct sh_irda_xir_func {
136 int (*xir_fre) (struct sh_irda_self *self);
137 int (*xir_trov) (struct sh_irda_self *self);
138 int (*xir_9) (struct sh_irda_self *self);
139 int (*xir_8) (struct sh_irda_self *self);
140 int (*xir_fte) (struct sh_irda_self *self);
143 struct sh_irda_self {
144 void __iomem *membase;
148 struct net_device *ndev;
150 struct irlap_cb *irlap;
156 enum sh_irda_mode mode;
159 struct sh_irda_xir_func *xir_func;
162 /************************************************************************
168 ************************************************************************/
169 static void sh_irda_write(struct sh_irda_self *self, u32 offset, u16 data)
173 spin_lock_irqsave(&self->lock, flags);
174 iowrite16(data, self->membase + offset);
175 spin_unlock_irqrestore(&self->lock, flags);
178 static u16 sh_irda_read(struct sh_irda_self *self, u32 offset)
183 spin_lock_irqsave(&self->lock, flags);
184 ret = ioread16(self->membase + offset);
185 spin_unlock_irqrestore(&self->lock, flags);
190 static void sh_irda_update_bits(struct sh_irda_self *self, u32 offset,
196 spin_lock_irqsave(&self->lock, flags);
197 old = ioread16(self->membase + offset);
198 new = (old & ~mask) | data;
200 iowrite16(data, self->membase + offset);
201 spin_unlock_irqrestore(&self->lock, flags);
204 /************************************************************************
210 ************************************************************************/
211 /*=====================================
215 *=====================================*/
216 static void sh_irda_rcv_ctrl(struct sh_irda_self *self, int enable)
218 struct device *dev = &self->ndev->dev;
220 sh_irda_update_bits(self, IRRCTR, RE, enable ? RE : 0);
221 dev_dbg(dev, "recv %s\n", enable ? "enable" : "disable");
224 static int sh_irda_set_timeout(struct sh_irda_self *self, int interval)
226 struct device *dev = &self->ndev->dev;
228 if (SH_IRDA_SIR != self->mode)
231 if (interval < 0 || interval > 2) {
232 dev_err(dev, "unsupported timeout interval\n");
236 sh_irda_update_bits(self, IRCFR, RTO, interval << RTO_SHIFT);
240 static int sh_irda_set_baudrate(struct sh_irda_self *self, int baudrate)
242 struct device *dev = &self->ndev->dev;
248 if (SH_IRDA_SIR != self->mode) {
249 dev_err(dev, "it is not SIR mode\n");
254 * Baud rate (bits/s) =
255 * (48 MHz / 26) / (baud rate counter value + 1) x 16
257 val = (48000000 / 26 / 16 / baudrate) - 1;
258 dev_dbg(dev, "baudrate = %d, val = 0x%02x\n", baudrate, val);
260 sh_irda_update_bits(self, SIRBCR, BRC_MASK, val);
265 static int xir_get_rcv_length(struct sh_irda_self *self)
267 return RFL_MASK & sh_irda_read(self, IRRFLR);
270 /*=====================================
274 *=====================================*/
275 static int xir_fre(struct sh_irda_self *self)
277 struct device *dev = &self->ndev->dev;
278 dev_err(dev, "none mode: frame recv\n");
282 static int xir_trov(struct sh_irda_self *self)
284 struct device *dev = &self->ndev->dev;
285 dev_err(dev, "none mode: buffer ram over\n");
289 static int xir_9(struct sh_irda_self *self)
291 struct device *dev = &self->ndev->dev;
292 dev_err(dev, "none mode: time over\n");
296 static int xir_8(struct sh_irda_self *self)
298 struct device *dev = &self->ndev->dev;
299 dev_err(dev, "none mode: framing error\n");
303 static int xir_fte(struct sh_irda_self *self)
305 struct device *dev = &self->ndev->dev;
306 dev_err(dev, "none mode: frame transmit end\n");
310 static struct sh_irda_xir_func xir_func = {
312 .xir_trov = xir_trov,
318 /*=====================================
322 * MIR/FIR are not supported now
323 *=====================================*/
324 static struct sh_irda_xir_func mfir_func = {
326 .xir_trov = xir_trov,
332 /*=====================================
336 *=====================================*/
337 static int sir_fre(struct sh_irda_self *self)
339 struct device *dev = &self->ndev->dev;
341 u8 *data = (u8 *)&data16;
342 int len = xir_get_rcv_length(self);
345 if (len > IRDARAM_LEN)
348 dev_dbg(dev, "frame recv length = %d\n", len);
350 for (i = 0; i < len; i++) {
353 data16 = sh_irda_read(self, IRDARAM + i);
355 async_unwrap_char(self->ndev, &self->ndev->stats,
356 &self->rx_buff, data[j]);
358 self->ndev->last_rx = jiffies;
360 sh_irda_rcv_ctrl(self, 1);
365 static int sir_trov(struct sh_irda_self *self)
367 struct device *dev = &self->ndev->dev;
369 dev_err(dev, "buffer ram over\n");
370 sh_irda_rcv_ctrl(self, 1);
374 static int sir_tot(struct sh_irda_self *self)
376 struct device *dev = &self->ndev->dev;
378 dev_err(dev, "time over\n");
379 sh_irda_set_baudrate(self, 9600);
380 sh_irda_rcv_ctrl(self, 1);
384 static int sir_fer(struct sh_irda_self *self)
386 struct device *dev = &self->ndev->dev;
388 dev_err(dev, "framing error\n");
389 sh_irda_rcv_ctrl(self, 1);
393 static int sir_fte(struct sh_irda_self *self)
395 struct device *dev = &self->ndev->dev;
397 dev_dbg(dev, "frame transmit end\n");
398 netif_wake_queue(self->ndev);
403 static struct sh_irda_xir_func sir_func = {
405 .xir_trov = sir_trov,
411 static void sh_irda_set_mode(struct sh_irda_self *self, enum sh_irda_mode mode)
413 struct device *dev = &self->ndev->dev;
414 struct sh_irda_xir_func *func;
442 self->xir_func = func;
443 sh_irda_update_bits(self, IRTMR, TMD_MASK, data);
445 dev_dbg(dev, "switch to %s mode", name);
448 /************************************************************************
454 ************************************************************************/
455 static void sh_irda_set_irq_mask(struct sh_irda_self *self)
461 sh_irda_update_bits(self, IRTMR, xIM_MASK, xIM_MASK);
462 sh_irda_update_bits(self, SIRIMR, xIR_MASK, xIR_MASK);
463 sh_irda_update_bits(self, MFIRIMR, xIR_MASK, xIR_MASK);
466 sh_irda_update_bits(self, SIRICR, xIR_MASK, xIR_MASK);
467 sh_irda_update_bits(self, MFIRICR, xIR_MASK, xIR_MASK);
469 switch (self->mode) {
487 sh_irda_update_bits(self, IRTMR, tmr_hole, 0);
488 sh_irda_update_bits(self, xir_reg, xIR_MASK, 0);
492 static irqreturn_t sh_irda_irq(int irq, void *dev_id)
494 struct sh_irda_self *self = dev_id;
495 struct sh_irda_xir_func *func = self->xir_func;
496 u16 isr = sh_irda_read(self, SIRISR);
499 sh_irda_write(self, SIRICR, isr);
504 func->xir_trov(self);
515 /************************************************************************
521 ************************************************************************/
522 static void sh_irda_crc_reset(struct sh_irda_self *self)
524 sh_irda_write(self, CRCCTR, CRC_RST);
527 static void sh_irda_crc_add(struct sh_irda_self *self, u16 data)
529 sh_irda_write(self, CRCIR, data & CRC_IN_MASK);
532 static u16 sh_irda_crc_cnt(struct sh_irda_self *self)
534 return CRC_CT_MASK & sh_irda_read(self, CRCCTR);
537 static u16 sh_irda_crc_out(struct sh_irda_self *self)
539 return sh_irda_read(self, CRCOR);
542 static int sh_irda_crc_init(struct sh_irda_self *self)
544 struct device *dev = &self->ndev->dev;
548 sh_irda_crc_reset(self);
550 sh_irda_crc_add(self, 0xCC);
551 sh_irda_crc_add(self, 0xF5);
552 sh_irda_crc_add(self, 0xF1);
553 sh_irda_crc_add(self, 0xA7);
555 val = sh_irda_crc_cnt(self);
557 dev_err(dev, "CRC count error %x\n", val);
561 val = sh_irda_crc_out(self);
563 dev_err(dev, "CRC result error%x\n", val);
571 sh_irda_crc_reset(self);
575 /************************************************************************
581 ************************************************************************/
582 static void sh_irda_remove_iobuf(struct sh_irda_self *self)
584 kfree(self->rx_buff.head);
586 self->tx_buff.head = NULL;
587 self->tx_buff.data = NULL;
588 self->rx_buff.head = NULL;
589 self->rx_buff.data = NULL;
592 static int sh_irda_init_iobuf(struct sh_irda_self *self, int rxsize, int txsize)
594 if (self->rx_buff.head ||
595 self->tx_buff.head) {
596 dev_err(&self->ndev->dev, "iobuff has already existed.");
601 self->rx_buff.head = kmalloc(rxsize, GFP_KERNEL);
602 if (!self->rx_buff.head)
605 self->rx_buff.truesize = rxsize;
606 self->rx_buff.in_frame = FALSE;
607 self->rx_buff.state = OUTSIDE_FRAME;
608 self->rx_buff.data = self->rx_buff.head;
611 self->tx_buff.head = self->membase + IRDARAM;
612 self->tx_buff.truesize = IRDARAM_LEN;
617 /************************************************************************
620 net_device_ops function
623 ************************************************************************/
624 static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
626 struct sh_irda_self *self = netdev_priv(ndev);
627 struct device *dev = &self->ndev->dev;
628 int speed = irda_get_next_speed(skb);
631 dev_dbg(dev, "hard xmit\n");
633 netif_stop_queue(ndev);
634 sh_irda_rcv_ctrl(self, 0);
636 ret = sh_irda_set_baudrate(self, speed);
638 goto sh_irda_hard_xmit_end;
640 self->tx_buff.len = 0;
644 spin_lock_irqsave(&self->lock, flags);
645 self->tx_buff.len = async_wrap_skb(skb,
647 self->tx_buff.truesize);
648 spin_unlock_irqrestore(&self->lock, flags);
650 if (self->tx_buff.len > self->tx_buff.truesize)
651 self->tx_buff.len = self->tx_buff.truesize;
653 sh_irda_write(self, IRTFLR, self->tx_buff.len);
654 sh_irda_write(self, IRTCTR, ARMOD | TE);
656 goto sh_irda_hard_xmit_end;
662 sh_irda_hard_xmit_end:
663 sh_irda_set_baudrate(self, 9600);
664 netif_wake_queue(self->ndev);
665 sh_irda_rcv_ctrl(self, 1);
672 static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd)
677 * This function is needed for irda framework.
678 * But nothing to do now
683 static struct net_device_stats *sh_irda_stats(struct net_device *ndev)
685 struct sh_irda_self *self = netdev_priv(ndev);
687 return &self->ndev->stats;
690 static int sh_irda_open(struct net_device *ndev)
692 struct sh_irda_self *self = netdev_priv(ndev);
695 clk_enable(self->clk);
696 err = sh_irda_crc_init(self);
700 sh_irda_set_mode(self, SH_IRDA_SIR);
701 sh_irda_set_timeout(self, 2);
702 sh_irda_set_baudrate(self, 9600);
704 self->irlap = irlap_open(ndev, &self->qos, DRIVER_NAME);
710 netif_start_queue(ndev);
711 sh_irda_rcv_ctrl(self, 1);
712 sh_irda_set_irq_mask(self);
714 dev_info(&ndev->dev, "opened\n");
719 clk_disable(self->clk);
724 static int sh_irda_stop(struct net_device *ndev)
726 struct sh_irda_self *self = netdev_priv(ndev);
730 irlap_close(self->irlap);
734 netif_stop_queue(ndev);
736 dev_info(&ndev->dev, "stoped\n");
741 static const struct net_device_ops sh_irda_ndo = {
742 .ndo_open = sh_irda_open,
743 .ndo_stop = sh_irda_stop,
744 .ndo_start_xmit = sh_irda_hard_xmit,
745 .ndo_do_ioctl = sh_irda_ioctl,
746 .ndo_get_stats = sh_irda_stats,
749 /************************************************************************
752 platform_driver function
755 ************************************************************************/
756 static int __devinit sh_irda_probe(struct platform_device *pdev)
758 struct net_device *ndev;
759 struct sh_irda_self *self;
760 struct resource *res;
764 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
765 irq = platform_get_irq(pdev, 0);
766 if (!res || irq < 0) {
767 dev_err(&pdev->dev, "Not enough platform resources.\n");
771 ndev = alloc_irdadev(sizeof(*self));
775 self = netdev_priv(ndev);
776 self->membase = ioremap_nocache(res->start, resource_size(res));
777 if (!self->membase) {
779 dev_err(&pdev->dev, "Unable to ioremap.\n");
783 err = sh_irda_init_iobuf(self, IRDA_SKB_MAX_MTU, IRDA_SIR_MAX_FRAME);
787 self->clk = clk_get(&pdev->dev, NULL);
788 if (IS_ERR(self->clk)) {
789 dev_err(&pdev->dev, "cannot get irda clock\n");
793 irda_init_max_qos_capabilies(&self->qos);
795 ndev->netdev_ops = &sh_irda_ndo;
799 self->qos.baud_rate.bits &= IR_9600; /* FIXME */
800 self->qos.min_turn_time.bits = 1; /* 10 ms or more */
801 spin_lock_init(&self->lock);
803 irda_qos_bits_to_value(&self->qos);
805 err = register_netdev(ndev);
809 platform_set_drvdata(pdev, ndev);
811 if (request_irq(irq, sh_irda_irq, IRQF_DISABLED, "sh_irda", self)) {
812 dev_warn(&pdev->dev, "Unable to attach sh_irda interrupt\n");
816 dev_info(&pdev->dev, "SuperH IrDA probed\n");
823 sh_irda_remove_iobuf(self);
825 iounmap(self->membase);
832 static int __devexit sh_irda_remove(struct platform_device *pdev)
834 struct net_device *ndev = platform_get_drvdata(pdev);
835 struct sh_irda_self *self = netdev_priv(ndev);
840 unregister_netdev(ndev);
842 sh_irda_remove_iobuf(self);
843 iounmap(self->membase);
845 platform_set_drvdata(pdev, NULL);
850 static struct platform_driver sh_irda_driver = {
851 .probe = sh_irda_probe,
852 .remove = __devexit_p(sh_irda_remove),
858 static int __init sh_irda_init(void)
860 return platform_driver_register(&sh_irda_driver);
863 static void __exit sh_irda_exit(void)
865 platform_driver_unregister(&sh_irda_driver);
868 module_init(sh_irda_init);
869 module_exit(sh_irda_exit);
871 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
872 MODULE_DESCRIPTION("SuperH IrDA driver");
873 MODULE_LICENSE("GPL");