4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (C) 2009 Renesas Solutions Corp.
9 * Copyright 2006-2009 Analog Devices Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
19 * This driver is very simple.
20 * So, it doesn't have below support now
22 * - DMA transfer support
26 #include <linux/interrupt.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/clk.h>
30 #include <net/irda/wrapper.h>
31 #include <net/irda/irda_device.h>
33 #define DRIVER_NAME "sh_irda"
35 #if defined(CONFIG_ARCH_SH7367) || defined(CONFIG_ARCH_SH7377)
36 #define __IRDARAM_LEN 0x13FF
38 #define __IRDARAM_LEN 0x1039
41 #define IRTMR 0x1F00 /* Transfer mode */
42 #define IRCFR 0x1F02 /* Configuration */
43 #define IRCTR 0x1F04 /* IR control */
44 #define IRTFLR 0x1F20 /* Transmit frame length */
45 #define IRTCTR 0x1F22 /* Transmit control */
46 #define IRRFLR 0x1F40 /* Receive frame length */
47 #define IRRCTR 0x1F42 /* Receive control */
48 #define SIRISR 0x1F60 /* SIR-UART mode interrupt source */
49 #define SIRIMR 0x1F62 /* SIR-UART mode interrupt mask */
50 #define SIRICR 0x1F64 /* SIR-UART mode interrupt clear */
51 #define SIRBCR 0x1F68 /* SIR-UART mode baud rate count */
52 #define MFIRISR 0x1F70 /* MIR/FIR mode interrupt source */
53 #define MFIRIMR 0x1F72 /* MIR/FIR mode interrupt mask */
54 #define MFIRICR 0x1F74 /* MIR/FIR mode interrupt clear */
55 #define CRCCTR 0x1F80 /* CRC engine control */
56 #define CRCIR 0x1F86 /* CRC engine input data */
57 #define CRCCR 0x1F8A /* CRC engine calculation */
58 #define CRCOR 0x1F8E /* CRC engine output data */
59 #define FIFOCP 0x1FC0 /* FIFO current pointer */
60 #define FIFOFP 0x1FC2 /* FIFO follow pointer */
61 #define FIFORSMSK 0x1FC4 /* FIFO receive status mask */
62 #define FIFORSOR 0x1FC6 /* FIFO receive status OR */
63 #define FIFOSEL 0x1FC8 /* FIFO select */
64 #define FIFORS 0x1FCA /* FIFO receive status */
65 #define FIFORFL 0x1FCC /* FIFO receive frame length */
66 #define FIFORAMCP 0x1FCE /* FIFO RAM current pointer */
67 #define FIFORAMFP 0x1FD0 /* FIFO RAM follow pointer */
68 #define BIFCTL 0x1FD2 /* BUS interface control */
69 #define IRDARAM 0x0000 /* IrDA buffer RAM */
70 #define IRDARAM_LEN __IRDARAM_LEN /* - 8/16/32 (read-only for 32) */
73 #define TMD_MASK (0x3 << 14) /* Transfer Mode */
74 #define TMD_SIR (0x0 << 14)
75 #define TMD_MIR (0x3 << 14)
76 #define TMD_FIR (0x2 << 14)
78 #define FIFORIM (1 << 8) /* FIFO receive interrupt mask */
79 #define MIM (1 << 4) /* MIR/FIR Interrupt Mask */
80 #define SIM (1 << 0) /* SIR Interrupt Mask */
81 #define xIM_MASK (FIFORIM | MIM | SIM)
84 #define RTO_SHIFT 8 /* shift for Receive Timeout */
85 #define RTO (0x3 << RTO_SHIFT)
88 #define ARMOD (1 << 15) /* Auto-Receive Mode */
89 #define TE (1 << 0) /* Transmit Enable */
92 #define RFL_MASK (0x1FFF) /* mask for Receive Frame Length */
95 #define RE (1 << 0) /* Receive Enable */
98 * SIRISR, SIRIMR, SIRICR,
99 * MFIRISR, MFIRIMR, MFIRICR
101 #define FRE (1 << 15) /* Frame Receive End */
102 #define TROV (1 << 11) /* Transfer Area Overflow */
103 #define xIR_9 (1 << 9)
104 #define TOT xIR_9 /* for SIR Timeout */
105 #define ABTD xIR_9 /* for MIR/FIR Abort Detection */
106 #define xIR_8 (1 << 8)
107 #define FER xIR_8 /* for SIR Framing Error */
108 #define CRCER xIR_8 /* for MIR/FIR CRC error */
109 #define FTE (1 << 7) /* Frame Transmit End */
110 #define xIR_MASK (FRE | TROV | xIR_9 | xIR_8 | FTE)
113 #define BRC_MASK (0x3F) /* mask for Baud Rate Count */
116 #define CRC_RST (1 << 15) /* CRC Engine Reset */
117 #define CRC_CT_MASK 0x0FFF /* mask for CRC Engine Input Data Count */
120 #define CRC_IN_MASK 0x0FFF /* mask for CRC Engine Input Data */
122 /************************************************************************
128 ************************************************************************/
137 struct sh_irda_xir_func {
138 int (*xir_fre) (struct sh_irda_self *self);
139 int (*xir_trov) (struct sh_irda_self *self);
140 int (*xir_9) (struct sh_irda_self *self);
141 int (*xir_8) (struct sh_irda_self *self);
142 int (*xir_fte) (struct sh_irda_self *self);
145 struct sh_irda_self {
146 void __iomem *membase;
150 struct net_device *ndev;
152 struct irlap_cb *irlap;
158 enum sh_irda_mode mode;
161 struct sh_irda_xir_func *xir_func;
164 /************************************************************************
170 ************************************************************************/
171 static void sh_irda_write(struct sh_irda_self *self, u32 offset, u16 data)
175 spin_lock_irqsave(&self->lock, flags);
176 iowrite16(data, self->membase + offset);
177 spin_unlock_irqrestore(&self->lock, flags);
180 static u16 sh_irda_read(struct sh_irda_self *self, u32 offset)
185 spin_lock_irqsave(&self->lock, flags);
186 ret = ioread16(self->membase + offset);
187 spin_unlock_irqrestore(&self->lock, flags);
192 static void sh_irda_update_bits(struct sh_irda_self *self, u32 offset,
198 spin_lock_irqsave(&self->lock, flags);
199 old = ioread16(self->membase + offset);
200 new = (old & ~mask) | data;
202 iowrite16(data, self->membase + offset);
203 spin_unlock_irqrestore(&self->lock, flags);
206 /************************************************************************
212 ************************************************************************/
213 /*=====================================
217 *=====================================*/
218 static void sh_irda_rcv_ctrl(struct sh_irda_self *self, int enable)
220 struct device *dev = &self->ndev->dev;
222 sh_irda_update_bits(self, IRRCTR, RE, enable ? RE : 0);
223 dev_dbg(dev, "recv %s\n", enable ? "enable" : "disable");
226 static int sh_irda_set_timeout(struct sh_irda_self *self, int interval)
228 struct device *dev = &self->ndev->dev;
230 if (SH_IRDA_SIR != self->mode)
233 if (interval < 0 || interval > 2) {
234 dev_err(dev, "unsupported timeout interval\n");
238 sh_irda_update_bits(self, IRCFR, RTO, interval << RTO_SHIFT);
242 static int sh_irda_set_baudrate(struct sh_irda_self *self, int baudrate)
244 struct device *dev = &self->ndev->dev;
250 if (SH_IRDA_SIR != self->mode) {
251 dev_err(dev, "it is not SIR mode\n");
256 * Baud rate (bits/s) =
257 * (48 MHz / 26) / (baud rate counter value + 1) x 16
259 val = (48000000 / 26 / 16 / baudrate) - 1;
260 dev_dbg(dev, "baudrate = %d, val = 0x%02x\n", baudrate, val);
262 sh_irda_update_bits(self, SIRBCR, BRC_MASK, val);
267 static int xir_get_rcv_length(struct sh_irda_self *self)
269 return RFL_MASK & sh_irda_read(self, IRRFLR);
272 /*=====================================
276 *=====================================*/
277 static int xir_fre(struct sh_irda_self *self)
279 struct device *dev = &self->ndev->dev;
280 dev_err(dev, "none mode: frame recv\n");
284 static int xir_trov(struct sh_irda_self *self)
286 struct device *dev = &self->ndev->dev;
287 dev_err(dev, "none mode: buffer ram over\n");
291 static int xir_9(struct sh_irda_self *self)
293 struct device *dev = &self->ndev->dev;
294 dev_err(dev, "none mode: time over\n");
298 static int xir_8(struct sh_irda_self *self)
300 struct device *dev = &self->ndev->dev;
301 dev_err(dev, "none mode: framing error\n");
305 static int xir_fte(struct sh_irda_self *self)
307 struct device *dev = &self->ndev->dev;
308 dev_err(dev, "none mode: frame transmit end\n");
312 static struct sh_irda_xir_func xir_func = {
314 .xir_trov = xir_trov,
320 /*=====================================
324 * MIR/FIR are not supported now
325 *=====================================*/
326 static struct sh_irda_xir_func mfir_func = {
328 .xir_trov = xir_trov,
334 /*=====================================
338 *=====================================*/
339 static int sir_fre(struct sh_irda_self *self)
341 struct device *dev = &self->ndev->dev;
343 u8 *data = (u8 *)&data16;
344 int len = xir_get_rcv_length(self);
347 if (len > IRDARAM_LEN)
350 dev_dbg(dev, "frame recv length = %d\n", len);
352 for (i = 0; i < len; i++) {
355 data16 = sh_irda_read(self, IRDARAM + i);
357 async_unwrap_char(self->ndev, &self->ndev->stats,
358 &self->rx_buff, data[j]);
360 self->ndev->last_rx = jiffies;
362 sh_irda_rcv_ctrl(self, 1);
367 static int sir_trov(struct sh_irda_self *self)
369 struct device *dev = &self->ndev->dev;
371 dev_err(dev, "buffer ram over\n");
372 sh_irda_rcv_ctrl(self, 1);
376 static int sir_tot(struct sh_irda_self *self)
378 struct device *dev = &self->ndev->dev;
380 dev_err(dev, "time over\n");
381 sh_irda_set_baudrate(self, 9600);
382 sh_irda_rcv_ctrl(self, 1);
386 static int sir_fer(struct sh_irda_self *self)
388 struct device *dev = &self->ndev->dev;
390 dev_err(dev, "framing error\n");
391 sh_irda_rcv_ctrl(self, 1);
395 static int sir_fte(struct sh_irda_self *self)
397 struct device *dev = &self->ndev->dev;
399 dev_dbg(dev, "frame transmit end\n");
400 netif_wake_queue(self->ndev);
405 static struct sh_irda_xir_func sir_func = {
407 .xir_trov = sir_trov,
413 static void sh_irda_set_mode(struct sh_irda_self *self, enum sh_irda_mode mode)
415 struct device *dev = &self->ndev->dev;
416 struct sh_irda_xir_func *func;
444 self->xir_func = func;
445 sh_irda_update_bits(self, IRTMR, TMD_MASK, data);
447 dev_dbg(dev, "switch to %s mode", name);
450 /************************************************************************
456 ************************************************************************/
457 static void sh_irda_set_irq_mask(struct sh_irda_self *self)
463 sh_irda_update_bits(self, IRTMR, xIM_MASK, xIM_MASK);
464 sh_irda_update_bits(self, SIRIMR, xIR_MASK, xIR_MASK);
465 sh_irda_update_bits(self, MFIRIMR, xIR_MASK, xIR_MASK);
468 sh_irda_update_bits(self, SIRICR, xIR_MASK, xIR_MASK);
469 sh_irda_update_bits(self, MFIRICR, xIR_MASK, xIR_MASK);
471 switch (self->mode) {
489 sh_irda_update_bits(self, IRTMR, tmr_hole, 0);
490 sh_irda_update_bits(self, xir_reg, xIR_MASK, 0);
494 static irqreturn_t sh_irda_irq(int irq, void *dev_id)
496 struct sh_irda_self *self = dev_id;
497 struct sh_irda_xir_func *func = self->xir_func;
498 u16 isr = sh_irda_read(self, SIRISR);
501 sh_irda_write(self, SIRICR, isr);
506 func->xir_trov(self);
517 /************************************************************************
523 ************************************************************************/
524 static void sh_irda_crc_reset(struct sh_irda_self *self)
526 sh_irda_write(self, CRCCTR, CRC_RST);
529 static void sh_irda_crc_add(struct sh_irda_self *self, u16 data)
531 sh_irda_write(self, CRCIR, data & CRC_IN_MASK);
534 static u16 sh_irda_crc_cnt(struct sh_irda_self *self)
536 return CRC_CT_MASK & sh_irda_read(self, CRCCTR);
539 static u16 sh_irda_crc_out(struct sh_irda_self *self)
541 return sh_irda_read(self, CRCOR);
544 static int sh_irda_crc_init(struct sh_irda_self *self)
546 struct device *dev = &self->ndev->dev;
550 sh_irda_crc_reset(self);
552 sh_irda_crc_add(self, 0xCC);
553 sh_irda_crc_add(self, 0xF5);
554 sh_irda_crc_add(self, 0xF1);
555 sh_irda_crc_add(self, 0xA7);
557 val = sh_irda_crc_cnt(self);
559 dev_err(dev, "CRC count error %x\n", val);
563 val = sh_irda_crc_out(self);
565 dev_err(dev, "CRC result error%x\n", val);
573 sh_irda_crc_reset(self);
577 /************************************************************************
583 ************************************************************************/
584 static void sh_irda_remove_iobuf(struct sh_irda_self *self)
586 kfree(self->rx_buff.head);
588 self->tx_buff.head = NULL;
589 self->tx_buff.data = NULL;
590 self->rx_buff.head = NULL;
591 self->rx_buff.data = NULL;
594 static int sh_irda_init_iobuf(struct sh_irda_self *self, int rxsize, int txsize)
596 if (self->rx_buff.head ||
597 self->tx_buff.head) {
598 dev_err(&self->ndev->dev, "iobuff has already existed.");
603 self->rx_buff.head = kmalloc(rxsize, GFP_KERNEL);
604 if (!self->rx_buff.head)
607 self->rx_buff.truesize = rxsize;
608 self->rx_buff.in_frame = FALSE;
609 self->rx_buff.state = OUTSIDE_FRAME;
610 self->rx_buff.data = self->rx_buff.head;
613 self->tx_buff.head = self->membase + IRDARAM;
614 self->tx_buff.truesize = IRDARAM_LEN;
619 /************************************************************************
622 net_device_ops function
625 ************************************************************************/
626 static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
628 struct sh_irda_self *self = netdev_priv(ndev);
629 struct device *dev = &self->ndev->dev;
630 int speed = irda_get_next_speed(skb);
633 dev_dbg(dev, "hard xmit\n");
635 netif_stop_queue(ndev);
636 sh_irda_rcv_ctrl(self, 0);
638 ret = sh_irda_set_baudrate(self, speed);
640 goto sh_irda_hard_xmit_end;
642 self->tx_buff.len = 0;
646 spin_lock_irqsave(&self->lock, flags);
647 self->tx_buff.len = async_wrap_skb(skb,
649 self->tx_buff.truesize);
650 spin_unlock_irqrestore(&self->lock, flags);
652 if (self->tx_buff.len > self->tx_buff.truesize)
653 self->tx_buff.len = self->tx_buff.truesize;
655 sh_irda_write(self, IRTFLR, self->tx_buff.len);
656 sh_irda_write(self, IRTCTR, ARMOD | TE);
658 goto sh_irda_hard_xmit_end;
664 sh_irda_hard_xmit_end:
665 sh_irda_set_baudrate(self, 9600);
666 netif_wake_queue(self->ndev);
667 sh_irda_rcv_ctrl(self, 1);
674 static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd)
679 * This function is needed for irda framework.
680 * But nothing to do now
685 static struct net_device_stats *sh_irda_stats(struct net_device *ndev)
687 struct sh_irda_self *self = netdev_priv(ndev);
689 return &self->ndev->stats;
692 static int sh_irda_open(struct net_device *ndev)
694 struct sh_irda_self *self = netdev_priv(ndev);
697 clk_enable(self->clk);
698 err = sh_irda_crc_init(self);
702 sh_irda_set_mode(self, SH_IRDA_SIR);
703 sh_irda_set_timeout(self, 2);
704 sh_irda_set_baudrate(self, 9600);
706 self->irlap = irlap_open(ndev, &self->qos, DRIVER_NAME);
712 netif_start_queue(ndev);
713 sh_irda_rcv_ctrl(self, 1);
714 sh_irda_set_irq_mask(self);
716 dev_info(&ndev->dev, "opened\n");
721 clk_disable(self->clk);
726 static int sh_irda_stop(struct net_device *ndev)
728 struct sh_irda_self *self = netdev_priv(ndev);
732 irlap_close(self->irlap);
736 netif_stop_queue(ndev);
738 dev_info(&ndev->dev, "stoped\n");
743 static const struct net_device_ops sh_irda_ndo = {
744 .ndo_open = sh_irda_open,
745 .ndo_stop = sh_irda_stop,
746 .ndo_start_xmit = sh_irda_hard_xmit,
747 .ndo_do_ioctl = sh_irda_ioctl,
748 .ndo_get_stats = sh_irda_stats,
751 /************************************************************************
754 platform_driver function
757 ************************************************************************/
758 static int __devinit sh_irda_probe(struct platform_device *pdev)
760 struct net_device *ndev;
761 struct sh_irda_self *self;
762 struct resource *res;
766 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
767 irq = platform_get_irq(pdev, 0);
768 if (!res || irq < 0) {
769 dev_err(&pdev->dev, "Not enough platform resources.\n");
773 ndev = alloc_irdadev(sizeof(*self));
777 self = netdev_priv(ndev);
778 self->membase = ioremap_nocache(res->start, resource_size(res));
779 if (!self->membase) {
781 dev_err(&pdev->dev, "Unable to ioremap.\n");
785 err = sh_irda_init_iobuf(self, IRDA_SKB_MAX_MTU, IRDA_SIR_MAX_FRAME);
789 self->clk = clk_get(&pdev->dev, NULL);
790 if (IS_ERR(self->clk)) {
791 dev_err(&pdev->dev, "cannot get irda clock\n");
795 irda_init_max_qos_capabilies(&self->qos);
797 ndev->netdev_ops = &sh_irda_ndo;
801 self->qos.baud_rate.bits &= IR_9600; /* FIXME */
802 self->qos.min_turn_time.bits = 1; /* 10 ms or more */
803 spin_lock_init(&self->lock);
805 irda_qos_bits_to_value(&self->qos);
807 err = register_netdev(ndev);
811 platform_set_drvdata(pdev, ndev);
813 if (request_irq(irq, sh_irda_irq, IRQF_DISABLED, "sh_irda", self)) {
814 dev_warn(&pdev->dev, "Unable to attach sh_irda interrupt\n");
818 dev_info(&pdev->dev, "SuperH IrDA probed\n");
825 sh_irda_remove_iobuf(self);
827 iounmap(self->membase);
834 static int __devexit sh_irda_remove(struct platform_device *pdev)
836 struct net_device *ndev = platform_get_drvdata(pdev);
837 struct sh_irda_self *self = netdev_priv(ndev);
842 unregister_netdev(ndev);
844 sh_irda_remove_iobuf(self);
845 iounmap(self->membase);
847 platform_set_drvdata(pdev, NULL);
852 static struct platform_driver sh_irda_driver = {
853 .probe = sh_irda_probe,
854 .remove = __devexit_p(sh_irda_remove),
860 static int __init sh_irda_init(void)
862 return platform_driver_register(&sh_irda_driver);
865 static void __exit sh_irda_exit(void)
867 platform_driver_unregister(&sh_irda_driver);
870 module_init(sh_irda_init);
871 module_exit(sh_irda_exit);
873 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
874 MODULE_DESCRIPTION("SuperH IrDA driver");
875 MODULE_LICENSE("GPL");