1 /*********************************************************************
3 * Filename: w83977af_ir.c
5 * Description: FIR driver for the Winbond W83977AF Super I/O chip
6 * Status: Experimental.
7 * Author: Paul VanderSpek
8 * Created at: Wed Nov 4 11:46:16 1998
9 * Modified at: Fri Jan 28 12:10:59 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998-1999 Rebel.com
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * Neither Paul VanderSpek nor Rebel.com admit liability nor provide
21 * warranty for any of this software. This material is provided "AS-IS"
24 * If you find bugs in this file, its very likely that the same bug
25 * will also be in pc87108.c since the implementations are quite
28 * Notice that all functions that needs to access the chip in _any_
29 * way, must save BSR register on entry, and restore it on exit.
30 * It is _very_ important to follow this policy!
34 * bank = inb( iobase+BSR);
36 * do_your_stuff_here();
38 * outb( bank, iobase+BSR);
40 ********************************************************************/
42 #include <linux/module.h>
43 #include <linux/kernel.h>
44 #include <linux/types.h>
45 #include <linux/skbuff.h>
46 #include <linux/netdevice.h>
47 #include <linux/ioport.h>
48 #include <linux/delay.h>
49 #include <linux/init.h>
50 #include <linux/interrupt.h>
51 #include <linux/rtnetlink.h>
52 #include <linux/dma-mapping.h>
53 #include <linux/gfp.h>
57 #include <asm/byteorder.h>
59 #include <net/irda/irda.h>
60 #include <net/irda/wrapper.h>
61 #include <net/irda/irda_device.h>
63 #include "w83977af_ir.h"
65 #define CONFIG_USE_W977_PNP /* Currently needed */
66 #define PIO_MAX_SPEED 115200
68 static char *driver_name = "w83977af_ir";
69 static int qos_mtt_bits = 0x07; /* 1 ms or more */
71 #define CHIP_IO_EXTENT 8
73 static unsigned int io[] = { 0x180, ~0, ~0, ~0 };
74 #ifdef CONFIG_ARCH_NETWINDER /* Adjust to NetWinder differences */
75 static unsigned int irq[] = { 6, 0, 0, 0 };
77 static unsigned int irq[] = { 11, 0, 0, 0 };
79 static unsigned int dma[] = { 1, 0, 0, 0 };
80 static unsigned int efbase[] = { W977_EFIO_BASE, W977_EFIO2_BASE };
81 static unsigned int efio = W977_EFIO_BASE;
83 static struct w83977af_ir *dev_self[] = { NULL, NULL, NULL, NULL};
86 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
88 static int w83977af_close(struct w83977af_ir *self);
89 static int w83977af_probe(int iobase, int irq, int dma);
90 static int w83977af_dma_receive(struct w83977af_ir *self);
91 static int w83977af_dma_receive_complete(struct w83977af_ir *self);
92 static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
93 struct net_device *dev);
94 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
95 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
96 static void w83977af_change_speed(struct w83977af_ir *self, __u32 speed);
97 static int w83977af_is_receiving(struct w83977af_ir *self);
99 static int w83977af_net_open(struct net_device *dev);
100 static int w83977af_net_close(struct net_device *dev);
101 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
104 * Function w83977af_init ()
106 * Initialize chip. Just try to find out how many chips we are dealing with
109 static int __init w83977af_init(void)
113 for (i=0; i < ARRAY_SIZE(dev_self) && io[i] < 2000; i++) {
114 if (w83977af_open(i, io[i], irq[i], dma[i]) == 0)
121 * Function w83977af_cleanup ()
123 * Close all configured chips
126 static void __exit w83977af_cleanup(void)
130 for (i=0; i < ARRAY_SIZE(dev_self); i++) {
132 w83977af_close(dev_self[i]);
136 static const struct net_device_ops w83977_netdev_ops = {
137 .ndo_open = w83977af_net_open,
138 .ndo_stop = w83977af_net_close,
139 .ndo_start_xmit = w83977af_hard_xmit,
140 .ndo_do_ioctl = w83977af_net_ioctl,
144 * Function w83977af_open (iobase, irq)
146 * Open driver instance
149 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
152 struct net_device *dev;
153 struct w83977af_ir *self;
156 /* Lock the port that we need */
157 if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) {
158 pr_debug("%s(), can't get iobase of 0x%03x\n",
163 if (w83977af_probe(iobase, irq, dma) == -1) {
168 * Allocate new instance of the driver
170 dev = alloc_irdadev(sizeof(struct w83977af_ir));
172 printk( KERN_ERR "IrDA: Can't allocate memory for "
173 "IrDA control block!\n");
178 self = netdev_priv(dev);
179 spin_lock_init(&self->lock);
183 self->io.fir_base = iobase;
185 self->io.fir_ext = CHIP_IO_EXTENT;
187 self->io.fifo_size = 32;
189 /* Initialize QoS for this device */
190 irda_init_max_qos_capabilies(&self->qos);
192 /* The only value we must override it the baudrate */
194 /* FIXME: The HP HDLS-1100 does not support 1152000! */
195 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
196 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
198 /* The HP HDLS-1100 needs 1 ms according to the specs */
199 self->qos.min_turn_time.bits = qos_mtt_bits;
200 irda_qos_bits_to_value(&self->qos);
202 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
203 self->rx_buff.truesize = 14384;
204 self->tx_buff.truesize = 4000;
206 /* Allocate memory if needed */
208 dma_zalloc_coherent(NULL, self->rx_buff.truesize,
209 &self->rx_buff_dma, GFP_KERNEL);
210 if (self->rx_buff.head == NULL) {
216 dma_zalloc_coherent(NULL, self->tx_buff.truesize,
217 &self->tx_buff_dma, GFP_KERNEL);
218 if (self->tx_buff.head == NULL) {
223 self->rx_buff.in_frame = FALSE;
224 self->rx_buff.state = OUTSIDE_FRAME;
225 self->tx_buff.data = self->tx_buff.head;
226 self->rx_buff.data = self->rx_buff.head;
229 dev->netdev_ops = &w83977_netdev_ops;
231 err = register_netdev(dev);
233 net_err_ratelimited("%s(), register_netdevice() failed!\n",
237 net_info_ratelimited("IrDA: Registered device %s\n", dev->name);
239 /* Need to store self somewhere */
244 dma_free_coherent(NULL, self->tx_buff.truesize,
245 self->tx_buff.head, self->tx_buff_dma);
247 dma_free_coherent(NULL, self->rx_buff.truesize,
248 self->rx_buff.head, self->rx_buff_dma);
252 release_region(iobase, CHIP_IO_EXTENT);
257 * Function w83977af_close (self)
259 * Close driver instance
262 static int w83977af_close(struct w83977af_ir *self)
266 iobase = self->io.fir_base;
268 #ifdef CONFIG_USE_W977_PNP
269 /* enter PnP configuration mode */
270 w977_efm_enter(efio);
272 w977_select_device(W977_DEVICE_IR, efio);
274 /* Deactivate device */
275 w977_write_reg(0x30, 0x00, efio);
278 #endif /* CONFIG_USE_W977_PNP */
280 /* Remove netdevice */
281 unregister_netdev(self->netdev);
283 /* Release the PORT that this driver is using */
284 pr_debug("%s(), Releasing Region %03x\n",
285 __func__ , self->io.fir_base);
286 release_region(self->io.fir_base, self->io.fir_ext);
288 if (self->tx_buff.head)
289 dma_free_coherent(NULL, self->tx_buff.truesize,
290 self->tx_buff.head, self->tx_buff_dma);
292 if (self->rx_buff.head)
293 dma_free_coherent(NULL, self->rx_buff.truesize,
294 self->rx_buff.head, self->rx_buff_dma);
296 free_netdev(self->netdev);
301 static int w83977af_probe(int iobase, int irq, int dma)
306 for (i=0; i < 2; i++) {
307 #ifdef CONFIG_USE_W977_PNP
308 /* Enter PnP configuration mode */
309 w977_efm_enter(efbase[i]);
311 w977_select_device(W977_DEVICE_IR, efbase[i]);
313 /* Configure PnP port, IRQ, and DMA channel */
314 w977_write_reg(0x60, (iobase >> 8) & 0xff, efbase[i]);
315 w977_write_reg(0x61, (iobase) & 0xff, efbase[i]);
317 w977_write_reg(0x70, irq, efbase[i]);
318 #ifdef CONFIG_ARCH_NETWINDER
319 /* Netwinder uses 1 higher than Linux */
320 w977_write_reg(0x74, dma+1, efbase[i]);
322 w977_write_reg(0x74, dma, efbase[i]);
323 #endif /* CONFIG_ARCH_NETWINDER */
324 w977_write_reg(0x75, 0x04, efbase[i]); /* Disable Tx DMA */
326 /* Set append hardware CRC, enable IR bank selection */
327 w977_write_reg(0xf0, APEDCRC|ENBNKSEL, efbase[i]);
329 /* Activate device */
330 w977_write_reg(0x30, 0x01, efbase[i]);
332 w977_efm_exit(efbase[i]);
333 #endif /* CONFIG_USE_W977_PNP */
334 /* Disable Advanced mode */
335 switch_bank(iobase, SET2);
336 outb(iobase+2, 0x00);
338 /* Turn on UART (global) interrupts */
339 switch_bank(iobase, SET0);
340 outb(HCR_EN_IRQ, iobase+HCR);
342 /* Switch to advanced mode */
343 switch_bank(iobase, SET2);
344 outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1);
346 /* Set default IR-mode */
347 switch_bank(iobase, SET0);
348 outb(HCR_SIR, iobase+HCR);
350 /* Read the Advanced IR ID */
351 switch_bank(iobase, SET3);
352 version = inb(iobase+AUID);
355 if (0x10 == (version & 0xf0)) {
358 /* Set FIFO size to 32 */
359 switch_bank(iobase, SET2);
360 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
362 /* Set FIFO threshold to TX17, RX16 */
363 switch_bank(iobase, SET0);
364 outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST|
365 UFR_EN_FIFO,iobase+UFR);
367 /* Receiver frame length */
368 switch_bank(iobase, SET4);
369 outb(2048 & 0xff, iobase+6);
370 outb((2048 >> 8) & 0x1f, iobase+7);
373 * Init HP HSDL-1100 transceiver.
375 * Set IRX_MSL since we have 2 * receive paths IRRX,
376 * and IRRXH. Clear IRSL0D since we want IRSL0 * to
377 * be a input pin used for IRRXH
379 * IRRX pin 37 connected to receiver
380 * IRTX pin 38 connected to transmitter
381 * FIRRX pin 39 connected to receiver (IRSL0)
382 * CIRRX pin 40 connected to pin 37
384 switch_bank(iobase, SET7);
385 outb(0x40, iobase+7);
387 net_info_ratelimited("W83977AF (IR) driver loaded. Version: 0x%02x\n",
392 /* Try next extented function register address */
393 pr_debug("%s(), Wrong chip version", __func__);
399 static void w83977af_change_speed(struct w83977af_ir *self, __u32 speed)
401 int ir_mode = HCR_SIR;
405 iobase = self->io.fir_base;
407 /* Update accounting for new speed */
408 self->io.speed = speed;
410 /* Save current bank */
411 set = inb(iobase+SSR);
413 /* Disable interrupts */
414 switch_bank(iobase, SET0);
418 switch_bank(iobase, SET2);
419 outb(0x00, iobase+ABHL);
422 case 9600: outb(0x0c, iobase+ABLL); break;
423 case 19200: outb(0x06, iobase+ABLL); break;
424 case 38400: outb(0x03, iobase+ABLL); break;
425 case 57600: outb(0x02, iobase+ABLL); break;
426 case 115200: outb(0x01, iobase+ABLL); break;
428 ir_mode = HCR_MIR_576;
429 pr_debug("%s(), handling baud of 576000\n", __func__);
432 ir_mode = HCR_MIR_1152;
433 pr_debug("%s(), handling baud of 1152000\n", __func__);
437 pr_debug("%s(), handling baud of 4000000\n", __func__);
441 pr_debug("%s(), unknown baud rate of %d\n", __func__ , speed);
446 switch_bank(iobase, SET0);
447 outb(ir_mode, iobase+HCR);
449 /* set FIFO size to 32 */
450 switch_bank(iobase, SET2);
451 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
453 /* set FIFO threshold to TX17, RX16 */
454 switch_bank(iobase, SET0);
455 outb(0x00, iobase+UFR); /* Reset */
456 outb(UFR_EN_FIFO, iobase+UFR); /* First we must enable FIFO */
457 outb(0xa7, iobase+UFR);
459 netif_wake_queue(self->netdev);
461 /* Enable some interrupts so we can receive frames */
462 switch_bank(iobase, SET0);
463 if (speed > PIO_MAX_SPEED) {
464 outb(ICR_EFSFI, iobase+ICR);
465 w83977af_dma_receive(self);
467 outb(ICR_ERBRI, iobase+ICR);
470 outb(set, iobase+SSR);
474 * Function w83977af_hard_xmit (skb, dev)
476 * Sets up a DMA transfer to send the current frame.
479 static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
480 struct net_device *dev)
482 struct w83977af_ir *self;
488 self = netdev_priv(dev);
490 iobase = self->io.fir_base;
492 pr_debug("%s(%ld), skb->len=%d\n", __func__ , jiffies,
495 /* Lock transmit buffer */
496 netif_stop_queue(dev);
498 /* Check if we need to change the speed */
499 speed = irda_get_next_speed(skb);
500 if ((speed != self->io.speed) && (speed != -1)) {
501 /* Check for empty frame */
503 w83977af_change_speed(self, speed);
507 self->new_speed = speed;
510 /* Save current set */
511 set = inb(iobase+SSR);
513 /* Decide if we should use PIO or DMA transfer */
514 if (self->io.speed > PIO_MAX_SPEED) {
515 self->tx_buff.data = self->tx_buff.head;
516 skb_copy_from_linear_data(skb, self->tx_buff.data, skb->len);
517 self->tx_buff.len = skb->len;
519 mtt = irda_get_mtt(skb);
520 pr_debug("%s(%ld), mtt=%d\n", __func__ , jiffies, mtt);
526 /* Enable DMA interrupt */
527 switch_bank(iobase, SET0);
528 outb(ICR_EDMAI, iobase+ICR);
529 w83977af_dma_write(self, iobase);
531 self->tx_buff.data = self->tx_buff.head;
532 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
533 self->tx_buff.truesize);
535 /* Add interrupt on tx low level (will fire immediately) */
536 switch_bank(iobase, SET0);
537 outb(ICR_ETXTHI, iobase+ICR);
541 /* Restore set register */
542 outb(set, iobase+SSR);
548 * Function w83977af_dma_write (self, iobase)
550 * Send frame using DMA
553 static void w83977af_dma_write(struct w83977af_ir *self, int iobase)
556 pr_debug("%s(), len=%d\n", __func__ , self->tx_buff.len);
558 /* Save current set */
559 set = inb(iobase+SSR);
562 switch_bank(iobase, SET0);
563 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
565 /* Choose transmit DMA channel */
566 switch_bank(iobase, SET2);
567 outb(ADCR1_D_CHSW|/*ADCR1_DMA_F|*/ADCR1_ADV_SL, iobase+ADCR1);
568 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
570 self->io.direction = IO_XMIT;
573 switch_bank(iobase, SET0);
574 outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR);
576 /* Restore set register */
577 outb(set, iobase+SSR);
581 * Function w83977af_pio_write (iobase, buf, len, fifo_size)
586 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
591 /* Save current bank */
592 set = inb(iobase+SSR);
594 switch_bank(iobase, SET0);
595 if (!(inb_p(iobase+USR) & USR_TSRE)) {
596 pr_debug("%s(), warning, FIFO not empty yet!\n", __func__);
599 pr_debug("%s(), %d bytes left in tx fifo\n",
600 __func__ , fifo_size);
603 /* Fill FIFO with current frame */
604 while ((fifo_size-- > 0) && (actual < len)) {
605 /* Transmit next byte */
606 outb(buf[actual++], iobase+TBR);
609 pr_debug("%s(), fifo_size %d ; %d sent of %d\n",
610 __func__ , fifo_size, actual, len);
613 outb(set, iobase+SSR);
619 * Function w83977af_dma_xmit_complete (self)
621 * The transfer of a frame in finished. So do the necessary things
625 static void w83977af_dma_xmit_complete(struct w83977af_ir *self)
630 pr_debug("%s(%ld)\n", __func__ , jiffies);
632 IRDA_ASSERT(self != NULL, return;);
634 iobase = self->io.fir_base;
636 /* Save current set */
637 set = inb(iobase+SSR);
640 switch_bank(iobase, SET0);
641 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
643 /* Check for underrun! */
644 if (inb(iobase+AUDR) & AUDR_UNDR) {
645 pr_debug("%s(), Transmit underrun!\n", __func__);
647 self->netdev->stats.tx_errors++;
648 self->netdev->stats.tx_fifo_errors++;
650 /* Clear bit, by writing 1 to it */
651 outb(AUDR_UNDR, iobase+AUDR);
653 self->netdev->stats.tx_packets++;
656 if (self->new_speed) {
657 w83977af_change_speed(self, self->new_speed);
661 /* Unlock tx_buff and request another frame */
662 /* Tell the network layer, that we want more frames */
663 netif_wake_queue(self->netdev);
666 outb(set, iobase+SSR);
670 * Function w83977af_dma_receive (self)
672 * Get ready for receiving a frame. The device will initiate a DMA
673 * if it starts to receive a frame.
676 static int w83977af_dma_receive(struct w83977af_ir *self)
680 #ifdef CONFIG_ARCH_NETWINDER
684 IRDA_ASSERT(self != NULL, return -1;);
686 pr_debug("%s\n", __func__);
688 iobase= self->io.fir_base;
690 /* Save current set */
691 set = inb(iobase+SSR);
694 switch_bank(iobase, SET0);
695 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
697 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
698 switch_bank(iobase, SET2);
699 outb((inb(iobase+ADCR1) & ~ADCR1_D_CHSW)/*|ADCR1_DMA_F*/|ADCR1_ADV_SL,
702 self->io.direction = IO_RECV;
703 self->rx_buff.data = self->rx_buff.head;
705 #ifdef CONFIG_ARCH_NETWINDER
706 spin_lock_irqsave(&self->lock, flags);
708 disable_dma(self->io.dma);
709 clear_dma_ff(self->io.dma);
710 set_dma_mode(self->io.dma, DMA_MODE_READ);
711 set_dma_addr(self->io.dma, self->rx_buff_dma);
712 set_dma_count(self->io.dma, self->rx_buff.truesize);
714 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
718 * Reset Rx FIFO. This will also flush the ST_FIFO, it's very
719 * important that we don't reset the Tx FIFO since it might not
720 * be finished transmitting yet
722 switch_bank(iobase, SET0);
723 outb(UFR_RXTL|UFR_TXTL|UFR_RXF_RST|UFR_EN_FIFO, iobase+UFR);
724 self->st_fifo.len = self->st_fifo.tail = self->st_fifo.head = 0;
727 switch_bank(iobase, SET0);
728 #ifdef CONFIG_ARCH_NETWINDER
729 hcr = inb(iobase+HCR);
730 outb(hcr | HCR_EN_DMA, iobase+HCR);
731 enable_dma(self->io.dma);
732 spin_unlock_irqrestore(&self->lock, flags);
734 outb(inb(iobase+HCR) | HCR_EN_DMA, iobase+HCR);
737 outb(set, iobase+SSR);
743 * Function w83977af_receive_complete (self)
745 * Finished with receiving a frame
748 static int w83977af_dma_receive_complete(struct w83977af_ir *self)
751 struct st_fifo *st_fifo;
757 pr_debug("%s\n", __func__);
759 st_fifo = &self->st_fifo;
761 iobase = self->io.fir_base;
763 /* Save current set */
764 set = inb(iobase+SSR);
766 iobase = self->io.fir_base;
768 /* Read status FIFO */
769 switch_bank(iobase, SET5);
770 while ((status = inb(iobase+FS_FO)) & FS_FO_FSFDR) {
771 st_fifo->entries[st_fifo->tail].status = status;
773 st_fifo->entries[st_fifo->tail].len = inb(iobase+RFLFL);
774 st_fifo->entries[st_fifo->tail].len |= inb(iobase+RFLFH) << 8;
780 while (st_fifo->len) {
781 /* Get first entry */
782 status = st_fifo->entries[st_fifo->head].status;
783 len = st_fifo->entries[st_fifo->head].len;
787 /* Check for errors */
788 if (status & FS_FO_ERR_MSK) {
789 if (status & FS_FO_LST_FR) {
790 /* Add number of lost frames to stats */
791 self->netdev->stats.rx_errors += len;
794 self->netdev->stats.rx_errors++;
796 self->rx_buff.data += len;
798 if (status & FS_FO_MX_LEX)
799 self->netdev->stats.rx_length_errors++;
801 if (status & FS_FO_PHY_ERR)
802 self->netdev->stats.rx_frame_errors++;
804 if (status & FS_FO_CRC_ERR)
805 self->netdev->stats.rx_crc_errors++;
807 /* The errors below can be reported in both cases */
808 if (status & FS_FO_RX_OV)
809 self->netdev->stats.rx_fifo_errors++;
811 if (status & FS_FO_FSF_OV)
812 self->netdev->stats.rx_fifo_errors++;
815 /* Check if we have transferred all data to memory */
816 switch_bank(iobase, SET0);
817 if (inb(iobase+USR) & USR_RDR) {
818 udelay(80); /* Should be enough!? */
821 skb = dev_alloc_skb(len+1);
824 "%s(), memory squeeze, dropping frame.\n", __func__);
825 /* Restore set register */
826 outb(set, iobase+SSR);
831 /* Align to 20 bytes */
834 /* Copy frame without CRC */
835 if (self->io.speed < 4000000) {
837 skb_copy_to_linear_data(skb,
842 skb_copy_to_linear_data(skb,
847 /* Move to next frame */
848 self->rx_buff.data += len;
849 self->netdev->stats.rx_packets++;
851 skb->dev = self->netdev;
852 skb_reset_mac_header(skb);
853 skb->protocol = htons(ETH_P_IRDA);
857 /* Restore set register */
858 outb(set, iobase+SSR);
864 * Function pc87108_pio_receive (self)
866 * Receive all data in receiver FIFO
869 static void w83977af_pio_receive(struct w83977af_ir *self)
874 IRDA_ASSERT(self != NULL, return;);
876 iobase = self->io.fir_base;
878 /* Receive all characters in Rx FIFO */
880 byte = inb(iobase+RBR);
881 async_unwrap_char(self->netdev, &self->netdev->stats, &self->rx_buff,
883 } while (inb(iobase+USR) & USR_RDR); /* Data available */
887 * Function w83977af_sir_interrupt (self, eir)
889 * Handle SIR interrupt
892 static __u8 w83977af_sir_interrupt(struct w83977af_ir *self, int isr)
899 pr_debug("%s(), isr=%#x\n", __func__ , isr);
901 iobase = self->io.fir_base;
902 /* Transmit FIFO low on data */
903 if (isr & ISR_TXTH_I) {
904 /* Write data left in transmit buffer */
905 actual = w83977af_pio_write(self->io.fir_base,
910 self->tx_buff.data += actual;
911 self->tx_buff.len -= actual;
913 self->io.direction = IO_XMIT;
915 /* Check if finished */
916 if (self->tx_buff.len > 0) {
917 new_icr |= ICR_ETXTHI;
919 set = inb(iobase+SSR);
920 switch_bank(iobase, SET0);
921 outb(AUDR_SFEND, iobase+AUDR);
922 outb(set, iobase+SSR);
924 self->netdev->stats.tx_packets++;
926 /* Feed me more packets */
927 netif_wake_queue(self->netdev);
928 new_icr |= ICR_ETBREI;
931 /* Check if transmission has completed */
932 if (isr & ISR_TXEMP_I) {
933 /* Check if we need to change the speed? */
934 if (self->new_speed) {
935 pr_debug("%s(), Changing speed!\n", __func__);
936 w83977af_change_speed(self, self->new_speed);
940 /* Turn around and get ready to receive some data */
941 self->io.direction = IO_RECV;
942 new_icr |= ICR_ERBRI;
945 /* Rx FIFO threshold or timeout */
946 if (isr & ISR_RXTH_I) {
947 w83977af_pio_receive(self);
950 new_icr |= ICR_ERBRI;
956 * Function pc87108_fir_interrupt (self, eir)
958 * Handle MIR/FIR interrupt
961 static __u8 w83977af_fir_interrupt(struct w83977af_ir *self, int isr)
967 iobase = self->io.fir_base;
968 set = inb(iobase+SSR);
970 /* End of frame detected in FIFO */
971 if (isr & (ISR_FEND_I|ISR_FSF_I)) {
972 if (w83977af_dma_receive_complete(self)) {
974 /* Wait for next status FIFO interrupt */
975 new_icr |= ICR_EFSFI;
977 /* DMA not finished yet */
979 /* Set timer value, resolution 1 ms */
980 switch_bank(iobase, SET4);
981 outb(0x01, iobase+TMRL); /* 1 ms */
982 outb(0x00, iobase+TMRH);
985 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
987 new_icr |= ICR_ETMRI;
991 if (isr & ISR_TMR_I) {
993 switch_bank(iobase, SET4);
994 outb(0, iobase+IR_MSL);
996 /* Clear timer event */
997 /* switch_bank(iobase, SET0); */
998 /* outb(ASCR_CTE, iobase+ASCR); */
1000 /* Check if this is a TX timer interrupt */
1001 if (self->io.direction == IO_XMIT) {
1002 w83977af_dma_write(self, iobase);
1004 new_icr |= ICR_EDMAI;
1006 /* Check if DMA has now finished */
1007 w83977af_dma_receive_complete(self);
1009 new_icr |= ICR_EFSFI;
1012 /* Finished with DMA */
1013 if (isr & ISR_DMA_I) {
1014 w83977af_dma_xmit_complete(self);
1016 /* Check if there are more frames to be transmitted */
1017 /* if (irda_device_txqueue_empty(self)) { */
1019 /* Prepare for receive
1021 * ** Netwinder Tx DMA likes that we do this anyway **
1023 w83977af_dma_receive(self);
1024 new_icr = ICR_EFSFI;
1029 outb(set, iobase+SSR);
1035 * Function w83977af_interrupt (irq, dev_id, regs)
1037 * An interrupt from the chip has arrived. Time to do some work
1040 static irqreturn_t w83977af_interrupt(int irq, void *dev_id)
1042 struct net_device *dev = dev_id;
1043 struct w83977af_ir *self;
1047 self = netdev_priv(dev);
1049 iobase = self->io.fir_base;
1051 /* Save current bank */
1052 set = inb(iobase+SSR);
1053 switch_bank(iobase, SET0);
1055 icr = inb(iobase+ICR);
1056 isr = inb(iobase+ISR) & icr; /* Mask out the interesting ones */
1058 outb(0, iobase+ICR); /* Disable interrupts */
1061 /* Dispatch interrupt handler for the current speed */
1062 if (self->io.speed > PIO_MAX_SPEED )
1063 icr = w83977af_fir_interrupt(self, isr);
1065 icr = w83977af_sir_interrupt(self, isr);
1068 outb(icr, iobase+ICR); /* Restore (new) interrupts */
1069 outb(set, iobase+SSR); /* Restore bank register */
1070 return IRQ_RETVAL(isr);
1074 * Function w83977af_is_receiving (self)
1076 * Return TRUE is we are currently receiving a frame
1079 static int w83977af_is_receiving(struct w83977af_ir *self)
1085 IRDA_ASSERT(self != NULL, return FALSE;);
1087 if (self->io.speed > 115200) {
1088 iobase = self->io.fir_base;
1090 /* Check if rx FIFO is not empty */
1091 set = inb(iobase+SSR);
1092 switch_bank(iobase, SET2);
1093 if ((inb(iobase+RXFDTH) & 0x3f) != 0) {
1094 /* We are receiving something */
1097 outb(set, iobase+SSR);
1099 status = (self->rx_buff.state != OUTSIDE_FRAME);
1105 * Function w83977af_net_open (dev)
1110 static int w83977af_net_open(struct net_device *dev)
1112 struct w83977af_ir *self;
1118 IRDA_ASSERT(dev != NULL, return -1;);
1119 self = netdev_priv(dev);
1121 IRDA_ASSERT(self != NULL, return 0;);
1123 iobase = self->io.fir_base;
1125 if (request_irq(self->io.irq, w83977af_interrupt, 0, dev->name,
1130 * Always allocate the DMA channel after the IRQ,
1131 * and clean up on failure.
1133 if (request_dma(self->io.dma, dev->name)) {
1134 free_irq(self->io.irq, dev);
1138 /* Save current set */
1139 set = inb(iobase+SSR);
1141 /* Enable some interrupts so we can receive frames again */
1142 switch_bank(iobase, SET0);
1143 if (self->io.speed > 115200) {
1144 outb(ICR_EFSFI, iobase+ICR);
1145 w83977af_dma_receive(self);
1147 outb(ICR_ERBRI, iobase+ICR);
1149 /* Restore bank register */
1150 outb(set, iobase+SSR);
1152 /* Ready to play! */
1153 netif_start_queue(dev);
1155 /* Give self a hardware name */
1156 sprintf(hwname, "w83977af @ 0x%03x", self->io.fir_base);
1159 * Open new IrLAP layer instance, now that everything should be
1160 * initialized properly
1162 self->irlap = irlap_open(dev, &self->qos, hwname);
1168 * Function w83977af_net_close (dev)
1173 static int w83977af_net_close(struct net_device *dev)
1175 struct w83977af_ir *self;
1179 IRDA_ASSERT(dev != NULL, return -1;);
1181 self = netdev_priv(dev);
1183 IRDA_ASSERT(self != NULL, return 0;);
1185 iobase = self->io.fir_base;
1188 netif_stop_queue(dev);
1190 /* Stop and remove instance of IrLAP */
1192 irlap_close(self->irlap);
1195 disable_dma(self->io.dma);
1197 /* Save current set */
1198 set = inb(iobase+SSR);
1200 /* Disable interrupts */
1201 switch_bank(iobase, SET0);
1202 outb(0, iobase+ICR);
1204 free_irq(self->io.irq, dev);
1205 free_dma(self->io.dma);
1207 /* Restore bank register */
1208 outb(set, iobase+SSR);
1214 * Function w83977af_net_ioctl (dev, rq, cmd)
1216 * Process IOCTL commands for this device
1219 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1221 struct if_irda_req *irq = (struct if_irda_req *) rq;
1222 struct w83977af_ir *self;
1223 unsigned long flags;
1226 IRDA_ASSERT(dev != NULL, return -1;);
1228 self = netdev_priv(dev);
1230 IRDA_ASSERT(self != NULL, return -1;);
1232 pr_debug("%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd);
1234 spin_lock_irqsave(&self->lock, flags);
1237 case SIOCSBANDWIDTH: /* Set bandwidth */
1238 if (!capable(CAP_NET_ADMIN)) {
1242 w83977af_change_speed(self, irq->ifr_baudrate);
1244 case SIOCSMEDIABUSY: /* Set media busy */
1245 if (!capable(CAP_NET_ADMIN)) {
1249 irda_device_set_media_busy(self->netdev, TRUE);
1251 case SIOCGRECEIVING: /* Check if we are receiving right now */
1252 irq->ifr_receiving = w83977af_is_receiving(self);
1258 spin_unlock_irqrestore(&self->lock, flags);
1262 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
1263 MODULE_DESCRIPTION("Winbond W83977AF IrDA Device Driver");
1264 MODULE_LICENSE("GPL");
1267 module_param(qos_mtt_bits, int, 0);
1268 MODULE_PARM_DESC(qos_mtt_bits, "Mimimum Turn Time");
1269 module_param_array(io, int, NULL, 0);
1270 MODULE_PARM_DESC(io, "Base I/O addresses");
1271 module_param_array(irq, int, NULL, 0);
1272 MODULE_PARM_DESC(irq, "IRQ lines");
1275 * Function init_module (void)
1280 module_init(w83977af_init);
1283 * Function cleanup_module (void)
1288 module_exit(w83977af_cleanup);