1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/pkt_sched.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
43 #include <scsi/fc/fc_fcoe.h>
46 #include "ixgbe_common.h"
48 char ixgbe_driver_name[] = "ixgbe";
49 static const char ixgbe_driver_string[] =
50 "Intel(R) 10 Gigabit PCI Express Network Driver";
52 #define DRV_VERSION "2.0.37-k2"
53 const char ixgbe_driver_version[] = DRV_VERSION;
54 static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation.";
56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598] = &ixgbe_82598_info,
58 [board_82599] = &ixgbe_82599_info,
61 /* ixgbe_pci_tbl - PCI Device ID Table
63 * Wildcard entries (PCI_ANY_ID) should come last
64 * Last entry must be all 0s
66 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
67 * Class, Class Mask, private data (not used) }
69 static struct pci_device_id ixgbe_pci_tbl[] = {
70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
72 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
74 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
76 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
78 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2),
80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
84 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4),
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM),
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4),
103 /* required last entry */
106 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
108 #ifdef CONFIG_IXGBE_DCA
109 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
111 static struct notifier_block dca_notifier = {
112 .notifier_call = ixgbe_notify_dca,
118 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
119 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
120 MODULE_LICENSE("GPL");
121 MODULE_VERSION(DRV_VERSION);
123 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
125 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
129 /* Let firmware take over control of h/w */
130 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
131 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
132 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
135 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
139 /* Let firmware know the driver has taken over */
140 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
141 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
142 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
146 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
147 * @adapter: pointer to adapter struct
148 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
149 * @queue: queue to map the corresponding interrupt to
150 * @msix_vector: the vector to map to the corresponding queue
153 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
154 u8 queue, u8 msix_vector)
157 struct ixgbe_hw *hw = &adapter->hw;
158 switch (hw->mac.type) {
159 case ixgbe_mac_82598EB:
160 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
163 index = (((direction * 64) + queue) >> 2) & 0x1F;
164 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
165 ivar &= ~(0xFF << (8 * (queue & 0x3)));
166 ivar |= (msix_vector << (8 * (queue & 0x3)));
167 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
169 case ixgbe_mac_82599EB:
170 if (direction == -1) {
172 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
173 index = ((queue & 1) * 8);
174 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
175 ivar &= ~(0xFF << index);
176 ivar |= (msix_vector << index);
177 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
180 /* tx or rx causes */
181 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
182 index = ((16 * (queue & 1)) + (8 * direction));
183 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
184 ivar &= ~(0xFF << index);
185 ivar |= (msix_vector << index);
186 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
194 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
199 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
200 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
201 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
203 mask = (qmask & 0xFFFFFFFF);
204 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
205 mask = (qmask >> 32);
206 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
210 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
211 struct ixgbe_tx_buffer
214 tx_buffer_info->dma = 0;
215 if (tx_buffer_info->skb) {
216 skb_dma_unmap(&adapter->pdev->dev, tx_buffer_info->skb,
218 dev_kfree_skb_any(tx_buffer_info->skb);
219 tx_buffer_info->skb = NULL;
221 tx_buffer_info->time_stamp = 0;
222 /* tx_buffer_info must be completely set up in the transmit path */
225 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
226 struct ixgbe_ring *tx_ring,
229 struct ixgbe_hw *hw = &adapter->hw;
231 /* Detect a transmit hang in hardware, this serializes the
232 * check with the clearing of time_stamp and movement of eop */
233 adapter->detect_tx_hung = false;
234 if (tx_ring->tx_buffer_info[eop].time_stamp &&
235 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
236 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
237 /* detected Tx unit hang */
238 union ixgbe_adv_tx_desc *tx_desc;
239 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
240 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
242 " TDH, TDT <%x>, <%x>\n"
243 " next_to_use <%x>\n"
244 " next_to_clean <%x>\n"
245 "tx_buffer_info[next_to_clean]\n"
246 " time_stamp <%lx>\n"
248 tx_ring->queue_index,
249 IXGBE_READ_REG(hw, tx_ring->head),
250 IXGBE_READ_REG(hw, tx_ring->tail),
251 tx_ring->next_to_use, eop,
252 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
259 #define IXGBE_MAX_TXD_PWR 14
260 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
262 /* Tx Descriptors needed, worst case */
263 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
264 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
265 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
266 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
268 static void ixgbe_tx_timeout(struct net_device *netdev);
271 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
272 * @q_vector: structure containing interrupt and ring information
273 * @tx_ring: tx ring to clean
275 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
276 struct ixgbe_ring *tx_ring)
278 struct ixgbe_adapter *adapter = q_vector->adapter;
279 struct net_device *netdev = adapter->netdev;
280 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
281 struct ixgbe_tx_buffer *tx_buffer_info;
282 unsigned int i, eop, count = 0;
283 unsigned int total_bytes = 0, total_packets = 0;
285 i = tx_ring->next_to_clean;
286 eop = tx_ring->tx_buffer_info[i].next_to_watch;
287 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
289 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
290 (count < tx_ring->work_limit)) {
291 bool cleaned = false;
292 for ( ; !cleaned; count++) {
294 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
295 tx_buffer_info = &tx_ring->tx_buffer_info[i];
296 cleaned = (i == eop);
297 skb = tx_buffer_info->skb;
299 if (cleaned && skb) {
300 unsigned int segs, bytecount;
301 unsigned int hlen = skb_headlen(skb);
303 /* gso_segs is currently only valid for tcp */
304 segs = skb_shinfo(skb)->gso_segs ?: 1;
306 /* adjust for FCoE Sequence Offload */
307 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
308 && (skb->protocol == htons(ETH_P_FCOE)) &&
310 hlen = skb_transport_offset(skb) +
311 sizeof(struct fc_frame_header) +
312 sizeof(struct fcoe_crc_eof);
313 segs = DIV_ROUND_UP(skb->len - hlen,
314 skb_shinfo(skb)->gso_size);
316 #endif /* IXGBE_FCOE */
317 /* multiply data chunks by size of headers */
318 bytecount = ((segs - 1) * hlen) + skb->len;
319 total_packets += segs;
320 total_bytes += bytecount;
323 ixgbe_unmap_and_free_tx_resource(adapter,
326 tx_desc->wb.status = 0;
329 if (i == tx_ring->count)
333 eop = tx_ring->tx_buffer_info[i].next_to_watch;
334 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
337 tx_ring->next_to_clean = i;
339 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
340 if (unlikely(count && netif_carrier_ok(netdev) &&
341 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
342 /* Make sure that anybody stopping the queue after this
343 * sees the new next_to_clean.
346 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
347 !test_bit(__IXGBE_DOWN, &adapter->state)) {
348 netif_wake_subqueue(netdev, tx_ring->queue_index);
349 ++adapter->restart_queue;
353 if (adapter->detect_tx_hung) {
354 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
355 /* schedule immediate reset if we believe we hung */
357 "tx hang %d detected, resetting adapter\n",
358 adapter->tx_timeout_count + 1);
359 ixgbe_tx_timeout(adapter->netdev);
363 /* re-arm the interrupt */
364 if (count >= tx_ring->work_limit)
365 ixgbe_irq_rearm_queues(adapter, ((u64)1 << q_vector->v_idx));
367 tx_ring->total_bytes += total_bytes;
368 tx_ring->total_packets += total_packets;
369 tx_ring->stats.packets += total_packets;
370 tx_ring->stats.bytes += total_bytes;
371 adapter->net_stats.tx_bytes += total_bytes;
372 adapter->net_stats.tx_packets += total_packets;
373 return (count < tx_ring->work_limit);
376 #ifdef CONFIG_IXGBE_DCA
377 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
378 struct ixgbe_ring *rx_ring)
382 int q = rx_ring - adapter->rx_ring;
384 if (rx_ring->cpu != cpu) {
385 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
386 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
387 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
388 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
389 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
390 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599;
391 rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
392 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599);
394 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
395 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
396 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
397 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
398 IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
399 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
405 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
406 struct ixgbe_ring *tx_ring)
410 int q = tx_ring - adapter->tx_ring;
412 if (tx_ring->cpu != cpu) {
413 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
414 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
415 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
416 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
417 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
418 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
419 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
420 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
422 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
423 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
429 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
433 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
436 /* always use CB2 mode, difference is masked in the CB driver */
437 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
439 for (i = 0; i < adapter->num_tx_queues; i++) {
440 adapter->tx_ring[i].cpu = -1;
441 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
443 for (i = 0; i < adapter->num_rx_queues; i++) {
444 adapter->rx_ring[i].cpu = -1;
445 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
449 static int __ixgbe_notify_dca(struct device *dev, void *data)
451 struct net_device *netdev = dev_get_drvdata(dev);
452 struct ixgbe_adapter *adapter = netdev_priv(netdev);
453 unsigned long event = *(unsigned long *)data;
456 case DCA_PROVIDER_ADD:
457 /* if we're already enabled, don't do it again */
458 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
460 if (dca_add_requester(dev) == 0) {
461 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
462 ixgbe_setup_dca(adapter);
465 /* Fall Through since DCA is disabled. */
466 case DCA_PROVIDER_REMOVE:
467 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
468 dca_remove_requester(dev);
469 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
470 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
478 #endif /* CONFIG_IXGBE_DCA */
480 * ixgbe_receive_skb - Send a completed packet up the stack
481 * @adapter: board private structure
482 * @skb: packet to send up
483 * @status: hardware indication of status of receive
484 * @rx_ring: rx descriptor ring (for a specific queue) to setup
485 * @rx_desc: rx descriptor
487 static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
488 struct sk_buff *skb, u8 status,
489 struct ixgbe_ring *ring,
490 union ixgbe_adv_rx_desc *rx_desc)
492 struct ixgbe_adapter *adapter = q_vector->adapter;
493 struct napi_struct *napi = &q_vector->napi;
494 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
495 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
497 skb_record_rx_queue(skb, ring->queue_index);
498 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
499 if (adapter->vlgrp && is_vlan && (tag & VLAN_VID_MASK))
500 vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
502 napi_gro_receive(napi, skb);
504 if (adapter->vlgrp && is_vlan && (tag & VLAN_VID_MASK))
505 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
512 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
513 * @adapter: address of board private structure
514 * @status_err: hardware indication of status of receive
515 * @skb: skb currently being received and modified
517 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
518 union ixgbe_adv_rx_desc *rx_desc,
521 u32 status_err = le32_to_cpu(rx_desc->wb.upper.status_error);
523 skb->ip_summed = CHECKSUM_NONE;
525 /* Rx csum disabled */
526 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
529 /* if IP and error */
530 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
531 (status_err & IXGBE_RXDADV_ERR_IPE)) {
532 adapter->hw_csum_rx_error++;
536 if (!(status_err & IXGBE_RXD_STAT_L4CS))
539 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
540 u16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
543 * 82599 errata, UDP frames with a 0 checksum can be marked as
546 if ((pkt_info & IXGBE_RXDADV_PKTTYPE_UDP) &&
547 (adapter->hw.mac.type == ixgbe_mac_82599EB))
550 adapter->hw_csum_rx_error++;
554 /* It must be a TCP or UDP packet with a valid checksum */
555 skb->ip_summed = CHECKSUM_UNNECESSARY;
556 adapter->hw_csum_rx_good++;
559 static inline void ixgbe_release_rx_desc(struct ixgbe_hw *hw,
560 struct ixgbe_ring *rx_ring, u32 val)
563 * Force memory writes to complete before letting h/w
564 * know there are new descriptors to fetch. (Only
565 * applicable for weak-ordered memory model archs,
569 IXGBE_WRITE_REG(hw, IXGBE_RDT(rx_ring->reg_idx), val);
573 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
574 * @adapter: address of board private structure
576 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
577 struct ixgbe_ring *rx_ring,
580 struct pci_dev *pdev = adapter->pdev;
581 union ixgbe_adv_rx_desc *rx_desc;
582 struct ixgbe_rx_buffer *bi;
585 i = rx_ring->next_to_use;
586 bi = &rx_ring->rx_buffer_info[i];
588 while (cleaned_count--) {
589 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
592 (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED)) {
594 bi->page = alloc_page(GFP_ATOMIC);
596 adapter->alloc_rx_page_failed++;
601 /* use a half page if we're re-using */
602 bi->page_offset ^= (PAGE_SIZE / 2);
605 bi->page_dma = pci_map_page(pdev, bi->page,
613 skb = netdev_alloc_skb(adapter->netdev,
614 (rx_ring->rx_buf_len +
618 adapter->alloc_rx_buff_failed++;
623 * Make buffer alignment 2 beyond a 16 byte boundary
624 * this will result in a 16 byte aligned IP header after
625 * the 14 byte MAC header is removed
627 skb_reserve(skb, NET_IP_ALIGN);
630 bi->dma = pci_map_single(pdev, skb->data,
634 /* Refresh the desc even if buffer_addrs didn't change because
635 * each write-back erases this info. */
636 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
637 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
638 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
640 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
644 if (i == rx_ring->count)
646 bi = &rx_ring->rx_buffer_info[i];
650 if (rx_ring->next_to_use != i) {
651 rx_ring->next_to_use = i;
653 i = (rx_ring->count - 1);
655 ixgbe_release_rx_desc(&adapter->hw, rx_ring, i);
659 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
661 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
664 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
666 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
669 static inline u32 ixgbe_get_rsc_count(union ixgbe_adv_rx_desc *rx_desc)
671 return (le32_to_cpu(rx_desc->wb.lower.lo_dword.data) &
672 IXGBE_RXDADV_RSCCNT_MASK) >>
673 IXGBE_RXDADV_RSCCNT_SHIFT;
677 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
678 * @skb: pointer to the last skb in the rsc queue
680 * This function changes a queue full of hw rsc buffers into a completed
681 * packet. It uses the ->prev pointers to find the first packet and then
682 * turns it into the frag list owner.
684 static inline struct sk_buff *ixgbe_transform_rsc_queue(struct sk_buff *skb)
686 unsigned int frag_list_size = 0;
689 struct sk_buff *prev = skb->prev;
690 frag_list_size += skb->len;
695 skb_shinfo(skb)->frag_list = skb->next;
697 skb->len += frag_list_size;
698 skb->data_len += frag_list_size;
699 skb->truesize += frag_list_size;
703 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
704 struct ixgbe_ring *rx_ring,
705 int *work_done, int work_to_do)
707 struct ixgbe_adapter *adapter = q_vector->adapter;
708 struct pci_dev *pdev = adapter->pdev;
709 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
710 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
712 unsigned int i, rsc_count = 0;
715 bool cleaned = false;
716 int cleaned_count = 0;
717 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
720 #endif /* IXGBE_FCOE */
722 i = rx_ring->next_to_clean;
723 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
724 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
725 rx_buffer_info = &rx_ring->rx_buffer_info[i];
727 while (staterr & IXGBE_RXD_STAT_DD) {
729 if (*work_done >= work_to_do)
733 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
734 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
735 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
736 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
737 if (hdr_info & IXGBE_RXDADV_SPH)
738 adapter->rx_hdr_split++;
739 if (len > IXGBE_RX_HDR_SIZE)
740 len = IXGBE_RX_HDR_SIZE;
741 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
743 len = le16_to_cpu(rx_desc->wb.upper.length);
747 skb = rx_buffer_info->skb;
748 prefetch(skb->data - NET_IP_ALIGN);
749 rx_buffer_info->skb = NULL;
751 if (rx_buffer_info->dma) {
752 pci_unmap_single(pdev, rx_buffer_info->dma,
755 rx_buffer_info->dma = 0;
760 pci_unmap_page(pdev, rx_buffer_info->page_dma,
761 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
762 rx_buffer_info->page_dma = 0;
763 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
764 rx_buffer_info->page,
765 rx_buffer_info->page_offset,
768 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
769 (page_count(rx_buffer_info->page) != 1))
770 rx_buffer_info->page = NULL;
772 get_page(rx_buffer_info->page);
774 skb->len += upper_len;
775 skb->data_len += upper_len;
776 skb->truesize += upper_len;
780 if (i == rx_ring->count)
783 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
787 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
788 rsc_count = ixgbe_get_rsc_count(rx_desc);
791 u32 nextp = (staterr & IXGBE_RXDADV_NEXTP_MASK) >>
792 IXGBE_RXDADV_NEXTP_SHIFT;
793 next_buffer = &rx_ring->rx_buffer_info[nextp];
794 rx_ring->rsc_count += (rsc_count - 1);
796 next_buffer = &rx_ring->rx_buffer_info[i];
799 if (staterr & IXGBE_RXD_STAT_EOP) {
801 skb = ixgbe_transform_rsc_queue(skb);
802 rx_ring->stats.packets++;
803 rx_ring->stats.bytes += skb->len;
805 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
806 rx_buffer_info->skb = next_buffer->skb;
807 rx_buffer_info->dma = next_buffer->dma;
808 next_buffer->skb = skb;
809 next_buffer->dma = 0;
811 skb->next = next_buffer->skb;
812 skb->next->prev = skb;
814 adapter->non_eop_descs++;
818 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
819 dev_kfree_skb_irq(skb);
823 ixgbe_rx_checksum(adapter, rx_desc, skb);
825 /* probably a little skewed due to removing CRC */
826 total_rx_bytes += skb->len;
829 skb->protocol = eth_type_trans(skb, adapter->netdev);
831 /* if ddp, not passing to ULD unless for FCP_RSP or error */
832 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
833 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
837 #endif /* IXGBE_FCOE */
838 ixgbe_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
841 rx_desc->wb.upper.status_error = 0;
843 /* return some buffers to hardware, one at a time is too slow */
844 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
845 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
849 /* use prefetched values */
851 rx_buffer_info = &rx_ring->rx_buffer_info[i];
853 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
856 rx_ring->next_to_clean = i;
857 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
860 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
863 /* include DDPed FCoE data */
867 mss = adapter->netdev->mtu - sizeof(struct fcoe_hdr) -
868 sizeof(struct fc_frame_header) -
869 sizeof(struct fcoe_crc_eof);
872 total_rx_bytes += ddp_bytes;
873 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
875 #endif /* IXGBE_FCOE */
877 rx_ring->total_packets += total_rx_packets;
878 rx_ring->total_bytes += total_rx_bytes;
879 adapter->net_stats.rx_bytes += total_rx_bytes;
880 adapter->net_stats.rx_packets += total_rx_packets;
885 static int ixgbe_clean_rxonly(struct napi_struct *, int);
887 * ixgbe_configure_msix - Configure MSI-X hardware
888 * @adapter: board private structure
890 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
893 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
895 struct ixgbe_q_vector *q_vector;
896 int i, j, q_vectors, v_idx, r_idx;
899 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
902 * Populate the IVAR table and set the ITR values to the
903 * corresponding register.
905 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
906 q_vector = adapter->q_vector[v_idx];
907 /* XXX for_each_bit(...) */
908 r_idx = find_first_bit(q_vector->rxr_idx,
909 adapter->num_rx_queues);
911 for (i = 0; i < q_vector->rxr_count; i++) {
912 j = adapter->rx_ring[r_idx].reg_idx;
913 ixgbe_set_ivar(adapter, 0, j, v_idx);
914 r_idx = find_next_bit(q_vector->rxr_idx,
915 adapter->num_rx_queues,
918 r_idx = find_first_bit(q_vector->txr_idx,
919 adapter->num_tx_queues);
921 for (i = 0; i < q_vector->txr_count; i++) {
922 j = adapter->tx_ring[r_idx].reg_idx;
923 ixgbe_set_ivar(adapter, 1, j, v_idx);
924 r_idx = find_next_bit(q_vector->txr_idx,
925 adapter->num_tx_queues,
929 if (q_vector->txr_count && !q_vector->rxr_count)
931 q_vector->eitr = adapter->tx_eitr_param;
932 else if (q_vector->rxr_count)
934 q_vector->eitr = adapter->rx_eitr_param;
936 ixgbe_write_eitr(q_vector);
939 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
940 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
942 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
943 ixgbe_set_ivar(adapter, -1, 1, v_idx);
944 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
946 /* set up to autoclear timer, and the vectors */
947 mask = IXGBE_EIMS_ENABLE_MASK;
948 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
949 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
956 latency_invalid = 255
960 * ixgbe_update_itr - update the dynamic ITR value based on statistics
961 * @adapter: pointer to adapter
962 * @eitr: eitr setting (ints per sec) to give last timeslice
963 * @itr_setting: current throttle rate in ints/second
964 * @packets: the number of packets during this measurement interval
965 * @bytes: the number of bytes during this measurement interval
967 * Stores a new ITR value based on packets and byte
968 * counts during the last interrupt. The advantage of per interrupt
969 * computation is faster updates and more accurate ITR for the current
970 * traffic pattern. Constants in this function were computed
971 * based on theoretical maximum wire speed and thresholds were set based
972 * on testing data as well as attempting to minimize response time
973 * while increasing bulk throughput.
974 * this functionality is controlled by the InterruptThrottleRate module
975 * parameter (see ixgbe_param.c)
977 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
978 u32 eitr, u8 itr_setting,
979 int packets, int bytes)
981 unsigned int retval = itr_setting;
986 goto update_itr_done;
989 /* simple throttlerate management
990 * 0-20MB/s lowest (100000 ints/s)
991 * 20-100MB/s low (20000 ints/s)
992 * 100-1249MB/s bulk (8000 ints/s)
994 /* what was last interrupt timeslice? */
995 timepassed_us = 1000000/eitr;
996 bytes_perint = bytes / timepassed_us; /* bytes/usec */
998 switch (itr_setting) {
1000 if (bytes_perint > adapter->eitr_low)
1001 retval = low_latency;
1004 if (bytes_perint > adapter->eitr_high)
1005 retval = bulk_latency;
1006 else if (bytes_perint <= adapter->eitr_low)
1007 retval = lowest_latency;
1010 if (bytes_perint <= adapter->eitr_high)
1011 retval = low_latency;
1020 * ixgbe_write_eitr - write EITR register in hardware specific way
1021 * @q_vector: structure containing interrupt and ring information
1023 * This function is made to be called by ethtool and by the driver
1024 * when it needs to update EITR registers at runtime. Hardware
1025 * specific quirks/differences are taken care of here.
1027 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1029 struct ixgbe_adapter *adapter = q_vector->adapter;
1030 struct ixgbe_hw *hw = &adapter->hw;
1031 int v_idx = q_vector->v_idx;
1032 u32 itr_reg = EITR_INTS_PER_SEC_TO_REG(q_vector->eitr);
1034 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1035 /* must write high and low 16 bits to reset counter */
1036 itr_reg |= (itr_reg << 16);
1037 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1039 * set the WDIS bit to not clear the timer bits and cause an
1040 * immediate assertion of the interrupt
1042 itr_reg |= IXGBE_EITR_CNT_WDIS;
1044 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1047 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
1049 struct ixgbe_adapter *adapter = q_vector->adapter;
1051 u8 current_itr, ret_itr;
1053 struct ixgbe_ring *rx_ring, *tx_ring;
1055 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1056 for (i = 0; i < q_vector->txr_count; i++) {
1057 tx_ring = &(adapter->tx_ring[r_idx]);
1058 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
1060 tx_ring->total_packets,
1061 tx_ring->total_bytes);
1062 /* if the result for this queue would decrease interrupt
1063 * rate for this vector then use that result */
1064 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
1065 q_vector->tx_itr - 1 : ret_itr);
1066 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1070 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1071 for (i = 0; i < q_vector->rxr_count; i++) {
1072 rx_ring = &(adapter->rx_ring[r_idx]);
1073 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
1075 rx_ring->total_packets,
1076 rx_ring->total_bytes);
1077 /* if the result for this queue would decrease interrupt
1078 * rate for this vector then use that result */
1079 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
1080 q_vector->rx_itr - 1 : ret_itr);
1081 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1085 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1087 switch (current_itr) {
1088 /* counts and packets in update_itr are dependent on these numbers */
1089 case lowest_latency:
1093 new_itr = 20000; /* aka hwitr = ~200 */
1101 if (new_itr != q_vector->eitr) {
1102 /* do an exponential smoothing */
1103 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1105 /* save the algorithm value here, not the smoothed one */
1106 q_vector->eitr = new_itr;
1108 ixgbe_write_eitr(q_vector);
1114 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
1116 struct ixgbe_hw *hw = &adapter->hw;
1118 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
1119 (eicr & IXGBE_EICR_GPI_SDP1)) {
1120 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
1121 /* write to clear the interrupt */
1122 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1126 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
1128 struct ixgbe_hw *hw = &adapter->hw;
1130 if (eicr & IXGBE_EICR_GPI_SDP1) {
1131 /* Clear the interrupt */
1132 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1133 schedule_work(&adapter->multispeed_fiber_task);
1134 } else if (eicr & IXGBE_EICR_GPI_SDP2) {
1135 /* Clear the interrupt */
1136 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
1137 schedule_work(&adapter->sfp_config_module_task);
1139 /* Interrupt isn't for us... */
1144 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
1146 struct ixgbe_hw *hw = &adapter->hw;
1149 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1150 adapter->link_check_timeout = jiffies;
1151 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1152 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
1153 schedule_work(&adapter->watchdog_task);
1157 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
1159 struct net_device *netdev = data;
1160 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1161 struct ixgbe_hw *hw = &adapter->hw;
1165 * Workaround for Silicon errata. Use clear-by-write instead
1166 * of clear-by-read. Reading with EICS will return the
1167 * interrupt causes without clearing, which later be done
1168 * with the write to EICR.
1170 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
1171 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
1173 if (eicr & IXGBE_EICR_LSC)
1174 ixgbe_check_lsc(adapter);
1176 if (hw->mac.type == ixgbe_mac_82598EB)
1177 ixgbe_check_fan_failure(adapter, eicr);
1179 if (hw->mac.type == ixgbe_mac_82599EB) {
1180 ixgbe_check_sfp_event(adapter, eicr);
1182 /* Handle Flow Director Full threshold interrupt */
1183 if (eicr & IXGBE_EICR_FLOW_DIR) {
1185 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_FLOW_DIR);
1186 /* Disable transmits before FDIR Re-initialization */
1187 netif_tx_stop_all_queues(netdev);
1188 for (i = 0; i < adapter->num_tx_queues; i++) {
1189 struct ixgbe_ring *tx_ring =
1190 &adapter->tx_ring[i];
1191 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE,
1192 &tx_ring->reinit_state))
1193 schedule_work(&adapter->fdir_reinit_task);
1197 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1198 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
1203 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
1208 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1209 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1210 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1212 mask = (qmask & 0xFFFFFFFF);
1213 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(0), mask);
1214 mask = (qmask >> 32);
1215 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1), mask);
1217 /* skip the flush */
1220 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
1225 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1226 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1227 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, mask);
1229 mask = (qmask & 0xFFFFFFFF);
1230 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), mask);
1231 mask = (qmask >> 32);
1232 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), mask);
1234 /* skip the flush */
1237 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
1239 struct ixgbe_q_vector *q_vector = data;
1240 struct ixgbe_adapter *adapter = q_vector->adapter;
1241 struct ixgbe_ring *tx_ring;
1244 if (!q_vector->txr_count)
1247 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1248 for (i = 0; i < q_vector->txr_count; i++) {
1249 tx_ring = &(adapter->tx_ring[r_idx]);
1250 tx_ring->total_bytes = 0;
1251 tx_ring->total_packets = 0;
1252 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1256 /* disable interrupts on this vector only */
1257 ixgbe_irq_disable_queues(adapter, ((u64)1 << q_vector->v_idx));
1258 napi_schedule(&q_vector->napi);
1264 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1266 * @data: pointer to our q_vector struct for this interrupt vector
1268 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
1270 struct ixgbe_q_vector *q_vector = data;
1271 struct ixgbe_adapter *adapter = q_vector->adapter;
1272 struct ixgbe_ring *rx_ring;
1276 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1277 for (i = 0; i < q_vector->rxr_count; i++) {
1278 rx_ring = &(adapter->rx_ring[r_idx]);
1279 rx_ring->total_bytes = 0;
1280 rx_ring->total_packets = 0;
1281 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1285 if (!q_vector->rxr_count)
1288 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1289 rx_ring = &(adapter->rx_ring[r_idx]);
1290 /* disable interrupts on this vector only */
1291 ixgbe_irq_disable_queues(adapter, ((u64)1 << q_vector->v_idx));
1292 napi_schedule(&q_vector->napi);
1297 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1299 struct ixgbe_q_vector *q_vector = data;
1300 struct ixgbe_adapter *adapter = q_vector->adapter;
1301 struct ixgbe_ring *ring;
1305 if (!q_vector->txr_count && !q_vector->rxr_count)
1308 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1309 for (i = 0; i < q_vector->txr_count; i++) {
1310 ring = &(adapter->tx_ring[r_idx]);
1311 ring->total_bytes = 0;
1312 ring->total_packets = 0;
1313 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1317 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1318 for (i = 0; i < q_vector->rxr_count; i++) {
1319 ring = &(adapter->rx_ring[r_idx]);
1320 ring->total_bytes = 0;
1321 ring->total_packets = 0;
1322 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1326 /* disable interrupts on this vector only */
1327 ixgbe_irq_disable_queues(adapter, ((u64)1 << q_vector->v_idx));
1328 napi_schedule(&q_vector->napi);
1334 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1335 * @napi: napi struct with our devices info in it
1336 * @budget: amount of work driver is allowed to do this pass, in packets
1338 * This function is optimized for cleaning one queue only on a single
1341 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1343 struct ixgbe_q_vector *q_vector =
1344 container_of(napi, struct ixgbe_q_vector, napi);
1345 struct ixgbe_adapter *adapter = q_vector->adapter;
1346 struct ixgbe_ring *rx_ring = NULL;
1350 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1351 rx_ring = &(adapter->rx_ring[r_idx]);
1352 #ifdef CONFIG_IXGBE_DCA
1353 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1354 ixgbe_update_rx_dca(adapter, rx_ring);
1357 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1359 /* If all Rx work done, exit the polling mode */
1360 if (work_done < budget) {
1361 napi_complete(napi);
1362 if (adapter->rx_itr_setting & 1)
1363 ixgbe_set_itr_msix(q_vector);
1364 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1365 ixgbe_irq_enable_queues(adapter,
1366 ((u64)1 << q_vector->v_idx));
1373 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
1374 * @napi: napi struct with our devices info in it
1375 * @budget: amount of work driver is allowed to do this pass, in packets
1377 * This function will clean more than one rx queue associated with a
1380 static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
1382 struct ixgbe_q_vector *q_vector =
1383 container_of(napi, struct ixgbe_q_vector, napi);
1384 struct ixgbe_adapter *adapter = q_vector->adapter;
1385 struct ixgbe_ring *ring = NULL;
1386 int work_done = 0, i;
1388 bool tx_clean_complete = true;
1390 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1391 for (i = 0; i < q_vector->txr_count; i++) {
1392 ring = &(adapter->tx_ring[r_idx]);
1393 #ifdef CONFIG_IXGBE_DCA
1394 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1395 ixgbe_update_tx_dca(adapter, ring);
1397 tx_clean_complete &= ixgbe_clean_tx_irq(q_vector, ring);
1398 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1402 /* attempt to distribute budget to each queue fairly, but don't allow
1403 * the budget to go below 1 because we'll exit polling */
1404 budget /= (q_vector->rxr_count ?: 1);
1405 budget = max(budget, 1);
1406 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1407 for (i = 0; i < q_vector->rxr_count; i++) {
1408 ring = &(adapter->rx_ring[r_idx]);
1409 #ifdef CONFIG_IXGBE_DCA
1410 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1411 ixgbe_update_rx_dca(adapter, ring);
1413 ixgbe_clean_rx_irq(q_vector, ring, &work_done, budget);
1414 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1418 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1419 ring = &(adapter->rx_ring[r_idx]);
1420 /* If all Rx work done, exit the polling mode */
1421 if (work_done < budget) {
1422 napi_complete(napi);
1423 if (adapter->rx_itr_setting & 1)
1424 ixgbe_set_itr_msix(q_vector);
1425 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1426 ixgbe_irq_enable_queues(adapter,
1427 ((u64)1 << q_vector->v_idx));
1435 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1436 * @napi: napi struct with our devices info in it
1437 * @budget: amount of work driver is allowed to do this pass, in packets
1439 * This function is optimized for cleaning one queue only on a single
1442 static int ixgbe_clean_txonly(struct napi_struct *napi, int budget)
1444 struct ixgbe_q_vector *q_vector =
1445 container_of(napi, struct ixgbe_q_vector, napi);
1446 struct ixgbe_adapter *adapter = q_vector->adapter;
1447 struct ixgbe_ring *tx_ring = NULL;
1451 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1452 tx_ring = &(adapter->tx_ring[r_idx]);
1453 #ifdef CONFIG_IXGBE_DCA
1454 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1455 ixgbe_update_tx_dca(adapter, tx_ring);
1458 if (!ixgbe_clean_tx_irq(q_vector, tx_ring))
1461 /* If all Tx work done, exit the polling mode */
1462 if (work_done < budget) {
1463 napi_complete(napi);
1464 if (adapter->tx_itr_setting & 1)
1465 ixgbe_set_itr_msix(q_vector);
1466 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1467 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
1473 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1476 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
1478 set_bit(r_idx, q_vector->rxr_idx);
1479 q_vector->rxr_count++;
1482 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1485 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
1487 set_bit(t_idx, q_vector->txr_idx);
1488 q_vector->txr_count++;
1492 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1493 * @adapter: board private structure to initialize
1494 * @vectors: allotted vector count for descriptor rings
1496 * This function maps descriptor rings to the queue-specific vectors
1497 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1498 * one vector per ring/queue, but on a constrained vector budget, we
1499 * group the rings as "efficiently" as possible. You would add new
1500 * mapping configurations in here.
1502 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1506 int rxr_idx = 0, txr_idx = 0;
1507 int rxr_remaining = adapter->num_rx_queues;
1508 int txr_remaining = adapter->num_tx_queues;
1513 /* No mapping required if MSI-X is disabled. */
1514 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1518 * The ideal configuration...
1519 * We have enough vectors to map one per queue.
1521 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1522 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1523 map_vector_to_rxq(adapter, v_start, rxr_idx);
1525 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1526 map_vector_to_txq(adapter, v_start, txr_idx);
1532 * If we don't have enough vectors for a 1-to-1
1533 * mapping, we'll have to group them so there are
1534 * multiple queues per vector.
1536 /* Re-adjusting *qpv takes care of the remainder. */
1537 for (i = v_start; i < vectors; i++) {
1538 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1539 for (j = 0; j < rqpv; j++) {
1540 map_vector_to_rxq(adapter, i, rxr_idx);
1545 for (i = v_start; i < vectors; i++) {
1546 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1547 for (j = 0; j < tqpv; j++) {
1548 map_vector_to_txq(adapter, i, txr_idx);
1559 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1560 * @adapter: board private structure
1562 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1563 * interrupts from the kernel.
1565 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1567 struct net_device *netdev = adapter->netdev;
1568 irqreturn_t (*handler)(int, void *);
1569 int i, vector, q_vectors, err;
1572 /* Decrement for Other and TCP Timer vectors */
1573 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1575 /* Map the Tx/Rx rings to the vectors we were allotted. */
1576 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1580 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1581 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1582 &ixgbe_msix_clean_many)
1583 for (vector = 0; vector < q_vectors; vector++) {
1584 handler = SET_HANDLER(adapter->q_vector[vector]);
1586 if(handler == &ixgbe_msix_clean_rx) {
1587 sprintf(adapter->name[vector], "%s-%s-%d",
1588 netdev->name, "rx", ri++);
1590 else if(handler == &ixgbe_msix_clean_tx) {
1591 sprintf(adapter->name[vector], "%s-%s-%d",
1592 netdev->name, "tx", ti++);
1595 sprintf(adapter->name[vector], "%s-%s-%d",
1596 netdev->name, "TxRx", vector);
1598 err = request_irq(adapter->msix_entries[vector].vector,
1599 handler, 0, adapter->name[vector],
1600 adapter->q_vector[vector]);
1603 "request_irq failed for MSIX interrupt "
1604 "Error: %d\n", err);
1605 goto free_queue_irqs;
1609 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1610 err = request_irq(adapter->msix_entries[vector].vector,
1611 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1614 "request_irq for msix_lsc failed: %d\n", err);
1615 goto free_queue_irqs;
1621 for (i = vector - 1; i >= 0; i--)
1622 free_irq(adapter->msix_entries[--vector].vector,
1623 adapter->q_vector[i]);
1624 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1625 pci_disable_msix(adapter->pdev);
1626 kfree(adapter->msix_entries);
1627 adapter->msix_entries = NULL;
1632 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1634 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
1636 u32 new_itr = q_vector->eitr;
1637 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1638 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1640 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1642 tx_ring->total_packets,
1643 tx_ring->total_bytes);
1644 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1646 rx_ring->total_packets,
1647 rx_ring->total_bytes);
1649 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1651 switch (current_itr) {
1652 /* counts and packets in update_itr are dependent on these numbers */
1653 case lowest_latency:
1657 new_itr = 20000; /* aka hwitr = ~200 */
1666 if (new_itr != q_vector->eitr) {
1667 /* do an exponential smoothing */
1668 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1670 /* save the algorithm value here, not the smoothed one */
1671 q_vector->eitr = new_itr;
1673 ixgbe_write_eitr(q_vector);
1680 * ixgbe_irq_enable - Enable default interrupt generation settings
1681 * @adapter: board private structure
1683 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1687 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1688 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1689 mask |= IXGBE_EIMS_GPI_SDP1;
1690 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1691 mask |= IXGBE_EIMS_ECC;
1692 mask |= IXGBE_EIMS_GPI_SDP1;
1693 mask |= IXGBE_EIMS_GPI_SDP2;
1695 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
1696 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
1697 mask |= IXGBE_EIMS_FLOW_DIR;
1699 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1700 ixgbe_irq_enable_queues(adapter, ~0);
1701 IXGBE_WRITE_FLUSH(&adapter->hw);
1705 * ixgbe_intr - legacy mode Interrupt Handler
1706 * @irq: interrupt number
1707 * @data: pointer to a network interface device structure
1709 static irqreturn_t ixgbe_intr(int irq, void *data)
1711 struct net_device *netdev = data;
1712 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1713 struct ixgbe_hw *hw = &adapter->hw;
1714 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
1718 * Workaround for silicon errata. Mask the interrupts
1719 * before the read of EICR.
1721 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
1723 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1724 * therefore no explict interrupt disable is necessary */
1725 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1727 /* shared interrupt alert!
1728 * make sure interrupts are enabled because the read will
1729 * have disabled interrupts due to EIAM */
1730 ixgbe_irq_enable(adapter);
1731 return IRQ_NONE; /* Not our interrupt */
1734 if (eicr & IXGBE_EICR_LSC)
1735 ixgbe_check_lsc(adapter);
1737 if (hw->mac.type == ixgbe_mac_82599EB)
1738 ixgbe_check_sfp_event(adapter, eicr);
1740 ixgbe_check_fan_failure(adapter, eicr);
1742 if (napi_schedule_prep(&(q_vector->napi))) {
1743 adapter->tx_ring[0].total_packets = 0;
1744 adapter->tx_ring[0].total_bytes = 0;
1745 adapter->rx_ring[0].total_packets = 0;
1746 adapter->rx_ring[0].total_bytes = 0;
1747 /* would disable interrupts here but EIAM disabled it */
1748 __napi_schedule(&(q_vector->napi));
1754 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1756 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1758 for (i = 0; i < q_vectors; i++) {
1759 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
1760 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1761 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1762 q_vector->rxr_count = 0;
1763 q_vector->txr_count = 0;
1768 * ixgbe_request_irq - initialize interrupts
1769 * @adapter: board private structure
1771 * Attempts to configure interrupts using the best available
1772 * capabilities of the hardware and kernel.
1774 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1776 struct net_device *netdev = adapter->netdev;
1779 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1780 err = ixgbe_request_msix_irqs(adapter);
1781 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1782 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1783 netdev->name, netdev);
1785 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1786 netdev->name, netdev);
1790 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1795 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1797 struct net_device *netdev = adapter->netdev;
1799 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1802 q_vectors = adapter->num_msix_vectors;
1805 free_irq(adapter->msix_entries[i].vector, netdev);
1808 for (; i >= 0; i--) {
1809 free_irq(adapter->msix_entries[i].vector,
1810 adapter->q_vector[i]);
1813 ixgbe_reset_q_vectors(adapter);
1815 free_irq(adapter->pdev->irq, netdev);
1820 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1821 * @adapter: board private structure
1823 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1825 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1826 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1828 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
1829 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
1830 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
1832 IXGBE_WRITE_FLUSH(&adapter->hw);
1833 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1835 for (i = 0; i < adapter->num_msix_vectors; i++)
1836 synchronize_irq(adapter->msix_entries[i].vector);
1838 synchronize_irq(adapter->pdev->irq);
1843 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1846 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1848 struct ixgbe_hw *hw = &adapter->hw;
1850 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1851 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr_param));
1853 ixgbe_set_ivar(adapter, 0, 0, 0);
1854 ixgbe_set_ivar(adapter, 1, 0, 0);
1856 map_vector_to_rxq(adapter, 0, 0);
1857 map_vector_to_txq(adapter, 0, 0);
1859 DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1863 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1864 * @adapter: board private structure
1866 * Configure the Tx unit of the MAC after a reset.
1868 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1871 struct ixgbe_hw *hw = &adapter->hw;
1872 u32 i, j, tdlen, txctrl;
1874 /* Setup the HW Tx Head and Tail descriptor pointers */
1875 for (i = 0; i < adapter->num_tx_queues; i++) {
1876 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1879 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1880 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1881 (tdba & DMA_BIT_MASK(32)));
1882 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1883 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1884 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1885 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1886 adapter->tx_ring[i].head = IXGBE_TDH(j);
1887 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1888 /* Disable Tx Head Writeback RO bit, since this hoses
1889 * bookkeeping if things aren't delivered in order.
1891 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1892 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1893 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1895 if (hw->mac.type == ixgbe_mac_82599EB) {
1896 /* We enable 8 traffic classes, DCB only */
1897 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
1898 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA |
1899 IXGBE_MTQC_8TC_8TQ));
1903 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1905 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
1906 struct ixgbe_ring *rx_ring)
1910 struct ixgbe_ring_feature *feature = adapter->ring_feature;
1912 index = rx_ring->reg_idx;
1913 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1915 mask = (unsigned long) feature[RING_F_RSS].mask;
1916 index = index & mask;
1918 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1920 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1921 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1923 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1924 IXGBE_SRRCTL_BSIZEHDR_MASK;
1926 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
1927 #if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
1928 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1930 srrctl |= (PAGE_SIZE / 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1932 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1934 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1935 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1936 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1939 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1942 static u32 ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
1947 if (!(adapter->hw.mac.type == ixgbe_mac_82599EB))
1950 mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
1951 #ifdef CONFIG_IXGBE_DCB
1952 | IXGBE_FLAG_DCB_ENABLED
1957 case (IXGBE_FLAG_RSS_ENABLED):
1958 mrqc = IXGBE_MRQC_RSSEN;
1960 #ifdef CONFIG_IXGBE_DCB
1961 case (IXGBE_FLAG_DCB_ENABLED):
1962 mrqc = IXGBE_MRQC_RT8TCEN;
1964 #endif /* CONFIG_IXGBE_DCB */
1973 * ixgbe_configure_rscctl - enable RSC for the indicated ring
1974 * @adapter: address of board private structure
1975 * @index: index of ring to set
1976 * @rx_buf_len: rx buffer length
1978 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, int index,
1981 struct ixgbe_ring *rx_ring;
1982 struct ixgbe_hw *hw = &adapter->hw;
1986 rx_ring = &adapter->rx_ring[index];
1987 j = rx_ring->reg_idx;
1988 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
1989 rscctrl |= IXGBE_RSCCTL_RSCEN;
1991 * we must limit the number of descriptors so that the
1992 * total size of max desc * buf_len is not greater
1995 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
1996 #if (MAX_SKB_FRAGS > 16)
1997 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
1998 #elif (MAX_SKB_FRAGS > 8)
1999 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2000 #elif (MAX_SKB_FRAGS > 4)
2001 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2003 rscctrl |= IXGBE_RSCCTL_MAXDESC_1;
2006 if (rx_buf_len < IXGBE_RXBUFFER_4096)
2007 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2008 else if (rx_buf_len < IXGBE_RXBUFFER_8192)
2009 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2011 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2013 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(j), rscctrl);
2017 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
2018 * @adapter: board private structure
2020 * Configure the Rx unit of the MAC after a reset.
2022 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2025 struct ixgbe_hw *hw = &adapter->hw;
2026 struct ixgbe_ring *rx_ring;
2027 struct net_device *netdev = adapter->netdev;
2028 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2030 u32 rdlen, rxctrl, rxcsum;
2031 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2032 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2033 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2035 u32 reta = 0, mrqc = 0;
2039 /* Decide whether to use packet split mode or not */
2040 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
2042 /* Set the RX buffer length according to the mode */
2043 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
2044 rx_buf_len = IXGBE_RX_HDR_SIZE;
2045 if (hw->mac.type == ixgbe_mac_82599EB) {
2046 /* PSRTYPE must be initialized in 82599 */
2047 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
2048 IXGBE_PSRTYPE_UDPHDR |
2049 IXGBE_PSRTYPE_IPV4HDR |
2050 IXGBE_PSRTYPE_IPV6HDR |
2051 IXGBE_PSRTYPE_L2HDR;
2052 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
2055 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
2056 (netdev->mtu <= ETH_DATA_LEN))
2057 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2059 rx_buf_len = ALIGN(max_frame, 1024);
2062 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2063 fctrl |= IXGBE_FCTRL_BAM;
2064 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
2065 fctrl |= IXGBE_FCTRL_PMCF;
2066 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
2068 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
2069 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2070 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
2072 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
2074 if (netdev->features & NETIF_F_FCOE_MTU)
2075 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
2077 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
2079 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
2080 /* disable receives while setting up the descriptors */
2081 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2082 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2085 * Setup the HW Rx Head and Tail Descriptor Pointers and
2086 * the Base and Length of the Rx Descriptor Ring
2088 for (i = 0; i < adapter->num_rx_queues; i++) {
2089 rx_ring = &adapter->rx_ring[i];
2090 rdba = rx_ring->dma;
2091 j = rx_ring->reg_idx;
2092 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_BIT_MASK(32)));
2093 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
2094 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
2095 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
2096 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
2097 rx_ring->head = IXGBE_RDH(j);
2098 rx_ring->tail = IXGBE_RDT(j);
2099 rx_ring->rx_buf_len = rx_buf_len;
2101 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)
2102 rx_ring->flags |= IXGBE_RING_RX_PS_ENABLED;
2104 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
2107 if (netdev->features & NETIF_F_FCOE_MTU) {
2108 struct ixgbe_ring_feature *f;
2109 f = &adapter->ring_feature[RING_F_FCOE];
2110 if ((i >= f->mask) && (i < f->mask + f->indices)) {
2111 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
2112 if (rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE)
2113 rx_ring->rx_buf_len =
2114 IXGBE_FCOE_JUMBO_FRAME_SIZE;
2118 #endif /* IXGBE_FCOE */
2119 ixgbe_configure_srrctl(adapter, rx_ring);
2122 if (hw->mac.type == ixgbe_mac_82598EB) {
2124 * For VMDq support of different descriptor types or
2125 * buffer sizes through the use of multiple SRRCTL
2126 * registers, RDRXCTL.MVMEN must be set to 1
2128 * also, the manual doesn't mention it clearly but DCA hints
2129 * will only use queue 0's tags unless this bit is set. Side
2130 * effects of setting this bit are only that SRRCTL must be
2131 * fully programmed [0..15]
2133 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2134 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
2135 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2138 /* Program MRQC for the distribution of queues */
2139 mrqc = ixgbe_setup_mrqc(adapter);
2141 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2142 /* Fill out redirection table */
2143 for (i = 0, j = 0; i < 128; i++, j++) {
2144 if (j == adapter->ring_feature[RING_F_RSS].indices)
2146 /* reta = 4-byte sliding window of
2147 * 0x00..(indices-1)(indices-1)00..etc. */
2148 reta = (reta << 8) | (j * 0x11);
2150 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2153 /* Fill out hash function seeds */
2154 for (i = 0; i < 10; i++)
2155 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
2157 if (hw->mac.type == ixgbe_mac_82598EB)
2158 mrqc |= IXGBE_MRQC_RSSEN;
2159 /* Perform hash on these packet types */
2160 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2161 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2162 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
2163 | IXGBE_MRQC_RSS_FIELD_IPV6
2164 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
2165 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2167 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2169 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2171 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
2172 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
2173 /* Disable indicating checksum in descriptor, enables
2175 rxcsum |= IXGBE_RXCSUM_PCSD;
2177 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
2178 /* Enable IPv4 payload checksum for UDP fragments
2179 * if PCSD is not set */
2180 rxcsum |= IXGBE_RXCSUM_IPPCSE;
2183 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2185 if (hw->mac.type == ixgbe_mac_82599EB) {
2186 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2187 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
2188 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
2189 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2192 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2193 /* Enable 82599 HW-RSC */
2194 for (i = 0; i < adapter->num_rx_queues; i++)
2195 ixgbe_configure_rscctl(adapter, i, rx_buf_len);
2197 /* Disable RSC for ACK packets */
2198 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2199 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2203 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2205 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2206 struct ixgbe_hw *hw = &adapter->hw;
2208 /* add VID to filter table */
2209 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
2212 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2214 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2215 struct ixgbe_hw *hw = &adapter->hw;
2217 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2218 ixgbe_irq_disable(adapter);
2220 vlan_group_set_device(adapter->vlgrp, vid, NULL);
2222 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2223 ixgbe_irq_enable(adapter);
2225 /* remove VID from filter table */
2226 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
2229 static void ixgbe_vlan_rx_register(struct net_device *netdev,
2230 struct vlan_group *grp)
2232 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2236 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2237 ixgbe_irq_disable(adapter);
2238 adapter->vlgrp = grp;
2241 * For a DCB driver, always enable VLAN tag stripping so we can
2242 * still receive traffic from a DCB-enabled host even if we're
2245 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
2246 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2247 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
2248 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2249 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
2250 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
2251 ctrl |= IXGBE_VLNCTRL_VFE;
2252 /* enable VLAN tag insert/strip */
2253 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
2254 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2255 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
2256 for (i = 0; i < adapter->num_rx_queues; i++) {
2257 j = adapter->rx_ring[i].reg_idx;
2258 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(j));
2259 ctrl |= IXGBE_RXDCTL_VME;
2260 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(j), ctrl);
2263 ixgbe_vlan_rx_add_vid(netdev, 0);
2265 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2266 ixgbe_irq_enable(adapter);
2269 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
2271 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2273 if (adapter->vlgrp) {
2275 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2276 if (!vlan_group_get_device(adapter->vlgrp, vid))
2278 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
2283 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
2285 struct dev_mc_list *mc_ptr;
2286 u8 *addr = *mc_addr_ptr;
2289 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
2291 *mc_addr_ptr = mc_ptr->next->dmi_addr;
2293 *mc_addr_ptr = NULL;
2299 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
2300 * @netdev: network interface device structure
2302 * The set_rx_method entry point is called whenever the unicast/multicast
2303 * address list or the network interface flags are updated. This routine is
2304 * responsible for configuring the hardware for proper unicast, multicast and
2307 static void ixgbe_set_rx_mode(struct net_device *netdev)
2309 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2310 struct ixgbe_hw *hw = &adapter->hw;
2312 u8 *addr_list = NULL;
2315 /* Check for Promiscuous and All Multicast modes */
2317 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
2318 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2320 if (netdev->flags & IFF_PROMISC) {
2321 hw->addr_ctrl.user_set_promisc = 1;
2322 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2323 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
2325 if (netdev->flags & IFF_ALLMULTI) {
2326 fctrl |= IXGBE_FCTRL_MPE;
2327 fctrl &= ~IXGBE_FCTRL_UPE;
2329 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2331 vlnctrl |= IXGBE_VLNCTRL_VFE;
2332 hw->addr_ctrl.user_set_promisc = 0;
2335 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
2336 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2338 /* reprogram secondary unicast list */
2339 hw->mac.ops.update_uc_addr_list(hw, &netdev->uc.list);
2341 /* reprogram multicast list */
2342 addr_count = netdev->mc_count;
2344 addr_list = netdev->mc_list->dmi_addr;
2345 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
2346 ixgbe_addr_list_itr);
2349 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
2352 struct ixgbe_q_vector *q_vector;
2353 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2355 /* legacy and MSI only use one vector */
2356 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2359 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2360 struct napi_struct *napi;
2361 q_vector = adapter->q_vector[q_idx];
2362 napi = &q_vector->napi;
2363 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2364 if (!q_vector->rxr_count || !q_vector->txr_count) {
2365 if (q_vector->txr_count == 1)
2366 napi->poll = &ixgbe_clean_txonly;
2367 else if (q_vector->rxr_count == 1)
2368 napi->poll = &ixgbe_clean_rxonly;
2376 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
2379 struct ixgbe_q_vector *q_vector;
2380 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2382 /* legacy and MSI only use one vector */
2383 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2386 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2387 q_vector = adapter->q_vector[q_idx];
2388 napi_disable(&q_vector->napi);
2392 #ifdef CONFIG_IXGBE_DCB
2394 * ixgbe_configure_dcb - Configure DCB hardware
2395 * @adapter: ixgbe adapter struct
2397 * This is called by the driver on open to configure the DCB hardware.
2398 * This is also called by the gennetlink interface when reconfiguring
2401 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
2403 struct ixgbe_hw *hw = &adapter->hw;
2404 u32 txdctl, vlnctrl;
2407 ixgbe_dcb_check_config(&adapter->dcb_cfg);
2408 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
2409 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
2411 /* reconfigure the hardware */
2412 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
2414 for (i = 0; i < adapter->num_tx_queues; i++) {
2415 j = adapter->tx_ring[i].reg_idx;
2416 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2417 /* PThresh workaround for Tx hang with DFP enabled. */
2419 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2421 /* Enable VLAN tag insert/strip */
2422 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2423 if (hw->mac.type == ixgbe_mac_82598EB) {
2424 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
2425 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2426 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2427 } else if (hw->mac.type == ixgbe_mac_82599EB) {
2428 vlnctrl |= IXGBE_VLNCTRL_VFE;
2429 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2430 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2431 for (i = 0; i < adapter->num_rx_queues; i++) {
2432 j = adapter->rx_ring[i].reg_idx;
2433 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2434 vlnctrl |= IXGBE_RXDCTL_VME;
2435 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
2438 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
2442 static void ixgbe_configure(struct ixgbe_adapter *adapter)
2444 struct net_device *netdev = adapter->netdev;
2445 struct ixgbe_hw *hw = &adapter->hw;
2448 ixgbe_set_rx_mode(netdev);
2450 ixgbe_restore_vlan(adapter);
2451 #ifdef CONFIG_IXGBE_DCB
2452 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2453 netif_set_gso_max_size(netdev, 32768);
2454 ixgbe_configure_dcb(adapter);
2456 netif_set_gso_max_size(netdev, 65536);
2459 netif_set_gso_max_size(netdev, 65536);
2463 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
2464 ixgbe_configure_fcoe(adapter);
2466 #endif /* IXGBE_FCOE */
2467 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2468 for (i = 0; i < adapter->num_tx_queues; i++)
2469 adapter->tx_ring[i].atr_sample_rate =
2470 adapter->atr_sample_rate;
2471 ixgbe_init_fdir_signature_82599(hw, adapter->fdir_pballoc);
2472 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
2473 ixgbe_init_fdir_perfect_82599(hw, adapter->fdir_pballoc);
2476 ixgbe_configure_tx(adapter);
2477 ixgbe_configure_rx(adapter);
2478 for (i = 0; i < adapter->num_rx_queues; i++)
2479 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
2480 (adapter->rx_ring[i].count - 1));
2483 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2485 switch (hw->phy.type) {
2486 case ixgbe_phy_sfp_avago:
2487 case ixgbe_phy_sfp_ftl:
2488 case ixgbe_phy_sfp_intel:
2489 case ixgbe_phy_sfp_unknown:
2490 case ixgbe_phy_tw_tyco:
2491 case ixgbe_phy_tw_unknown:
2499 * ixgbe_sfp_link_config - set up SFP+ link
2500 * @adapter: pointer to private adapter struct
2502 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
2504 struct ixgbe_hw *hw = &adapter->hw;
2506 if (hw->phy.multispeed_fiber) {
2508 * In multispeed fiber setups, the device may not have
2509 * had a physical connection when the driver loaded.
2510 * If that's the case, the initial link configuration
2511 * couldn't get the MAC into 10G or 1G mode, so we'll
2512 * never have a link status change interrupt fire.
2513 * We need to try and force an autonegotiation
2514 * session, then bring up link.
2516 hw->mac.ops.setup_sfp(hw);
2517 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
2518 schedule_work(&adapter->multispeed_fiber_task);
2521 * Direct Attach Cu and non-multispeed fiber modules
2522 * still need to be configured properly prior to
2525 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_MOD_TASK))
2526 schedule_work(&adapter->sfp_config_module_task);
2531 * ixgbe_non_sfp_link_config - set up non-SFP+ link
2532 * @hw: pointer to private hardware struct
2534 * Returns 0 on success, negative on failure
2536 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
2539 bool negotiation, link_up = false;
2540 u32 ret = IXGBE_ERR_LINK_SETUP;
2542 if (hw->mac.ops.check_link)
2543 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2548 if (hw->mac.ops.get_link_capabilities)
2549 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
2553 if (hw->mac.ops.setup_link)
2554 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
2559 #define IXGBE_MAX_RX_DESC_POLL 10
2560 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2563 int j = adapter->rx_ring[rxr].reg_idx;
2566 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
2567 if (IXGBE_READ_REG(&adapter->hw,
2568 IXGBE_RXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
2573 if (k >= IXGBE_MAX_RX_DESC_POLL) {
2574 DPRINTK(DRV, ERR, "RXDCTL.ENABLE on Rx queue %d "
2575 "not set within the polling period\n", rxr);
2577 ixgbe_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
2578 (adapter->rx_ring[rxr].count - 1));
2581 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
2583 struct net_device *netdev = adapter->netdev;
2584 struct ixgbe_hw *hw = &adapter->hw;
2586 int num_rx_rings = adapter->num_rx_queues;
2588 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2589 u32 txdctl, rxdctl, mhadd;
2593 ixgbe_get_hw_control(adapter);
2595 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2596 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
2597 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2598 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
2599 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
2604 /* XXX: to interrupt immediately for EICS writes, enable this */
2605 /* gpie |= IXGBE_GPIE_EIMEN; */
2606 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2609 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2610 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2611 * specifically only auto mask tx and rx interrupts */
2612 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2615 /* Enable fan failure interrupt if media type is copper */
2616 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2617 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2618 gpie |= IXGBE_SDP1_GPIEN;
2619 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2622 if (hw->mac.type == ixgbe_mac_82599EB) {
2623 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2624 gpie |= IXGBE_SDP1_GPIEN;
2625 gpie |= IXGBE_SDP2_GPIEN;
2626 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2630 /* adjust max frame to be able to do baby jumbo for FCoE */
2631 if ((netdev->features & NETIF_F_FCOE_MTU) &&
2632 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
2633 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
2635 #endif /* IXGBE_FCOE */
2636 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2637 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2638 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2639 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2641 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2644 for (i = 0; i < adapter->num_tx_queues; i++) {
2645 j = adapter->tx_ring[i].reg_idx;
2646 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2647 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2648 txdctl |= (8 << 16);
2649 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2652 if (hw->mac.type == ixgbe_mac_82599EB) {
2653 /* DMATXCTL.EN must be set after all Tx queue config is done */
2654 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2655 dmatxctl |= IXGBE_DMATXCTL_TE;
2656 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2658 for (i = 0; i < adapter->num_tx_queues; i++) {
2659 j = adapter->tx_ring[i].reg_idx;
2660 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2661 txdctl |= IXGBE_TXDCTL_ENABLE;
2662 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2665 for (i = 0; i < num_rx_rings; i++) {
2666 j = adapter->rx_ring[i].reg_idx;
2667 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2668 /* enable PTHRESH=32 descriptors (half the internal cache)
2669 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2670 * this also removes a pesky rx_no_buffer_count increment */
2672 rxdctl |= IXGBE_RXDCTL_ENABLE;
2673 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2674 if (hw->mac.type == ixgbe_mac_82599EB)
2675 ixgbe_rx_desc_queue_enable(adapter, i);
2677 /* enable all receives */
2678 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2679 if (hw->mac.type == ixgbe_mac_82598EB)
2680 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2682 rxdctl |= IXGBE_RXCTRL_RXEN;
2683 hw->mac.ops.enable_rx_dma(hw, rxdctl);
2685 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2686 ixgbe_configure_msix(adapter);
2688 ixgbe_configure_msi_and_legacy(adapter);
2690 clear_bit(__IXGBE_DOWN, &adapter->state);
2691 ixgbe_napi_enable_all(adapter);
2693 /* clear any pending interrupts, may auto mask */
2694 IXGBE_READ_REG(hw, IXGBE_EICR);
2696 ixgbe_irq_enable(adapter);
2699 * If this adapter has a fan, check to see if we had a failure
2700 * before we enabled the interrupt.
2702 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2703 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
2704 if (esdp & IXGBE_ESDP_SDP1)
2706 "Fan has stopped, replace the adapter\n");
2710 * For hot-pluggable SFP+ devices, a new SFP+ module may have
2711 * arrived before interrupts were enabled but after probe. Such
2712 * devices wouldn't have their type identified yet. We need to
2713 * kick off the SFP+ module setup first, then try to bring up link.
2714 * If we're not hot-pluggable SFP+, we just need to configure link
2717 if (hw->phy.type == ixgbe_phy_unknown) {
2718 err = hw->phy.ops.identify(hw);
2719 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2721 * Take the device down and schedule the sfp tasklet
2722 * which will unregister_netdev and log it.
2724 ixgbe_down(adapter);
2725 schedule_work(&adapter->sfp_config_module_task);
2730 if (ixgbe_is_sfp(hw)) {
2731 ixgbe_sfp_link_config(adapter);
2733 err = ixgbe_non_sfp_link_config(hw);
2735 DPRINTK(PROBE, ERR, "link_config FAILED %d\n", err);
2738 for (i = 0; i < adapter->num_tx_queues; i++)
2739 set_bit(__IXGBE_FDIR_INIT_DONE,
2740 &(adapter->tx_ring[i].reinit_state));
2742 /* enable transmits */
2743 netif_tx_start_all_queues(netdev);
2745 /* bring the link up in the watchdog, this could race with our first
2746 * link up interrupt but shouldn't be a problem */
2747 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2748 adapter->link_check_timeout = jiffies;
2749 mod_timer(&adapter->watchdog_timer, jiffies);
2753 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2755 WARN_ON(in_interrupt());
2756 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2758 ixgbe_down(adapter);
2760 clear_bit(__IXGBE_RESETTING, &adapter->state);
2763 int ixgbe_up(struct ixgbe_adapter *adapter)
2765 /* hardware has been reset, we need to reload some things */
2766 ixgbe_configure(adapter);
2768 return ixgbe_up_complete(adapter);
2771 void ixgbe_reset(struct ixgbe_adapter *adapter)
2773 struct ixgbe_hw *hw = &adapter->hw;
2776 err = hw->mac.ops.init_hw(hw);
2779 case IXGBE_ERR_SFP_NOT_PRESENT:
2781 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
2782 dev_err(&adapter->pdev->dev, "master disable timed out\n");
2784 case IXGBE_ERR_EEPROM_VERSION:
2785 /* We are running on a pre-production device, log a warning */
2786 dev_warn(&adapter->pdev->dev, "This device is a pre-production "
2787 "adapter/LOM. Please be aware there may be issues "
2788 "associated with your hardware. If you are "
2789 "experiencing problems please contact your Intel or "
2790 "hardware representative who provided you with this "
2794 dev_err(&adapter->pdev->dev, "Hardware Error: %d\n", err);
2797 /* reprogram the RAR[0] in case user changed it. */
2798 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2802 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2803 * @adapter: board private structure
2804 * @rx_ring: ring to free buffers from
2806 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2807 struct ixgbe_ring *rx_ring)
2809 struct pci_dev *pdev = adapter->pdev;
2813 /* Free all the Rx ring sk_buffs */
2815 for (i = 0; i < rx_ring->count; i++) {
2816 struct ixgbe_rx_buffer *rx_buffer_info;
2818 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2819 if (rx_buffer_info->dma) {
2820 pci_unmap_single(pdev, rx_buffer_info->dma,
2821 rx_ring->rx_buf_len,
2822 PCI_DMA_FROMDEVICE);
2823 rx_buffer_info->dma = 0;
2825 if (rx_buffer_info->skb) {
2826 struct sk_buff *skb = rx_buffer_info->skb;
2827 rx_buffer_info->skb = NULL;
2829 struct sk_buff *this = skb;
2831 dev_kfree_skb(this);
2834 if (!rx_buffer_info->page)
2836 if (rx_buffer_info->page_dma) {
2837 pci_unmap_page(pdev, rx_buffer_info->page_dma,
2838 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
2839 rx_buffer_info->page_dma = 0;
2841 put_page(rx_buffer_info->page);
2842 rx_buffer_info->page = NULL;
2843 rx_buffer_info->page_offset = 0;
2846 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2847 memset(rx_ring->rx_buffer_info, 0, size);
2849 /* Zero out the descriptor ring */
2850 memset(rx_ring->desc, 0, rx_ring->size);
2852 rx_ring->next_to_clean = 0;
2853 rx_ring->next_to_use = 0;
2856 writel(0, adapter->hw.hw_addr + rx_ring->head);
2858 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2862 * ixgbe_clean_tx_ring - Free Tx Buffers
2863 * @adapter: board private structure
2864 * @tx_ring: ring to be cleaned
2866 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2867 struct ixgbe_ring *tx_ring)
2869 struct ixgbe_tx_buffer *tx_buffer_info;
2873 /* Free all the Tx ring sk_buffs */
2875 for (i = 0; i < tx_ring->count; i++) {
2876 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2877 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2880 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2881 memset(tx_ring->tx_buffer_info, 0, size);
2883 /* Zero out the descriptor ring */
2884 memset(tx_ring->desc, 0, tx_ring->size);
2886 tx_ring->next_to_use = 0;
2887 tx_ring->next_to_clean = 0;
2890 writel(0, adapter->hw.hw_addr + tx_ring->head);
2892 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2896 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2897 * @adapter: board private structure
2899 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2903 for (i = 0; i < adapter->num_rx_queues; i++)
2904 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2908 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2909 * @adapter: board private structure
2911 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2915 for (i = 0; i < adapter->num_tx_queues; i++)
2916 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2919 void ixgbe_down(struct ixgbe_adapter *adapter)
2921 struct net_device *netdev = adapter->netdev;
2922 struct ixgbe_hw *hw = &adapter->hw;
2927 /* signal that we are down to the interrupt handler */
2928 set_bit(__IXGBE_DOWN, &adapter->state);
2930 /* disable receives */
2931 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2932 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2934 netif_tx_disable(netdev);
2936 IXGBE_WRITE_FLUSH(hw);
2939 netif_tx_stop_all_queues(netdev);
2941 ixgbe_irq_disable(adapter);
2943 ixgbe_napi_disable_all(adapter);
2945 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2946 del_timer_sync(&adapter->sfp_timer);
2947 del_timer_sync(&adapter->watchdog_timer);
2948 cancel_work_sync(&adapter->watchdog_task);
2950 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
2951 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
2952 cancel_work_sync(&adapter->fdir_reinit_task);
2954 /* disable transmits in the hardware now that interrupts are off */
2955 for (i = 0; i < adapter->num_tx_queues; i++) {
2956 j = adapter->tx_ring[i].reg_idx;
2957 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2958 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2959 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2961 /* Disable the Tx DMA engine on 82599 */
2962 if (hw->mac.type == ixgbe_mac_82599EB)
2963 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
2964 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
2965 ~IXGBE_DMATXCTL_TE));
2967 netif_carrier_off(netdev);
2969 if (!pci_channel_offline(adapter->pdev))
2970 ixgbe_reset(adapter);
2971 ixgbe_clean_all_tx_rings(adapter);
2972 ixgbe_clean_all_rx_rings(adapter);
2974 #ifdef CONFIG_IXGBE_DCA
2975 /* since we reset the hardware DCA settings were cleared */
2976 ixgbe_setup_dca(adapter);
2981 * ixgbe_poll - NAPI Rx polling callback
2982 * @napi: structure for representing this polling device
2983 * @budget: how many packets driver is allowed to clean
2985 * This function is used for legacy and MSI, NAPI mode
2987 static int ixgbe_poll(struct napi_struct *napi, int budget)
2989 struct ixgbe_q_vector *q_vector =
2990 container_of(napi, struct ixgbe_q_vector, napi);
2991 struct ixgbe_adapter *adapter = q_vector->adapter;
2992 int tx_clean_complete, work_done = 0;
2994 #ifdef CONFIG_IXGBE_DCA
2995 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2996 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2997 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
3001 tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring);
3002 ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
3004 if (!tx_clean_complete)
3007 /* If budget not fully consumed, exit the polling mode */
3008 if (work_done < budget) {
3009 napi_complete(napi);
3010 if (adapter->rx_itr_setting & 1)
3011 ixgbe_set_itr(adapter);
3012 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3013 ixgbe_irq_enable_queues(adapter, IXGBE_EIMS_RTX_QUEUE);
3019 * ixgbe_tx_timeout - Respond to a Tx Hang
3020 * @netdev: network interface device structure
3022 static void ixgbe_tx_timeout(struct net_device *netdev)
3024 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3026 /* Do the reset outside of interrupt context */
3027 schedule_work(&adapter->reset_task);
3030 static void ixgbe_reset_task(struct work_struct *work)
3032 struct ixgbe_adapter *adapter;
3033 adapter = container_of(work, struct ixgbe_adapter, reset_task);
3035 /* If we're already down or resetting, just bail */
3036 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
3037 test_bit(__IXGBE_RESETTING, &adapter->state))
3040 adapter->tx_timeout_count++;
3042 ixgbe_reinit_locked(adapter);
3045 #ifdef CONFIG_IXGBE_DCB
3046 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
3049 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_DCB];
3051 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
3055 adapter->num_rx_queues = f->indices;
3056 adapter->num_tx_queues = f->indices;
3064 * ixgbe_set_rss_queues: Allocate queues for RSS
3065 * @adapter: board private structure to initialize
3067 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3068 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3071 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
3074 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_RSS];
3076 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3078 adapter->num_rx_queues = f->indices;
3079 adapter->num_tx_queues = f->indices;
3089 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3090 * @adapter: board private structure to initialize
3092 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3093 * to the original CPU that initiated the Tx session. This runs in addition
3094 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3095 * Rx load across CPUs using RSS.
3098 static bool inline ixgbe_set_fdir_queues(struct ixgbe_adapter *adapter)
3101 struct ixgbe_ring_feature *f_fdir = &adapter->ring_feature[RING_F_FDIR];
3103 f_fdir->indices = min((int)num_online_cpus(), f_fdir->indices);
3106 /* Flow Director must have RSS enabled */
3107 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
3108 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3109 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)))) {
3110 adapter->num_tx_queues = f_fdir->indices;
3111 adapter->num_rx_queues = f_fdir->indices;
3114 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
3115 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
3122 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
3123 * @adapter: board private structure to initialize
3125 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
3126 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
3127 * rx queues out of the max number of rx queues, instead, it is used as the
3128 * index of the first rx queue used by FCoE.
3131 static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
3134 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
3136 f->indices = min((int)num_online_cpus(), f->indices);
3137 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
3138 adapter->num_rx_queues = 1;
3139 adapter->num_tx_queues = 1;
3140 #ifdef CONFIG_IXGBE_DCB
3141 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3142 DPRINTK(PROBE, INFO, "FCoE enabled with DCB \n");
3143 ixgbe_set_dcb_queues(adapter);
3146 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3147 DPRINTK(PROBE, INFO, "FCoE enabled with RSS \n");
3148 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
3149 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
3150 ixgbe_set_fdir_queues(adapter);
3152 ixgbe_set_rss_queues(adapter);
3154 /* adding FCoE rx rings to the end */
3155 f->mask = adapter->num_rx_queues;
3156 adapter->num_rx_queues += f->indices;
3157 adapter->num_tx_queues += f->indices;
3165 #endif /* IXGBE_FCOE */
3167 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
3168 * @adapter: board private structure to initialize
3170 * This is the top level queue allocation routine. The order here is very
3171 * important, starting with the "most" number of features turned on at once,
3172 * and ending with the smallest set of features. This way large combinations
3173 * can be allocated if they're turned on, and smaller combinations are the
3174 * fallthrough conditions.
3177 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
3180 if (ixgbe_set_fcoe_queues(adapter))
3183 #endif /* IXGBE_FCOE */
3184 #ifdef CONFIG_IXGBE_DCB
3185 if (ixgbe_set_dcb_queues(adapter))
3189 if (ixgbe_set_fdir_queues(adapter))
3192 if (ixgbe_set_rss_queues(adapter))
3195 /* fallback to base case */
3196 adapter->num_rx_queues = 1;
3197 adapter->num_tx_queues = 1;
3200 /* Notify the stack of the (possibly) reduced Tx Queue count. */
3201 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
3204 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
3207 int err, vector_threshold;
3209 /* We'll want at least 3 (vector_threshold):
3212 * 3) Other (Link Status Change, etc.)
3213 * 4) TCP Timer (optional)
3215 vector_threshold = MIN_MSIX_COUNT;
3217 /* The more we get, the more we will assign to Tx/Rx Cleanup
3218 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
3219 * Right now, we simply care about how many we'll get; we'll
3220 * set them up later while requesting irq's.
3222 while (vectors >= vector_threshold) {
3223 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
3225 if (!err) /* Success in acquiring all requested vectors. */
3228 vectors = 0; /* Nasty failure, quit now */
3229 else /* err == number of vectors we should try again with */
3233 if (vectors < vector_threshold) {
3234 /* Can't allocate enough MSI-X interrupts? Oh well.
3235 * This just means we'll go with either a single MSI
3236 * vector or fall back to legacy interrupts.
3238 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
3239 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3240 kfree(adapter->msix_entries);
3241 adapter->msix_entries = NULL;
3243 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
3245 * Adjust for only the vectors we'll use, which is minimum
3246 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
3247 * vectors we were allocated.
3249 adapter->num_msix_vectors = min(vectors,
3250 adapter->max_msix_q_vectors + NON_Q_VECTORS);
3255 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
3256 * @adapter: board private structure to initialize
3258 * Cache the descriptor ring offsets for RSS to the assigned rings.
3261 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
3266 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3267 for (i = 0; i < adapter->num_rx_queues; i++)
3268 adapter->rx_ring[i].reg_idx = i;
3269 for (i = 0; i < adapter->num_tx_queues; i++)
3270 adapter->tx_ring[i].reg_idx = i;
3279 #ifdef CONFIG_IXGBE_DCB
3281 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
3282 * @adapter: board private structure to initialize
3284 * Cache the descriptor ring offsets for DCB to the assigned rings.
3287 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
3291 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
3293 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3294 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3295 /* the number of queues is assumed to be symmetric */
3296 for (i = 0; i < dcb_i; i++) {
3297 adapter->rx_ring[i].reg_idx = i << 3;
3298 adapter->tx_ring[i].reg_idx = i << 2;
3301 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
3304 * Tx TC0 starts at: descriptor queue 0
3305 * Tx TC1 starts at: descriptor queue 32
3306 * Tx TC2 starts at: descriptor queue 64
3307 * Tx TC3 starts at: descriptor queue 80
3308 * Tx TC4 starts at: descriptor queue 96
3309 * Tx TC5 starts at: descriptor queue 104
3310 * Tx TC6 starts at: descriptor queue 112
3311 * Tx TC7 starts at: descriptor queue 120
3313 * Rx TC0-TC7 are offset by 16 queues each
3315 for (i = 0; i < 3; i++) {
3316 adapter->tx_ring[i].reg_idx = i << 5;
3317 adapter->rx_ring[i].reg_idx = i << 4;
3319 for ( ; i < 5; i++) {
3320 adapter->tx_ring[i].reg_idx =
3322 adapter->rx_ring[i].reg_idx = i << 4;
3324 for ( ; i < dcb_i; i++) {
3325 adapter->tx_ring[i].reg_idx =
3327 adapter->rx_ring[i].reg_idx = i << 4;
3331 } else if (dcb_i == 4) {
3333 * Tx TC0 starts at: descriptor queue 0
3334 * Tx TC1 starts at: descriptor queue 64
3335 * Tx TC2 starts at: descriptor queue 96
3336 * Tx TC3 starts at: descriptor queue 112
3338 * Rx TC0-TC3 are offset by 32 queues each
3340 adapter->tx_ring[0].reg_idx = 0;
3341 adapter->tx_ring[1].reg_idx = 64;
3342 adapter->tx_ring[2].reg_idx = 96;
3343 adapter->tx_ring[3].reg_idx = 112;
3344 for (i = 0 ; i < dcb_i; i++)
3345 adapter->rx_ring[i].reg_idx = i << 5;
3363 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
3364 * @adapter: board private structure to initialize
3366 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
3369 static bool inline ixgbe_cache_ring_fdir(struct ixgbe_adapter *adapter)
3374 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
3375 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
3376 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))) {
3377 for (i = 0; i < adapter->num_rx_queues; i++)
3378 adapter->rx_ring[i].reg_idx = i;
3379 for (i = 0; i < adapter->num_tx_queues; i++)
3380 adapter->tx_ring[i].reg_idx = i;
3389 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
3390 * @adapter: board private structure to initialize
3392 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
3395 static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
3397 int i, fcoe_rx_i = 0, fcoe_tx_i = 0;
3399 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
3401 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
3402 #ifdef CONFIG_IXGBE_DCB
3403 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3404 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
3406 ixgbe_cache_ring_dcb(adapter);
3407 /* find out queues in TC for FCoE */
3408 fcoe_rx_i = adapter->rx_ring[fcoe->tc].reg_idx + 1;
3409 fcoe_tx_i = adapter->tx_ring[fcoe->tc].reg_idx + 1;
3411 * In 82599, the number of Tx queues for each traffic
3412 * class for both 8-TC and 4-TC modes are:
3413 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
3414 * 8 TCs: 32 32 16 16 8 8 8 8
3415 * 4 TCs: 64 64 32 32
3416 * We have max 8 queues for FCoE, where 8 the is
3417 * FCoE redirection table size. If TC for FCoE is
3418 * less than or equal to TC3, we have enough queues
3419 * to add max of 8 queues for FCoE, so we start FCoE
3420 * tx descriptor from the next one, i.e., reg_idx + 1.
3421 * If TC for FCoE is above TC3, implying 8 TC mode,
3422 * and we need 8 for FCoE, we have to take all queues
3423 * in that traffic class for FCoE.
3425 if ((f->indices == IXGBE_FCRETA_SIZE) && (fcoe->tc > 3))
3428 #endif /* CONFIG_IXGBE_DCB */
3429 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3430 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
3431 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
3432 ixgbe_cache_ring_fdir(adapter);
3434 ixgbe_cache_ring_rss(adapter);
3436 fcoe_rx_i = f->mask;
3437 fcoe_tx_i = f->mask;
3439 for (i = 0; i < f->indices; i++, fcoe_rx_i++, fcoe_tx_i++) {
3440 adapter->rx_ring[f->mask + i].reg_idx = fcoe_rx_i;
3441 adapter->tx_ring[f->mask + i].reg_idx = fcoe_tx_i;
3448 #endif /* IXGBE_FCOE */
3450 * ixgbe_cache_ring_register - Descriptor ring to register mapping
3451 * @adapter: board private structure to initialize
3453 * Once we know the feature-set enabled for the device, we'll cache
3454 * the register offset the descriptor ring is assigned to.
3456 * Note, the order the various feature calls is important. It must start with
3457 * the "most" features enabled at the same time, then trickle down to the
3458 * least amount of features turned on at once.
3460 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
3462 /* start with default case */
3463 adapter->rx_ring[0].reg_idx = 0;
3464 adapter->tx_ring[0].reg_idx = 0;
3467 if (ixgbe_cache_ring_fcoe(adapter))
3470 #endif /* IXGBE_FCOE */
3471 #ifdef CONFIG_IXGBE_DCB
3472 if (ixgbe_cache_ring_dcb(adapter))
3476 if (ixgbe_cache_ring_fdir(adapter))
3479 if (ixgbe_cache_ring_rss(adapter))
3484 * ixgbe_alloc_queues - Allocate memory for all rings
3485 * @adapter: board private structure to initialize
3487 * We allocate one ring per queue at run-time since we don't know the
3488 * number of queues at compile-time. The polling_netdev array is
3489 * intended for Multiqueue, but should work fine with a single queue.
3491 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
3495 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
3496 sizeof(struct ixgbe_ring), GFP_KERNEL);
3497 if (!adapter->tx_ring)
3498 goto err_tx_ring_allocation;
3500 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
3501 sizeof(struct ixgbe_ring), GFP_KERNEL);
3502 if (!adapter->rx_ring)
3503 goto err_rx_ring_allocation;
3505 for (i = 0; i < adapter->num_tx_queues; i++) {
3506 adapter->tx_ring[i].count = adapter->tx_ring_count;
3507 adapter->tx_ring[i].queue_index = i;
3510 for (i = 0; i < adapter->num_rx_queues; i++) {
3511 adapter->rx_ring[i].count = adapter->rx_ring_count;
3512 adapter->rx_ring[i].queue_index = i;
3515 ixgbe_cache_ring_register(adapter);
3519 err_rx_ring_allocation:
3520 kfree(adapter->tx_ring);
3521 err_tx_ring_allocation:
3526 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
3527 * @adapter: board private structure to initialize
3529 * Attempt to configure the interrupts using the best available
3530 * capabilities of the hardware and the kernel.
3532 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
3534 struct ixgbe_hw *hw = &adapter->hw;
3536 int vector, v_budget;
3539 * It's easy to be greedy for MSI-X vectors, but it really
3540 * doesn't do us much good if we have a lot more vectors
3541 * than CPU's. So let's be conservative and only ask for
3542 * (roughly) twice the number of vectors as there are CPU's.
3544 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
3545 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
3548 * At the same time, hardware can only support a maximum of
3549 * hw.mac->max_msix_vectors vectors. With features
3550 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
3551 * descriptor queues supported by our device. Thus, we cap it off in
3552 * those rare cases where the cpu count also exceeds our vector limit.
3554 v_budget = min(v_budget, (int)hw->mac.max_msix_vectors);
3556 /* A failure in MSI-X entry allocation isn't fatal, but it does
3557 * mean we disable MSI-X capabilities of the adapter. */
3558 adapter->msix_entries = kcalloc(v_budget,
3559 sizeof(struct msix_entry), GFP_KERNEL);
3560 if (adapter->msix_entries) {
3561 for (vector = 0; vector < v_budget; vector++)
3562 adapter->msix_entries[vector].entry = vector;
3564 ixgbe_acquire_msix_vectors(adapter, v_budget);
3566 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3570 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
3571 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
3572 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
3573 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
3574 adapter->atr_sample_rate = 0;
3575 ixgbe_set_num_queues(adapter);
3577 err = pci_enable_msi(adapter->pdev);
3579 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
3581 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
3582 "falling back to legacy. Error: %d\n", err);
3592 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
3593 * @adapter: board private structure to initialize
3595 * We allocate one q_vector per queue interrupt. If allocation fails we
3598 static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)
3600 int q_idx, num_q_vectors;
3601 struct ixgbe_q_vector *q_vector;
3603 int (*poll)(struct napi_struct *, int);
3605 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3606 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3607 napi_vectors = adapter->num_rx_queues;
3608 poll = &ixgbe_clean_rxtx_many;
3615 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
3616 q_vector = kzalloc(sizeof(struct ixgbe_q_vector), GFP_KERNEL);
3619 q_vector->adapter = adapter;
3620 if (q_vector->txr_count && !q_vector->rxr_count)
3621 q_vector->eitr = adapter->tx_eitr_param;
3623 q_vector->eitr = adapter->rx_eitr_param;
3624 q_vector->v_idx = q_idx;
3625 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3626 adapter->q_vector[q_idx] = q_vector;
3634 q_vector = adapter->q_vector[q_idx];
3635 netif_napi_del(&q_vector->napi);
3637 adapter->q_vector[q_idx] = NULL;
3643 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
3644 * @adapter: board private structure to initialize
3646 * This function frees the memory allocated to the q_vectors. In addition if
3647 * NAPI is enabled it will delete any references to the NAPI struct prior
3648 * to freeing the q_vector.
3650 static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter)
3652 int q_idx, num_q_vectors;
3654 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3655 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3659 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
3660 struct ixgbe_q_vector *q_vector = adapter->q_vector[q_idx];
3661 adapter->q_vector[q_idx] = NULL;
3662 netif_napi_del(&q_vector->napi);
3667 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
3669 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3670 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3671 pci_disable_msix(adapter->pdev);
3672 kfree(adapter->msix_entries);
3673 adapter->msix_entries = NULL;
3674 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
3675 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
3676 pci_disable_msi(adapter->pdev);
3682 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
3683 * @adapter: board private structure to initialize
3685 * We determine which interrupt scheme to use based on...
3686 * - Kernel support (MSI, MSI-X)
3687 * - which can be user-defined (via MODULE_PARAM)
3688 * - Hardware queue count (num_*_queues)
3689 * - defined by miscellaneous hardware support/features (RSS, etc.)
3691 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
3695 /* Number of supported queues */
3696 ixgbe_set_num_queues(adapter);
3698 err = ixgbe_set_interrupt_capability(adapter);
3700 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
3701 goto err_set_interrupt;
3704 err = ixgbe_alloc_q_vectors(adapter);
3706 DPRINTK(PROBE, ERR, "Unable to allocate memory for queue "
3708 goto err_alloc_q_vectors;
3711 err = ixgbe_alloc_queues(adapter);
3713 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
3714 goto err_alloc_queues;
3717 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
3718 "Tx Queue count = %u\n",
3719 (adapter->num_rx_queues > 1) ? "Enabled" :
3720 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
3722 set_bit(__IXGBE_DOWN, &adapter->state);
3727 ixgbe_free_q_vectors(adapter);
3728 err_alloc_q_vectors:
3729 ixgbe_reset_interrupt_capability(adapter);
3735 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
3736 * @adapter: board private structure to clear interrupt scheme on
3738 * We go through and clear interrupt specific resources and reset the structure
3739 * to pre-load conditions
3741 void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter)
3743 kfree(adapter->tx_ring);
3744 kfree(adapter->rx_ring);
3745 adapter->tx_ring = NULL;
3746 adapter->rx_ring = NULL;
3748 ixgbe_free_q_vectors(adapter);
3749 ixgbe_reset_interrupt_capability(adapter);
3753 * ixgbe_sfp_timer - worker thread to find a missing module
3754 * @data: pointer to our adapter struct
3756 static void ixgbe_sfp_timer(unsigned long data)
3758 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3761 * Do the sfp_timer outside of interrupt context due to the
3762 * delays that sfp+ detection requires
3764 schedule_work(&adapter->sfp_task);
3768 * ixgbe_sfp_task - worker thread to find a missing module
3769 * @work: pointer to work_struct containing our data
3771 static void ixgbe_sfp_task(struct work_struct *work)
3773 struct ixgbe_adapter *adapter = container_of(work,
3774 struct ixgbe_adapter,
3776 struct ixgbe_hw *hw = &adapter->hw;
3778 if ((hw->phy.type == ixgbe_phy_nl) &&
3779 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
3780 s32 ret = hw->phy.ops.identify_sfp(hw);
3781 if (ret == IXGBE_ERR_SFP_NOT_PRESENT)
3783 ret = hw->phy.ops.reset(hw);
3784 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3785 dev_err(&adapter->pdev->dev, "failed to initialize "
3786 "because an unsupported SFP+ module type "
3788 "Reload the driver after installing a "
3789 "supported module.\n");
3790 unregister_netdev(adapter->netdev);
3792 DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
3795 /* don't need this routine any more */
3796 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
3800 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
3801 mod_timer(&adapter->sfp_timer,
3802 round_jiffies(jiffies + (2 * HZ)));
3806 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
3807 * @adapter: board private structure to initialize
3809 * ixgbe_sw_init initializes the Adapter private data structure.
3810 * Fields are initialized based on PCI device information and
3811 * OS network device settings (MTU size).
3813 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
3815 struct ixgbe_hw *hw = &adapter->hw;
3816 struct pci_dev *pdev = adapter->pdev;
3818 #ifdef CONFIG_IXGBE_DCB
3820 struct tc_configuration *tc;
3823 /* PCI config space info */
3825 hw->vendor_id = pdev->vendor;
3826 hw->device_id = pdev->device;
3827 hw->revision_id = pdev->revision;
3828 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3829 hw->subsystem_device_id = pdev->subsystem_device;
3831 /* Set capability flags */
3832 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
3833 adapter->ring_feature[RING_F_RSS].indices = rss;
3834 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
3835 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
3836 if (hw->mac.type == ixgbe_mac_82598EB) {
3837 if (hw->device_id == IXGBE_DEV_ID_82598AT)
3838 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
3839 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
3840 } else if (hw->mac.type == ixgbe_mac_82599EB) {
3841 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
3842 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
3843 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
3844 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
3845 adapter->ring_feature[RING_F_FDIR].indices =
3846 IXGBE_MAX_FDIR_INDICES;
3847 adapter->atr_sample_rate = 20;
3848 adapter->fdir_pballoc = 0;
3850 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
3851 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
3852 adapter->ring_feature[RING_F_FCOE].indices = 0;
3853 /* Default traffic class to use for FCoE */
3854 adapter->fcoe.tc = IXGBE_FCOE_DEFTC;
3855 #endif /* IXGBE_FCOE */
3858 #ifdef CONFIG_IXGBE_DCB
3859 /* Configure DCB traffic classes */
3860 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
3861 tc = &adapter->dcb_cfg.tc_config[j];
3862 tc->path[DCB_TX_CONFIG].bwg_id = 0;
3863 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
3864 tc->path[DCB_RX_CONFIG].bwg_id = 0;
3865 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
3866 tc->dcb_pfc = pfc_disabled;
3868 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
3869 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
3870 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
3871 adapter->dcb_cfg.pfc_mode_enable = false;
3872 adapter->dcb_cfg.round_robin_enable = false;
3873 adapter->dcb_set_bitmap = 0x00;
3874 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
3875 adapter->ring_feature[RING_F_DCB].indices);
3879 /* default flow control settings */
3880 hw->fc.requested_mode = ixgbe_fc_full;
3881 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
3883 adapter->last_lfc_mode = hw->fc.current_mode;
3885 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3886 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3887 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
3888 hw->fc.send_xon = true;
3889 hw->fc.disable_fc_autoneg = false;
3891 /* enable itr by default in dynamic mode */
3892 adapter->rx_itr_setting = 1;
3893 adapter->rx_eitr_param = 20000;
3894 adapter->tx_itr_setting = 1;
3895 adapter->tx_eitr_param = 10000;
3897 /* set defaults for eitr in MegaBytes */
3898 adapter->eitr_low = 10;
3899 adapter->eitr_high = 20;
3901 /* set default ring sizes */
3902 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
3903 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
3905 /* initialize eeprom parameters */
3906 if (ixgbe_init_eeprom_params_generic(hw)) {
3907 dev_err(&pdev->dev, "EEPROM initialization failed\n");
3911 /* enable rx csum by default */
3912 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
3914 set_bit(__IXGBE_DOWN, &adapter->state);
3920 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
3921 * @adapter: board private structure
3922 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3924 * Return 0 on success, negative on failure
3926 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
3927 struct ixgbe_ring *tx_ring)
3929 struct pci_dev *pdev = adapter->pdev;
3932 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
3933 tx_ring->tx_buffer_info = vmalloc(size);
3934 if (!tx_ring->tx_buffer_info)
3936 memset(tx_ring->tx_buffer_info, 0, size);
3938 /* round up to nearest 4K */
3939 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
3940 tx_ring->size = ALIGN(tx_ring->size, 4096);
3942 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
3947 tx_ring->next_to_use = 0;
3948 tx_ring->next_to_clean = 0;
3949 tx_ring->work_limit = tx_ring->count;
3953 vfree(tx_ring->tx_buffer_info);
3954 tx_ring->tx_buffer_info = NULL;
3955 DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
3956 "descriptor ring\n");
3961 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
3962 * @adapter: board private structure
3964 * If this function returns with an error, then it's possible one or
3965 * more of the rings is populated (while the rest are not). It is the
3966 * callers duty to clean those orphaned rings.
3968 * Return 0 on success, negative on failure
3970 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
3974 for (i = 0; i < adapter->num_tx_queues; i++) {
3975 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
3978 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
3986 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
3987 * @adapter: board private structure
3988 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3990 * Returns 0 on success, negative on failure
3992 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
3993 struct ixgbe_ring *rx_ring)
3995 struct pci_dev *pdev = adapter->pdev;
3998 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
3999 rx_ring->rx_buffer_info = vmalloc(size);
4000 if (!rx_ring->rx_buffer_info) {
4002 "vmalloc allocation failed for the rx desc ring\n");
4005 memset(rx_ring->rx_buffer_info, 0, size);
4007 /* Round up to nearest 4K */
4008 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4009 rx_ring->size = ALIGN(rx_ring->size, 4096);
4011 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
4013 if (!rx_ring->desc) {
4015 "Memory allocation failed for the rx desc ring\n");
4016 vfree(rx_ring->rx_buffer_info);
4020 rx_ring->next_to_clean = 0;
4021 rx_ring->next_to_use = 0;
4030 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4031 * @adapter: board private structure
4033 * If this function returns with an error, then it's possible one or
4034 * more of the rings is populated (while the rest are not). It is the
4035 * callers duty to clean those orphaned rings.
4037 * Return 0 on success, negative on failure
4040 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4044 for (i = 0; i < adapter->num_rx_queues; i++) {
4045 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
4048 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
4056 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4057 * @adapter: board private structure
4058 * @tx_ring: Tx descriptor ring for a specific queue
4060 * Free all transmit software resources
4062 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
4063 struct ixgbe_ring *tx_ring)
4065 struct pci_dev *pdev = adapter->pdev;
4067 ixgbe_clean_tx_ring(adapter, tx_ring);
4069 vfree(tx_ring->tx_buffer_info);
4070 tx_ring->tx_buffer_info = NULL;
4072 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
4074 tx_ring->desc = NULL;
4078 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4079 * @adapter: board private structure
4081 * Free all transmit software resources
4083 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4087 for (i = 0; i < adapter->num_tx_queues; i++)
4088 if (adapter->tx_ring[i].desc)
4089 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
4093 * ixgbe_free_rx_resources - Free Rx Resources
4094 * @adapter: board private structure
4095 * @rx_ring: ring to clean the resources from
4097 * Free all receive software resources
4099 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
4100 struct ixgbe_ring *rx_ring)
4102 struct pci_dev *pdev = adapter->pdev;
4104 ixgbe_clean_rx_ring(adapter, rx_ring);
4106 vfree(rx_ring->rx_buffer_info);
4107 rx_ring->rx_buffer_info = NULL;
4109 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
4111 rx_ring->desc = NULL;
4115 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4116 * @adapter: board private structure
4118 * Free all receive software resources
4120 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4124 for (i = 0; i < adapter->num_rx_queues; i++)
4125 if (adapter->rx_ring[i].desc)
4126 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
4130 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4131 * @netdev: network interface device structure
4132 * @new_mtu: new value for maximum frame size
4134 * Returns 0 on success, negative on failure
4136 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4138 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4139 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4141 /* MTU < 68 is an error and causes problems on some kernels */
4142 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4145 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
4146 netdev->mtu, new_mtu);
4147 /* must set new MTU before calling down or up */
4148 netdev->mtu = new_mtu;
4150 if (netif_running(netdev))
4151 ixgbe_reinit_locked(adapter);
4157 * ixgbe_open - Called when a network interface is made active
4158 * @netdev: network interface device structure
4160 * Returns 0 on success, negative value on failure
4162 * The open entry point is called when a network interface is made
4163 * active by the system (IFF_UP). At this point all resources needed
4164 * for transmit and receive operations are allocated, the interrupt
4165 * handler is registered with the OS, the watchdog timer is started,
4166 * and the stack is notified that the interface is ready.
4168 static int ixgbe_open(struct net_device *netdev)
4170 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4173 /* disallow open during test */
4174 if (test_bit(__IXGBE_TESTING, &adapter->state))
4177 netif_carrier_off(netdev);
4179 /* allocate transmit descriptors */
4180 err = ixgbe_setup_all_tx_resources(adapter);
4184 /* allocate receive descriptors */
4185 err = ixgbe_setup_all_rx_resources(adapter);
4189 ixgbe_configure(adapter);
4191 err = ixgbe_request_irq(adapter);
4195 err = ixgbe_up_complete(adapter);
4199 netif_tx_start_all_queues(netdev);
4204 ixgbe_release_hw_control(adapter);
4205 ixgbe_free_irq(adapter);
4208 ixgbe_free_all_rx_resources(adapter);
4210 ixgbe_free_all_tx_resources(adapter);
4211 ixgbe_reset(adapter);
4217 * ixgbe_close - Disables a network interface
4218 * @netdev: network interface device structure
4220 * Returns 0, this is not allowed to fail
4222 * The close entry point is called when an interface is de-activated
4223 * by the OS. The hardware is still under the drivers control, but
4224 * needs to be disabled. A global MAC reset is issued to stop the
4225 * hardware, and all transmit and receive resources are freed.
4227 static int ixgbe_close(struct net_device *netdev)
4229 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4231 ixgbe_down(adapter);
4232 ixgbe_free_irq(adapter);
4234 ixgbe_free_all_tx_resources(adapter);
4235 ixgbe_free_all_rx_resources(adapter);
4237 ixgbe_release_hw_control(adapter);
4243 static int ixgbe_resume(struct pci_dev *pdev)
4245 struct net_device *netdev = pci_get_drvdata(pdev);
4246 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4249 pci_set_power_state(pdev, PCI_D0);
4250 pci_restore_state(pdev);
4252 err = pci_enable_device_mem(pdev);
4254 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
4258 pci_set_master(pdev);
4260 pci_wake_from_d3(pdev, false);
4262 err = ixgbe_init_interrupt_scheme(adapter);
4264 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
4269 ixgbe_reset(adapter);
4271 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4273 if (netif_running(netdev)) {
4274 err = ixgbe_open(adapter->netdev);
4279 netif_device_attach(netdev);
4283 #endif /* CONFIG_PM */
4285 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
4287 struct net_device *netdev = pci_get_drvdata(pdev);
4288 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4289 struct ixgbe_hw *hw = &adapter->hw;
4291 u32 wufc = adapter->wol;
4296 netif_device_detach(netdev);
4298 if (netif_running(netdev)) {
4299 ixgbe_down(adapter);
4300 ixgbe_free_irq(adapter);
4301 ixgbe_free_all_tx_resources(adapter);
4302 ixgbe_free_all_rx_resources(adapter);
4304 ixgbe_clear_interrupt_scheme(adapter);
4307 retval = pci_save_state(pdev);
4313 ixgbe_set_rx_mode(netdev);
4315 /* turn on all-multi mode if wake on multicast is enabled */
4316 if (wufc & IXGBE_WUFC_MC) {
4317 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4318 fctrl |= IXGBE_FCTRL_MPE;
4319 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4322 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
4323 ctrl |= IXGBE_CTRL_GIO_DIS;
4324 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
4326 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
4328 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
4329 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
4332 if (wufc && hw->mac.type == ixgbe_mac_82599EB)
4333 pci_wake_from_d3(pdev, true);
4335 pci_wake_from_d3(pdev, false);
4337 *enable_wake = !!wufc;
4339 ixgbe_release_hw_control(adapter);
4341 pci_disable_device(pdev);
4347 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
4352 retval = __ixgbe_shutdown(pdev, &wake);
4357 pci_prepare_to_sleep(pdev);
4359 pci_wake_from_d3(pdev, false);
4360 pci_set_power_state(pdev, PCI_D3hot);
4365 #endif /* CONFIG_PM */
4367 static void ixgbe_shutdown(struct pci_dev *pdev)
4371 __ixgbe_shutdown(pdev, &wake);
4373 if (system_state == SYSTEM_POWER_OFF) {
4374 pci_wake_from_d3(pdev, wake);
4375 pci_set_power_state(pdev, PCI_D3hot);
4380 * ixgbe_update_stats - Update the board statistics counters.
4381 * @adapter: board private structure
4383 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
4385 struct ixgbe_hw *hw = &adapter->hw;
4387 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
4389 if (hw->mac.type == ixgbe_mac_82599EB) {
4391 for (i = 0; i < 16; i++)
4392 adapter->hw_rx_no_dma_resources +=
4393 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
4394 for (i = 0; i < adapter->num_rx_queues; i++)
4395 rsc_count += adapter->rx_ring[i].rsc_count;
4396 adapter->rsc_count = rsc_count;
4399 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
4400 for (i = 0; i < 8; i++) {
4401 /* for packet buffers not used, the register should read 0 */
4402 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
4404 adapter->stats.mpc[i] += mpc;
4405 total_mpc += adapter->stats.mpc[i];
4406 if (hw->mac.type == ixgbe_mac_82598EB)
4407 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
4408 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
4409 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
4410 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
4411 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
4412 if (hw->mac.type == ixgbe_mac_82599EB) {
4413 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
4414 IXGBE_PXONRXCNT(i));
4415 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
4416 IXGBE_PXOFFRXCNT(i));
4417 adapter->stats.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
4419 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
4421 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
4424 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
4426 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
4429 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
4430 /* work around hardware counting issue */
4431 adapter->stats.gprc -= missed_rx;
4433 /* 82598 hardware only has a 32 bit counter in the high register */
4434 if (hw->mac.type == ixgbe_mac_82599EB) {
4435 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
4436 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
4437 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
4438 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
4439 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL);
4440 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
4441 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
4442 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
4443 adapter->stats.fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
4444 adapter->stats.fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
4446 adapter->stats.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
4447 adapter->stats.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
4448 adapter->stats.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
4449 adapter->stats.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
4450 adapter->stats.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
4451 adapter->stats.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
4452 #endif /* IXGBE_FCOE */
4454 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
4455 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
4456 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
4457 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
4458 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
4460 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
4461 adapter->stats.bprc += bprc;
4462 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
4463 if (hw->mac.type == ixgbe_mac_82598EB)
4464 adapter->stats.mprc -= bprc;
4465 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
4466 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
4467 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
4468 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
4469 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
4470 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
4471 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
4472 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
4473 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
4474 adapter->stats.lxontxc += lxon;
4475 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
4476 adapter->stats.lxofftxc += lxoff;
4477 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
4478 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
4479 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
4481 * 82598 errata - tx of flow control packets is included in tx counters
4483 xon_off_tot = lxon + lxoff;
4484 adapter->stats.gptc -= xon_off_tot;
4485 adapter->stats.mptc -= xon_off_tot;
4486 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
4487 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
4488 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
4489 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
4490 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
4491 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
4492 adapter->stats.ptc64 -= xon_off_tot;
4493 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
4494 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
4495 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
4496 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
4497 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
4498 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
4500 /* Fill out the OS statistics structure */
4501 adapter->net_stats.multicast = adapter->stats.mprc;
4504 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
4505 adapter->stats.rlec;
4506 adapter->net_stats.rx_dropped = 0;
4507 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
4508 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
4509 adapter->net_stats.rx_missed_errors = total_mpc;
4513 * ixgbe_watchdog - Timer Call-back
4514 * @data: pointer to adapter cast into an unsigned long
4516 static void ixgbe_watchdog(unsigned long data)
4518 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
4519 struct ixgbe_hw *hw = &adapter->hw;
4524 * Do the watchdog outside of interrupt context due to the lovely
4525 * delays that some of the newer hardware requires
4528 if (test_bit(__IXGBE_DOWN, &adapter->state))
4529 goto watchdog_short_circuit;
4531 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
4533 * for legacy and MSI interrupts don't set any bits
4534 * that are enabled for EIAM, because this operation
4535 * would set *both* EIMS and EICS for any bit in EIAM
4537 IXGBE_WRITE_REG(hw, IXGBE_EICS,
4538 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
4539 goto watchdog_reschedule;
4542 /* get one bit for every active tx/rx interrupt vector */
4543 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
4544 struct ixgbe_q_vector *qv = adapter->q_vector[i];
4545 if (qv->rxr_count || qv->txr_count)
4546 eics |= ((u64)1 << i);
4549 /* Cause software interrupt to ensure rx rings are cleaned */
4550 ixgbe_irq_rearm_queues(adapter, eics);
4552 watchdog_reschedule:
4553 /* Reset the timer */
4554 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
4556 watchdog_short_circuit:
4557 schedule_work(&adapter->watchdog_task);
4561 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
4562 * @work: pointer to work_struct containing our data
4564 static void ixgbe_multispeed_fiber_task(struct work_struct *work)
4566 struct ixgbe_adapter *adapter = container_of(work,
4567 struct ixgbe_adapter,
4568 multispeed_fiber_task);
4569 struct ixgbe_hw *hw = &adapter->hw;
4573 adapter->flags |= IXGBE_FLAG_IN_SFP_LINK_TASK;
4574 autoneg = hw->phy.autoneg_advertised;
4575 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
4576 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
4577 if (hw->mac.ops.setup_link)
4578 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
4579 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4580 adapter->flags &= ~IXGBE_FLAG_IN_SFP_LINK_TASK;
4584 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
4585 * @work: pointer to work_struct containing our data
4587 static void ixgbe_sfp_config_module_task(struct work_struct *work)
4589 struct ixgbe_adapter *adapter = container_of(work,
4590 struct ixgbe_adapter,
4591 sfp_config_module_task);
4592 struct ixgbe_hw *hw = &adapter->hw;
4595 adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK;
4597 /* Time for electrical oscillations to settle down */
4599 err = hw->phy.ops.identify_sfp(hw);
4601 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4602 dev_err(&adapter->pdev->dev, "failed to initialize because "
4603 "an unsupported SFP+ module type was detected.\n"
4604 "Reload the driver after installing a supported "
4606 unregister_netdev(adapter->netdev);
4609 hw->mac.ops.setup_sfp(hw);
4611 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
4612 /* This will also work for DA Twinax connections */
4613 schedule_work(&adapter->multispeed_fiber_task);
4614 adapter->flags &= ~IXGBE_FLAG_IN_SFP_MOD_TASK;
4618 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
4619 * @work: pointer to work_struct containing our data
4621 static void ixgbe_fdir_reinit_task(struct work_struct *work)
4623 struct ixgbe_adapter *adapter = container_of(work,
4624 struct ixgbe_adapter,
4626 struct ixgbe_hw *hw = &adapter->hw;
4629 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
4630 for (i = 0; i < adapter->num_tx_queues; i++)
4631 set_bit(__IXGBE_FDIR_INIT_DONE,
4632 &(adapter->tx_ring[i].reinit_state));
4634 DPRINTK(PROBE, ERR, "failed to finish FDIR re-initialization, "
4635 "ignored adding FDIR ATR filters \n");
4637 /* Done FDIR Re-initialization, enable transmits */
4638 netif_tx_start_all_queues(adapter->netdev);
4642 * ixgbe_watchdog_task - worker thread to bring link up
4643 * @work: pointer to work_struct containing our data
4645 static void ixgbe_watchdog_task(struct work_struct *work)
4647 struct ixgbe_adapter *adapter = container_of(work,
4648 struct ixgbe_adapter,
4650 struct net_device *netdev = adapter->netdev;
4651 struct ixgbe_hw *hw = &adapter->hw;
4652 u32 link_speed = adapter->link_speed;
4653 bool link_up = adapter->link_up;
4655 struct ixgbe_ring *tx_ring;
4656 int some_tx_pending = 0;
4658 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
4660 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
4661 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
4664 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4665 for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
4666 hw->mac.ops.fc_enable(hw, i);
4668 hw->mac.ops.fc_enable(hw, 0);
4671 hw->mac.ops.fc_enable(hw, 0);
4676 time_after(jiffies, (adapter->link_check_timeout +
4677 IXGBE_TRY_LINK_TIMEOUT))) {
4678 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4679 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
4681 adapter->link_up = link_up;
4682 adapter->link_speed = link_speed;
4686 if (!netif_carrier_ok(netdev)) {
4687 bool flow_rx, flow_tx;
4689 if (hw->mac.type == ixgbe_mac_82599EB) {
4690 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
4691 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
4692 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
4693 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
4695 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4696 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
4697 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
4698 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
4701 printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
4702 "Flow Control: %s\n",
4704 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
4706 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
4707 "1 Gbps" : "unknown speed")),
4708 ((flow_rx && flow_tx) ? "RX/TX" :
4710 (flow_tx ? "TX" : "None"))));
4712 netif_carrier_on(netdev);
4714 /* Force detection of hung controller */
4715 adapter->detect_tx_hung = true;
4718 adapter->link_up = false;
4719 adapter->link_speed = 0;
4720 if (netif_carrier_ok(netdev)) {
4721 printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
4723 netif_carrier_off(netdev);
4727 if (!netif_carrier_ok(netdev)) {
4728 for (i = 0; i < adapter->num_tx_queues; i++) {
4729 tx_ring = &adapter->tx_ring[i];
4730 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
4731 some_tx_pending = 1;
4736 if (some_tx_pending) {
4737 /* We've lost link, so the controller stops DMA,
4738 * but we've got queued Tx work that's never going
4739 * to get done, so reset controller to flush Tx.
4740 * (Do the reset outside of interrupt context).
4742 schedule_work(&adapter->reset_task);
4746 ixgbe_update_stats(adapter);
4747 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
4750 static int ixgbe_tso(struct ixgbe_adapter *adapter,
4751 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
4752 u32 tx_flags, u8 *hdr_len)
4754 struct ixgbe_adv_tx_context_desc *context_desc;
4757 struct ixgbe_tx_buffer *tx_buffer_info;
4758 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
4759 u32 mss_l4len_idx, l4len;
4761 if (skb_is_gso(skb)) {
4762 if (skb_header_cloned(skb)) {
4763 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4767 l4len = tcp_hdrlen(skb);
4770 if (skb->protocol == htons(ETH_P_IP)) {
4771 struct iphdr *iph = ip_hdr(skb);
4774 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4778 adapter->hw_tso_ctxt++;
4779 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
4780 ipv6_hdr(skb)->payload_len = 0;
4781 tcp_hdr(skb)->check =
4782 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4783 &ipv6_hdr(skb)->daddr,
4785 adapter->hw_tso6_ctxt++;
4788 i = tx_ring->next_to_use;
4790 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4791 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
4793 /* VLAN MACLEN IPLEN */
4794 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
4796 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
4797 vlan_macip_lens |= ((skb_network_offset(skb)) <<
4798 IXGBE_ADVTXD_MACLEN_SHIFT);
4799 *hdr_len += skb_network_offset(skb);
4801 (skb_transport_header(skb) - skb_network_header(skb));
4803 (skb_transport_header(skb) - skb_network_header(skb));
4804 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4805 context_desc->seqnum_seed = 0;
4807 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4808 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
4809 IXGBE_ADVTXD_DTYP_CTXT);
4811 if (skb->protocol == htons(ETH_P_IP))
4812 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
4813 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
4814 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
4818 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
4819 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
4820 /* use index 1 for TSO */
4821 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
4822 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
4824 tx_buffer_info->time_stamp = jiffies;
4825 tx_buffer_info->next_to_watch = i;
4828 if (i == tx_ring->count)
4830 tx_ring->next_to_use = i;
4837 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
4838 struct ixgbe_ring *tx_ring,
4839 struct sk_buff *skb, u32 tx_flags)
4841 struct ixgbe_adv_tx_context_desc *context_desc;
4843 struct ixgbe_tx_buffer *tx_buffer_info;
4844 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
4846 if (skb->ip_summed == CHECKSUM_PARTIAL ||
4847 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
4848 i = tx_ring->next_to_use;
4849 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4850 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
4852 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
4854 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
4855 vlan_macip_lens |= (skb_network_offset(skb) <<
4856 IXGBE_ADVTXD_MACLEN_SHIFT);
4857 if (skb->ip_summed == CHECKSUM_PARTIAL)
4858 vlan_macip_lens |= (skb_transport_header(skb) -
4859 skb_network_header(skb));
4861 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4862 context_desc->seqnum_seed = 0;
4864 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
4865 IXGBE_ADVTXD_DTYP_CTXT);
4867 if (skb->ip_summed == CHECKSUM_PARTIAL) {
4868 switch (skb->protocol) {
4869 case cpu_to_be16(ETH_P_IP):
4870 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
4871 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4873 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4874 else if (ip_hdr(skb)->protocol == IPPROTO_SCTP)
4876 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
4878 case cpu_to_be16(ETH_P_IPV6):
4879 /* XXX what about other V6 headers?? */
4880 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4882 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4883 else if (ipv6_hdr(skb)->nexthdr == IPPROTO_SCTP)
4885 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
4888 if (unlikely(net_ratelimit())) {
4889 DPRINTK(PROBE, WARNING,
4890 "partial checksum but proto=%x!\n",
4897 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
4898 /* use index zero for tx checksum offload */
4899 context_desc->mss_l4len_idx = 0;
4901 tx_buffer_info->time_stamp = jiffies;
4902 tx_buffer_info->next_to_watch = i;
4904 adapter->hw_csum_tx_good++;
4906 if (i == tx_ring->count)
4908 tx_ring->next_to_use = i;
4916 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4917 struct ixgbe_ring *tx_ring,
4918 struct sk_buff *skb, u32 tx_flags,
4921 struct ixgbe_tx_buffer *tx_buffer_info;
4923 unsigned int total = skb->len;
4924 unsigned int offset = 0, size, count = 0, i;
4925 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
4929 i = tx_ring->next_to_use;
4931 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
4932 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
4936 map = skb_shinfo(skb)->dma_maps;
4938 if (tx_flags & IXGBE_TX_FLAGS_FCOE)
4939 /* excluding fcoe_crc_eof for FCoE */
4940 total -= sizeof(struct fcoe_crc_eof);
4942 len = min(skb_headlen(skb), total);
4944 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4945 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
4947 tx_buffer_info->length = size;
4948 tx_buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
4949 tx_buffer_info->time_stamp = jiffies;
4950 tx_buffer_info->next_to_watch = i;
4959 if (i == tx_ring->count)
4964 for (f = 0; f < nr_frags; f++) {
4965 struct skb_frag_struct *frag;
4967 frag = &skb_shinfo(skb)->frags[f];
4968 len = min((unsigned int)frag->size, total);
4973 if (i == tx_ring->count)
4976 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4977 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
4979 tx_buffer_info->length = size;
4980 tx_buffer_info->dma = map[f] + offset;
4981 tx_buffer_info->time_stamp = jiffies;
4982 tx_buffer_info->next_to_watch = i;
4993 tx_ring->tx_buffer_info[i].skb = skb;
4994 tx_ring->tx_buffer_info[first].next_to_watch = i;
4999 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
5000 struct ixgbe_ring *tx_ring,
5001 int tx_flags, int count, u32 paylen, u8 hdr_len)
5003 union ixgbe_adv_tx_desc *tx_desc = NULL;
5004 struct ixgbe_tx_buffer *tx_buffer_info;
5005 u32 olinfo_status = 0, cmd_type_len = 0;
5007 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
5009 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
5011 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
5013 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5014 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
5016 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
5017 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
5019 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
5020 IXGBE_ADVTXD_POPTS_SHIFT;
5022 /* use index 1 context for tso */
5023 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
5024 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
5025 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
5026 IXGBE_ADVTXD_POPTS_SHIFT;
5028 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
5029 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
5030 IXGBE_ADVTXD_POPTS_SHIFT;
5032 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
5033 olinfo_status |= IXGBE_ADVTXD_CC;
5034 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
5035 if (tx_flags & IXGBE_TX_FLAGS_FSO)
5036 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
5039 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
5041 i = tx_ring->next_to_use;
5043 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5044 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
5045 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
5046 tx_desc->read.cmd_type_len =
5047 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
5048 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5050 if (i == tx_ring->count)
5054 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
5057 * Force memory writes to complete before letting h/w
5058 * know there are new descriptors to fetch. (Only
5059 * applicable for weak-ordered memory model archs,
5064 tx_ring->next_to_use = i;
5065 writel(i, adapter->hw.hw_addr + tx_ring->tail);
5068 static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb,
5069 int queue, u32 tx_flags)
5071 /* Right now, we support IPv4 only */
5072 struct ixgbe_atr_input atr_input;
5075 struct iphdr *iph = ip_hdr(skb);
5076 struct ethhdr *eth = (struct ethhdr *)skb->data;
5077 u16 vlan_id, src_port, dst_port, flex_bytes;
5078 u32 src_ipv4_addr, dst_ipv4_addr;
5081 /* check if we're UDP or TCP */
5082 if (iph->protocol == IPPROTO_TCP) {
5084 src_port = th->source;
5085 dst_port = th->dest;
5086 l4type |= IXGBE_ATR_L4TYPE_TCP;
5087 /* l4type IPv4 type is 0, no need to assign */
5088 } else if(iph->protocol == IPPROTO_UDP) {
5090 src_port = uh->source;
5091 dst_port = uh->dest;
5092 l4type |= IXGBE_ATR_L4TYPE_UDP;
5093 /* l4type IPv4 type is 0, no need to assign */
5095 /* Unsupported L4 header, just bail here */
5099 memset(&atr_input, 0, sizeof(struct ixgbe_atr_input));
5101 vlan_id = (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK) >>
5102 IXGBE_TX_FLAGS_VLAN_SHIFT;
5103 src_ipv4_addr = iph->saddr;
5104 dst_ipv4_addr = iph->daddr;
5105 flex_bytes = eth->h_proto;
5107 ixgbe_atr_set_vlan_id_82599(&atr_input, vlan_id);
5108 ixgbe_atr_set_src_port_82599(&atr_input, dst_port);
5109 ixgbe_atr_set_dst_port_82599(&atr_input, src_port);
5110 ixgbe_atr_set_flex_byte_82599(&atr_input, flex_bytes);
5111 ixgbe_atr_set_l4type_82599(&atr_input, l4type);
5112 /* src and dst are inverted, think how the receiver sees them */
5113 ixgbe_atr_set_src_ipv4_82599(&atr_input, dst_ipv4_addr);
5114 ixgbe_atr_set_dst_ipv4_82599(&atr_input, src_ipv4_addr);
5116 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
5117 ixgbe_fdir_add_signature_filter_82599(&adapter->hw, &atr_input, queue);
5120 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
5121 struct ixgbe_ring *tx_ring, int size)
5123 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5125 netif_stop_subqueue(netdev, tx_ring->queue_index);
5126 /* Herbert's original patch had:
5127 * smp_mb__after_netif_stop_queue();
5128 * but since that doesn't exist yet, just open code it. */
5131 /* We need to check again in a case another CPU has just
5132 * made room available. */
5133 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
5136 /* A reprieve! - use start_queue because it doesn't call schedule */
5137 netif_start_subqueue(netdev, tx_ring->queue_index);
5138 ++adapter->restart_queue;
5142 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
5143 struct ixgbe_ring *tx_ring, int size)
5145 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
5147 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
5150 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
5152 struct ixgbe_adapter *adapter = netdev_priv(dev);
5154 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE)
5155 return smp_processor_id();
5157 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
5158 return (skb->vlan_tci & IXGBE_TX_FLAGS_VLAN_PRIO_MASK) >> 13;
5160 return skb_tx_hash(dev, skb);
5163 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
5164 struct net_device *netdev)
5166 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5167 struct ixgbe_ring *tx_ring;
5169 unsigned int tx_flags = 0;
5175 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
5176 tx_flags |= vlan_tx_tag_get(skb);
5177 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5178 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
5179 tx_flags |= (skb->queue_mapping << 13);
5181 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
5182 tx_flags |= IXGBE_TX_FLAGS_VLAN;
5183 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5184 if (skb->priority != TC_PRIO_CONTROL) {
5185 tx_flags |= (skb->queue_mapping << 13);
5186 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
5187 tx_flags |= IXGBE_TX_FLAGS_VLAN;
5189 skb->queue_mapping =
5190 adapter->ring_feature[RING_F_DCB].indices-1;
5194 r_idx = skb->queue_mapping;
5195 tx_ring = &adapter->tx_ring[r_idx];
5197 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
5198 (skb->protocol == htons(ETH_P_FCOE))) {
5199 tx_flags |= IXGBE_TX_FLAGS_FCOE;
5201 r_idx = smp_processor_id();
5202 r_idx &= (adapter->ring_feature[RING_F_FCOE].indices - 1);
5203 r_idx += adapter->ring_feature[RING_F_FCOE].mask;
5204 tx_ring = &adapter->tx_ring[r_idx];
5207 /* four things can cause us to need a context descriptor */
5208 if (skb_is_gso(skb) ||
5209 (skb->ip_summed == CHECKSUM_PARTIAL) ||
5210 (tx_flags & IXGBE_TX_FLAGS_VLAN) ||
5211 (tx_flags & IXGBE_TX_FLAGS_FCOE))
5214 count += TXD_USE_COUNT(skb_headlen(skb));
5215 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5216 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5218 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
5220 return NETDEV_TX_BUSY;
5223 first = tx_ring->next_to_use;
5224 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
5226 /* setup tx offload for FCoE */
5227 tso = ixgbe_fso(adapter, tx_ring, skb, tx_flags, &hdr_len);
5229 dev_kfree_skb_any(skb);
5230 return NETDEV_TX_OK;
5233 tx_flags |= IXGBE_TX_FLAGS_FSO;
5234 #endif /* IXGBE_FCOE */
5236 if (skb->protocol == htons(ETH_P_IP))
5237 tx_flags |= IXGBE_TX_FLAGS_IPV4;
5238 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
5240 dev_kfree_skb_any(skb);
5241 return NETDEV_TX_OK;
5245 tx_flags |= IXGBE_TX_FLAGS_TSO;
5246 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
5247 (skb->ip_summed == CHECKSUM_PARTIAL))
5248 tx_flags |= IXGBE_TX_FLAGS_CSUM;
5251 count = ixgbe_tx_map(adapter, tx_ring, skb, tx_flags, first);
5253 /* add the ATR filter if ATR is on */
5254 if (tx_ring->atr_sample_rate) {
5255 ++tx_ring->atr_count;
5256 if ((tx_ring->atr_count >= tx_ring->atr_sample_rate) &&
5257 test_bit(__IXGBE_FDIR_INIT_DONE,
5258 &tx_ring->reinit_state)) {
5259 ixgbe_atr(adapter, skb, tx_ring->queue_index,
5261 tx_ring->atr_count = 0;
5264 ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len,
5266 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
5269 dev_kfree_skb_any(skb);
5270 tx_ring->tx_buffer_info[first].time_stamp = 0;
5271 tx_ring->next_to_use = first;
5274 return NETDEV_TX_OK;
5278 * ixgbe_get_stats - Get System Network Statistics
5279 * @netdev: network interface device structure
5281 * Returns the address of the device statistics structure.
5282 * The statistics are actually updated from the timer callback.
5284 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
5286 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5288 /* only return the current stats */
5289 return &adapter->net_stats;
5293 * ixgbe_set_mac - Change the Ethernet Address of the NIC
5294 * @netdev: network interface device structure
5295 * @p: pointer to an address structure
5297 * Returns 0 on success, negative on failure
5299 static int ixgbe_set_mac(struct net_device *netdev, void *p)
5301 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5302 struct ixgbe_hw *hw = &adapter->hw;
5303 struct sockaddr *addr = p;
5305 if (!is_valid_ether_addr(addr->sa_data))
5306 return -EADDRNOTAVAIL;
5308 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
5309 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
5311 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
5317 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
5319 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5320 struct ixgbe_hw *hw = &adapter->hw;
5324 if (prtad != hw->phy.mdio.prtad)
5326 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
5332 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
5333 u16 addr, u16 value)
5335 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5336 struct ixgbe_hw *hw = &adapter->hw;
5338 if (prtad != hw->phy.mdio.prtad)
5340 return hw->phy.ops.write_reg(hw, addr, devad, value);
5343 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
5345 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5347 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
5351 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
5353 * @netdev: network interface device structure
5355 * Returns non-zero on failure
5357 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
5360 struct ixgbe_adapter *adapter = netdev_priv(dev);
5361 struct ixgbe_mac_info *mac = &adapter->hw.mac;
5363 if (is_valid_ether_addr(mac->san_addr)) {
5365 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
5372 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
5374 * @netdev: network interface device structure
5376 * Returns non-zero on failure
5378 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
5381 struct ixgbe_adapter *adapter = netdev_priv(dev);
5382 struct ixgbe_mac_info *mac = &adapter->hw.mac;
5384 if (is_valid_ether_addr(mac->san_addr)) {
5386 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
5392 #ifdef CONFIG_NET_POLL_CONTROLLER
5394 * Polling 'interrupt' - used by things like netconsole to send skbs
5395 * without having to re-enable interrupts. It's not called while
5396 * the interrupt routine is executing.
5398 static void ixgbe_netpoll(struct net_device *netdev)
5400 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5403 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
5404 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5405 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5406 for (i = 0; i < num_q_vectors; i++) {
5407 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
5408 ixgbe_msix_clean_many(0, q_vector);
5411 ixgbe_intr(adapter->pdev->irq, netdev);
5413 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
5417 static const struct net_device_ops ixgbe_netdev_ops = {
5418 .ndo_open = ixgbe_open,
5419 .ndo_stop = ixgbe_close,
5420 .ndo_start_xmit = ixgbe_xmit_frame,
5421 .ndo_select_queue = ixgbe_select_queue,
5422 .ndo_get_stats = ixgbe_get_stats,
5423 .ndo_set_rx_mode = ixgbe_set_rx_mode,
5424 .ndo_set_multicast_list = ixgbe_set_rx_mode,
5425 .ndo_validate_addr = eth_validate_addr,
5426 .ndo_set_mac_address = ixgbe_set_mac,
5427 .ndo_change_mtu = ixgbe_change_mtu,
5428 .ndo_tx_timeout = ixgbe_tx_timeout,
5429 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
5430 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
5431 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
5432 .ndo_do_ioctl = ixgbe_ioctl,
5433 #ifdef CONFIG_NET_POLL_CONTROLLER
5434 .ndo_poll_controller = ixgbe_netpoll,
5437 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
5438 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
5439 .ndo_fcoe_enable = ixgbe_fcoe_enable,
5440 .ndo_fcoe_disable = ixgbe_fcoe_disable,
5441 #endif /* IXGBE_FCOE */
5445 * ixgbe_probe - Device Initialization Routine
5446 * @pdev: PCI device information struct
5447 * @ent: entry in ixgbe_pci_tbl
5449 * Returns 0 on success, negative on failure
5451 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
5452 * The OS initialization, configuring of the adapter private structure,
5453 * and a hardware reset occur.
5455 static int __devinit ixgbe_probe(struct pci_dev *pdev,
5456 const struct pci_device_id *ent)
5458 struct net_device *netdev;
5459 struct ixgbe_adapter *adapter = NULL;
5460 struct ixgbe_hw *hw;
5461 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
5462 static int cards_found;
5463 int i, err, pci_using_dac;
5469 err = pci_enable_device_mem(pdev);
5473 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
5474 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
5477 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5479 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5481 dev_err(&pdev->dev, "No usable DMA "
5482 "configuration, aborting\n");
5489 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
5490 IORESOURCE_MEM), ixgbe_driver_name);
5493 "pci_request_selected_regions failed 0x%x\n", err);
5497 err = pci_enable_pcie_error_reporting(pdev);
5499 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
5501 /* non-fatal, continue */
5504 pci_set_master(pdev);
5505 pci_save_state(pdev);
5507 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
5510 goto err_alloc_etherdev;
5513 SET_NETDEV_DEV(netdev, &pdev->dev);
5515 pci_set_drvdata(pdev, netdev);
5516 adapter = netdev_priv(netdev);
5518 adapter->netdev = netdev;
5519 adapter->pdev = pdev;
5522 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
5524 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
5525 pci_resource_len(pdev, 0));
5531 for (i = 1; i <= 5; i++) {
5532 if (pci_resource_len(pdev, i) == 0)
5536 netdev->netdev_ops = &ixgbe_netdev_ops;
5537 ixgbe_set_ethtool_ops(netdev);
5538 netdev->watchdog_timeo = 5 * HZ;
5539 strcpy(netdev->name, pci_name(pdev));
5541 adapter->bd_number = cards_found;
5544 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
5545 hw->mac.type = ii->mac;
5548 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
5549 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
5550 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
5551 if (!(eec & (1 << 8)))
5552 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
5555 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
5556 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
5557 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
5558 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
5559 hw->phy.mdio.mmds = 0;
5560 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
5561 hw->phy.mdio.dev = netdev;
5562 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
5563 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
5565 /* set up this timer and work struct before calling get_invariants
5566 * which might start the timer
5568 init_timer(&adapter->sfp_timer);
5569 adapter->sfp_timer.function = &ixgbe_sfp_timer;
5570 adapter->sfp_timer.data = (unsigned long) adapter;
5572 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
5574 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
5575 INIT_WORK(&adapter->multispeed_fiber_task, ixgbe_multispeed_fiber_task);
5577 /* a new SFP+ module arrival, called from GPI SDP2 context */
5578 INIT_WORK(&adapter->sfp_config_module_task,
5579 ixgbe_sfp_config_module_task);
5581 ii->get_invariants(hw);
5583 /* setup the private structure */
5584 err = ixgbe_sw_init(adapter);
5589 * If there is a fan on this device and it has failed log the
5592 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5593 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5594 if (esdp & IXGBE_ESDP_SDP1)
5595 DPRINTK(PROBE, CRIT,
5596 "Fan has stopped, replace the adapter\n");
5599 /* reset_hw fills in the perm_addr as well */
5600 err = hw->mac.ops.reset_hw(hw);
5601 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
5602 hw->mac.type == ixgbe_mac_82598EB) {
5604 * Start a kernel thread to watch for a module to arrive.
5605 * Only do this for 82598, since 82599 will generate
5606 * interrupts on module arrival.
5608 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
5609 mod_timer(&adapter->sfp_timer,
5610 round_jiffies(jiffies + (2 * HZ)));
5612 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
5613 dev_err(&adapter->pdev->dev, "failed to initialize because "
5614 "an unsupported SFP+ module type was detected.\n"
5615 "Reload the driver after installing a supported "
5619 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
5623 netdev->features = NETIF_F_SG |
5625 NETIF_F_HW_VLAN_TX |
5626 NETIF_F_HW_VLAN_RX |
5627 NETIF_F_HW_VLAN_FILTER;
5629 netdev->features |= NETIF_F_IPV6_CSUM;
5630 netdev->features |= NETIF_F_TSO;
5631 netdev->features |= NETIF_F_TSO6;
5632 netdev->features |= NETIF_F_GRO;
5634 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
5635 netdev->features |= NETIF_F_SCTP_CSUM;
5637 netdev->vlan_features |= NETIF_F_TSO;
5638 netdev->vlan_features |= NETIF_F_TSO6;
5639 netdev->vlan_features |= NETIF_F_IP_CSUM;
5640 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
5641 netdev->vlan_features |= NETIF_F_SG;
5643 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
5644 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
5646 #ifdef CONFIG_IXGBE_DCB
5647 netdev->dcbnl_ops = &dcbnl_ops;
5651 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
5652 if (hw->mac.ops.get_device_caps) {
5653 hw->mac.ops.get_device_caps(hw, &device_caps);
5654 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
5655 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5658 #endif /* IXGBE_FCOE */
5660 netdev->features |= NETIF_F_HIGHDMA;
5662 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
5663 netdev->features |= NETIF_F_LRO;
5665 /* make sure the EEPROM is good */
5666 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
5667 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
5672 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
5673 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
5675 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
5676 dev_err(&pdev->dev, "invalid MAC address\n");
5681 init_timer(&adapter->watchdog_timer);
5682 adapter->watchdog_timer.function = &ixgbe_watchdog;
5683 adapter->watchdog_timer.data = (unsigned long)adapter;
5685 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
5686 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
5688 err = ixgbe_init_interrupt_scheme(adapter);
5692 switch (pdev->device) {
5693 case IXGBE_DEV_ID_82599_KX4:
5694 adapter->wol = (IXGBE_WUFC_MAG | IXGBE_WUFC_EX |
5695 IXGBE_WUFC_MC | IXGBE_WUFC_BC);
5696 /* Enable ACPI wakeup in GRC */
5697 IXGBE_WRITE_REG(hw, IXGBE_GRC,
5698 (IXGBE_READ_REG(hw, IXGBE_GRC) & ~IXGBE_GRC_APME));
5704 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
5706 /* pick up the PCI bus settings for reporting later */
5707 hw->mac.ops.get_bus_info(hw);
5709 /* print bus type/speed/width info */
5710 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
5711 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s":
5712 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"),
5713 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" :
5714 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" :
5715 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" :
5718 ixgbe_read_pba_num_generic(hw, &part_num);
5719 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
5720 dev_info(&pdev->dev, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
5721 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
5722 (part_num >> 8), (part_num & 0xff));
5724 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5725 hw->mac.type, hw->phy.type,
5726 (part_num >> 8), (part_num & 0xff));
5728 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
5729 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
5730 "this card is not sufficient for optimal "
5732 dev_warn(&pdev->dev, "For optimal performance a x8 "
5733 "PCI-Express slot is required.\n");
5736 /* save off EEPROM version number */
5737 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
5739 /* reset the hardware with the new settings */
5740 err = hw->mac.ops.start_hw(hw);
5742 if (err == IXGBE_ERR_EEPROM_VERSION) {
5743 /* We are running on a pre-production device, log a warning */
5744 dev_warn(&pdev->dev, "This device is a pre-production "
5745 "adapter/LOM. Please be aware there may be issues "
5746 "associated with your hardware. If you are "
5747 "experiencing problems please contact your Intel or "
5748 "hardware representative who provided you with this "
5751 strcpy(netdev->name, "eth%d");
5752 err = register_netdev(netdev);
5756 /* carrier off reporting is important to ethtool even BEFORE open */
5757 netif_carrier_off(netdev);
5759 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5760 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5761 INIT_WORK(&adapter->fdir_reinit_task, ixgbe_fdir_reinit_task);
5763 #ifdef CONFIG_IXGBE_DCA
5764 if (dca_add_requester(&pdev->dev) == 0) {
5765 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
5766 ixgbe_setup_dca(adapter);
5769 /* add san mac addr to netdev */
5770 ixgbe_add_sanmac_netdev(netdev);
5772 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
5777 ixgbe_release_hw_control(adapter);
5778 ixgbe_clear_interrupt_scheme(adapter);
5781 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
5782 del_timer_sync(&adapter->sfp_timer);
5783 cancel_work_sync(&adapter->sfp_task);
5784 cancel_work_sync(&adapter->multispeed_fiber_task);
5785 cancel_work_sync(&adapter->sfp_config_module_task);
5786 iounmap(hw->hw_addr);
5788 free_netdev(netdev);
5790 pci_release_selected_regions(pdev, pci_select_bars(pdev,
5794 pci_disable_device(pdev);
5799 * ixgbe_remove - Device Removal Routine
5800 * @pdev: PCI device information struct
5802 * ixgbe_remove is called by the PCI subsystem to alert the driver
5803 * that it should release a PCI device. The could be caused by a
5804 * Hot-Plug event, or because the driver is going to be removed from
5807 static void __devexit ixgbe_remove(struct pci_dev *pdev)
5809 struct net_device *netdev = pci_get_drvdata(pdev);
5810 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5813 set_bit(__IXGBE_DOWN, &adapter->state);
5814 /* clear the module not found bit to make sure the worker won't
5817 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
5818 del_timer_sync(&adapter->watchdog_timer);
5820 del_timer_sync(&adapter->sfp_timer);
5821 cancel_work_sync(&adapter->watchdog_task);
5822 cancel_work_sync(&adapter->sfp_task);
5823 cancel_work_sync(&adapter->multispeed_fiber_task);
5824 cancel_work_sync(&adapter->sfp_config_module_task);
5825 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5826 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5827 cancel_work_sync(&adapter->fdir_reinit_task);
5828 flush_scheduled_work();
5830 #ifdef CONFIG_IXGBE_DCA
5831 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
5832 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
5833 dca_remove_requester(&pdev->dev);
5834 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
5839 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
5840 ixgbe_cleanup_fcoe(adapter);
5842 #endif /* IXGBE_FCOE */
5844 /* remove the added san mac */
5845 ixgbe_del_sanmac_netdev(netdev);
5847 if (netdev->reg_state == NETREG_REGISTERED)
5848 unregister_netdev(netdev);
5850 ixgbe_clear_interrupt_scheme(adapter);
5852 ixgbe_release_hw_control(adapter);
5854 iounmap(adapter->hw.hw_addr);
5855 pci_release_selected_regions(pdev, pci_select_bars(pdev,
5858 DPRINTK(PROBE, INFO, "complete\n");
5860 free_netdev(netdev);
5862 err = pci_disable_pcie_error_reporting(pdev);
5865 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
5867 pci_disable_device(pdev);
5871 * ixgbe_io_error_detected - called when PCI error is detected
5872 * @pdev: Pointer to PCI device
5873 * @state: The current pci connection state
5875 * This function is called after a PCI bus error affecting
5876 * this device has been detected.
5878 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
5879 pci_channel_state_t state)
5881 struct net_device *netdev = pci_get_drvdata(pdev);
5882 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5884 netif_device_detach(netdev);
5886 if (state == pci_channel_io_perm_failure)
5887 return PCI_ERS_RESULT_DISCONNECT;
5889 if (netif_running(netdev))
5890 ixgbe_down(adapter);
5891 pci_disable_device(pdev);
5893 /* Request a slot reset. */
5894 return PCI_ERS_RESULT_NEED_RESET;
5898 * ixgbe_io_slot_reset - called after the pci bus has been reset.
5899 * @pdev: Pointer to PCI device
5901 * Restart the card from scratch, as if from a cold-boot.
5903 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
5905 struct net_device *netdev = pci_get_drvdata(pdev);
5906 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5907 pci_ers_result_t result;
5910 if (pci_enable_device_mem(pdev)) {
5912 "Cannot re-enable PCI device after reset.\n");
5913 result = PCI_ERS_RESULT_DISCONNECT;
5915 pci_set_master(pdev);
5916 pci_restore_state(pdev);
5918 pci_wake_from_d3(pdev, false);
5920 ixgbe_reset(adapter);
5921 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5922 result = PCI_ERS_RESULT_RECOVERED;
5925 err = pci_cleanup_aer_uncorrect_error_status(pdev);
5928 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
5929 /* non-fatal, continue */
5936 * ixgbe_io_resume - called when traffic can start flowing again.
5937 * @pdev: Pointer to PCI device
5939 * This callback is called when the error recovery driver tells us that
5940 * its OK to resume normal operation.
5942 static void ixgbe_io_resume(struct pci_dev *pdev)
5944 struct net_device *netdev = pci_get_drvdata(pdev);
5945 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5947 if (netif_running(netdev)) {
5948 if (ixgbe_up(adapter)) {
5949 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
5954 netif_device_attach(netdev);
5957 static struct pci_error_handlers ixgbe_err_handler = {
5958 .error_detected = ixgbe_io_error_detected,
5959 .slot_reset = ixgbe_io_slot_reset,
5960 .resume = ixgbe_io_resume,
5963 static struct pci_driver ixgbe_driver = {
5964 .name = ixgbe_driver_name,
5965 .id_table = ixgbe_pci_tbl,
5966 .probe = ixgbe_probe,
5967 .remove = __devexit_p(ixgbe_remove),
5969 .suspend = ixgbe_suspend,
5970 .resume = ixgbe_resume,
5972 .shutdown = ixgbe_shutdown,
5973 .err_handler = &ixgbe_err_handler
5977 * ixgbe_init_module - Driver Registration Routine
5979 * ixgbe_init_module is the first routine called when the driver is
5980 * loaded. All it does is register with the PCI subsystem.
5982 static int __init ixgbe_init_module(void)
5985 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
5986 ixgbe_driver_string, ixgbe_driver_version);
5988 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
5990 #ifdef CONFIG_IXGBE_DCA
5991 dca_register_notify(&dca_notifier);
5994 ret = pci_register_driver(&ixgbe_driver);
5998 module_init(ixgbe_init_module);
6001 * ixgbe_exit_module - Driver Exit Cleanup Routine
6003 * ixgbe_exit_module is called just before the driver is removed
6006 static void __exit ixgbe_exit_module(void)
6008 #ifdef CONFIG_IXGBE_DCA
6009 dca_unregister_notify(&dca_notifier);
6011 pci_unregister_driver(&ixgbe_driver);
6014 #ifdef CONFIG_IXGBE_DCA
6015 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
6020 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
6021 __ixgbe_notify_dca);
6023 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6026 #endif /* CONFIG_IXGBE_DCA */
6029 * ixgbe_get_hw_dev_name - return device name string
6030 * used by hardware layer to print debugging information
6032 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
6034 struct ixgbe_adapter *adapter = hw->back;
6035 return adapter->netdev->name;
6039 module_exit(ixgbe_exit_module);