2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
40 #include <linux/mutex.h>
41 #include <linux/radix-tree.h>
42 #include <linux/timer.h>
43 #include <linux/semaphore.h>
44 #include <linux/workqueue.h>
46 #include <linux/mlx4/device.h>
47 #include <linux/mlx4/driver.h>
48 #include <linux/mlx4/doorbell.h>
50 #define DRV_NAME "mlx4_core"
51 #define PFX DRV_NAME ": "
52 #define DRV_VERSION "0.01"
53 #define DRV_RELDATE "May 1, 2007"
56 MLX4_HCR_BASE = 0x80680,
57 MLX4_HCR_SIZE = 0x0001c,
58 MLX4_CLR_INT_SIZE = 0x00008
62 MLX4_MGM_ENTRY_SIZE = 0x100,
63 MLX4_QP_PER_MGM = 4 * (MLX4_MGM_ENTRY_SIZE / 16 - 2),
64 MLX4_MTT_ENTRY_PER_SEG = 8
68 MLX4_NUM_PDS = 1 << 15
72 MLX4_CMPT_TYPE_QP = 0,
73 MLX4_CMPT_TYPE_SRQ = 1,
74 MLX4_CMPT_TYPE_CQ = 2,
75 MLX4_CMPT_TYPE_EQ = 3,
81 MLX4_NUM_CMPTS = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT
84 #ifdef CONFIG_MLX4_DEBUG
85 extern int mlx4_debug_level;
86 #else /* CONFIG_MLX4_DEBUG */
87 #define mlx4_debug_level (0)
88 #endif /* CONFIG_MLX4_DEBUG */
90 #define mlx4_dbg(mdev, format, arg...) \
92 if (mlx4_debug_level) \
93 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
96 #define mlx4_err(mdev, format, arg...) \
97 dev_err(&mdev->pdev->dev, format, ## arg)
98 #define mlx4_info(mdev, format, arg...) \
99 dev_info(&mdev->pdev->dev, format, ## arg)
100 #define mlx4_warn(mdev, format, arg...) \
101 dev_warn(&mdev->pdev->dev, format, ## arg)
110 unsigned long *table;
114 unsigned long **bits;
115 unsigned int *num_free;
122 struct mlx4_icm_table {
130 struct mlx4_icm **icm;
134 struct mlx4_dev *dev;
135 void __iomem *doorbell;
141 struct mlx4_buf_list *page_list;
145 struct mlx4_profile {
158 struct mlx4_icm *fw_icm;
159 struct mlx4_icm *aux_icm;
167 struct pci_pool *pool;
169 struct mutex hcr_mutex;
170 struct semaphore poll_sem;
171 struct semaphore event_sem;
173 spinlock_t context_lock;
175 struct mlx4_cmd_context *context;
181 struct mlx4_uar_table {
182 struct mlx4_bitmap bitmap;
185 struct mlx4_mr_table {
186 struct mlx4_bitmap mpt_bitmap;
187 struct mlx4_buddy mtt_buddy;
190 struct mlx4_icm_table mtt_table;
191 struct mlx4_icm_table dmpt_table;
194 struct mlx4_cq_table {
195 struct mlx4_bitmap bitmap;
197 struct radix_tree_root tree;
198 struct mlx4_icm_table table;
199 struct mlx4_icm_table cmpt_table;
202 struct mlx4_eq_table {
203 struct mlx4_bitmap bitmap;
205 void __iomem *clr_int;
206 void __iomem **uar_map;
209 struct mlx4_icm_table table;
210 struct mlx4_icm_table cmpt_table;
215 struct mlx4_srq_table {
216 struct mlx4_bitmap bitmap;
218 struct radix_tree_root tree;
219 struct mlx4_icm_table table;
220 struct mlx4_icm_table cmpt_table;
223 struct mlx4_qp_table {
224 struct mlx4_bitmap bitmap;
228 struct mlx4_icm_table qp_table;
229 struct mlx4_icm_table auxc_table;
230 struct mlx4_icm_table altc_table;
231 struct mlx4_icm_table rdmarc_table;
232 struct mlx4_icm_table cmpt_table;
235 struct mlx4_mcg_table {
237 struct mlx4_bitmap bitmap;
238 struct mlx4_icm_table table;
241 struct mlx4_catas_err {
243 struct timer_list timer;
244 struct list_head list;
247 #define MLX4_MAX_MAC_NUM 128
248 #define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3)
250 struct mlx4_mac_table {
251 __be64 entries[MLX4_MAX_MAC_NUM];
252 int refs[MLX4_MAX_MAC_NUM];
258 #define MLX4_MAX_VLAN_NUM 128
259 #define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2)
261 struct mlx4_vlan_table {
262 __be32 entries[MLX4_MAX_VLAN_NUM];
263 int refs[MLX4_MAX_VLAN_NUM];
269 struct mlx4_port_info {
270 struct mlx4_dev *dev;
273 struct device_attribute port_attr;
274 enum mlx4_port_type tmp_type;
275 struct mlx4_mac_table mac_table;
276 struct mlx4_vlan_table vlan_table;
280 struct mlx4_dev *dev;
281 u8 do_sense_port[MLX4_MAX_PORTS + 1];
282 u8 sense_allowed[MLX4_MAX_PORTS + 1];
283 struct delayed_work sense_poll;
289 struct list_head dev_list;
290 struct list_head ctx_list;
293 struct list_head pgdir_list;
294 struct mutex pgdir_mutex;
299 struct mlx4_bitmap pd_bitmap;
300 struct mlx4_uar_table uar_table;
301 struct mlx4_mr_table mr_table;
302 struct mlx4_cq_table cq_table;
303 struct mlx4_eq_table eq_table;
304 struct mlx4_srq_table srq_table;
305 struct mlx4_qp_table qp_table;
306 struct mlx4_mcg_table mcg_table;
308 struct mlx4_catas_err catas_err;
310 void __iomem *clr_base;
312 struct mlx4_uar driver_uar;
314 struct mlx4_port_info port[MLX4_MAX_PORTS + 1];
315 struct mlx4_sense sense;
316 struct mutex port_mutex;
319 static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)
321 return container_of(dev, struct mlx4_priv, dev);
324 #define MLX4_SENSE_RANGE (HZ * 3)
326 extern struct workqueue_struct *mlx4_wq;
328 u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);
329 void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj);
330 u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align);
331 void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt);
332 int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask,
333 u32 reserved_bot, u32 resetrved_top);
334 void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap);
336 int mlx4_reset(struct mlx4_dev *dev);
338 int mlx4_alloc_eq_table(struct mlx4_dev *dev);
339 void mlx4_free_eq_table(struct mlx4_dev *dev);
341 int mlx4_init_pd_table(struct mlx4_dev *dev);
342 int mlx4_init_uar_table(struct mlx4_dev *dev);
343 int mlx4_init_mr_table(struct mlx4_dev *dev);
344 int mlx4_init_eq_table(struct mlx4_dev *dev);
345 int mlx4_init_cq_table(struct mlx4_dev *dev);
346 int mlx4_init_qp_table(struct mlx4_dev *dev);
347 int mlx4_init_srq_table(struct mlx4_dev *dev);
348 int mlx4_init_mcg_table(struct mlx4_dev *dev);
350 void mlx4_cleanup_pd_table(struct mlx4_dev *dev);
351 void mlx4_cleanup_uar_table(struct mlx4_dev *dev);
352 void mlx4_cleanup_mr_table(struct mlx4_dev *dev);
353 void mlx4_cleanup_eq_table(struct mlx4_dev *dev);
354 void mlx4_cleanup_cq_table(struct mlx4_dev *dev);
355 void mlx4_cleanup_qp_table(struct mlx4_dev *dev);
356 void mlx4_cleanup_srq_table(struct mlx4_dev *dev);
357 void mlx4_cleanup_mcg_table(struct mlx4_dev *dev);
359 void mlx4_start_catas_poll(struct mlx4_dev *dev);
360 void mlx4_stop_catas_poll(struct mlx4_dev *dev);
361 void mlx4_catas_init(void);
362 int mlx4_restart_one(struct pci_dev *pdev);
363 int mlx4_register_device(struct mlx4_dev *dev);
364 void mlx4_unregister_device(struct mlx4_dev *dev);
365 void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port);
368 struct mlx4_init_hca_param;
370 u64 mlx4_make_profile(struct mlx4_dev *dev,
371 struct mlx4_profile *request,
372 struct mlx4_dev_cap *dev_cap,
373 struct mlx4_init_hca_param *init_hca);
375 int mlx4_cmd_init(struct mlx4_dev *dev);
376 void mlx4_cmd_cleanup(struct mlx4_dev *dev);
377 void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param);
378 int mlx4_cmd_use_events(struct mlx4_dev *dev);
379 void mlx4_cmd_use_polling(struct mlx4_dev *dev);
381 void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
382 void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
384 void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type);
386 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
388 void mlx4_handle_catas_err(struct mlx4_dev *dev);
390 void mlx4_do_sense_ports(struct mlx4_dev *dev,
391 enum mlx4_port_type *stype,
392 enum mlx4_port_type *defaults);
393 void mlx4_start_sense(struct mlx4_dev *dev);
394 void mlx4_stop_sense(struct mlx4_dev *dev);
395 void mlx4_sense_init(struct mlx4_dev *dev);
396 int mlx4_check_port_params(struct mlx4_dev *dev,
397 enum mlx4_port_type *port_type);
398 int mlx4_change_port_types(struct mlx4_dev *dev,
399 enum mlx4_port_type *port_types);
401 void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table);
402 void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table);
404 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port);
405 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps);