2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 #include <linux/compiler.h>
38 #include <linux/list.h>
39 #include <linux/mutex.h>
40 #include <linux/netdevice.h>
42 #include <linux/mlx4/device.h>
43 #include <linux/mlx4/qp.h>
44 #include <linux/mlx4/cq.h>
45 #include <linux/mlx4/srq.h>
46 #include <linux/mlx4/doorbell.h>
47 #include <linux/mlx4/cmd.h>
51 #define DRV_NAME "mlx4_en"
52 #define DRV_VERSION "1.5.1.6"
53 #define DRV_RELDATE "August 2010"
55 #define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN)
62 #define MLX4_EN_PAGE_SHIFT 12
63 #define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT)
64 #define MAX_RX_RINGS 16
65 #define MIN_RX_RINGS 4
67 #define HEADROOM (2048 / TXBB_SIZE + 1)
68 #define STAMP_STRIDE 64
69 #define STAMP_DWORDS (STAMP_STRIDE / 4)
70 #define STAMP_SHIFT 31
71 #define STAMP_VAL 0x7fffffff
72 #define STATS_DELAY (HZ / 4)
74 /* Typical TSO descriptor with 16 gather entries is 352 bytes... */
75 #define MAX_DESC_SIZE 512
76 #define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE)
79 * OS related constants and tunables
82 #define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ)
84 #define MLX4_EN_ALLOC_ORDER 2
85 #define MLX4_EN_ALLOC_SIZE (PAGE_SIZE << MLX4_EN_ALLOC_ORDER)
87 #define MLX4_EN_MAX_LRO_DESCRIPTORS 32
89 /* Receive fragment sizes; we use at most 4 fragments (for 9600 byte MTU
90 * and 4K allocations) */
92 FRAG_SZ0 = 512 - NET_IP_ALIGN,
95 FRAG_SZ3 = MLX4_EN_ALLOC_SIZE
97 #define MLX4_EN_MAX_RX_FRAGS 4
99 /* Maximum ring sizes */
100 #define MLX4_EN_MAX_TX_SIZE 8192
101 #define MLX4_EN_MAX_RX_SIZE 8192
103 /* Minimum ring size for our page-allocation sceme to work */
104 #define MLX4_EN_MIN_RX_SIZE (MLX4_EN_ALLOC_SIZE / SMP_CACHE_BYTES)
105 #define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE)
107 #define MLX4_EN_SMALL_PKT_SIZE 64
108 #define MLX4_EN_NUM_TX_RINGS 8
109 #define MLX4_EN_NUM_PPP_RINGS 8
110 #define MAX_TX_RINGS (MLX4_EN_NUM_TX_RINGS + MLX4_EN_NUM_PPP_RINGS)
111 #define MLX4_EN_DEF_TX_RING_SIZE 512
112 #define MLX4_EN_DEF_RX_RING_SIZE 1024
114 /* Target number of packets to coalesce with interrupt moderation */
115 #define MLX4_EN_RX_COAL_TARGET 44
116 #define MLX4_EN_RX_COAL_TIME 0x10
118 #define MLX4_EN_TX_COAL_PKTS 5
119 #define MLX4_EN_TX_COAL_TIME 0x80
121 #define MLX4_EN_RX_RATE_LOW 400000
122 #define MLX4_EN_RX_COAL_TIME_LOW 0
123 #define MLX4_EN_RX_RATE_HIGH 450000
124 #define MLX4_EN_RX_COAL_TIME_HIGH 128
125 #define MLX4_EN_RX_SIZE_THRESH 1024
126 #define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH)
127 #define MLX4_EN_SAMPLE_INTERVAL 0
128 #define MLX4_EN_AVG_PKT_SMALL 256
130 #define MLX4_EN_AUTO_CONF 0xffff
132 #define MLX4_EN_DEF_RX_PAUSE 1
133 #define MLX4_EN_DEF_TX_PAUSE 1
135 /* Interval between successive polls in the Tx routine when polling is used
136 instead of interrupts (in per-core Tx rings) - should be power of 2 */
137 #define MLX4_EN_TX_POLL_MODER 16
138 #define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4)
140 #define ETH_LLC_SNAP_SIZE 8
142 #define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN)
143 #define HEADER_COPY_SIZE (128 - NET_IP_ALIGN)
144 #define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETH_HLEN)
146 #define MLX4_EN_MIN_MTU 46
147 #define ETH_BCAST 0xffffffffffffULL
149 #define MLX4_EN_LOOPBACK_RETRIES 5
150 #define MLX4_EN_LOOPBACK_TIMEOUT 100
152 #ifdef MLX4_EN_PERF_STAT
153 /* Number of samples to 'average' */
155 #define AVG_FACTOR 1024
156 #define NUM_PERF_STATS NUM_PERF_COUNTERS
158 #define INC_PERF_COUNTER(cnt) (++(cnt))
159 #define ADD_PERF_COUNTER(cnt, add) ((cnt) += (add))
160 #define AVG_PERF_COUNTER(cnt, sample) \
161 ((cnt) = ((cnt) * (AVG_SIZE - 1) + (sample) * AVG_FACTOR) / AVG_SIZE)
162 #define GET_PERF_COUNTER(cnt) (cnt)
163 #define GET_AVG_PERF_COUNTER(cnt) ((cnt) / AVG_FACTOR)
167 #define NUM_PERF_STATS 0
168 #define INC_PERF_COUNTER(cnt) do {} while (0)
169 #define ADD_PERF_COUNTER(cnt, add) do {} while (0)
170 #define AVG_PERF_COUNTER(cnt, sample) do {} while (0)
171 #define GET_PERF_COUNTER(cnt) (0)
172 #define GET_AVG_PERF_COUNTER(cnt) (0)
173 #endif /* MLX4_EN_PERF_STAT */
188 #define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x))
189 #define XNOR(x, y) (!(x) == !(y))
190 #define ILLEGAL_MAC(addr) (addr == 0xffffffffffffULL || addr == 0x0)
193 struct mlx4_en_tx_info {
202 #define MLX4_EN_BIT_DESC_OWN 0x80000000
203 #define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg)
204 #define MLX4_EN_MEMTYPE_PAD 0x100
205 #define DS_SIZE sizeof(struct mlx4_wqe_data_seg)
208 struct mlx4_en_tx_desc {
209 struct mlx4_wqe_ctrl_seg ctrl;
211 struct mlx4_wqe_data_seg data; /* at least one data segment */
212 struct mlx4_wqe_lso_seg lso;
213 struct mlx4_wqe_inline_seg inl;
217 #define MLX4_EN_USE_SRQ 0x01000000
219 #define MLX4_EN_CX3_LOW_ID 0x1000
220 #define MLX4_EN_CX3_HIGH_ID 0x1005
222 struct mlx4_en_rx_alloc {
227 struct mlx4_en_tx_ring {
228 struct mlx4_hwq_resources wqres;
229 u32 size ; /* number of TXBBs */
232 u16 cqn; /* index of port CQ associated with this ring */
240 struct mlx4_en_tx_info *tx_info;
244 struct mlx4_qp_context context;
246 enum mlx4_qp_state qp_state;
247 struct mlx4_srq dummy;
249 unsigned long packets;
250 spinlock_t comp_lock;
253 struct mlx4_en_rx_desc {
254 /* actual number of entries depends on rx ring stride */
255 struct mlx4_wqe_data_seg data[0];
258 struct mlx4_en_rx_ring {
259 struct mlx4_hwq_resources wqres;
260 struct mlx4_en_rx_alloc page_alloc[MLX4_EN_MAX_RX_FRAGS];
261 u32 size ; /* number of Rx descs*/
266 u16 cqn; /* index of port CQ associated with this ring */
273 unsigned long packets;
277 static inline int mlx4_en_can_lro(__be16 status)
279 return (status & cpu_to_be16(MLX4_CQE_STATUS_IPV4 |
280 MLX4_CQE_STATUS_IPV4F |
281 MLX4_CQE_STATUS_IPV6 |
282 MLX4_CQE_STATUS_IPV4OPT |
283 MLX4_CQE_STATUS_TCP |
284 MLX4_CQE_STATUS_UDP |
285 MLX4_CQE_STATUS_IPOK)) ==
286 cpu_to_be16(MLX4_CQE_STATUS_IPV4 |
287 MLX4_CQE_STATUS_IPOK |
288 MLX4_CQE_STATUS_TCP);
293 struct mlx4_hwq_resources wqres;
296 struct net_device *dev;
297 struct napi_struct napi;
298 /* Per-core Tx cq processing support */
299 struct timer_list timer;
306 struct mlx4_cqe *buf;
307 #define MLX4_EN_OPCODE_ERROR 0x1e
310 struct mlx4_en_port_profile {
322 struct mlx4_en_profile {
330 struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];
334 struct mlx4_dev *dev;
335 struct pci_dev *pdev;
336 struct mutex state_lock;
337 struct net_device *pndev[MLX4_MAX_PORTS + 1];
340 struct mlx4_en_profile profile;
342 struct workqueue_struct *workqueue;
343 struct device *dma_device;
344 void __iomem *uar_map;
345 struct mlx4_uar priv_uar;
349 u8 mac_removed[MLX4_MAX_PORTS + 1];
353 struct mlx4_en_rss_map {
355 struct mlx4_qp qps[MAX_RX_RINGS];
356 enum mlx4_qp_state state[MAX_RX_RINGS];
357 struct mlx4_qp indir_qp;
358 enum mlx4_qp_state indir_state;
361 struct mlx4_en_rss_context {
371 struct mlx4_en_port_state {
377 struct mlx4_en_pkt_stats {
378 unsigned long broadcast;
379 unsigned long rx_prio[8];
380 unsigned long tx_prio[8];
381 #define NUM_PKT_STATS 17
384 struct mlx4_en_port_stats {
385 unsigned long tso_packets;
386 unsigned long queue_stopped;
387 unsigned long wake_queue;
388 unsigned long tx_timeout;
389 unsigned long rx_alloc_failed;
390 unsigned long rx_chksum_good;
391 unsigned long rx_chksum_none;
392 unsigned long tx_chksum_offload;
393 #define NUM_PORT_STATS 8
396 struct mlx4_en_perf_stats {
403 #define NUM_PERF_COUNTERS 6
406 struct mlx4_en_frag_info {
408 u16 frag_prefix_size;
415 struct mlx4_en_priv {
416 struct mlx4_en_dev *mdev;
417 struct mlx4_en_port_profile *prof;
418 struct net_device *dev;
419 struct vlan_group *vlgrp;
420 struct net_device_stats stats;
421 struct net_device_stats ret_stats;
422 struct mlx4_en_port_state port_state;
423 spinlock_t stats_lock;
425 unsigned long last_moder_packets;
426 unsigned long last_moder_tx_packets;
427 unsigned long last_moder_bytes;
428 unsigned long last_moder_jiffies;
439 u16 adaptive_rx_coal;
442 u32 validate_loopback;
444 struct mlx4_hwq_resources res;
458 struct mlx4_en_rss_map rss_map;
460 #define MLX4_EN_FLAG_PROMISC 0x1
461 #define MLX4_EN_FLAG_MC_PROMISC 0x2
465 struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS];
469 struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS];
471 struct mlx4_en_rx_ring rx_ring[MAX_RX_RINGS];
472 struct mlx4_en_cq tx_cq[MAX_TX_RINGS];
473 struct mlx4_en_cq rx_cq[MAX_RX_RINGS];
474 struct work_struct mcast_task;
475 struct work_struct mac_task;
476 struct work_struct watchdog_task;
477 struct work_struct linkstate_task;
478 struct delayed_work stats_task;
479 struct mlx4_en_perf_stats pstats;
480 struct mlx4_en_pkt_stats pkstats;
481 struct mlx4_en_port_stats port_stats;
484 struct mlx4_en_stat_out_mbox hw_stats;
490 MLX4_EN_WOL_MAGIC = (1ULL << 61),
491 MLX4_EN_WOL_ENABLED = (1ULL << 62),
492 MLX4_EN_WOL_DO_MODIFY = (1ULL << 63),
496 void mlx4_en_destroy_netdev(struct net_device *dev);
497 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
498 struct mlx4_en_port_profile *prof);
500 int mlx4_en_start_port(struct net_device *dev);
501 void mlx4_en_stop_port(struct net_device *dev);
503 void mlx4_en_free_resources(struct mlx4_en_priv *priv, bool reserve_vectors);
504 int mlx4_en_alloc_resources(struct mlx4_en_priv *priv);
506 int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
507 int entries, int ring, enum cq_type mode);
508 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
509 bool reserve_vectors);
510 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
511 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
512 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
513 int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
515 void mlx4_en_poll_tx_cq(unsigned long data);
516 void mlx4_en_tx_irq(struct mlx4_cq *mcq);
517 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb);
518 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev);
520 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring,
521 u32 size, u16 stride);
522 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring);
523 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
524 struct mlx4_en_tx_ring *ring,
526 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
527 struct mlx4_en_tx_ring *ring);
529 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
530 struct mlx4_en_rx_ring *ring,
531 u32 size, u16 stride);
532 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
533 struct mlx4_en_rx_ring *ring);
534 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv);
535 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
536 struct mlx4_en_rx_ring *ring);
537 int mlx4_en_process_rx_cq(struct net_device *dev,
538 struct mlx4_en_cq *cq,
540 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget);
541 void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
542 int is_tx, int rss, int qpn, int cqn,
543 struct mlx4_qp_context *context);
544 void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event);
545 int mlx4_en_map_buffer(struct mlx4_buf *buf);
546 void mlx4_en_unmap_buffer(struct mlx4_buf *buf);
548 void mlx4_en_calc_rx_buf(struct net_device *dev);
549 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv);
550 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv);
551 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring);
552 void mlx4_en_rx_irq(struct mlx4_cq *mcq);
554 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode);
555 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, u8 port, struct vlan_group *grp);
556 int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
557 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx);
558 int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
561 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);
562 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
564 #define MLX4_EN_NUM_SELF_TEST 5
565 void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
566 u64 mlx4_en_mac_to_u64(u8 *addr);
571 extern const struct ethtool_ops mlx4_en_ethtool_ops;
576 * printk / logging functions
579 int en_print(const char *level, const struct mlx4_en_priv *priv,
580 const char *format, ...) __attribute__ ((format (printf, 3, 4)));
582 #define en_dbg(mlevel, priv, format, arg...) \
584 if (NETIF_MSG_##mlevel & priv->msg_enable) \
585 en_print(KERN_DEBUG, priv, format, ##arg); \
587 #define en_warn(priv, format, arg...) \
588 en_print(KERN_WARNING, priv, format, ##arg)
589 #define en_err(priv, format, arg...) \
590 en_print(KERN_ERR, priv, format, ##arg)
591 #define en_info(priv, format, arg...) \
592 en_print(KERN_INFO, priv, format, ## arg)
594 #define mlx4_err(mdev, format, arg...) \
595 pr_err("%s %s: " format, DRV_NAME, \
596 dev_name(&mdev->pdev->dev), ##arg)
597 #define mlx4_info(mdev, format, arg...) \
598 pr_info("%s %s: " format, DRV_NAME, \
599 dev_name(&mdev->pdev->dev), ##arg)
600 #define mlx4_warn(mdev, format, arg...) \
601 pr_warning("%s %s: " format, DRV_NAME, \
602 dev_name(&mdev->pdev->dev), ##arg)