1 /* [xirc2ps_cs.c wk 03.11.99] (1.40 1999/11/18 00:06:03)
2 * Xircom CreditCard Ethernet Adapter IIps driver
3 * Xircom Realport 10/100 (RE-100) driver
5 * This driver supports various Xircom CreditCard Ethernet adapters
6 * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56,
7 * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100.
9 * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not
10 * autodetect the media properly. In this case use the
11 * if_port=1 (for 10BaseT) or if_port=4 (for 100BaseT) options
12 * to force the media type.
14 * Written originally by Werner Koch based on David Hinds' skeleton of the
17 * Copyright (c) 1997,1998 Werner Koch (dd9jn)
19 * This driver is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * It is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
34 * ALTERNATIVELY, this driver may be distributed under the terms of
35 * the following license, in which case the provisions of this license
36 * are required INSTEAD OF the GNU General Public License. (This clause
37 * is necessary due to a potential bad interaction between the GPL and
38 * the restrictions contained in a BSD-style copyright.)
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, and the entire permission notice in its entirety,
45 * including the disclaimer of warranties.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. The name of the author may not be used to endorse or promote
50 * products derived from this software without specific prior
53 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
54 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
56 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
57 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
58 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
59 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
61 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
63 * OF THE POSSIBILITY OF SUCH DAMAGE.
66 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
68 #include <linux/module.h>
69 #include <linux/kernel.h>
70 #include <linux/init.h>
71 #include <linux/ptrace.h>
72 #include <linux/slab.h>
73 #include <linux/string.h>
74 #include <linux/timer.h>
75 #include <linux/interrupt.h>
77 #include <linux/delay.h>
78 #include <linux/ethtool.h>
79 #include <linux/netdevice.h>
80 #include <linux/etherdevice.h>
81 #include <linux/skbuff.h>
82 #include <linux/if_arp.h>
83 #include <linux/ioport.h>
84 #include <linux/bitops.h>
85 #include <linux/mii.h>
87 #include <pcmcia/cs.h>
88 #include <pcmcia/cistpl.h>
89 #include <pcmcia/cisreg.h>
90 #include <pcmcia/ciscode.h>
93 #include <asm/system.h>
94 #include <asm/uaccess.h>
97 #define MANFID_COMPAQ 0x0138
98 #define MANFID_COMPAQ2 0x0183 /* is this correct? */
101 #include <pcmcia/ds.h>
103 /* Time in jiffies before concluding Tx hung */
104 #define TX_TIMEOUT ((400*HZ)/1000)
107 * Some constants used to access the hardware
110 /* Register offsets and value constans */
111 #define XIRCREG_CR 0 /* Command register (wr) */
113 TransmitPacket = 0x01,
121 #define XIRCREG_ESR 0 /* Ethernet status register (rd) */
123 FullPktRcvd = 0x01, /* full packet in receive buffer */
124 PktRejected = 0x04, /* a packet has been rejected */
125 TxPktPend = 0x08, /* TX Packet Pending */
126 IncorPolarity = 0x10,
127 MediaSelect = 0x20 /* set if TP, clear if AUI */
129 #define XIRCREG_PR 1 /* Page Register select */
130 #define XIRCREG_EDP 4 /* Ethernet Data Port Register */
131 #define XIRCREG_ISR 6 /* Ethernet Interrupt Status Register */
133 TxBufOvr = 0x01, /* TX Buffer Overflow */
134 PktTxed = 0x02, /* Packet Transmitted */
135 MACIntr = 0x04, /* MAC Interrupt occurred */
136 TxResGrant = 0x08, /* Tx Reservation Granted */
137 RxFullPkt = 0x20, /* Rx Full Packet */
138 RxPktRej = 0x40, /* Rx Packet Rejected */
139 ForcedIntr= 0x80 /* Forced Interrupt */
141 #define XIRCREG1_IMR0 12 /* Ethernet Interrupt Mask Register (on page 1)*/
142 #define XIRCREG1_IMR1 13
143 #define XIRCREG0_TSO 8 /* Transmit Space Open Register (on page 0)*/
144 #define XIRCREG0_TRS 10 /* Transmit reservation Size Register (page 0)*/
145 #define XIRCREG0_DO 12 /* Data Offset Register (page 0) (wr) */
146 #define XIRCREG0_RSR 12 /* Receive Status Register (page 0) (rd) */
148 PhyPkt = 0x01, /* set:physical packet, clear: multicast packet */
149 BrdcstPkt = 0x02, /* set if it is a broadcast packet */
150 PktTooLong = 0x04, /* set if packet length > 1518 */
151 AlignErr = 0x10, /* incorrect CRC and last octet not complete */
152 CRCErr = 0x20, /* incorrect CRC and last octet is complete */
153 PktRxOk = 0x80 /* received ok */
155 #define XIRCREG0_PTR 13 /* packets transmitted register (rd) */
156 #define XIRCREG0_RBC 14 /* receive byte count regsister (rd) */
157 #define XIRCREG1_ECR 14 /* ethernet configurationn register */
159 FullDuplex = 0x04, /* enable full duplex mode */
160 LongTPMode = 0x08, /* adjust for longer lengths of TP cable */
161 DisablePolCor = 0x10,/* disable auto polarity correction */
162 DisableLinkPulse = 0x20, /* disable link pulse generation */
163 DisableAutoTx = 0x40, /* disable auto-transmit */
165 #define XIRCREG2_RBS 8 /* receive buffer start register */
166 #define XIRCREG2_LED 10 /* LED Configuration register */
167 /* values for the leds: Bits 2-0 for led 1
168 * 0 disabled Bits 5-3 for led 2
177 #define XIRCREG2_MSR 12 /* Mohawk specific register */
179 #define XIRCREG4_GPR0 8 /* General Purpose Register 0 */
180 #define XIRCREG4_GPR1 9 /* General Purpose Register 1 */
181 #define XIRCREG2_GPR2 13 /* General Purpose Register 2 (page2!)*/
182 #define XIRCREG4_BOV 10 /* Bonding Version Register */
183 #define XIRCREG4_LMA 12 /* Local Memory Address Register */
184 #define XIRCREG4_LMD 14 /* Local Memory Data Port */
185 /* MAC register can only by accessed with 8 bit operations */
186 #define XIRCREG40_CMD0 8 /* Command Register (wr) */
187 enum xirc_cmd { /* Commands */
196 #define XIRCREG5_RHSA0 10 /* Rx Host Start Address */
197 #define XIRCREG40_RXST0 9 /* Receive Status Register */
198 #define XIRCREG40_TXST0 11 /* Transmit Status Register 0 */
199 #define XIRCREG40_TXST1 12 /* Transmit Status Register 10 */
200 #define XIRCREG40_RMASK0 13 /* Receive Mask Register */
201 #define XIRCREG40_TMASK0 14 /* Transmit Mask Register 0 */
202 #define XIRCREG40_TMASK1 15 /* Transmit Mask Register 0 */
203 #define XIRCREG42_SWC0 8 /* Software Configuration 0 */
204 #define XIRCREG42_SWC1 9 /* Software Configuration 1 */
205 #define XIRCREG42_BOC 10 /* Back-Off Configuration */
206 #define XIRCREG44_TDR0 8 /* Time Domain Reflectometry 0 */
207 #define XIRCREG44_TDR1 9 /* Time Domain Reflectometry 1 */
208 #define XIRCREG44_RXBC_LO 10 /* Rx Byte Count 0 (rd) */
209 #define XIRCREG44_RXBC_HI 11 /* Rx Byte Count 1 (rd) */
210 #define XIRCREG45_REV 15 /* Revision Register (rd) */
211 #define XIRCREG50_IA 8 /* Individual Address (8-13) */
213 static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
216 #define XIR_UNKNOWN 0 /* unknown: not supported */
217 #define XIR_CE 1 /* (prodid 1) different hardware: not supported */
218 #define XIR_CE2 2 /* (prodid 2) */
219 #define XIR_CE3 3 /* (prodid 3) */
220 #define XIR_CEM 4 /* (prodid 1) different hardware: not supported */
221 #define XIR_CEM2 5 /* (prodid 2) */
222 #define XIR_CEM3 6 /* (prodid 3) */
223 #define XIR_CEM33 7 /* (prodid 4) */
224 #define XIR_CEM56M 8 /* (prodid 5) */
225 #define XIR_CEM56 9 /* (prodid 6) */
226 #define XIR_CM28 10 /* (prodid 3) modem only: not supported here */
227 #define XIR_CM33 11 /* (prodid 4) modem only: not supported here */
228 #define XIR_CM56 12 /* (prodid 5) modem only: not supported here */
229 #define XIR_CG 13 /* (prodid 1) GSM modem only: not supported */
230 #define XIR_CBE 14 /* (prodid 1) cardbus ethernet: not supported */
231 /*====================================================================*/
233 /* Module parameters */
235 MODULE_DESCRIPTION("Xircom PCMCIA ethernet driver");
236 MODULE_LICENSE("Dual MPL/GPL");
238 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
240 INT_MODULE_PARM(if_port, 0);
241 INT_MODULE_PARM(full_duplex, 0);
242 INT_MODULE_PARM(do_sound, 1);
243 INT_MODULE_PARM(lockup_hack, 0); /* anti lockup hack */
245 /*====================================================================*/
247 /* We do not process more than these number of bytes during one
248 * interrupt. (Of course we receive complete packets, so this is not
250 * Something between 2000..22000; first value gives best interrupt latency,
251 * the second enables the usage of the complete on-chip buffer. We use the
252 * high value as the initial value.
254 static unsigned maxrx_bytes = 22000;
256 /* MII management prototypes */
257 static void mii_idle(unsigned int ioaddr);
258 static void mii_putbit(unsigned int ioaddr, unsigned data);
259 static int mii_getbit(unsigned int ioaddr);
260 static void mii_wbits(unsigned int ioaddr, unsigned data, int len);
261 static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
262 static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
263 unsigned data, int len);
266 * The event() function is this driver's Card Services event handler.
267 * It will be called by Card Services when an appropriate card status
268 * event is received. The config() and release() entry points are
269 * used to configure or release a socket, in response to card insertion
270 * and ejection events. They are invoked from the event handler.
273 static int has_ce2_string(struct pcmcia_device * link);
274 static int xirc2ps_config(struct pcmcia_device * link);
275 static void xirc2ps_release(struct pcmcia_device * link);
278 * The attach() and detach() entry points are used to create and destroy
279 * "instances" of the driver, where each instance represents everything
280 * needed to manage one actual PCMCIA card.
283 static void xirc2ps_detach(struct pcmcia_device *p_dev);
286 * You'll also need to prototype all the functions that will actually
287 * be used to talk to your device. See 'pcmem_cs' for a good example
288 * of a fully self-sufficient driver; the other drivers rely more or
289 * less on other parts of the kernel.
292 static irqreturn_t xirc2ps_interrupt(int irq, void *dev_id);
294 typedef struct local_info_t {
295 struct net_device *dev;
296 struct pcmcia_device *p_dev;
300 int silicon; /* silicon revision. 0=old CE2, 1=Scipper, 4=Mohawk */
301 int mohawk; /* a CE3 type card */
302 int dingo; /* a CEM56 type card */
303 int new_mii; /* has full 10baseT/100baseT MII */
304 int modem; /* is a multi function card (i.e with a modem) */
305 void __iomem *dingo_ccr; /* only used for CEM56 cards */
306 unsigned last_ptr_value; /* last packets transmitted value */
307 const char *manf_str;
308 struct work_struct tx_timeout_task;
312 * Some more prototypes
314 static netdev_tx_t do_start_xmit(struct sk_buff *skb,
315 struct net_device *dev);
316 static void xirc_tx_timeout(struct net_device *dev);
317 static void xirc2ps_tx_timeout_task(struct work_struct *work);
318 static void set_addresses(struct net_device *dev);
319 static void set_multicast_list(struct net_device *dev);
320 static int set_card_type(struct pcmcia_device *link);
321 static int do_config(struct net_device *dev, struct ifmap *map);
322 static int do_open(struct net_device *dev);
323 static int do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
324 static const struct ethtool_ops netdev_ethtool_ops;
325 static void hardreset(struct net_device *dev);
326 static void do_reset(struct net_device *dev, int full);
327 static int init_mii(struct net_device *dev);
328 static void do_powerdown(struct net_device *dev);
329 static int do_stop(struct net_device *dev);
331 /*=============== Helper functions =========================*/
332 #define SelectPage(pgnr) outb((pgnr), ioaddr + XIRCREG_PR)
333 #define GetByte(reg) ((unsigned)inb(ioaddr + (reg)))
334 #define GetWord(reg) ((unsigned)inw(ioaddr + (reg)))
335 #define PutByte(reg,value) outb((value), ioaddr+(reg))
336 #define PutWord(reg,value) outw((value), ioaddr+(reg))
338 /*====== Functions used for debugging =================================*/
339 #if 0 /* reading regs may change system status */
341 PrintRegisters(struct net_device *dev)
343 unsigned int ioaddr = dev->base_addr;
348 printk(KERN_DEBUG pr_fmt("Register common: "));
349 for (i = 0; i < 8; i++)
350 pr_cont(" %2.2x", GetByte(i));
352 for (page = 0; page <= 8; page++) {
353 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
355 for (i = 8; i < 16; i++)
356 pr_cont(" %2.2x", GetByte(i));
359 for (page=0x40 ; page <= 0x5f; page++) {
360 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) ||
361 (page >= 0x51 && page <=0x5e))
363 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
365 for (i = 8; i < 16; i++)
366 pr_cont(" %2.2x", GetByte(i));
373 /*============== MII Management functions ===============*/
376 * Turn around for read
379 mii_idle(unsigned int ioaddr)
381 PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */
383 PutByte(XIRCREG2_GPR2, 0x04|1); /* and drive MDCK high */
388 * Write a bit to MDI/O
391 mii_putbit(unsigned int ioaddr, unsigned data)
395 PutByte(XIRCREG2_GPR2, 0x0c|2|0); /* set MDIO */
397 PutByte(XIRCREG2_GPR2, 0x0c|2|1); /* and drive MDCK high */
400 PutByte(XIRCREG2_GPR2, 0x0c|0|0); /* clear MDIO */
402 PutByte(XIRCREG2_GPR2, 0x0c|0|1); /* and drive MDCK high */
407 PutWord(XIRCREG2_GPR2-1, 0x0e0e);
409 PutWord(XIRCREG2_GPR2-1, 0x0f0f);
412 PutWord(XIRCREG2_GPR2-1, 0x0c0c);
414 PutWord(XIRCREG2_GPR2-1, 0x0d0d);
421 * Get a bit from MDI/O
424 mii_getbit(unsigned int ioaddr)
428 PutByte(XIRCREG2_GPR2, 4|0); /* drive MDCK low */
430 d = GetByte(XIRCREG2_GPR2); /* read MDIO */
431 PutByte(XIRCREG2_GPR2, 4|1); /* drive MDCK high again */
433 return d & 0x20; /* read MDIO */
437 mii_wbits(unsigned int ioaddr, unsigned data, int len)
439 unsigned m = 1 << (len-1);
441 mii_putbit(ioaddr, data & m);
445 mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg)
451 for (i=0; i < 32; i++) /* 32 bit preamble */
452 mii_putbit(ioaddr, 1);
453 mii_wbits(ioaddr, 0x06, 4); /* Start and opcode for read */
454 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
455 mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */
456 mii_idle(ioaddr); /* turn around */
459 for (m = 1<<15; m; m >>= 1)
460 if (mii_getbit(ioaddr))
467 mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data,
473 for (i=0; i < 32; i++) /* 32 bit preamble */
474 mii_putbit(ioaddr, 1);
475 mii_wbits(ioaddr, 0x05, 4); /* Start and opcode for write */
476 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
477 mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */
478 mii_putbit(ioaddr, 1); /* turn around */
479 mii_putbit(ioaddr, 0);
480 mii_wbits(ioaddr, data, len); /* And write the data */
484 /*============= Main bulk of functions =========================*/
486 static const struct net_device_ops netdev_ops = {
489 .ndo_start_xmit = do_start_xmit,
490 .ndo_tx_timeout = xirc_tx_timeout,
491 .ndo_set_config = do_config,
492 .ndo_do_ioctl = do_ioctl,
493 .ndo_set_multicast_list = set_multicast_list,
494 .ndo_change_mtu = eth_change_mtu,
495 .ndo_set_mac_address = eth_mac_addr,
496 .ndo_validate_addr = eth_validate_addr,
500 * xirc2ps_attach() creates an "instance" of the driver, allocating
501 * local data structures for one device. The device is registered
502 * with Card Services.
504 * The dev_link structure is initialized, but we don't actually
505 * configure the card at this point -- we wait until we receive a
506 * card insertion event.
510 xirc2ps_probe(struct pcmcia_device *link)
512 struct net_device *dev;
515 dev_dbg(&link->dev, "attach()\n");
517 /* Allocate the device structure */
518 dev = alloc_etherdev(sizeof(local_info_t));
521 local = netdev_priv(dev);
526 /* General socket configuration */
527 link->conf.Attributes = CONF_ENABLE_IRQ;
528 link->conf.IntType = INT_MEMORY_AND_IO;
529 link->conf.ConfigIndex = 1;
531 /* Fill in card specific entries */
532 dev->netdev_ops = &netdev_ops;
533 dev->ethtool_ops = &netdev_ethtool_ops;
534 dev->watchdog_timeo = TX_TIMEOUT;
535 INIT_WORK(&local->tx_timeout_task, xirc2ps_tx_timeout_task);
537 return xirc2ps_config(link);
538 } /* xirc2ps_attach */
541 * This deletes a driver "instance". The device is de-registered
542 * with Card Services. If it has been released, all local data
543 * structures are freed. Otherwise, the structures will be freed
544 * when the device is released.
548 xirc2ps_detach(struct pcmcia_device *link)
550 struct net_device *dev = link->priv;
552 dev_dbg(&link->dev, "detach\n");
554 unregister_netdev(dev);
556 xirc2ps_release(link);
559 } /* xirc2ps_detach */
562 * Detect the type of the card. s is the buffer with the data of tuple 0x20
563 * Returns: 0 := not supported
564 * mediaid=11 and prodid=47
580 set_card_type(struct pcmcia_device *link)
582 struct net_device *dev = link->priv;
583 local_info_t *local = netdev_priv(dev);
585 unsigned int cisrev, mediaid, prodid;
588 len = pcmcia_get_tuple(link, CISTPL_MANFID, &buf);
590 dev_err(&link->dev, "invalid CIS -- sorry\n");
598 dev_dbg(&link->dev, "cisrev=%02x mediaid=%02x prodid=%02x\n",
599 cisrev, mediaid, prodid);
604 local->card_type = XIR_UNKNOWN;
605 if (!(prodid & 0x40)) {
606 pr_notice("Oops: Not a creditcard\n");
609 if (!(mediaid & 0x01)) {
610 pr_notice("Not an Ethernet card\n");
613 if (mediaid & 0x10) {
615 switch(prodid & 15) {
616 case 1: local->card_type = XIR_CEM ; break;
617 case 2: local->card_type = XIR_CEM2 ; break;
618 case 3: local->card_type = XIR_CEM3 ; break;
619 case 4: local->card_type = XIR_CEM33 ; break;
620 case 5: local->card_type = XIR_CEM56M;
624 case 7: /* 7 is the RealPort 10/56 */
625 local->card_type = XIR_CEM56 ;
631 switch(prodid & 15) {
632 case 1: local->card_type = has_ce2_string(link)? XIR_CE2 : XIR_CE ;
634 case 2: local->card_type = XIR_CE2; break;
635 case 3: local->card_type = XIR_CE3;
640 if (local->card_type == XIR_CE || local->card_type == XIR_CEM) {
641 pr_notice("Sorry, this is an old CE card\n");
644 if (local->card_type == XIR_UNKNOWN)
645 pr_notice("unknown card (mediaid=%02x prodid=%02x)\n", mediaid, prodid);
651 * There are some CE2 cards out which claim to be a CE card.
652 * This function looks for a "CE2" in the 3rd version field.
653 * Returns: true if this is a CE2
656 has_ce2_string(struct pcmcia_device * p_dev)
658 if (p_dev->prod_id[2] && strstr(p_dev->prod_id[2], "CE2"))
664 xirc2ps_config_modem(struct pcmcia_device *p_dev,
665 cistpl_cftable_entry_t *cf,
666 cistpl_cftable_entry_t *dflt,
672 if (cf->io.nwin > 0 && (cf->io.win[0].base & 0xf) == 8) {
673 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
674 p_dev->resource[1]->start = cf->io.win[0].base;
675 p_dev->resource[0]->start = ioaddr;
676 if (!pcmcia_request_io(p_dev))
684 xirc2ps_config_check(struct pcmcia_device *p_dev,
685 cistpl_cftable_entry_t *cf,
686 cistpl_cftable_entry_t *dflt,
690 int *pass = priv_data;
692 if (cf->io.nwin > 0 && (cf->io.win[0].base & 0xf) == 8) {
693 p_dev->resource[1]->start = cf->io.win[0].base;
694 p_dev->resource[0]->start = p_dev->resource[1]->start
695 + (*pass ? (cf->index & 0x20 ? -24:8)
696 : (cf->index & 0x20 ? 8:-24));
697 if (!pcmcia_request_io(p_dev))
705 static int pcmcia_get_mac_ce(struct pcmcia_device *p_dev,
709 struct net_device *dev = priv;
712 if (tuple->TupleDataLen != 13)
714 if ((tuple->TupleData[0] != 2) || (tuple->TupleData[1] != 1) ||
715 (tuple->TupleData[2] != 6))
717 /* another try (James Lehmer's CE2 version 4.1)*/
718 for (i = 2; i < 6; i++)
719 dev->dev_addr[i] = tuple->TupleData[i+2];
725 * xirc2ps_config() is scheduled to run after a CARD_INSERTION event
726 * is received, to configure the PCMCIA socket, and to make the
727 * ethernet device available to the system.
730 xirc2ps_config(struct pcmcia_device * link)
732 struct net_device *dev = link->priv;
733 local_info_t *local = netdev_priv(dev);
739 local->dingo_ccr = NULL;
741 dev_dbg(&link->dev, "config\n");
743 /* Is this a valid card */
744 if (link->has_manf_id == 0) {
745 pr_notice("manfid not found in CIS\n");
749 switch (link->manf_id) {
751 local->manf_str = "Xircom";
754 local->manf_str = "Accton";
758 local->manf_str = "Compaq";
761 local->manf_str = "Intel";
764 local->manf_str = "Toshiba";
767 pr_notice("Unknown Card Manufacturer ID: 0x%04x\n",
768 (unsigned)link->manf_id);
771 dev_dbg(&link->dev, "found %s card\n", local->manf_str);
773 if (!set_card_type(link)) {
774 pr_notice("this card is not supported\n");
778 /* get the ethernet address from the CIS */
779 err = pcmcia_get_mac_from_cis(link, dev);
781 /* not found: try to get the node-id from tuple 0x89 */
783 len = pcmcia_get_tuple(link, 0x89, &buf);
784 /* data layout looks like tuple 0x22 */
785 if (buf && len == 8) {
786 if (*buf == CISTPL_FUNCE_LAN_NODE_ID) {
788 for (i = 2; i < 6; i++)
789 dev->dev_addr[i] = buf[i+2];
797 err = pcmcia_loop_tuple(link, CISTPL_FUNCE, pcmcia_get_mac_ce, dev);
800 pr_notice("node-id not found in CIS\n");
804 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
810 link->conf.Attributes |= CONF_ENABLE_SPKR;
811 link->conf.Status |= CCSR_AUDIO_ENA;
813 link->resource[1]->end = 8;
814 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
816 /* Take the Modem IO port from the CIS and scan for a free
818 link->resource[0]->end = 16; /* no Mako stuff anymore */
819 if (!pcmcia_loop_config(link, xirc2ps_config_modem, NULL))
822 link->resource[0]->end = 18;
823 /* We do 2 passes here: The first one uses the regular mapping and
824 * the second tries again, thereby considering that the 32 ports are
825 * mirrored every 32 bytes. Actually we use a mirrored port for
826 * the Mako if (on the first pass) the COR bit 5 is set.
828 for (pass=0; pass < 2; pass++)
829 if (!pcmcia_loop_config(link, xirc2ps_config_check, &pass))
831 /* if special option:
832 * try to configure as Ethernet only.
835 pr_notice("no ports available\n");
837 link->resource[0]->end = 16;
838 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
839 link->resource[0]->start = ioaddr;
840 if (!(err = pcmcia_request_io(link)))
843 link->resource[0]->start = 0; /* let CS decide */
844 if ((err = pcmcia_request_io(link)))
852 * Now allocate an interrupt line. Note that this does not
853 * actually assign a handler to the interrupt.
855 if ((err=pcmcia_request_irq(link, xirc2ps_interrupt)))
859 * This actually configures the PCMCIA socket -- setting up
860 * the I/O windows and the interrupt mapping.
862 if ((err=pcmcia_request_configuration(link, &link->conf)))
868 /* Reset the modem's BAR to the correct value
869 * This is necessary because in the RequestConfiguration call,
870 * the base address of the ethernet port (BasePort1) is written
871 * to the BAR registers of the modem.
873 err = pcmcia_write_config_byte(link, CISREG_IOBASE_0, (u8)
874 link->resource[1]->start & 0xff);
878 err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
879 (link->resource[1]->start >> 8) & 0xff);
883 /* There is no config entry for the Ethernet part which
884 * is at 0x0800. So we allocate a window into the attribute
885 * memory and write direct to the CIS registers
887 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
888 req.Base = req.Size = 0;
890 if ((err = pcmcia_request_window(link, &req, &link->win)))
893 local->dingo_ccr = ioremap(req.Base,0x1000) + 0x0800;
894 if ((err = pcmcia_map_mem_page(link, link->win, 0)))
897 /* Setup the CCRs; there are no infos in the CIS about the Ethernet
900 writeb(0x47, local->dingo_ccr + CISREG_COR);
901 ioaddr = link->resource[0]->start;
902 writeb(ioaddr & 0xff , local->dingo_ccr + CISREG_IOBASE_0);
903 writeb((ioaddr >> 8)&0xff , local->dingo_ccr + CISREG_IOBASE_1);
909 for (i=0; i < 7; i++) {
910 tmp = readb(local->dingo_ccr + i*2);
911 pr_cont(" %02x", tmp);
915 for (i=0; i < 4; i++) {
916 tmp = readb(local->dingo_ccr + 0x20 + i*2);
917 pr_cont(" %02x", tmp);
921 for (i=0; i < 10; i++) {
922 tmp = readb(local->dingo_ccr + 0x40 + i*2);
923 pr_cont(" %02x", tmp);
929 writeb(0x01, local->dingo_ccr + 0x20);
930 writeb(0x0c, local->dingo_ccr + 0x22);
931 writeb(0x00, local->dingo_ccr + 0x24);
932 writeb(0x00, local->dingo_ccr + 0x26);
933 writeb(0x00, local->dingo_ccr + 0x28);
936 /* The if_port symbol can be set when the module is loaded */
939 local->probe_port = dev->if_port = 1;
940 } else if ((if_port >= 1 && if_port <= 2) ||
941 (local->mohawk && if_port==4))
942 dev->if_port = if_port;
944 pr_notice("invalid if_port requested\n");
946 /* we can now register the device with the net subsystem */
947 dev->irq = link->irq;
948 dev->base_addr = link->resource[0]->start;
951 do_reset(dev, 1); /* a kludge to make the cem56 work */
953 SET_NETDEV_DEV(dev, &link->dev);
955 if ((err=register_netdev(dev))) {
956 pr_notice("register_netdev() failed\n");
960 /* give some infos about the hardware */
961 netdev_info(dev, "%s: port %#3lx, irq %d, hwaddr %pM\n",
962 local->manf_str, (u_long)dev->base_addr, (int)dev->irq,
968 xirc2ps_release(link);
973 } /* xirc2ps_config */
976 * After a card is removed, xirc2ps_release() will unregister the net
977 * device, and release the PCMCIA configuration. If the device is
978 * still open, this will be postponed until it is closed.
981 xirc2ps_release(struct pcmcia_device *link)
983 dev_dbg(&link->dev, "release\n");
986 struct net_device *dev = link->priv;
987 local_info_t *local = netdev_priv(dev);
989 iounmap(local->dingo_ccr - 0x0800);
991 pcmcia_disable_device(link);
992 } /* xirc2ps_release */
994 /*====================================================================*/
997 static int xirc2ps_suspend(struct pcmcia_device *link)
999 struct net_device *dev = link->priv;
1002 netif_device_detach(dev);
1009 static int xirc2ps_resume(struct pcmcia_device *link)
1011 struct net_device *dev = link->priv;
1015 netif_device_attach(dev);
1022 /*====================================================================*/
1025 * This is the Interrupt service route.
1028 xirc2ps_interrupt(int irq, void *dev_id)
1030 struct net_device *dev = (struct net_device *)dev_id;
1031 local_info_t *lp = netdev_priv(dev);
1032 unsigned int ioaddr;
1034 unsigned bytes_rcvd;
1035 unsigned int_status, eth_status, rx_status, tx_status;
1036 unsigned rsr, pktlen;
1037 ulong start_ticks = jiffies; /* fixme: jiffies rollover every 497 days
1038 * is this something to worry about?
1042 if (!netif_device_present(dev))
1045 ioaddr = dev->base_addr;
1046 if (lp->mohawk) { /* must disable the interrupt */
1047 PutByte(XIRCREG_CR, 0);
1050 pr_debug("%s: interrupt %d at %#x.\n", dev->name, irq, ioaddr);
1052 saved_page = GetByte(XIRCREG_PR);
1053 /* Read the ISR to see whats the cause for the interrupt.
1054 * This also clears the interrupt flags on CE2 cards
1056 int_status = GetByte(XIRCREG_ISR);
1059 if (int_status == 0xff) { /* card may be ejected */
1060 pr_debug("%s: interrupt %d for dead card\n", dev->name, irq);
1063 eth_status = GetByte(XIRCREG_ESR);
1066 rx_status = GetByte(XIRCREG40_RXST0);
1067 PutByte(XIRCREG40_RXST0, (~rx_status & 0xff));
1068 tx_status = GetByte(XIRCREG40_TXST0);
1069 tx_status |= GetByte(XIRCREG40_TXST1) << 8;
1070 PutByte(XIRCREG40_TXST0, 0);
1071 PutByte(XIRCREG40_TXST1, 0);
1073 pr_debug("%s: ISR=%#2.2x ESR=%#2.2x RSR=%#2.2x TSR=%#4.4x\n",
1074 dev->name, int_status, eth_status, rx_status, tx_status);
1076 /***** receive section ******/
1078 while (eth_status & FullPktRcvd) {
1079 rsr = GetByte(XIRCREG0_RSR);
1080 if (bytes_rcvd > maxrx_bytes && (rsr & PktRxOk)) {
1081 /* too many bytes received during this int, drop the rest of the
1083 dev->stats.rx_dropped++;
1084 pr_debug("%s: RX drop, too much done\n", dev->name);
1085 } else if (rsr & PktRxOk) {
1086 struct sk_buff *skb;
1088 pktlen = GetWord(XIRCREG0_RBC);
1089 bytes_rcvd += pktlen;
1091 pr_debug("rsr=%#02x packet_length=%u\n", rsr, pktlen);
1093 skb = dev_alloc_skb(pktlen+3); /* 1 extra so we can use insw */
1095 pr_notice("low memory, packet dropped (size=%u)\n", pktlen);
1096 dev->stats.rx_dropped++;
1097 } else { /* okay get the packet */
1098 skb_reserve(skb, 2);
1099 if (lp->silicon == 0 ) { /* work around a hardware bug */
1100 unsigned rhsa; /* receive start address */
1103 rhsa = GetWord(XIRCREG5_RHSA0);
1105 rhsa += 3; /* skip control infos */
1108 if (rhsa + pktlen > 0x8000) {
1110 u_char *buf = skb_put(skb, pktlen);
1111 for (i=0; i < pktlen ; i++, rhsa++) {
1112 buf[i] = GetByte(XIRCREG_EDP);
1113 if (rhsa == 0x8000) {
1119 insw(ioaddr+XIRCREG_EDP,
1120 skb_put(skb, pktlen), (pktlen+1)>>1);
1124 else if (lp->mohawk) {
1125 /* To use this 32 bit access we should use
1126 * a manual optimized loop
1127 * Also the words are swapped, we can get more
1128 * performance by using 32 bit access and swapping
1129 * the words in a register. Will need this for cardbus
1131 * Note: don't forget to change the ALLOC_SKB to .. +3
1134 u_long *p = skb_put(skb, pktlen);
1136 unsigned int edpreg = ioaddr+XIRCREG_EDP-2;
1137 for (i=0; i < len ; i += 4, p++) {
1139 __asm__("rorl $16,%0\n\t"
1147 insw(ioaddr+XIRCREG_EDP, skb_put(skb, pktlen),
1150 skb->protocol = eth_type_trans(skb, dev);
1152 dev->stats.rx_packets++;
1153 dev->stats.rx_bytes += pktlen;
1154 if (!(rsr & PhyPkt))
1155 dev->stats.multicast++;
1157 } else { /* bad packet */
1158 pr_debug("rsr=%#02x\n", rsr);
1160 if (rsr & PktTooLong) {
1161 dev->stats.rx_frame_errors++;
1162 pr_debug("%s: Packet too long\n", dev->name);
1165 dev->stats.rx_crc_errors++;
1166 pr_debug("%s: CRC error\n", dev->name);
1168 if (rsr & AlignErr) {
1169 dev->stats.rx_fifo_errors++; /* okay ? */
1170 pr_debug("%s: Alignment error\n", dev->name);
1173 /* clear the received/dropped/error packet */
1174 PutWord(XIRCREG0_DO, 0x8000); /* issue cmd: skip_rx_packet */
1176 /* get the new ethernet status */
1177 eth_status = GetByte(XIRCREG_ESR);
1179 if (rx_status & 0x10) { /* Receive overrun */
1180 dev->stats.rx_over_errors++;
1181 PutByte(XIRCREG_CR, ClearRxOvrun);
1182 pr_debug("receive overrun cleared\n");
1185 /***** transmit section ******/
1186 if (int_status & PktTxed) {
1189 n = lp->last_ptr_value;
1190 nn = GetByte(XIRCREG0_PTR);
1191 lp->last_ptr_value = nn;
1192 if (nn < n) /* rollover */
1193 dev->stats.tx_packets += 256 - n;
1194 else if (n == nn) { /* happens sometimes - don't know why */
1195 pr_debug("PTR not changed?\n");
1197 dev->stats.tx_packets += lp->last_ptr_value - n;
1198 netif_wake_queue(dev);
1200 if (tx_status & 0x0002) { /* Execessive collissions */
1201 pr_debug("tx restarted due to execssive collissions\n");
1202 PutByte(XIRCREG_CR, RestartTx); /* restart transmitter process */
1204 if (tx_status & 0x0040)
1205 dev->stats.tx_aborted_errors++;
1207 /* recalculate our work chunk so that we limit the duration of this
1208 * ISR to about 1/10 of a second.
1209 * Calculate only if we received a reasonable amount of bytes.
1211 if (bytes_rcvd > 1000) {
1212 u_long duration = jiffies - start_ticks;
1214 if (duration >= HZ/10) { /* if more than about 1/10 second */
1215 maxrx_bytes = (bytes_rcvd * (HZ/10)) / duration;
1216 if (maxrx_bytes < 2000)
1218 else if (maxrx_bytes > 22000)
1219 maxrx_bytes = 22000;
1220 pr_debug("set maxrx=%u (rcvd=%u ticks=%lu)\n",
1221 maxrx_bytes, bytes_rcvd, duration);
1222 } else if (!duration && maxrx_bytes < 22000) {
1223 /* now much faster */
1224 maxrx_bytes += 2000;
1225 if (maxrx_bytes > 22000)
1226 maxrx_bytes = 22000;
1227 pr_debug("set maxrx=%u\n", maxrx_bytes);
1233 if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)
1236 SelectPage(saved_page);
1237 PutByte(XIRCREG_CR, EnableIntr); /* re-enable interrupts */
1238 /* Instead of dropping packets during a receive, we could
1239 * force an interrupt with this command:
1240 * PutByte(XIRCREG_CR, EnableIntr|ForceIntr);
1243 } /* xirc2ps_interrupt */
1245 /*====================================================================*/
1248 xirc2ps_tx_timeout_task(struct work_struct *work)
1250 local_info_t *local =
1251 container_of(work, local_info_t, tx_timeout_task);
1252 struct net_device *dev = local->dev;
1253 /* reset the card */
1255 dev->trans_start = jiffies; /* prevent tx timeout */
1256 netif_wake_queue(dev);
1260 xirc_tx_timeout(struct net_device *dev)
1262 local_info_t *lp = netdev_priv(dev);
1263 dev->stats.tx_errors++;
1264 netdev_notice(dev, "transmit timed out\n");
1265 schedule_work(&lp->tx_timeout_task);
1269 do_start_xmit(struct sk_buff *skb, struct net_device *dev)
1271 local_info_t *lp = netdev_priv(dev);
1272 unsigned int ioaddr = dev->base_addr;
1275 unsigned pktlen = skb->len;
1277 pr_debug("do_start_xmit(skb=%p, dev=%p) len=%u\n",
1281 /* adjust the packet length to min. required
1282 * and hope that the buffer is large enough
1283 * to provide some random data.
1284 * fixme: For Mohawk we can change this by sending
1285 * a larger packetlen than we actually have; the chip will
1286 * pad this in his buffer with random bytes
1288 if (pktlen < ETH_ZLEN)
1290 if (skb_padto(skb, ETH_ZLEN))
1291 return NETDEV_TX_OK;
1295 netif_stop_queue(dev);
1297 PutWord(XIRCREG0_TRS, (u_short)pktlen+2);
1298 freespace = GetWord(XIRCREG0_TSO);
1299 okay = freespace & 0x8000;
1300 freespace &= 0x7fff;
1301 /* TRS doesn't work - (indeed it is eliminated with sil-rev 1) */
1302 okay = pktlen +2 < freespace;
1303 pr_debug("%s: avail. tx space=%u%s\n",
1304 dev->name, freespace, okay ? " (okay)":" (not enough)");
1305 if (!okay) { /* not enough space */
1306 return NETDEV_TX_BUSY; /* upper layer may decide to requeue this packet */
1308 /* send the packet */
1309 PutWord(XIRCREG_EDP, (u_short)pktlen);
1310 outsw(ioaddr+XIRCREG_EDP, skb->data, pktlen>>1);
1312 PutByte(XIRCREG_EDP, skb->data[pktlen-1]);
1315 PutByte(XIRCREG_CR, TransmitPacket|EnableIntr);
1317 dev_kfree_skb (skb);
1318 dev->stats.tx_bytes += pktlen;
1319 netif_start_queue(dev);
1320 return NETDEV_TX_OK;
1323 struct set_address_info {
1327 unsigned int ioaddr;
1330 static void set_address(struct set_address_info *sa_info, char *addr)
1332 unsigned int ioaddr = sa_info->ioaddr;
1335 for (i = 0; i < 6; i++) {
1336 if (sa_info->reg_nr > 15) {
1337 sa_info->reg_nr = 8;
1339 SelectPage(sa_info->page_nr);
1341 if (sa_info->mohawk)
1342 PutByte(sa_info->reg_nr++, addr[5 - i]);
1344 PutByte(sa_info->reg_nr++, addr[i]);
1349 * Set all addresses: This first one is the individual address,
1350 * the next 9 addresses are taken from the multicast list and
1351 * the rest is filled with the individual address.
1353 static void set_addresses(struct net_device *dev)
1355 unsigned int ioaddr = dev->base_addr;
1356 local_info_t *lp = netdev_priv(dev);
1357 struct netdev_hw_addr *ha;
1358 struct set_address_info sa_info;
1362 * Setup the info structure so that by first set_address call it will do
1363 * SelectPage with the right page number. Hence these ones here.
1365 sa_info.reg_nr = 15 + 1;
1366 sa_info.page_nr = 0x50 - 1;
1367 sa_info.mohawk = lp->mohawk;
1368 sa_info.ioaddr = ioaddr;
1370 set_address(&sa_info, dev->dev_addr);
1372 netdev_for_each_mc_addr(ha, dev) {
1375 set_address(&sa_info, ha->addr);
1378 set_address(&sa_info, dev->dev_addr);
1383 * Set or clear the multicast filter for this adaptor.
1384 * We can filter up to 9 addresses, if more are requested we set
1385 * multicast promiscuous mode.
1389 set_multicast_list(struct net_device *dev)
1391 unsigned int ioaddr = dev->base_addr;
1395 value = GetByte(XIRCREG42_SWC1) & 0xC0;
1397 if (dev->flags & IFF_PROMISC) { /* snoop */
1398 PutByte(XIRCREG42_SWC1, value | 0x06); /* set MPE and PME */
1399 } else if (netdev_mc_count(dev) > 9 || (dev->flags & IFF_ALLMULTI)) {
1400 PutByte(XIRCREG42_SWC1, value | 0x02); /* set MPE */
1401 } else if (!netdev_mc_empty(dev)) {
1402 /* the chip can filter 9 addresses perfectly */
1403 PutByte(XIRCREG42_SWC1, value | 0x01);
1405 PutByte(XIRCREG40_CMD0, Offline);
1408 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1409 } else { /* standard usage */
1410 PutByte(XIRCREG42_SWC1, value | 0x00);
1416 do_config(struct net_device *dev, struct ifmap *map)
1418 local_info_t *local = netdev_priv(dev);
1420 pr_debug("do_config(%p)\n", dev);
1421 if (map->port != 255 && map->port != dev->if_port) {
1425 local->probe_port = 1;
1428 local->probe_port = 0;
1429 dev->if_port = map->port;
1431 netdev_info(dev, "switching to %s port\n", if_names[dev->if_port]);
1432 do_reset(dev,1); /* not the fine way :-) */
1441 do_open(struct net_device *dev)
1443 local_info_t *lp = netdev_priv(dev);
1444 struct pcmcia_device *link = lp->p_dev;
1446 dev_dbg(&link->dev, "do_open(%p)\n", dev);
1448 /* Check that the PCMCIA card is still here. */
1449 /* Physical device present signature. */
1450 if (!pcmcia_dev_present(link))
1456 netif_start_queue(dev);
1462 static void netdev_get_drvinfo(struct net_device *dev,
1463 struct ethtool_drvinfo *info)
1465 strcpy(info->driver, "xirc2ps_cs");
1466 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
1469 static const struct ethtool_ops netdev_ethtool_ops = {
1470 .get_drvinfo = netdev_get_drvinfo,
1474 do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1476 local_info_t *local = netdev_priv(dev);
1477 unsigned int ioaddr = dev->base_addr;
1478 struct mii_ioctl_data *data = if_mii(rq);
1480 pr_debug("%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n",
1481 dev->name, rq->ifr_ifrn.ifrn_name, cmd,
1482 data->phy_id, data->reg_num, data->val_in, data->val_out);
1488 case SIOCGMIIPHY: /* Get the address of the PHY in use. */
1489 data->phy_id = 0; /* we have only this address */
1491 case SIOCGMIIREG: /* Read the specified MII register. */
1492 data->val_out = mii_rd(ioaddr, data->phy_id & 0x1f,
1493 data->reg_num & 0x1f);
1495 case SIOCSMIIREG: /* Write the specified MII register */
1496 mii_wr(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in,
1506 hardreset(struct net_device *dev)
1508 local_info_t *local = netdev_priv(dev);
1509 unsigned int ioaddr = dev->base_addr;
1513 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1514 msleep(40); /* wait 40 msec */
1516 PutByte(XIRCREG4_GPR1, 1); /* set bit 0: power up */
1518 PutByte(XIRCREG4_GPR1, 1 | 4); /* set bit 0: power up, bit 2: AIC */
1519 msleep(20); /* wait 20 msec */
1523 do_reset(struct net_device *dev, int full)
1525 local_info_t *local = netdev_priv(dev);
1526 unsigned int ioaddr = dev->base_addr;
1529 pr_debug("%s: do_reset(%p,%d)\n", dev? dev->name:"eth?", dev, full);
1532 PutByte(XIRCREG_CR, SoftReset); /* set */
1533 msleep(20); /* wait 20 msec */
1534 PutByte(XIRCREG_CR, 0); /* clear */
1535 msleep(40); /* wait 40 msec */
1536 if (local->mohawk) {
1538 /* set pin GP1 and GP2 to output (0x0c)
1539 * set GP1 to low to power up the ML6692 (0x00)
1540 * set GP2 to high to power up the 10Mhz chip (0x02)
1542 PutByte(XIRCREG4_GPR0, 0x0e);
1545 /* give the circuits some time to power up */
1546 msleep(500); /* about 500ms */
1548 local->last_ptr_value = 0;
1549 local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4
1550 : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;
1552 if (local->probe_port) {
1553 if (!local->mohawk) {
1555 PutByte(XIRCREG4_GPR0, 4);
1556 local->probe_port = 0;
1558 } else if (dev->if_port == 2) { /* enable 10Base2 */
1560 PutByte(XIRCREG42_SWC1, 0xC0);
1561 } else { /* enable 10BaseT */
1563 PutByte(XIRCREG42_SWC1, 0x80);
1565 msleep(40); /* wait 40 msec to let it complete */
1570 value = GetByte(XIRCREG_ESR); /* read the ESR */
1571 pr_debug("%s: ESR is: %#02x\n", dev->name, value);
1577 PutByte(XIRCREG1_IMR0, 0xff); /* allow all ints */
1578 PutByte(XIRCREG1_IMR1, 1 ); /* and Set TxUnderrunDetect */
1579 value = GetByte(XIRCREG1_ECR);
1582 value |= DisableLinkPulse;
1583 PutByte(XIRCREG1_ECR, value);
1585 pr_debug("%s: ECR is: %#02x\n", dev->name, value);
1588 PutByte(XIRCREG42_SWC0, 0x20); /* disable source insertion */
1590 if (local->silicon != 1) {
1591 /* set the local memory dividing line.
1592 * The comments in the sample code say that this is only
1593 * settable with the scipper version 2 which is revision 0.
1594 * Always for CE3 cards
1597 PutWord(XIRCREG2_RBS, 0x2000);
1603 /* Hardware workaround:
1604 * The receive byte pointer after reset is off by 1 so we need
1605 * to move the offset pointer back to 0.
1608 PutWord(XIRCREG0_DO, 0x2000); /* change offset command, off=0 */
1610 /* setup MAC IMRs and clear status registers */
1611 SelectPage(0x40); /* Bit 7 ... bit 0 */
1612 PutByte(XIRCREG40_RMASK0, 0xff); /* ROK, RAB, rsv, RO, CRC, AE, PTL, MP */
1613 PutByte(XIRCREG40_TMASK0, 0xff); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1614 PutByte(XIRCREG40_TMASK1, 0xb0); /* rsv, rsv, PTD, EXT, rsv,rsv,rsv, rsv*/
1615 PutByte(XIRCREG40_RXST0, 0x00); /* ROK, RAB, REN, RO, CRC, AE, PTL, MP */
1616 PutByte(XIRCREG40_TXST0, 0x00); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1617 PutByte(XIRCREG40_TXST1, 0x00); /* TEN, rsv, PTD, EXT, retry_counter:4 */
1619 if (full && local->mohawk && init_mii(dev)) {
1620 if (dev->if_port == 4 || local->dingo || local->new_mii) {
1621 netdev_info(dev, "MII selected\n");
1623 PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);
1626 netdev_info(dev, "MII detected; using 10mbs\n");
1628 if (dev->if_port == 2) /* enable 10Base2 */
1629 PutByte(XIRCREG42_SWC1, 0xC0);
1630 else /* enable 10BaseT */
1631 PutByte(XIRCREG42_SWC1, 0x80);
1632 msleep(40); /* wait 40 msec to let it complete */
1635 PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));
1636 } else { /* No MII */
1638 value = GetByte(XIRCREG_ESR); /* read the ESR */
1639 dev->if_port = (value & MediaSelect) ? 1 : 2;
1642 /* configure the LEDs */
1644 if (dev->if_port == 1 || dev->if_port == 4) /* TP: Link and Activity */
1645 PutByte(XIRCREG2_LED, 0x3b);
1646 else /* Coax: Not-Collision and Activity */
1647 PutByte(XIRCREG2_LED, 0x3a);
1650 PutByte(0x0b, 0x04); /* 100 Mbit LED */
1652 /* enable receiver and put the mac online */
1654 set_multicast_list(dev);
1656 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1659 /* setup Ethernet IMR and enable interrupts */
1661 PutByte(XIRCREG1_IMR0, 0xff);
1664 PutByte(XIRCREG_CR, EnableIntr);
1665 if (local->modem && !local->dingo) { /* do some magic */
1666 if (!(GetByte(0x10) & 0x01))
1667 PutByte(0x10, 0x11); /* unmask master-int bit */
1671 netdev_info(dev, "media %s, silicon revision %d\n",
1672 if_names[dev->if_port], local->silicon);
1673 /* We should switch back to page 0 to avoid a bug in revision 0
1674 * where regs with offset below 8 can't be read after an access
1675 * to the MAC registers */
1680 * Initialize the Media-Independent-Interface
1681 * Returns: True if we have a good MII
1684 init_mii(struct net_device *dev)
1686 local_info_t *local = netdev_priv(dev);
1687 unsigned int ioaddr = dev->base_addr;
1688 unsigned control, status, linkpartner;
1691 if (if_port == 4 || if_port == 1) { /* force 100BaseT or 10BaseT */
1692 dev->if_port = if_port;
1693 local->probe_port = 0;
1697 status = mii_rd(ioaddr, 0, 1);
1698 if ((status & 0xff00) != 0x7800)
1699 return 0; /* No MII */
1701 local->new_mii = (mii_rd(ioaddr, 0, 2) != 0xffff);
1703 if (local->probe_port)
1704 control = 0x1000; /* auto neg */
1705 else if (dev->if_port == 4)
1706 control = 0x2000; /* no auto neg, 100mbs mode */
1708 control = 0x0000; /* no auto neg, 10mbs mode */
1709 mii_wr(ioaddr, 0, 0, control, 16);
1711 control = mii_rd(ioaddr, 0, 0);
1713 if (control & 0x0400) {
1714 netdev_notice(dev, "can't take PHY out of isolation mode\n");
1715 local->probe_port = 0;
1719 if (local->probe_port) {
1720 /* according to the DP83840A specs the auto negotiation process
1721 * may take up to 3.5 sec, so we use this also for our ML6692
1722 * Fixme: Better to use a timer here!
1724 for (i=0; i < 35; i++) {
1725 msleep(100); /* wait 100 msec */
1726 status = mii_rd(ioaddr, 0, 1);
1727 if ((status & 0x0020) && (status & 0x0004))
1731 if (!(status & 0x0020)) {
1732 netdev_info(dev, "autonegotiation failed; using 10mbs\n");
1733 if (!local->new_mii) {
1735 mii_wr(ioaddr, 0, 0, control, 16);
1738 dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;
1741 linkpartner = mii_rd(ioaddr, 0, 5);
1742 netdev_info(dev, "MII link partner: %04x\n", linkpartner);
1743 if (linkpartner & 0x0080) {
1754 do_powerdown(struct net_device *dev)
1757 unsigned int ioaddr = dev->base_addr;
1759 pr_debug("do_powerdown(%p)\n", dev);
1762 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1767 do_stop(struct net_device *dev)
1769 unsigned int ioaddr = dev->base_addr;
1770 local_info_t *lp = netdev_priv(dev);
1771 struct pcmcia_device *link = lp->p_dev;
1773 dev_dbg(&link->dev, "do_stop(%p)\n", dev);
1778 netif_stop_queue(dev);
1781 PutByte(XIRCREG_CR, 0); /* disable interrupts */
1783 PutByte(XIRCREG1_IMR0, 0x00); /* forbid all ints */
1785 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1792 static struct pcmcia_device_id xirc2ps_ids[] = {
1793 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0089, 0x110a),
1794 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0138, 0x110a),
1795 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM28", 0x2e3ee845, 0x0ea978ea),
1796 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM33", 0x2e3ee845, 0x80609023),
1797 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM56", 0x2e3ee845, 0xa650c32a),
1798 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29),
1799 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719),
1800 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf),
1801 PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x010a),
1802 PCMCIA_DEVICE_PROD_ID13("Toshiba Information Systems", "TPCENET", 0x1b3b94fe, 0xf381c1a2),
1803 PCMCIA_DEVICE_PROD_ID13("Xircom", "CE3-10/100", 0x2e3ee845, 0x0ec0ac37),
1804 PCMCIA_DEVICE_PROD_ID13("Xircom", "PS-CE2-10", 0x2e3ee845, 0x947d9073),
1805 PCMCIA_DEVICE_PROD_ID13("Xircom", "R2E-100BTX", 0x2e3ee845, 0x2464a6e3),
1806 PCMCIA_DEVICE_PROD_ID13("Xircom", "RE-10", 0x2e3ee845, 0x3e08d609),
1807 PCMCIA_DEVICE_PROD_ID13("Xircom", "XE2000", 0x2e3ee845, 0xf7188e46),
1808 PCMCIA_DEVICE_PROD_ID12("Compaq", "Ethernet LAN Card", 0x54f7c49c, 0x9fd2f0a2),
1809 PCMCIA_DEVICE_PROD_ID12("Compaq", "Netelligent 10/100 PC Card", 0x54f7c49c, 0xefe96769),
1810 PCMCIA_DEVICE_PROD_ID12("Intel", "EtherExpress(TM) PRO/100 PC Card Mobile Adapter16", 0x816cc815, 0x174397db),
1811 PCMCIA_DEVICE_PROD_ID12("Toshiba", "10/100 Ethernet PC Card", 0x44a09d9c, 0xb44deecf),
1812 /* also matches CFE-10 cards! */
1813 /* PCMCIA_DEVICE_MANF_CARD(0x0105, 0x010a), */
1816 MODULE_DEVICE_TABLE(pcmcia, xirc2ps_ids);
1819 static struct pcmcia_driver xirc2ps_cs_driver = {
1820 .owner = THIS_MODULE,
1822 .name = "xirc2ps_cs",
1824 .probe = xirc2ps_probe,
1825 .remove = xirc2ps_detach,
1826 .id_table = xirc2ps_ids,
1827 .suspend = xirc2ps_suspend,
1828 .resume = xirc2ps_resume,
1832 init_xirc2ps_cs(void)
1834 return pcmcia_register_driver(&xirc2ps_cs_driver);
1838 exit_xirc2ps_cs(void)
1840 pcmcia_unregister_driver(&xirc2ps_cs_driver);
1843 module_init(init_xirc2ps_cs);
1844 module_exit(exit_xirc2ps_cs);
1847 static int __init setup_xirc2ps_cs(char *str)
1849 /* if_port, full_duplex, do_sound, lockup_hack
1851 int ints[10] = { -1 };
1853 str = get_options(str, 9, ints);
1855 #define MAYBE_SET(X,Y) if (ints[0] >= Y && ints[Y] != -1) { X = ints[Y]; }
1856 MAYBE_SET(if_port, 3);
1857 MAYBE_SET(full_duplex, 4);
1858 MAYBE_SET(do_sound, 5);
1859 MAYBE_SET(lockup_hack, 6);
1865 __setup("xirc2ps_cs=", setup_xirc2ps_cs);