drivers/net/phy/marvell.c

   1 /*
   2  * drivers/net/phy/marvell.c
   3  *
   4  * Driver for Marvell PHYs
   5  *
   6  * Author: Andy Fleming
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  11  *
  12  * This program is free software; you can redistribute  it and/or modify it
  13  * under  the terms of  the GNU General  Public License as published by the
  14  * Free Software Foundation;  either version 2 of the  License, or (at your
  15  * option) any later version.
  16  *
  17  */
  18 #include <linux/kernel.h>
  19 #include <linux/string.h>
  20 #include <linux/ctype.h>
  21 #include <linux/errno.h>
  22 #include <linux/unistd.h>
  23 #include <linux/hwmon.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/init.h>
  26 #include <linux/delay.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/etherdevice.h>
  29 #include <linux/skbuff.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/mm.h>
  32 #include <linux/module.h>
  33 #include <linux/mii.h>
  34 #include <linux/ethtool.h>
  35 #include <linux/phy.h>
  36 #include <linux/marvell_phy.h>
  37 #include <linux/of.h>
  38
  39 #include <linux/io.h>
  40 #include <asm/irq.h>
  41 #include <linux/uaccess.h>
  42
  43 #define MII_MARVELL_PHY_PAGE            22
  44
  45 #define MII_M1011_IEVENT                0x13
  46 #define MII_M1011_IEVENT_CLEAR          0x0000
  47
  48 #define MII_M1011_IMASK                 0x12
  49 #define MII_M1011_IMASK_INIT            0x6400
  50 #define MII_M1011_IMASK_CLEAR           0x0000
  51
  52 #define MII_M1011_PHY_SCR               0x10
  53 #define MII_M1011_PHY_SCR_MDI           0x0000
  54 #define MII_M1011_PHY_SCR_MDI_X         0x0020
  55 #define MII_M1011_PHY_SCR_AUTO_CROSS    0x0060
  56
  57 #define MII_M1145_PHY_EXT_ADDR_PAGE     0x16
  58 #define MII_M1145_PHY_EXT_SR            0x1b
  59 #define MII_M1145_PHY_EXT_CR            0x14
  60 #define MII_M1145_RGMII_RX_DELAY        0x0080
  61 #define MII_M1145_RGMII_TX_DELAY        0x0002
  62 #define MII_M1145_HWCFG_MODE_SGMII_NO_CLK       0x4
  63 #define MII_M1145_HWCFG_MODE_MASK               0xf
  64 #define MII_M1145_HWCFG_FIBER_COPPER_AUTO       0x8000
  65
  66 #define MII_M1145_HWCFG_MODE_SGMII_NO_CLK       0x4
  67 #define MII_M1145_HWCFG_MODE_MASK               0xf
  68 #define MII_M1145_HWCFG_FIBER_COPPER_AUTO       0x8000
  69
  70 #define MII_M1111_PHY_LED_CONTROL       0x18
  71 #define MII_M1111_PHY_LED_DIRECT        0x4100
  72 #define MII_M1111_PHY_LED_COMBINE       0x411c
  73 #define MII_M1111_PHY_EXT_CR            0x14
  74 #define MII_M1111_RX_DELAY              0x80
  75 #define MII_M1111_TX_DELAY              0x2
  76 #define MII_M1111_PHY_EXT_SR            0x1b
  77
  78 #define MII_M1111_HWCFG_MODE_MASK               0xf
  79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII       0xb
  80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII        0x3
  81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK       0x4
  82 #define MII_M1111_HWCFG_MODE_COPPER_RTBI        0x9
  83 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO       0x8000
  84 #define MII_M1111_HWCFG_FIBER_COPPER_RES        0x2000
  85
  86 #define MII_M1111_COPPER                0
  87 #define MII_M1111_FIBER                 1
  88
  89 #define MII_88E1121_PHY_MSCR_PAGE       2
  90 #define MII_88E1121_PHY_MSCR_REG        21
  91 #define MII_88E1121_PHY_MSCR_RX_DELAY   BIT(5)
  92 #define MII_88E1121_PHY_MSCR_TX_DELAY   BIT(4)
  93 #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4))
  94
  95 #define MII_88E1121_MISC_TEST                           0x1a
  96 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK       0x1f00
  97 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT      8
  98 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN               BIT(7)
  99 #define MII_88E1510_MISC_TEST_TEMP_IRQ                  BIT(6)
 100 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN            BIT(5)
 101 #define MII_88E1121_MISC_TEST_TEMP_MASK                 0x1f
 102
 103 #define MII_88E1510_TEMP_SENSOR         0x1b
 104 #define MII_88E1510_TEMP_SENSOR_MASK    0xff
 105
 106 #define MII_88E1318S_PHY_MSCR1_REG      16
 107 #define MII_88E1318S_PHY_MSCR1_PAD_ODD  BIT(6)
 108
 109 /* Copper Specific Interrupt Enable Register */
 110 #define MII_88E1318S_PHY_CSIER                              0x12
 111 /* WOL Event Interrupt Enable */
 112 #define MII_88E1318S_PHY_CSIER_WOL_EIE                      BIT(7)
 113
 114 /* LED Timer Control Register */
 115 #define MII_88E1318S_PHY_LED_PAGE                           0x03
 116 #define MII_88E1318S_PHY_LED_TCR                            0x12
 117 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT                  BIT(15)
 118 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE                BIT(7)
 119 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW             BIT(11)
 120
 121 /* Magic Packet MAC address registers */
 122 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2                 0x17
 123 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1                 0x18
 124 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0                 0x19
 125
 126 #define MII_88E1318S_PHY_WOL_PAGE                           0x11
 127 #define MII_88E1318S_PHY_WOL_CTRL                           0x10
 128 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS          BIT(12)
 129 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
 130
 131 #define MII_88E1121_PHY_LED_CTRL        16
 132 #define MII_88E1121_PHY_LED_PAGE        3
 133 #define MII_88E1121_PHY_LED_DEF         0x0030
 134
 135 #define MII_M1011_PHY_STATUS            0x11
 136 #define MII_M1011_PHY_STATUS_1000       0x8000
 137 #define MII_M1011_PHY_STATUS_100        0x4000
 138 #define MII_M1011_PHY_STATUS_SPD_MASK   0xc000
 139 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
 140 #define MII_M1011_PHY_STATUS_RESOLVED   0x0800
 141 #define MII_M1011_PHY_STATUS_LINK       0x0400
 142
 143 #define MII_M1116R_CONTROL_REG_MAC      21
 144
 145 #define MII_88E3016_PHY_SPEC_CTRL       0x10
 146 #define MII_88E3016_DISABLE_SCRAMBLER   0x0200
 147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
 148
 149 #define MII_88E1510_GEN_CTRL_REG_1              0x14
 150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK    0x7
 151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII   0x1     /* SGMII to copper */
 152 #define MII_88E1510_GEN_CTRL_REG_1_RESET        0x8000  /* Soft reset */
 153
 154 #define LPA_FIBER_1000HALF      0x40
 155 #define LPA_FIBER_1000FULL      0x20
 156
 157 #define LPA_PAUSE_FIBER 0x180
 158 #define LPA_PAUSE_ASYM_FIBER    0x100
 159
 160 #define ADVERTISE_FIBER_1000HALF        0x40
 161 #define ADVERTISE_FIBER_1000FULL        0x20
 162
 163 #define ADVERTISE_PAUSE_FIBER           0x180
 164 #define ADVERTISE_PAUSE_ASYM_FIBER      0x100
 165
 166 #define REGISTER_LINK_STATUS    0x400
 167 #define NB_FIBER_STATS  1
 168
 169 MODULE_DESCRIPTION("Marvell PHY driver");
 170 MODULE_AUTHOR("Andy Fleming");
 171 MODULE_LICENSE("GPL");
 172
 173 struct marvell_hw_stat {
 174         const char *string;
 175         u8 page;
 176         u8 reg;
 177         u8 bits;
 178 };
 179
 180 static struct marvell_hw_stat marvell_hw_stats[] = {
 181         { "phy_receive_errors_copper", 0, 21, 16},
 182         { "phy_idle_errors", 0, 10, 8 },
 183         { "phy_receive_errors_fiber", 1, 21, 16},
 184 };
 185
 186 struct marvell_priv {
 187         u64 stats[ARRAY_SIZE(marvell_hw_stats)];
 188         char *hwmon_name;
 189         struct device *hwmon_dev;
 190 };
 191
 192 static int marvell_ack_interrupt(struct phy_device *phydev)
 193 {
 194         int err;
 195
 196         /* Clear the interrupts by reading the reg */
 197         err = phy_read(phydev, MII_M1011_IEVENT);
 198
 199         if (err < 0)
 200                 return err;
 201
 202         return 0;
 203 }
 204
 205 static int marvell_config_intr(struct phy_device *phydev)
 206 {
 207         int err;
 208
 209         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 210                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
 211         else
 212                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
 213
 214         return err;
 215 }
 216
 217 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
 218 {
 219         int reg;
 220         int err;
 221         int val;
 222
 223         /* get the current settings */
 224         reg = phy_read(phydev, MII_M1011_PHY_SCR);
 225         if (reg < 0)
 226                 return reg;
 227
 228         val = reg;
 229         val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
 230         switch (polarity) {
 231         case ETH_TP_MDI:
 232                 val |= MII_M1011_PHY_SCR_MDI;
 233                 break;
 234         case ETH_TP_MDI_X:
 235                 val |= MII_M1011_PHY_SCR_MDI_X;
 236                 break;
 237         case ETH_TP_MDI_AUTO:
 238         case ETH_TP_MDI_INVALID:
 239         default:
 240                 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
 241                 break;
 242         }
 243
 244         if (val != reg) {
 245                 /* Set the new polarity value in the register */
 246                 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
 247                 if (err)
 248                         return err;
 249         }
 250
 251         return 0;
 252 }
 253
 254 static int marvell_config_aneg(struct phy_device *phydev)
 255 {
 256         int err;
 257
 258         err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
 259         if (err < 0)
 260                 return err;
 261
 262         err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
 263                         MII_M1111_PHY_LED_DIRECT);
 264         if (err < 0)
 265                 return err;
 266
 267         err = genphy_config_aneg(phydev);
 268         if (err < 0)
 269                 return err;
 270
 271         if (phydev->autoneg != AUTONEG_ENABLE) {
 272                 int bmcr;
 273
 274                 /*
 275                  * A write to speed/duplex bits (that is performed by
 276                  * genphy_config_aneg() call above) must be followed by
 277                  * a software reset. Otherwise, the write has no effect.
 278                  */
 279                 bmcr = phy_read(phydev, MII_BMCR);
 280                 if (bmcr < 0)
 281                         return bmcr;
 282
 283                 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
 284                 if (err < 0)
 285                         return err;
 286         }
 287
 288         return 0;
 289 }
 290
 291 static int m88e1101_config_aneg(struct phy_device *phydev)
 292 {
 293         int err;
 294
 295         /* This Marvell PHY has an errata which requires
 296          * that certain registers get written in order
 297          * to restart autonegotiation
 298          */
 299         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 300
 301         if (err < 0)
 302                 return err;
 303
 304         err = phy_write(phydev, 0x1d, 0x1f);
 305         if (err < 0)
 306                 return err;
 307
 308         err = phy_write(phydev, 0x1e, 0x200c);
 309         if (err < 0)
 310                 return err;
 311
 312         err = phy_write(phydev, 0x1d, 0x5);
 313         if (err < 0)
 314                 return err;
 315
 316         err = phy_write(phydev, 0x1e, 0);
 317         if (err < 0)
 318                 return err;
 319
 320         err = phy_write(phydev, 0x1e, 0x100);
 321         if (err < 0)
 322                 return err;
 323
 324         return marvell_config_aneg(phydev);
 325 }
 326
 327 static int m88e1111_config_aneg(struct phy_device *phydev)
 328 {
 329         int err;
 330
 331         /* The Marvell PHY has an errata which requires
 332          * that certain registers get written in order
 333          * to restart autonegotiation
 334          */
 335         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 336
 337         err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
 338         if (err < 0)
 339                 return err;
 340
 341         err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
 342                         MII_M1111_PHY_LED_DIRECT);
 343         if (err < 0)
 344                 return err;
 345
 346         err = genphy_config_aneg(phydev);
 347         if (err < 0)
 348                 return err;
 349
 350         if (phydev->autoneg != AUTONEG_ENABLE) {
 351                 int bmcr;
 352
 353                 /* A write to speed/duplex bits (that is performed by
 354                  * genphy_config_aneg() call above) must be followed by
 355                  * a software reset. Otherwise, the write has no effect.
 356                  */
 357                 bmcr = phy_read(phydev, MII_BMCR);
 358                 if (bmcr < 0)
 359                         return bmcr;
 360
 361                 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
 362                 if (err < 0)
 363                         return err;
 364         }
 365
 366         return 0;
 367 }
 368
 369 #ifdef CONFIG_OF_MDIO
 370 /*
 371  * Set and/or override some configuration registers based on the
 372  * marvell,reg-init property stored in the of_node for the phydev.
 373  *
 374  * marvell,reg-init = <reg-page reg mask value>,...;
 375  *
 376  * There may be one or more sets of <reg-page reg mask value>:
 377  *
 378  * reg-page: which register bank to use.
 379  * reg: the register.
 380  * mask: if non-zero, ANDed with existing register value.
 381  * value: ORed with the masked value and written to the regiser.
 382  *
 383  */
 384 static int marvell_of_reg_init(struct phy_device *phydev)
 385 {
 386         const __be32 *paddr;
 387         int len, i, saved_page, current_page, ret;
 388
 389         if (!phydev->mdio.dev.of_node)
 390                 return 0;
 391
 392         paddr = of_get_property(phydev->mdio.dev.of_node,
 393                                 "marvell,reg-init", &len);
 394         if (!paddr || len < (4 * sizeof(*paddr)))
 395                 return 0;
 396
 397         saved_page = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 398         if (saved_page < 0)
 399                 return saved_page;
 400         current_page = saved_page;
 401
 402         ret = 0;
 403         len /= sizeof(*paddr);
 404         for (i = 0; i < len - 3; i += 4) {
 405                 u16 reg_page = be32_to_cpup(paddr + i);
 406                 u16 reg = be32_to_cpup(paddr + i + 1);
 407                 u16 mask = be32_to_cpup(paddr + i + 2);
 408                 u16 val_bits = be32_to_cpup(paddr + i + 3);
 409                 int val;
 410
 411                 if (reg_page != current_page) {
 412                         current_page = reg_page;
 413                         ret = phy_write(phydev, MII_MARVELL_PHY_PAGE, reg_page);
 414                         if (ret < 0)
 415                                 goto err;
 416                 }
 417
 418                 val = 0;
 419                 if (mask) {
 420                         val = phy_read(phydev, reg);
 421                         if (val < 0) {
 422                                 ret = val;
 423                                 goto err;
 424                         }
 425                         val &= mask;
 426                 }
 427                 val |= val_bits;
 428
 429                 ret = phy_write(phydev, reg, val);
 430                 if (ret < 0)
 431                         goto err;
 432
 433         }
 434 err:
 435         if (current_page != saved_page) {
 436                 i = phy_write(phydev, MII_MARVELL_PHY_PAGE, saved_page);
 437                 if (ret == 0)
 438                         ret = i;
 439         }
 440         return ret;
 441 }
 442 #else
 443 static int marvell_of_reg_init(struct phy_device *phydev)
 444 {
 445         return 0;
 446 }
 447 #endif /* CONFIG_OF_MDIO */
 448
 449 static int m88e1121_config_aneg(struct phy_device *phydev)
 450 {
 451         int err, oldpage, mscr;
 452
 453         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 454
 455         err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
 456                         MII_88E1121_PHY_MSCR_PAGE);
 457         if (err < 0)
 458                 return err;
 459
 460         if (phy_interface_is_rgmii(phydev)) {
 461
 462                 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
 463                         MII_88E1121_PHY_MSCR_DELAY_MASK;
 464
 465                 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
 466                         mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
 467                                  MII_88E1121_PHY_MSCR_TX_DELAY);
 468                 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
 469                         mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
 470                 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
 471                         mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
 472
 473                 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
 474                 if (err < 0)
 475                         return err;
 476         }
 477
 478         phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
 479
 480         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 481         if (err < 0)
 482                 return err;
 483
 484         err = phy_write(phydev, MII_M1011_PHY_SCR,
 485                         MII_M1011_PHY_SCR_AUTO_CROSS);
 486         if (err < 0)
 487                 return err;
 488
 489         return genphy_config_aneg(phydev);
 490 }
 491
 492 static int m88e1318_config_aneg(struct phy_device *phydev)
 493 {
 494         int err, oldpage, mscr;
 495
 496         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 497
 498         err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
 499                         MII_88E1121_PHY_MSCR_PAGE);
 500         if (err < 0)
 501                 return err;
 502
 503         mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
 504         mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
 505
 506         err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
 507         if (err < 0)
 508                 return err;
 509
 510         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
 511         if (err < 0)
 512                 return err;
 513
 514         return m88e1121_config_aneg(phydev);
 515 }
 516
 517 /**
 518  * ethtool_adv_to_fiber_adv_t
 519  * @ethadv: the ethtool advertisement settings
 520  *
 521  * A small helper function that translates ethtool advertisement
 522  * settings to phy autonegotiation advertisements for the
 523  * MII_ADV register for fiber link.
 524  */
 525 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
 526 {
 527         u32 result = 0;
 528
 529         if (ethadv & ADVERTISED_1000baseT_Half)
 530                 result |= ADVERTISE_FIBER_1000HALF;
 531         if (ethadv & ADVERTISED_1000baseT_Full)
 532                 result |= ADVERTISE_FIBER_1000FULL;
 533
 534         if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
 535                 result |= LPA_PAUSE_ASYM_FIBER;
 536         else if (ethadv & ADVERTISE_PAUSE_CAP)
 537                 result |= (ADVERTISE_PAUSE_FIBER
 538                            & (~ADVERTISE_PAUSE_ASYM_FIBER));
 539
 540         return result;
 541 }
 542
 543 /**
 544  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
 545  * @phydev: target phy_device struct
 546  *
 547  * Description: If auto-negotiation is enabled, we configure the
 548  *   advertising, and then restart auto-negotiation.  If it is not
 549  *   enabled, then we write the BMCR. Adapted for fiber link in
 550  *   some Marvell's devices.
 551  */
 552 static int marvell_config_aneg_fiber(struct phy_device *phydev)
 553 {
 554         int changed = 0;
 555         int err;
 556         int adv, oldadv;
 557         u32 advertise;
 558
 559         if (phydev->autoneg != AUTONEG_ENABLE)
 560                 return genphy_setup_forced(phydev);
 561
 562         /* Only allow advertising what this PHY supports */
 563         phydev->advertising &= phydev->supported;
 564         advertise = phydev->advertising;
 565
 566         /* Setup fiber advertisement */
 567         adv = phy_read(phydev, MII_ADVERTISE);
 568         if (adv < 0)
 569                 return adv;
 570
 571         oldadv = adv;
 572         adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
 573                 | LPA_PAUSE_FIBER);
 574         adv |= ethtool_adv_to_fiber_adv_t(advertise);
 575
 576         if (adv != oldadv) {
 577                 err = phy_write(phydev, MII_ADVERTISE, adv);
 578                 if (err < 0)
 579                         return err;
 580
 581                 changed = 1;
 582         }
 583
 584         if (changed == 0) {
 585                 /* Advertisement hasn't changed, but maybe aneg was never on to
 586                  * begin with?  Or maybe phy was isolated?
 587                  */
 588                 int ctl = phy_read(phydev, MII_BMCR);
 589
 590                 if (ctl < 0)
 591                         return ctl;
 592
 593                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
 594                         changed = 1; /* do restart aneg */
 595         }
 596
 597         /* Only restart aneg if we are advertising something different
 598          * than we were before.
 599          */
 600         if (changed > 0)
 601                 changed = genphy_restart_aneg(phydev);
 602
 603         return changed;
 604 }
 605
 606 static int m88e1510_config_aneg(struct phy_device *phydev)
 607 {
 608         int err;
 609
 610         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
 611         if (err < 0)
 612                 goto error;
 613
 614         /* Configure the copper link first */
 615         err = m88e1318_config_aneg(phydev);
 616         if (err < 0)
 617                 goto error;
 618
 619         /* Then the fiber link */
 620         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
 621         if (err < 0)
 622                 goto error;
 623
 624         err = marvell_config_aneg_fiber(phydev);
 625         if (err < 0)
 626                 goto error;
 627
 628         return phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
 629
 630 error:
 631         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
 632         return err;
 633 }
 634
 635 static int marvell_config_init(struct phy_device *phydev)
 636 {
 637         /* Set registers from marvell,reg-init DT property */
 638         return marvell_of_reg_init(phydev);
 639 }
 640
 641 static int m88e1116r_config_init(struct phy_device *phydev)
 642 {
 643         int temp;
 644         int err;
 645
 646         temp = phy_read(phydev, MII_BMCR);
 647         temp |= BMCR_RESET;
 648         err = phy_write(phydev, MII_BMCR, temp);
 649         if (err < 0)
 650                 return err;
 651
 652         mdelay(500);
 653
 654         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
 655         if (err < 0)
 656                 return err;
 657
 658         temp = phy_read(phydev, MII_M1011_PHY_SCR);
 659         temp |= (7 << 12);      /* max number of gigabit attempts */
 660         temp |= (1 << 11);      /* enable downshift */
 661         temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
 662         err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
 663         if (err < 0)
 664                 return err;
 665
 666         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 2);
 667         if (err < 0)
 668                 return err;
 669         temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
 670         temp |= (1 << 5);
 671         temp |= (1 << 4);
 672         err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
 673         if (err < 0)
 674                 return err;
 675         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
 676         if (err < 0)
 677                 return err;
 678
 679         temp = phy_read(phydev, MII_BMCR);
 680         temp |= BMCR_RESET;
 681         err = phy_write(phydev, MII_BMCR, temp);
 682         if (err < 0)
 683                 return err;
 684
 685         mdelay(500);
 686
 687         return marvell_config_init(phydev);
 688 }
 689
 690 static int m88e3016_config_init(struct phy_device *phydev)
 691 {
 692         int reg;
 693
 694         /* Enable Scrambler and Auto-Crossover */
 695         reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
 696         if (reg < 0)
 697                 return reg;
 698
 699         reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
 700         reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
 701
 702         reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
 703         if (reg < 0)
 704                 return reg;
 705
 706         return marvell_config_init(phydev);
 707 }
 708
 709 static int m88e1111_config_init(struct phy_device *phydev)
 710 {
 711         int err;
 712         int temp;
 713
 714         if (phy_interface_is_rgmii(phydev)) {
 715
 716                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 717                 if (temp < 0)
 718                         return temp;
 719
 720                 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 721                         temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 722                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
 723                         temp &= ~MII_M1111_TX_DELAY;
 724                         temp |= MII_M1111_RX_DELAY;
 725                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
 726                         temp &= ~MII_M1111_RX_DELAY;
 727                         temp |= MII_M1111_TX_DELAY;
 728                 }
 729
 730                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 731                 if (err < 0)
 732                         return err;
 733
 734                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 735                 if (temp < 0)
 736                         return temp;
 737
 738                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 739
 740                 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
 741                         temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
 742                 else
 743                         temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
 744
 745                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 746                 if (err < 0)
 747                         return err;
 748         }
 749
 750         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 751                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 752                 if (temp < 0)
 753                         return temp;
 754
 755                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 756                 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
 757                 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 758
 759                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 760                 if (err < 0)
 761                         return err;
 762
 763                 /* make sure copper is selected */
 764                 err = phy_read(phydev, MII_M1145_PHY_EXT_ADDR_PAGE);
 765                 if (err < 0)
 766                         return err;
 767
 768                 err = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE,
 769                                 err & (~0xff));
 770                 if (err < 0)
 771                         return err;
 772         }
 773
 774         if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
 775                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 776                 if (temp < 0)
 777                         return temp;
 778                 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 779                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 780                 if (err < 0)
 781                         return err;
 782
 783                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 784                 if (temp < 0)
 785                         return temp;
 786                 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES);
 787                 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 788                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 789                 if (err < 0)
 790                         return err;
 791
 792                 /* soft reset */
 793                 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 794                 if (err < 0)
 795                         return err;
 796                 do
 797                         temp = phy_read(phydev, MII_BMCR);
 798                 while (temp & BMCR_RESET);
 799
 800                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 801                 if (temp < 0)
 802                         return temp;
 803                 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES);
 804                 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 805                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 806                 if (err < 0)
 807                         return err;
 808         }
 809
 810         err = marvell_of_reg_init(phydev);
 811         if (err < 0)
 812                 return err;
 813
 814         return phy_write(phydev, MII_BMCR, BMCR_RESET);
 815 }
 816
 817 static int m88e1121_config_init(struct phy_device *phydev)
 818 {
 819         int err, oldpage;
 820
 821         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 822
 823         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
 824         if (err < 0)
 825                 return err;
 826
 827         /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
 828         err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
 829                         MII_88E1121_PHY_LED_DEF);
 830         if (err < 0)
 831                 return err;
 832
 833         phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
 834
 835         /* Set marvell,reg-init configuration from device tree */
 836         return marvell_config_init(phydev);
 837 }
 838
 839 static int m88e1510_config_init(struct phy_device *phydev)
 840 {
 841         int err;
 842         int temp;
 843
 844         /* SGMII-to-Copper mode initialization */
 845         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 846                 /* Select page 18 */
 847                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 18);
 848                 if (err < 0)
 849                         return err;
 850
 851                 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
 852                 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
 853                 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
 854                 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
 855                 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
 856                 if (err < 0)
 857                         return err;
 858
 859                 /* PHY reset is necessary after changing MODE[2:0] */
 860                 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
 861                 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
 862                 if (err < 0)
 863                         return err;
 864
 865                 /* Reset page selection */
 866                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
 867                 if (err < 0)
 868                         return err;
 869         }
 870
 871         return m88e1121_config_init(phydev);
 872 }
 873
 874 static int m88e1118_config_aneg(struct phy_device *phydev)
 875 {
 876         int err;
 877
 878         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 879         if (err < 0)
 880                 return err;
 881
 882         err = phy_write(phydev, MII_M1011_PHY_SCR,
 883                         MII_M1011_PHY_SCR_AUTO_CROSS);
 884         if (err < 0)
 885                 return err;
 886
 887         err = genphy_config_aneg(phydev);
 888         return 0;
 889 }
 890
 891 static int m88e1118_config_init(struct phy_device *phydev)
 892 {
 893         int err;
 894
 895         /* Change address */
 896         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0002);
 897         if (err < 0)
 898                 return err;
 899
 900         /* Enable 1000 Mbit */
 901         err = phy_write(phydev, 0x15, 0x1070);
 902         if (err < 0)
 903                 return err;
 904
 905         /* Change address */
 906         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0003);
 907         if (err < 0)
 908                 return err;
 909
 910         /* Adjust LED Control */
 911         if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
 912                 err = phy_write(phydev, 0x10, 0x1100);
 913         else
 914                 err = phy_write(phydev, 0x10, 0x021e);
 915         if (err < 0)
 916                 return err;
 917
 918         err = marvell_of_reg_init(phydev);
 919         if (err < 0)
 920                 return err;
 921
 922         /* Reset address */
 923         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0);
 924         if (err < 0)
 925                 return err;
 926
 927         return phy_write(phydev, MII_BMCR, BMCR_RESET);
 928 }
 929
 930 static int m88e1149_config_init(struct phy_device *phydev)
 931 {
 932         int err;
 933
 934         /* Change address */
 935         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0002);
 936         if (err < 0)
 937                 return err;
 938
 939         /* Enable 1000 Mbit */
 940         err = phy_write(phydev, 0x15, 0x1048);
 941         if (err < 0)
 942                 return err;
 943
 944         err = marvell_of_reg_init(phydev);
 945         if (err < 0)
 946                 return err;
 947
 948         /* Reset address */
 949         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0);
 950         if (err < 0)
 951                 return err;
 952
 953         return phy_write(phydev, MII_BMCR, BMCR_RESET);
 954 }
 955
 956 static int m88e1145_config_init(struct phy_device *phydev)
 957 {
 958         int err;
 959         int temp;
 960
 961         /* Take care of errata E0 & E1 */
 962         err = phy_write(phydev, 0x1d, 0x001b);
 963         if (err < 0)
 964                 return err;
 965
 966         err = phy_write(phydev, 0x1e, 0x418f);
 967         if (err < 0)
 968                 return err;
 969
 970         err = phy_write(phydev, 0x1d, 0x0016);
 971         if (err < 0)
 972                 return err;
 973
 974         err = phy_write(phydev, 0x1e, 0xa2da);
 975         if (err < 0)
 976                 return err;
 977
 978         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 979                 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
 980                 if (temp < 0)
 981                         return temp;
 982
 983                 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
 984
 985                 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
 986                 if (err < 0)
 987                         return err;
 988
 989                 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
 990                         err = phy_write(phydev, 0x1d, 0x0012);
 991                         if (err < 0)
 992                                 return err;
 993
 994                         temp = phy_read(phydev, 0x1e);
 995                         if (temp < 0)
 996                                 return temp;
 997
 998                         temp &= 0xf03f;
 999                         temp |= 2 << 9; /* 36 ohm */
1000                         temp |= 2 << 6; /* 39 ohm */
1001
1002                         err = phy_write(phydev, 0x1e, temp);
1003                         if (err < 0)
1004                                 return err;
1005
1006                         err = phy_write(phydev, 0x1d, 0x3);
1007                         if (err < 0)
1008                                 return err;
1009
1010                         err = phy_write(phydev, 0x1e, 0x8000);
1011                         if (err < 0)
1012                                 return err;
1013                 }
1014         }
1015
1016         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1017                 temp = phy_read(phydev, MII_M1145_PHY_EXT_SR);
1018                 if (temp < 0)
1019                         return temp;
1020
1021                 temp &= ~MII_M1145_HWCFG_MODE_MASK;
1022                 temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK;
1023                 temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO;
1024
1025                 err = phy_write(phydev, MII_M1145_PHY_EXT_SR, temp);
1026                 if (err < 0)
1027                         return err;
1028         }
1029
1030         err = marvell_of_reg_init(phydev);
1031         if (err < 0)
1032                 return err;
1033
1034         return 0;
1035 }
1036
1037 /**
1038  * fiber_lpa_to_ethtool_lpa_t
1039  * @lpa: value of the MII_LPA register for fiber link
1040  *
1041  * A small helper function that translates MII_LPA
1042  * bits to ethtool LP advertisement settings.
1043  */
1044 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1045 {
1046         u32 result = 0;
1047
1048         if (lpa & LPA_FIBER_1000HALF)
1049                 result |= ADVERTISED_1000baseT_Half;
1050         if (lpa & LPA_FIBER_1000FULL)
1051                 result |= ADVERTISED_1000baseT_Full;
1052
1053         return result;
1054 }
1055
1056 /**
1057  * marvell_update_link - update link status in real time in @phydev
1058  * @phydev: target phy_device struct
1059  *
1060  * Description: Update the value in phydev->link to reflect the
1061  *   current link value.
1062  */
1063 static int marvell_update_link(struct phy_device *phydev, int fiber)
1064 {
1065         int status;
1066
1067         /* Use the generic register for copper link, or specific
1068          * register for fiber case */
1069         if (fiber) {
1070                 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1071                 if (status < 0)
1072                         return status;
1073
1074                 if ((status & REGISTER_LINK_STATUS) == 0)
1075                         phydev->link = 0;
1076                 else
1077                         phydev->link = 1;
1078         } else {
1079                 return genphy_update_link(phydev);
1080         }
1081
1082         return 0;
1083 }
1084
1085 /* marvell_read_status_page
1086  *
1087  * Description:
1088  *   Check the link, then figure out the current state
1089  *   by comparing what we advertise with what the link partner
1090  *   advertises.  Start by checking the gigabit possibilities,
1091  *   then move on to 10/100.
1092  */
1093 static int marvell_read_status_page(struct phy_device *phydev, int page)
1094 {
1095         int adv;
1096         int err;
1097         int lpa;
1098         int lpagb;
1099         int status = 0;
1100         int fiber;
1101
1102         /* Detect and update the link, but return if there
1103          * was an error */
1104         if (page == MII_M1111_FIBER)
1105                 fiber = 1;
1106         else
1107                 fiber = 0;
1108
1109         err = marvell_update_link(phydev, fiber);
1110         if (err)
1111                 return err;
1112
1113         if (AUTONEG_ENABLE == phydev->autoneg) {
1114                 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1115                 if (status < 0)
1116                         return status;
1117
1118                 lpa = phy_read(phydev, MII_LPA);
1119                 if (lpa < 0)
1120                         return lpa;
1121
1122                 lpagb = phy_read(phydev, MII_STAT1000);
1123                 if (lpagb < 0)
1124                         return lpagb;
1125
1126                 adv = phy_read(phydev, MII_ADVERTISE);
1127                 if (adv < 0)
1128                         return adv;
1129
1130                 lpa &= adv;
1131
1132                 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1133                         phydev->duplex = DUPLEX_FULL;
1134                 else
1135                         phydev->duplex = DUPLEX_HALF;
1136
1137                 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1138                 phydev->pause = phydev->asym_pause = 0;
1139
1140                 switch (status) {
1141                 case MII_M1011_PHY_STATUS_1000:
1142                         phydev->speed = SPEED_1000;
1143                         break;
1144
1145                 case MII_M1011_PHY_STATUS_100:
1146                         phydev->speed = SPEED_100;
1147                         break;
1148
1149                 default:
1150                         phydev->speed = SPEED_10;
1151                         break;
1152                 }
1153
1154                 if (!fiber) {
1155                         phydev->lp_advertising = mii_stat1000_to_ethtool_lpa_t(lpagb) |
1156                                          mii_lpa_to_ethtool_lpa_t(lpa);
1157
1158                         if (phydev->duplex == DUPLEX_FULL) {
1159                                 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1160                                 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1161                         }
1162                 } else {
1163                         /* The fiber link is only 1000M capable */
1164                         phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1165
1166                         if (phydev->duplex == DUPLEX_FULL) {
1167                                 if (!(lpa & LPA_PAUSE_FIBER)) {
1168                                         phydev->pause = 0;
1169                                         phydev->asym_pause = 0;
1170                                 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1171                                         phydev->pause = 1;
1172                                         phydev->asym_pause = 1;
1173                                 } else {
1174                                         phydev->pause = 1;
1175                                         phydev->asym_pause = 0;
1176                                 }
1177                         }
1178                 }
1179         } else {
1180                 int bmcr = phy_read(phydev, MII_BMCR);
1181
1182                 if (bmcr < 0)
1183                         return bmcr;
1184
1185                 if (bmcr & BMCR_FULLDPLX)
1186                         phydev->duplex = DUPLEX_FULL;
1187                 else
1188                         phydev->duplex = DUPLEX_HALF;
1189
1190                 if (bmcr & BMCR_SPEED1000)
1191                         phydev->speed = SPEED_1000;
1192                 else if (bmcr & BMCR_SPEED100)
1193                         phydev->speed = SPEED_100;
1194                 else
1195                         phydev->speed = SPEED_10;
1196
1197                 phydev->pause = phydev->asym_pause = 0;
1198                 phydev->lp_advertising = 0;
1199         }
1200
1201         return 0;
1202 }
1203
1204 /* marvell_read_status
1205  *
1206  * Some Marvell's phys have two modes: fiber and copper.
1207  * Both need status checked.
1208  * Description:
1209  *   First, check the fiber link and status.
1210  *   If the fiber link is down, check the copper link and status which
1211  *   will be the default value if both link are down.
1212  */
1213 static int marvell_read_status(struct phy_device *phydev)
1214 {
1215         int err;
1216
1217         /* Check the fiber mode first */
1218         if (phydev->supported & SUPPORTED_FIBRE &&
1219             phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1220                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
1221                 if (err < 0)
1222                         goto error;
1223
1224                 err = marvell_read_status_page(phydev, MII_M1111_FIBER);
1225                 if (err < 0)
1226                         goto error;
1227
1228                 /* If the fiber link is up, it is the selected and used link.
1229                  * In this case, we need to stay in the fiber page.
1230                  * Please to be careful about that, avoid to restore Copper page
1231                  * in other functions which could break the behaviour
1232                  * for some fiber phy like 88E1512.
1233                  * */
1234                 if (phydev->link)
1235                         return 0;
1236
1237                 /* If fiber link is down, check and save copper mode state */
1238                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1239                 if (err < 0)
1240                         goto error;
1241         }
1242
1243         return marvell_read_status_page(phydev, MII_M1111_COPPER);
1244
1245 error:
1246         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1247         return err;
1248 }
1249
1250 /* marvell_suspend
1251  *
1252  * Some Marvell's phys have two modes: fiber and copper.
1253  * Both need to be suspended
1254  */
1255 static int marvell_suspend(struct phy_device *phydev)
1256 {
1257         int err;
1258
1259         /* Suspend the fiber mode first */
1260         if (!(phydev->supported & SUPPORTED_FIBRE)) {
1261                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
1262                 if (err < 0)
1263                         goto error;
1264
1265                 /* With the page set, use the generic suspend */
1266                 err = genphy_suspend(phydev);
1267                 if (err < 0)
1268                         goto error;
1269
1270                 /* Then, the copper link */
1271                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1272                 if (err < 0)
1273                         goto error;
1274         }
1275
1276         /* With the page set, use the generic suspend */
1277         return genphy_suspend(phydev);
1278
1279 error:
1280         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1281         return err;
1282 }
1283
1284 /* marvell_resume
1285  *
1286  * Some Marvell's phys have two modes: fiber and copper.
1287  * Both need to be resumed
1288  */
1289 static int marvell_resume(struct phy_device *phydev)
1290 {
1291         int err;
1292
1293         /* Resume the fiber mode first */
1294         if (!(phydev->supported & SUPPORTED_FIBRE)) {
1295                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
1296                 if (err < 0)
1297                         goto error;
1298
1299                 /* With the page set, use the generic resume */
1300                 err = genphy_resume(phydev);
1301                 if (err < 0)
1302                         goto error;
1303
1304                 /* Then, the copper link */
1305                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1306                 if (err < 0)
1307                         goto error;
1308         }
1309
1310         /* With the page set, use the generic resume */
1311         return genphy_resume(phydev);
1312
1313 error:
1314         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1315         return err;
1316 }
1317
1318 static int marvell_aneg_done(struct phy_device *phydev)
1319 {
1320         int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1321         return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1322 }
1323
1324 static int m88e1121_did_interrupt(struct phy_device *phydev)
1325 {
1326         int imask;
1327
1328         imask = phy_read(phydev, MII_M1011_IEVENT);
1329
1330         if (imask & MII_M1011_IMASK_INIT)
1331                 return 1;
1332
1333         return 0;
1334 }
1335
1336 static void m88e1318_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1337 {
1338         wol->supported = WAKE_MAGIC;
1339         wol->wolopts = 0;
1340
1341         if (phy_write(phydev, MII_MARVELL_PHY_PAGE,
1342                       MII_88E1318S_PHY_WOL_PAGE) < 0)
1343                 return;
1344
1345         if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1346             MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1347                 wol->wolopts |= WAKE_MAGIC;
1348
1349         if (phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x00) < 0)
1350                 return;
1351 }
1352
1353 static int m88e1318_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1354 {
1355         int err, oldpage, temp;
1356
1357         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
1358
1359         if (wol->wolopts & WAKE_MAGIC) {
1360                 /* Explicitly switch to page 0x00, just to be sure */
1361                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x00);
1362                 if (err < 0)
1363                         return err;
1364
1365                 /* Enable the WOL interrupt */
1366                 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1367                 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1368                 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1369                 if (err < 0)
1370                         return err;
1371
1372                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1373                                 MII_88E1318S_PHY_LED_PAGE);
1374                 if (err < 0)
1375                         return err;
1376
1377                 /* Setup LED[2] as interrupt pin (active low) */
1378                 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1379                 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1380                 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1381                 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1382                 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1383                 if (err < 0)
1384                         return err;
1385
1386                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1387                                 MII_88E1318S_PHY_WOL_PAGE);
1388                 if (err < 0)
1389                         return err;
1390
1391                 /* Store the device address for the magic packet */
1392                 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1393                                 ((phydev->attached_dev->dev_addr[5] << 8) |
1394                                  phydev->attached_dev->dev_addr[4]));
1395                 if (err < 0)
1396                         return err;
1397                 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1398                                 ((phydev->attached_dev->dev_addr[3] << 8) |
1399                                  phydev->attached_dev->dev_addr[2]));
1400                 if (err < 0)
1401                         return err;
1402                 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1403                                 ((phydev->attached_dev->dev_addr[1] << 8) |
1404                                  phydev->attached_dev->dev_addr[0]));
1405                 if (err < 0)
1406                         return err;
1407
1408                 /* Clear WOL status and enable magic packet matching */
1409                 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1410                 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1411                 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1412                 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1413                 if (err < 0)
1414                         return err;
1415         } else {
1416                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1417                                 MII_88E1318S_PHY_WOL_PAGE);
1418                 if (err < 0)
1419                         return err;
1420
1421                 /* Clear WOL status and disable magic packet matching */
1422                 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1423                 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1424                 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1425                 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1426                 if (err < 0)
1427                         return err;
1428         }
1429
1430         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
1431         if (err < 0)
1432                 return err;
1433
1434         return 0;
1435 }
1436
1437 static int marvell_get_sset_count(struct phy_device *phydev)
1438 {
1439         if (phydev->supported & SUPPORTED_FIBRE)
1440                 return ARRAY_SIZE(marvell_hw_stats);
1441         else
1442                 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1443 }
1444
1445 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1446 {
1447         int i;
1448
1449         for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1450                 memcpy(data + i * ETH_GSTRING_LEN,
1451                        marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1452         }
1453 }
1454
1455 #ifndef UINT64_MAX
1456 #define UINT64_MAX              (u64)(~((u64)0))
1457 #endif
1458 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1459 {
1460         struct marvell_hw_stat stat = marvell_hw_stats[i];
1461         struct marvell_priv *priv = phydev->priv;
1462         int err, oldpage, val;
1463         u64 ret;
1464
1465         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
1466         err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1467                         stat.page);
1468         if (err < 0)
1469                 return UINT64_MAX;
1470
1471         val = phy_read(phydev, stat.reg);
1472         if (val < 0) {
1473                 ret = UINT64_MAX;
1474         } else {
1475                 val = val & ((1 << stat.bits) - 1);
1476                 priv->stats[i] += val;
1477                 ret = priv->stats[i];
1478         }
1479
1480         phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
1481
1482         return ret;
1483 }
1484
1485 static void marvell_get_stats(struct phy_device *phydev,
1486                               struct ethtool_stats *stats, u64 *data)
1487 {
1488         int i;
1489
1490         for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1491                 data[i] = marvell_get_stat(phydev, i);
1492 }
1493
1494 #ifdef CONFIG_HWMON
1495 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1496 {
1497         int ret;
1498         int val;
1499
1500         *temp = 0;
1501
1502         mutex_lock(&phydev->lock);
1503
1504         ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
1505         if (ret < 0)
1506                 goto error;
1507
1508         /* Enable temperature sensor */
1509         ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1510         if (ret < 0)
1511                 goto error;
1512
1513         ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1514                         ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1515         if (ret < 0)
1516                 goto error;
1517
1518         /* Wait for temperature to stabilize */
1519         usleep_range(10000, 12000);
1520
1521         val = phy_read(phydev, MII_88E1121_MISC_TEST);
1522         if (val < 0) {
1523                 ret = val;
1524                 goto error;
1525         }
1526
1527         /* Disable temperature sensor */
1528         ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1529                         ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1530         if (ret < 0)
1531                 goto error;
1532
1533         *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1534
1535 error:
1536         phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
1537         mutex_unlock(&phydev->lock);
1538
1539         return ret;
1540 }
1541
1542 static int m88e1121_hwmon_read(struct device *dev,
1543                                enum hwmon_sensor_types type,
1544                                u32 attr, int channel, long *temp)
1545 {
1546         struct phy_device *phydev = dev_get_drvdata(dev);
1547         int err;
1548
1549         switch (attr) {
1550         case hwmon_temp_input:
1551                 err = m88e1121_get_temp(phydev, temp);
1552                 break;
1553         default:
1554                 return -EOPNOTSUPP;
1555         }
1556
1557         return err;
1558 }
1559
1560 static umode_t m88e1121_hwmon_is_visible(const void *data,
1561                                          enum hwmon_sensor_types type,
1562                                          u32 attr, int channel)
1563 {
1564         if (type != hwmon_temp)
1565                 return 0;
1566
1567         switch (attr) {
1568         case hwmon_temp_input:
1569                 return 0444;
1570         default:
1571                 return 0;
1572         }
1573 }
1574
1575 static u32 m88e1121_hwmon_chip_config[] = {
1576         HWMON_C_REGISTER_TZ,
1577         0
1578 };
1579
1580 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1581         .type = hwmon_chip,
1582         .config = m88e1121_hwmon_chip_config,
1583 };
1584
1585 static u32 m88e1121_hwmon_temp_config[] = {
1586         HWMON_T_INPUT,
1587         0
1588 };
1589
1590 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1591         .type = hwmon_temp,
1592         .config = m88e1121_hwmon_temp_config,
1593 };
1594
1595 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1596         &m88e1121_hwmon_chip,
1597         &m88e1121_hwmon_temp,
1598         NULL
1599 };
1600
1601 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1602         .is_visible = m88e1121_hwmon_is_visible,
1603         .read = m88e1121_hwmon_read,
1604 };
1605
1606 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1607         .ops = &m88e1121_hwmon_hwmon_ops,
1608         .info = m88e1121_hwmon_info,
1609 };
1610
1611 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1612 {
1613         int ret;
1614
1615         *temp = 0;
1616
1617         mutex_lock(&phydev->lock);
1618
1619         ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
1620         if (ret < 0)
1621                 goto error;
1622
1623         ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1624         if (ret < 0)
1625                 goto error;
1626
1627         *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1628
1629 error:
1630         phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
1631         mutex_unlock(&phydev->lock);
1632
1633         return ret;
1634 }
1635
1636 int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1637 {
1638         int ret;
1639
1640         *temp = 0;
1641
1642         mutex_lock(&phydev->lock);
1643
1644         ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
1645         if (ret < 0)
1646                 goto error;
1647
1648         ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1649         if (ret < 0)
1650                 goto error;
1651
1652         *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1653                   MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1654         /* convert to mC */
1655         *temp *= 1000;
1656
1657 error:
1658         phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
1659         mutex_unlock(&phydev->lock);
1660
1661         return ret;
1662 }
1663
1664 int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1665 {
1666         int ret;
1667
1668         mutex_lock(&phydev->lock);
1669
1670         ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
1671         if (ret < 0)
1672                 goto error;
1673
1674         ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1675         if (ret < 0)
1676                 goto error;
1677
1678         temp = temp / 1000;
1679         temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1680         ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1681                         (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1682                         (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1683
1684 error:
1685         phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
1686         mutex_unlock(&phydev->lock);
1687
1688         return ret;
1689 }
1690
1691 int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1692 {
1693         int ret;
1694
1695         *alarm = false;
1696
1697         mutex_lock(&phydev->lock);
1698
1699         ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
1700         if (ret < 0)
1701                 goto error;
1702
1703         ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1704         if (ret < 0)
1705                 goto error;
1706         *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1707
1708 error:
1709         phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
1710         mutex_unlock(&phydev->lock);
1711
1712         return ret;
1713 }
1714
1715 static int m88e1510_hwmon_read(struct device *dev,
1716                                enum hwmon_sensor_types type,
1717                                u32 attr, int channel, long *temp)
1718 {
1719         struct phy_device *phydev = dev_get_drvdata(dev);
1720         int err;
1721
1722         switch (attr) {
1723         case hwmon_temp_input:
1724                 err = m88e1510_get_temp(phydev, temp);
1725                 break;
1726         case hwmon_temp_crit:
1727                 err = m88e1510_get_temp_critical(phydev, temp);
1728                 break;
1729         case hwmon_temp_max_alarm:
1730                 err = m88e1510_get_temp_alarm(phydev, temp);
1731                 break;
1732         default:
1733                 return -EOPNOTSUPP;
1734         }
1735
1736         return err;
1737 }
1738
1739 static int m88e1510_hwmon_write(struct device *dev,
1740                                 enum hwmon_sensor_types type,
1741                                 u32 attr, int channel, long temp)
1742 {
1743         struct phy_device *phydev = dev_get_drvdata(dev);
1744         int err;
1745
1746         switch (attr) {
1747         case hwmon_temp_crit:
1748                 err = m88e1510_set_temp_critical(phydev, temp);
1749                 break;
1750         default:
1751                 return -EOPNOTSUPP;
1752         }
1753         return err;
1754 }
1755
1756 static umode_t m88e1510_hwmon_is_visible(const void *data,
1757                                          enum hwmon_sensor_types type,
1758                                          u32 attr, int channel)
1759 {
1760         if (type != hwmon_temp)
1761                 return 0;
1762
1763         switch (attr) {
1764         case hwmon_temp_input:
1765         case hwmon_temp_max_alarm:
1766                 return 0444;
1767         case hwmon_temp_crit:
1768                 return 0644;
1769         default:
1770                 return 0;
1771         }
1772 }
1773
1774 static u32 m88e1510_hwmon_temp_config[] = {
1775         HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1776         0
1777 };
1778
1779 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1780         .type = hwmon_temp,
1781         .config = m88e1510_hwmon_temp_config,
1782 };
1783
1784 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1785         &m88e1121_hwmon_chip,
1786         &m88e1510_hwmon_temp,
1787         NULL
1788 };
1789
1790 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1791         .is_visible = m88e1510_hwmon_is_visible,
1792         .read = m88e1510_hwmon_read,
1793         .write = m88e1510_hwmon_write,
1794 };
1795
1796 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1797         .ops = &m88e1510_hwmon_hwmon_ops,
1798         .info = m88e1510_hwmon_info,
1799 };
1800
1801 static int marvell_hwmon_name(struct phy_device *phydev)
1802 {
1803         struct marvell_priv *priv = phydev->priv;
1804         struct device *dev = &phydev->mdio.dev;
1805         const char *devname = dev_name(dev);
1806         size_t len = strlen(devname);
1807         int i, j;
1808
1809         priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1810         if (!priv->hwmon_name)
1811                 return -ENOMEM;
1812
1813         for (i = j = 0; i < len && devname[i]; i++) {
1814                 if (isalnum(devname[i]))
1815                         priv->hwmon_name[j++] = devname[i];
1816         }
1817
1818         return 0;
1819 }
1820
1821 static int marvell_hwmon_probe(struct phy_device *phydev,
1822                                const struct hwmon_chip_info *chip)
1823 {
1824         struct marvell_priv *priv = phydev->priv;
1825         struct device *dev = &phydev->mdio.dev;
1826         int err;
1827
1828         err = marvell_hwmon_name(phydev);
1829         if (err)
1830                 return err;
1831
1832         priv->hwmon_dev = devm_hwmon_device_register_with_info(
1833                 dev, priv->hwmon_name, phydev, chip, NULL);
1834
1835         return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1836 }
1837
1838 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1839 {
1840         return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1841 }
1842
1843 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1844 {
1845         return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1846 }
1847 #else
1848 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1849 {
1850         return 0;
1851 }
1852
1853 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1854 {
1855         return 0;
1856 }
1857 #endif
1858
1859 static int marvell_probe(struct phy_device *phydev)
1860 {
1861         struct marvell_priv *priv;
1862
1863         priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1864         if (!priv)
1865                 return -ENOMEM;
1866
1867         phydev->priv = priv;
1868
1869         return 0;
1870 }
1871
1872 static int m88e1121_probe(struct phy_device *phydev)
1873 {
1874         int err;
1875
1876         err = marvell_probe(phydev);
1877         if (err)
1878                 return err;
1879
1880         return m88e1121_hwmon_probe(phydev);
1881 }
1882
1883 static int m88e1510_probe(struct phy_device *phydev)
1884 {
1885         int err;
1886
1887         err = marvell_probe(phydev);
1888         if (err)
1889                 return err;
1890
1891         return m88e1510_hwmon_probe(phydev);
1892 }
1893
1894 static struct phy_driver marvell_drivers[] = {
1895         {
1896                 .phy_id = MARVELL_PHY_ID_88E1101,
1897                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1898                 .name = "Marvell 88E1101",
1899                 .features = PHY_GBIT_FEATURES,
1900                 .flags = PHY_HAS_INTERRUPT,
1901                 .probe = marvell_probe,
1902                 .config_init = &marvell_config_init,
1903                 .config_aneg = &m88e1101_config_aneg,
1904                 .read_status = &genphy_read_status,
1905                 .ack_interrupt = &marvell_ack_interrupt,
1906                 .config_intr = &marvell_config_intr,
1907                 .resume = &genphy_resume,
1908                 .suspend = &genphy_suspend,
1909                 .get_sset_count = marvell_get_sset_count,
1910                 .get_strings = marvell_get_strings,
1911                 .get_stats = marvell_get_stats,
1912         },
1913         {
1914                 .phy_id = MARVELL_PHY_ID_88E1112,
1915                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1916                 .name = "Marvell 88E1112",
1917                 .features = PHY_GBIT_FEATURES,
1918                 .flags = PHY_HAS_INTERRUPT,
1919                 .probe = marvell_probe,
1920                 .config_init = &m88e1111_config_init,
1921                 .config_aneg = &marvell_config_aneg,
1922                 .read_status = &genphy_read_status,
1923                 .ack_interrupt = &marvell_ack_interrupt,
1924                 .config_intr = &marvell_config_intr,
1925                 .resume = &genphy_resume,
1926                 .suspend = &genphy_suspend,
1927                 .get_sset_count = marvell_get_sset_count,
1928                 .get_strings = marvell_get_strings,
1929                 .get_stats = marvell_get_stats,
1930         },
1931         {
1932                 .phy_id = MARVELL_PHY_ID_88E1111,
1933                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1934                 .name = "Marvell 88E1111",
1935                 .features = PHY_GBIT_FEATURES,
1936                 .flags = PHY_HAS_INTERRUPT,
1937                 .probe = marvell_probe,
1938                 .config_init = &m88e1111_config_init,
1939                 .config_aneg = &m88e1111_config_aneg,
1940                 .read_status = &marvell_read_status,
1941                 .ack_interrupt = &marvell_ack_interrupt,
1942                 .config_intr = &marvell_config_intr,
1943                 .resume = &genphy_resume,
1944                 .suspend = &genphy_suspend,
1945                 .get_sset_count = marvell_get_sset_count,
1946                 .get_strings = marvell_get_strings,
1947                 .get_stats = marvell_get_stats,
1948         },
1949         {
1950                 .phy_id = MARVELL_PHY_ID_88E1118,
1951                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1952                 .name = "Marvell 88E1118",
1953                 .features = PHY_GBIT_FEATURES,
1954                 .flags = PHY_HAS_INTERRUPT,
1955                 .probe = marvell_probe,
1956                 .config_init = &m88e1118_config_init,
1957                 .config_aneg = &m88e1118_config_aneg,
1958                 .read_status = &genphy_read_status,
1959                 .ack_interrupt = &marvell_ack_interrupt,
1960                 .config_intr = &marvell_config_intr,
1961                 .resume = &genphy_resume,
1962                 .suspend = &genphy_suspend,
1963                 .get_sset_count = marvell_get_sset_count,
1964                 .get_strings = marvell_get_strings,
1965                 .get_stats = marvell_get_stats,
1966         },
1967         {
1968                 .phy_id = MARVELL_PHY_ID_88E1121R,
1969                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1970                 .name = "Marvell 88E1121R",
1971                 .features = PHY_GBIT_FEATURES,
1972                 .flags = PHY_HAS_INTERRUPT,
1973                 .probe = &m88e1121_probe,
1974                 .config_init = &m88e1121_config_init,
1975                 .config_aneg = &m88e1121_config_aneg,
1976                 .read_status = &marvell_read_status,
1977                 .ack_interrupt = &marvell_ack_interrupt,
1978                 .config_intr = &marvell_config_intr,
1979                 .did_interrupt = &m88e1121_did_interrupt,
1980                 .resume = &genphy_resume,
1981                 .suspend = &genphy_suspend,
1982                 .get_sset_count = marvell_get_sset_count,
1983                 .get_strings = marvell_get_strings,
1984                 .get_stats = marvell_get_stats,
1985         },
1986         {
1987                 .phy_id = MARVELL_PHY_ID_88E1318S,
1988                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1989                 .name = "Marvell 88E1318S",
1990                 .features = PHY_GBIT_FEATURES,
1991                 .flags = PHY_HAS_INTERRUPT,
1992                 .probe = marvell_probe,
1993                 .config_init = &m88e1121_config_init,
1994                 .config_aneg = &m88e1318_config_aneg,
1995                 .read_status = &marvell_read_status,
1996                 .ack_interrupt = &marvell_ack_interrupt,
1997                 .config_intr = &marvell_config_intr,
1998                 .did_interrupt = &m88e1121_did_interrupt,
1999                 .get_wol = &m88e1318_get_wol,
2000                 .set_wol = &m88e1318_set_wol,
2001                 .resume = &genphy_resume,
2002                 .suspend = &genphy_suspend,
2003                 .get_sset_count = marvell_get_sset_count,
2004                 .get_strings = marvell_get_strings,
2005                 .get_stats = marvell_get_stats,
2006         },
2007         {
2008                 .phy_id = MARVELL_PHY_ID_88E1145,
2009                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2010                 .name = "Marvell 88E1145",
2011                 .features = PHY_GBIT_FEATURES,
2012                 .flags = PHY_HAS_INTERRUPT,
2013                 .probe = marvell_probe,
2014                 .config_init = &m88e1145_config_init,
2015                 .config_aneg = &marvell_config_aneg,
2016                 .read_status = &genphy_read_status,
2017                 .ack_interrupt = &marvell_ack_interrupt,
2018                 .config_intr = &marvell_config_intr,
2019                 .resume = &genphy_resume,
2020                 .suspend = &genphy_suspend,
2021                 .get_sset_count = marvell_get_sset_count,
2022                 .get_strings = marvell_get_strings,
2023                 .get_stats = marvell_get_stats,
2024         },
2025         {
2026                 .phy_id = MARVELL_PHY_ID_88E1149R,
2027                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2028                 .name = "Marvell 88E1149R",
2029                 .features = PHY_GBIT_FEATURES,
2030                 .flags = PHY_HAS_INTERRUPT,
2031                 .probe = marvell_probe,
2032                 .config_init = &m88e1149_config_init,
2033                 .config_aneg = &m88e1118_config_aneg,
2034                 .read_status = &genphy_read_status,
2035                 .ack_interrupt = &marvell_ack_interrupt,
2036                 .config_intr = &marvell_config_intr,
2037                 .resume = &genphy_resume,
2038                 .suspend = &genphy_suspend,
2039                 .get_sset_count = marvell_get_sset_count,
2040                 .get_strings = marvell_get_strings,
2041                 .get_stats = marvell_get_stats,
2042         },
2043         {
2044                 .phy_id = MARVELL_PHY_ID_88E1240,
2045                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2046                 .name = "Marvell 88E1240",
2047                 .features = PHY_GBIT_FEATURES,
2048                 .flags = PHY_HAS_INTERRUPT,
2049                 .probe = marvell_probe,
2050                 .config_init = &m88e1111_config_init,
2051                 .config_aneg = &marvell_config_aneg,
2052                 .read_status = &genphy_read_status,
2053                 .ack_interrupt = &marvell_ack_interrupt,
2054                 .config_intr = &marvell_config_intr,
2055                 .resume = &genphy_resume,
2056                 .suspend = &genphy_suspend,
2057                 .get_sset_count = marvell_get_sset_count,
2058                 .get_strings = marvell_get_strings,
2059                 .get_stats = marvell_get_stats,
2060         },
2061         {
2062                 .phy_id = MARVELL_PHY_ID_88E1116R,
2063                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2064                 .name = "Marvell 88E1116R",
2065                 .features = PHY_GBIT_FEATURES,
2066                 .flags = PHY_HAS_INTERRUPT,
2067                 .probe = marvell_probe,
2068                 .config_init = &m88e1116r_config_init,
2069                 .config_aneg = &genphy_config_aneg,
2070                 .read_status = &genphy_read_status,
2071                 .ack_interrupt = &marvell_ack_interrupt,
2072                 .config_intr = &marvell_config_intr,
2073                 .resume = &genphy_resume,
2074                 .suspend = &genphy_suspend,
2075                 .get_sset_count = marvell_get_sset_count,
2076                 .get_strings = marvell_get_strings,
2077                 .get_stats = marvell_get_stats,
2078         },
2079         {
2080                 .phy_id = MARVELL_PHY_ID_88E1510,
2081                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2082                 .name = "Marvell 88E1510",
2083                 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2084                 .flags = PHY_HAS_INTERRUPT,
2085                 .probe = &m88e1510_probe,
2086                 .config_init = &m88e1510_config_init,
2087                 .config_aneg = &m88e1510_config_aneg,
2088                 .read_status = &marvell_read_status,
2089                 .ack_interrupt = &marvell_ack_interrupt,
2090                 .config_intr = &marvell_config_intr,
2091                 .did_interrupt = &m88e1121_did_interrupt,
2092                 .get_wol = &m88e1318_get_wol,
2093                 .set_wol = &m88e1318_set_wol,
2094                 .resume = &marvell_resume,
2095                 .suspend = &marvell_suspend,
2096                 .get_sset_count = marvell_get_sset_count,
2097                 .get_strings = marvell_get_strings,
2098                 .get_stats = marvell_get_stats,
2099         },
2100         {
2101                 .phy_id = MARVELL_PHY_ID_88E1540,
2102                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2103                 .name = "Marvell 88E1540",
2104                 .features = PHY_GBIT_FEATURES,
2105                 .flags = PHY_HAS_INTERRUPT,
2106                 .probe = m88e1510_probe,
2107                 .config_init = &marvell_config_init,
2108                 .config_aneg = &m88e1510_config_aneg,
2109                 .read_status = &marvell_read_status,
2110                 .ack_interrupt = &marvell_ack_interrupt,
2111                 .config_intr = &marvell_config_intr,
2112                 .did_interrupt = &m88e1121_did_interrupt,
2113                 .resume = &genphy_resume,
2114                 .suspend = &genphy_suspend,
2115                 .get_sset_count = marvell_get_sset_count,
2116                 .get_strings = marvell_get_strings,
2117                 .get_stats = marvell_get_stats,
2118         },
2119         {
2120                 .phy_id = MARVELL_PHY_ID_88E1545,
2121                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2122                 .name = "Marvell 88E1545",
2123                 .probe = m88e1510_probe,
2124                 .features = PHY_GBIT_FEATURES,
2125                 .flags = PHY_HAS_INTERRUPT,
2126                 .config_init = &marvell_config_init,
2127                 .config_aneg = &m88e1510_config_aneg,
2128                 .read_status = &marvell_read_status,
2129                 .ack_interrupt = &marvell_ack_interrupt,
2130                 .config_intr = &marvell_config_intr,
2131                 .did_interrupt = &m88e1121_did_interrupt,
2132                 .resume = &genphy_resume,
2133                 .suspend = &genphy_suspend,
2134                 .get_sset_count = marvell_get_sset_count,
2135                 .get_strings = marvell_get_strings,
2136                 .get_stats = marvell_get_stats,
2137         },
2138         {
2139                 .phy_id = MARVELL_PHY_ID_88E3016,
2140                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2141                 .name = "Marvell 88E3016",
2142                 .features = PHY_BASIC_FEATURES,
2143                 .flags = PHY_HAS_INTERRUPT,
2144                 .probe = marvell_probe,
2145                 .config_aneg = &genphy_config_aneg,
2146                 .config_init = &m88e3016_config_init,
2147                 .aneg_done = &marvell_aneg_done,
2148                 .read_status = &marvell_read_status,
2149                 .ack_interrupt = &marvell_ack_interrupt,
2150                 .config_intr = &marvell_config_intr,
2151                 .did_interrupt = &m88e1121_did_interrupt,
2152                 .resume = &genphy_resume,
2153                 .suspend = &genphy_suspend,
2154                 .get_sset_count = marvell_get_sset_count,
2155                 .get_strings = marvell_get_strings,
2156                 .get_stats = marvell_get_stats,
2157         },
2158         {
2159                 .phy_id = MARVELL_PHY_ID_88E6390,
2160                 .phy_id_mask = MARVELL_PHY_ID_MASK,
2161                 .name = "Marvell 88E6390",
2162                 .features = PHY_GBIT_FEATURES,
2163                 .flags = PHY_HAS_INTERRUPT,
2164                 .probe = m88e1510_probe,
2165                 .config_init = &marvell_config_init,
2166                 .config_aneg = &m88e1510_config_aneg,
2167                 .read_status = &marvell_read_status,
2168                 .ack_interrupt = &marvell_ack_interrupt,
2169                 .config_intr = &marvell_config_intr,
2170                 .did_interrupt = &m88e1121_did_interrupt,
2171                 .resume = &genphy_resume,
2172                 .suspend = &genphy_suspend,
2173                 .get_sset_count = marvell_get_sset_count,
2174                 .get_strings = marvell_get_strings,
2175                 .get_stats = marvell_get_stats,
2176         },
2177 };
2178
2179 module_phy_driver(marvell_drivers);
2180
2181 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2182         { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2183         { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2184         { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2185         { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2186         { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2187         { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2188         { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2189         { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2190         { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2191         { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2192         { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2193         { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2194         { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2195         { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2196         { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2197         { }
2198 };
2199
2200 MODULE_DEVICE_TABLE(mdio, marvell_tbl);