2 * Bitbanged MDIO support.
4 * Author: Scott Wood <scottwood@freescale.com>
5 * Copyright (c) 2007 Freescale Semiconductor
7 * Based on CPM2 MDIO code which is:
9 * Copyright (c) 2003 Intracom S.A.
10 * by Pantelis Antoniou <panto@intracom.gr>
12 * 2005 (c) MontaVista Software, Inc.
13 * Vitaly Bordug <vbordug@ru.mvista.com>
15 * This file is licensed under the terms of the GNU General Public License
16 * version 2. This program is licensed "as is" without any warranty of any
17 * kind, whether express or implied.
20 #include <linux/module.h>
21 #include <linux/mdio-bitbang.h>
22 #include <linux/types.h>
23 #include <linux/delay.h>
28 #define MDIO_SETUP_TIME 10
29 #define MDIO_HOLD_TIME 10
31 /* Minimum MDC period is 400 ns, plus some margin for error. MDIO_DELAY
32 * is done twice per period.
34 #define MDIO_DELAY 250
36 /* The PHY may take up to 300 ns to produce data, plus some margin
39 #define MDIO_READ_DELAY 350
41 /* MDIO must already be configured as output. */
42 static void mdiobb_send_bit(struct mdiobb_ctrl *ctrl, int val)
44 const struct mdiobb_ops *ops = ctrl->ops;
46 ops->set_mdio_data(ctrl, val);
48 ops->set_mdc(ctrl, 1);
50 ops->set_mdc(ctrl, 0);
53 /* MDIO must already be configured as input. */
54 static int mdiobb_get_bit(struct mdiobb_ctrl *ctrl)
56 const struct mdiobb_ops *ops = ctrl->ops;
59 ops->set_mdc(ctrl, 1);
60 ndelay(MDIO_READ_DELAY);
61 ops->set_mdc(ctrl, 0);
63 return ops->get_mdio_data(ctrl);
66 /* MDIO must already be configured as output. */
67 static void mdiobb_send_num(struct mdiobb_ctrl *ctrl, u16 val, int bits)
71 for (i = bits - 1; i >= 0; i--)
72 mdiobb_send_bit(ctrl, (val >> i) & 1);
75 /* MDIO must already be configured as input. */
76 static u16 mdiobb_get_num(struct mdiobb_ctrl *ctrl, int bits)
81 for (i = bits - 1; i >= 0; i--) {
83 ret |= mdiobb_get_bit(ctrl);
89 /* Utility to send the preamble, address, and
90 * register (common to read and write).
92 static void mdiobb_cmd(struct mdiobb_ctrl *ctrl, int read, u8 phy, u8 reg)
94 const struct mdiobb_ops *ops = ctrl->ops;
97 ops->set_mdio_dir(ctrl, 1);
100 * Send a 32 bit preamble ('1's) with an extra '1' bit for good
101 * measure. The IEEE spec says this is a PHY optional
102 * requirement. The AMD 79C874 requires one after power up and
103 * one after a MII communications error. This means that we are
104 * doing more preambles than we need, but it is safer and will be
108 for (i = 0; i < 32; i++)
109 mdiobb_send_bit(ctrl, 1);
111 /* send the start bit (01) and the read opcode (10) or write (10) */
112 mdiobb_send_bit(ctrl, 0);
113 mdiobb_send_bit(ctrl, 1);
114 mdiobb_send_bit(ctrl, read);
115 mdiobb_send_bit(ctrl, !read);
117 mdiobb_send_num(ctrl, phy, 5);
118 mdiobb_send_num(ctrl, reg, 5);
122 static int mdiobb_read(struct mii_bus *bus, int phy, int reg)
124 struct mdiobb_ctrl *ctrl = bus->priv;
127 mdiobb_cmd(ctrl, MDIO_READ, phy, reg);
128 ctrl->ops->set_mdio_dir(ctrl, 0);
130 /* check the turnaround bit: the PHY should be driving it to zero */
131 if (mdiobb_get_bit(ctrl) != 0) {
132 /* PHY didn't drive TA low -- flush any bits it
133 * may be trying to send.
135 for (i = 0; i < 32; i++)
136 mdiobb_get_bit(ctrl);
141 ret = mdiobb_get_num(ctrl, 16);
142 mdiobb_get_bit(ctrl);
146 static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
148 struct mdiobb_ctrl *ctrl = bus->priv;
150 mdiobb_cmd(ctrl, MDIO_WRITE, phy, reg);
152 /* send the turnaround (10) */
153 mdiobb_send_bit(ctrl, 1);
154 mdiobb_send_bit(ctrl, 0);
156 mdiobb_send_num(ctrl, val, 16);
158 ctrl->ops->set_mdio_dir(ctrl, 0);
159 mdiobb_get_bit(ctrl);
163 struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl)
167 bus = mdiobus_alloc();
171 __module_get(ctrl->ops->owner);
173 bus->read = mdiobb_read;
174 bus->write = mdiobb_write;
179 EXPORT_SYMBOL(alloc_mdio_bitbang);
181 void free_mdio_bitbang(struct mii_bus *bus)
183 struct mdiobb_ctrl *ctrl = bus->priv;
185 module_put(ctrl->ops->owner);
188 EXPORT_SYMBOL(free_mdio_bitbang);
190 MODULE_LICENSE("GPL");