2 * Copyright (C) 2009 - QLogic Corporation.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called "COPYING".
28 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
34 /* give atleast 1ms for firmware to respond */
37 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
38 return QLCNIC_CDRP_RSP_TIMEOUT;
40 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
41 } while (!QLCNIC_CDRP_IS_RSP(rsp));
47 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
48 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
52 u32 rcode = QLCNIC_RCODE_SUCCESS;
53 struct pci_dev *pdev = adapter->pdev;
55 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
57 /* Acquire semaphore before accessing CRB */
58 if (qlcnic_api_lock(adapter))
59 return QLCNIC_RCODE_TIMEOUT;
61 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
62 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
63 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
64 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
65 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
67 rsp = qlcnic_poll_rsp(adapter);
69 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
70 dev_err(&pdev->dev, "card response timeout.\n");
71 rcode = QLCNIC_RCODE_TIMEOUT;
72 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
73 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
74 dev_err(&pdev->dev, "failed card response code:0x%x\n",
78 /* Release semaphore */
79 qlcnic_api_unlock(adapter);
85 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
87 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
89 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
90 if (qlcnic_issue_cmd(adapter,
91 adapter->ahw.pci_func,
92 adapter->fw_hal_version,
96 QLCNIC_CDRP_CMD_SET_MTU)) {
98 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
107 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
110 struct qlcnic_hostrq_rx_ctx *prq;
111 struct qlcnic_cardrsp_rx_ctx *prsp;
112 struct qlcnic_hostrq_rds_ring *prq_rds;
113 struct qlcnic_hostrq_sds_ring *prq_sds;
114 struct qlcnic_cardrsp_rds_ring *prsp_rds;
115 struct qlcnic_cardrsp_sds_ring *prsp_sds;
116 struct qlcnic_host_rds_ring *rds_ring;
117 struct qlcnic_host_sds_ring *sds_ring;
119 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
122 int i, nrds_rings, nsds_rings;
123 size_t rq_size, rsp_size;
124 u32 cap, reg, val, reg2;
127 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
129 nrds_rings = adapter->max_rds_rings;
130 nsds_rings = adapter->max_sds_rings;
133 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
136 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
139 addr = pci_alloc_consistent(adapter->pdev,
140 rq_size, &hostrq_phys_addr);
143 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
145 addr = pci_alloc_consistent(adapter->pdev,
146 rsp_size, &cardrsp_phys_addr);
151 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
153 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
155 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
156 | QLCNIC_CAP0_VALIDOFF);
157 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
159 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
161 prq->txrx_sds_binding = nsds_rings - 1;
163 prq->capabilities[0] = cpu_to_le32(cap);
164 prq->host_int_crb_mode =
165 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
166 prq->host_rds_crb_mode =
167 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
169 prq->num_rds_rings = cpu_to_le16(nrds_rings);
170 prq->num_sds_rings = cpu_to_le16(nsds_rings);
171 prq->rds_ring_offset = cpu_to_le32(0);
173 val = le32_to_cpu(prq->rds_ring_offset) +
174 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
175 prq->sds_ring_offset = cpu_to_le32(val);
177 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
178 le32_to_cpu(prq->rds_ring_offset));
180 for (i = 0; i < nrds_rings; i++) {
182 rds_ring = &recv_ctx->rds_rings[i];
183 rds_ring->producer = 0;
185 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
186 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
187 prq_rds[i].ring_kind = cpu_to_le32(i);
188 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
191 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
192 le32_to_cpu(prq->sds_ring_offset));
194 for (i = 0; i < nsds_rings; i++) {
196 sds_ring = &recv_ctx->sds_rings[i];
197 sds_ring->consumer = 0;
198 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
200 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
201 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
202 prq_sds[i].msi_index = cpu_to_le16(i);
205 phys_addr = hostrq_phys_addr;
206 err = qlcnic_issue_cmd(adapter,
207 adapter->ahw.pci_func,
208 adapter->fw_hal_version,
209 (u32)(phys_addr >> 32),
210 (u32)(phys_addr & 0xffffffff),
212 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
214 dev_err(&adapter->pdev->dev,
215 "Failed to create rx ctx in firmware%d\n", err);
220 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
221 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
223 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
224 rds_ring = &recv_ctx->rds_rings[i];
226 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
227 rds_ring->crb_rcv_producer = adapter->ahw.pci_base0 + reg;
230 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
231 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
233 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
234 sds_ring = &recv_ctx->sds_rings[i];
236 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
237 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
239 sds_ring->crb_sts_consumer = adapter->ahw.pci_base0 + reg;
240 sds_ring->crb_intr_mask = adapter->ahw.pci_base0 + reg2;
243 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
244 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
245 recv_ctx->virt_port = prsp->virt_port;
248 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
250 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
255 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
257 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
259 if (qlcnic_issue_cmd(adapter,
260 adapter->ahw.pci_func,
261 adapter->fw_hal_version,
262 recv_ctx->context_id,
263 QLCNIC_DESTROY_CTX_RESET,
265 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
267 dev_err(&adapter->pdev->dev,
268 "Failed to destroy rx ctx in firmware\n");
271 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
275 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
277 struct qlcnic_hostrq_tx_ctx *prq;
278 struct qlcnic_hostrq_cds_ring *prq_cds;
279 struct qlcnic_cardrsp_tx_ctx *prsp;
280 void *rq_addr, *rsp_addr;
281 size_t rq_size, rsp_size;
285 dma_addr_t rq_phys_addr, rsp_phys_addr;
286 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
288 /* reset host resources */
289 tx_ring->producer = 0;
290 tx_ring->sw_consumer = 0;
291 *(tx_ring->hw_consumer) = 0;
293 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
294 rq_addr = pci_alloc_consistent(adapter->pdev,
295 rq_size, &rq_phys_addr);
299 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
300 rsp_addr = pci_alloc_consistent(adapter->pdev,
301 rsp_size, &rsp_phys_addr);
307 memset(rq_addr, 0, rq_size);
308 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
310 memset(rsp_addr, 0, rsp_size);
311 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
313 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
315 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
317 prq->capabilities[0] = cpu_to_le32(temp);
319 prq->host_int_crb_mode =
320 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
322 prq->interrupt_ctl = 0;
324 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
326 prq_cds = &prq->cds_ring;
328 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
329 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
331 phys_addr = rq_phys_addr;
332 err = qlcnic_issue_cmd(adapter,
333 adapter->ahw.pci_func,
334 adapter->fw_hal_version,
335 (u32)(phys_addr >> 32),
336 ((u32)phys_addr & 0xffffffff),
338 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
340 if (err == QLCNIC_RCODE_SUCCESS) {
341 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
342 tx_ring->crb_cmd_producer = adapter->ahw.pci_base0 + temp;
344 adapter->tx_context_id =
345 le16_to_cpu(prsp->context_id);
347 dev_err(&adapter->pdev->dev,
348 "Failed to create tx ctx in firmware%d\n", err);
352 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
355 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
361 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
363 if (qlcnic_issue_cmd(adapter,
364 adapter->ahw.pci_func,
365 adapter->fw_hal_version,
366 adapter->tx_context_id,
367 QLCNIC_DESTROY_CTX_RESET,
369 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
371 dev_err(&adapter->pdev->dev,
372 "Failed to destroy tx ctx in firmware\n");
377 qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val)
380 if (qlcnic_issue_cmd(adapter,
381 adapter->ahw.pci_func,
382 adapter->fw_hal_version,
386 QLCNIC_CDRP_CMD_READ_PHY)) {
391 return QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
395 qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val)
397 return qlcnic_issue_cmd(adapter,
398 adapter->ahw.pci_func,
399 adapter->fw_hal_version,
403 QLCNIC_CDRP_CMD_WRITE_PHY);
406 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
411 struct qlcnic_recv_context *recv_ctx;
412 struct qlcnic_host_rds_ring *rds_ring;
413 struct qlcnic_host_sds_ring *sds_ring;
414 struct qlcnic_host_tx_ring *tx_ring;
416 struct pci_dev *pdev = adapter->pdev;
418 recv_ctx = &adapter->recv_ctx;
419 tx_ring = adapter->tx_ring;
421 tx_ring->hw_consumer = (__le32 *)pci_alloc_consistent(pdev, sizeof(u32),
422 &tx_ring->hw_cons_phys_addr);
423 if (tx_ring->hw_consumer == NULL) {
424 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
427 *(tx_ring->hw_consumer) = 0;
430 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
431 &tx_ring->phys_addr);
434 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
439 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
441 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
442 rds_ring = &recv_ctx->rds_rings[ring];
443 addr = pci_alloc_consistent(adapter->pdev,
444 RCV_DESC_RINGSIZE(rds_ring),
445 &rds_ring->phys_addr);
448 "failed to allocate rds ring [%d]\n", ring);
452 rds_ring->desc_head = (struct rcv_desc *)addr;
456 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
457 sds_ring = &recv_ctx->sds_rings[ring];
459 addr = pci_alloc_consistent(adapter->pdev,
460 STATUS_DESC_RINGSIZE(sds_ring),
461 &sds_ring->phys_addr);
464 "failed to allocate sds ring [%d]\n", ring);
468 sds_ring->desc_head = (struct status_desc *)addr;
474 qlcnic_free_hw_resources(adapter);
479 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
483 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
487 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
489 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
493 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
497 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
499 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
500 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
501 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
503 /* Allow dma queues to drain after context reset */
508 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
510 struct qlcnic_recv_context *recv_ctx;
511 struct qlcnic_host_rds_ring *rds_ring;
512 struct qlcnic_host_sds_ring *sds_ring;
513 struct qlcnic_host_tx_ring *tx_ring;
516 recv_ctx = &adapter->recv_ctx;
518 tx_ring = adapter->tx_ring;
519 if (tx_ring->hw_consumer != NULL) {
520 pci_free_consistent(adapter->pdev,
522 tx_ring->hw_consumer,
523 tx_ring->hw_cons_phys_addr);
524 tx_ring->hw_consumer = NULL;
527 if (tx_ring->desc_head != NULL) {
528 pci_free_consistent(adapter->pdev,
529 TX_DESC_RINGSIZE(tx_ring),
530 tx_ring->desc_head, tx_ring->phys_addr);
531 tx_ring->desc_head = NULL;
534 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
535 rds_ring = &recv_ctx->rds_rings[ring];
537 if (rds_ring->desc_head != NULL) {
538 pci_free_consistent(adapter->pdev,
539 RCV_DESC_RINGSIZE(rds_ring),
541 rds_ring->phys_addr);
542 rds_ring->desc_head = NULL;
546 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
547 sds_ring = &recv_ctx->sds_rings[ring];
549 if (sds_ring->desc_head != NULL) {
550 pci_free_consistent(adapter->pdev,
551 STATUS_DESC_RINGSIZE(sds_ring),
553 sds_ring->phys_addr);
554 sds_ring->desc_head = NULL;
559 /* Set MAC address of a NIC partition */
560 int qlcnic_set_mac_address(struct qlcnic_adapter *adapter, u8* mac)
563 u32 arg1, arg2, arg3;
565 arg1 = adapter->ahw.pci_func | BIT_9;
566 arg2 = mac[0] | (mac[1] << 8) | (mac[2] << 16) | (mac[3] << 24);
567 arg3 = mac[4] | (mac[5] << 16);
569 err = qlcnic_issue_cmd(adapter,
570 adapter->ahw.pci_func,
571 adapter->fw_hal_version,
575 QLCNIC_CDRP_CMD_MAC_ADDRESS);
577 if (err != QLCNIC_RCODE_SUCCESS) {
578 dev_err(&adapter->pdev->dev,
579 "Failed to set mac address%d\n", err);
586 /* Get MAC address of a NIC partition */
587 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
592 arg1 = adapter->ahw.pci_func | BIT_8;
593 err = qlcnic_issue_cmd(adapter,
594 adapter->ahw.pci_func,
595 adapter->fw_hal_version,
599 QLCNIC_CDRP_CMD_MAC_ADDRESS);
601 if (err == QLCNIC_RCODE_SUCCESS)
602 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
603 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
605 dev_err(&adapter->pdev->dev,
606 "Failed to get mac address%d\n", err);
613 /* Get info of a NIC partition */
614 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
615 struct qlcnic_info *npar_info, u8 func_id)
618 dma_addr_t nic_dma_t;
619 struct qlcnic_info *nic_info;
621 size_t nic_size = sizeof(struct qlcnic_info);
623 nic_info_addr = pci_alloc_consistent(adapter->pdev,
624 nic_size, &nic_dma_t);
627 memset(nic_info_addr, 0, nic_size);
629 nic_info = (struct qlcnic_info *) nic_info_addr;
630 err = qlcnic_issue_cmd(adapter,
631 adapter->ahw.pci_func,
632 adapter->fw_hal_version,
635 (func_id << 16 | nic_size),
636 QLCNIC_CDRP_CMD_GET_NIC_INFO);
638 if (err == QLCNIC_RCODE_SUCCESS) {
639 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
640 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
641 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
642 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
643 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
644 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
645 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
646 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
647 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
648 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
650 dev_info(&adapter->pdev->dev,
651 "phy port: %d switch_mode: %d,\n"
652 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
653 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
654 npar_info->phys_port, npar_info->switch_mode,
655 npar_info->max_tx_ques, npar_info->max_rx_ques,
656 npar_info->min_tx_bw, npar_info->max_tx_bw,
657 npar_info->max_mtu, npar_info->capabilities);
659 dev_err(&adapter->pdev->dev,
660 "Failed to get nic info%d\n", err);
664 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
668 /* Configure a NIC partition */
669 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
672 dma_addr_t nic_dma_t;
674 struct qlcnic_info *nic_info;
675 size_t nic_size = sizeof(struct qlcnic_info);
677 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
680 nic_info_addr = pci_alloc_consistent(adapter->pdev, nic_size,
685 memset(nic_info_addr, 0, nic_size);
686 nic_info = (struct qlcnic_info *)nic_info_addr;
688 nic_info->pci_func = cpu_to_le16(nic->pci_func);
689 nic_info->op_mode = cpu_to_le16(nic->op_mode);
690 nic_info->phys_port = cpu_to_le16(nic->phys_port);
691 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
692 nic_info->capabilities = cpu_to_le32(nic->capabilities);
693 nic_info->max_mac_filters = nic->max_mac_filters;
694 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
695 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
696 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
697 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
699 err = qlcnic_issue_cmd(adapter,
700 adapter->ahw.pci_func,
701 adapter->fw_hal_version,
704 ((nic->pci_func << 16) | nic_size),
705 QLCNIC_CDRP_CMD_SET_NIC_INFO);
707 if (err != QLCNIC_RCODE_SUCCESS) {
708 dev_err(&adapter->pdev->dev,
709 "Failed to set nic info%d\n", err);
713 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
717 /* Get PCI Info of a partition */
718 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
719 struct qlcnic_pci_info *pci_info)
722 dma_addr_t pci_info_dma_t;
723 struct qlcnic_pci_info *npar;
725 size_t npar_size = sizeof(struct qlcnic_pci_info);
726 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
728 pci_info_addr = pci_alloc_consistent(adapter->pdev, pci_size,
732 memset(pci_info_addr, 0, pci_size);
734 npar = (struct qlcnic_pci_info *) pci_info_addr;
735 err = qlcnic_issue_cmd(adapter,
736 adapter->ahw.pci_func,
737 adapter->fw_hal_version,
741 QLCNIC_CDRP_CMD_GET_PCI_INFO);
743 if (err == QLCNIC_RCODE_SUCCESS) {
744 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
745 pci_info->id = le32_to_cpu(npar->id);
746 pci_info->active = le32_to_cpu(npar->active);
747 pci_info->type = le32_to_cpu(npar->type);
748 pci_info->default_port =
749 le32_to_cpu(npar->default_port);
750 pci_info->tx_min_bw =
751 le32_to_cpu(npar->tx_min_bw);
752 pci_info->tx_max_bw =
753 le32_to_cpu(npar->tx_max_bw);
754 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
757 dev_err(&adapter->pdev->dev,
758 "Failed to get PCI Info%d\n", err);
762 pci_free_consistent(adapter->pdev, pci_size, pci_info_addr,
767 /* Reset a NIC partition */
769 int qlcnic_reset_partition(struct qlcnic_adapter *adapter, u8 func_no)
773 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
776 err = qlcnic_issue_cmd(adapter,
777 adapter->ahw.pci_func,
778 adapter->fw_hal_version,
782 QLCNIC_CDRP_CMD_RESET_NPAR);
784 if (err != QLCNIC_RCODE_SUCCESS) {
785 dev_err(&adapter->pdev->dev,
786 "Failed to issue reset partition%d\n", err);
793 /* Get eSwitch Capabilities */
794 int qlcnic_get_eswitch_capabilities(struct qlcnic_adapter *adapter, u8 port,
795 struct qlcnic_eswitch *eswitch)
800 if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC)
803 err = qlcnic_issue_cmd(adapter,
804 adapter->ahw.pci_func,
805 adapter->fw_hal_version,
809 QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY);
811 if (err == QLCNIC_RCODE_SUCCESS) {
812 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
813 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
815 eswitch->port = arg1 & 0xf;
816 eswitch->max_ucast_filters = LSW(arg2);
817 eswitch->max_active_vlans = MSW(arg2) & 0xfff;
819 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
821 eswitch->flags |= QLCNIC_SWITCH_PROMISC_MODE;
823 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
825 dev_err(&adapter->pdev->dev,
826 "Failed to get eswitch capabilities%d\n", err);
832 /* Get current status of eswitch */
833 int qlcnic_get_eswitch_status(struct qlcnic_adapter *adapter, u8 port,
834 struct qlcnic_eswitch *eswitch)
839 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
842 err = qlcnic_issue_cmd(adapter,
843 adapter->ahw.pci_func,
844 adapter->fw_hal_version,
848 QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS);
850 if (err == QLCNIC_RCODE_SUCCESS) {
851 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
852 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
854 eswitch->port = arg1 & 0xf;
855 eswitch->active_vports = LSB(arg2);
856 eswitch->active_ucast_filters = MSB(arg2);
857 eswitch->active_vlans = LSB(MSW(arg2));
859 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
861 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
864 dev_err(&adapter->pdev->dev,
865 "Failed to get eswitch status%d\n", err);
871 /* Enable/Disable eSwitch */
872 int qlcnic_toggle_eswitch(struct qlcnic_adapter *adapter, u8 id, u8 enable)
876 struct qlcnic_eswitch *eswitch;
878 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
881 eswitch = &adapter->eswitch[id];
885 arg1 = eswitch->port | (enable ? BIT_4 : 0);
886 arg2 = eswitch->active_vports | (eswitch->max_ucast_filters << 8) |
887 (eswitch->max_active_vlans << 16);
888 err = qlcnic_issue_cmd(adapter,
889 adapter->ahw.pci_func,
890 adapter->fw_hal_version,
894 QLCNIC_CDRP_CMD_TOGGLE_ESWITCH);
896 if (err != QLCNIC_RCODE_SUCCESS) {
897 dev_err(&adapter->pdev->dev,
898 "Failed to enable eswitch%d\n", eswitch->port);
899 eswitch->flags &= ~QLCNIC_SWITCH_ENABLE;
902 eswitch->flags |= QLCNIC_SWITCH_ENABLE;
903 dev_info(&adapter->pdev->dev,
904 "Enabled eSwitch for port %d\n", eswitch->port);
910 /* Configure eSwitch for port mirroring */
911 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
912 u8 enable_mirroring, u8 pci_func)
917 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
918 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
921 arg1 = id | (enable_mirroring ? BIT_4 : 0);
922 arg1 |= pci_func << 8;
924 err = qlcnic_issue_cmd(adapter,
925 adapter->ahw.pci_func,
926 adapter->fw_hal_version,
930 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
932 if (err != QLCNIC_RCODE_SUCCESS) {
933 dev_err(&adapter->pdev->dev,
934 "Failed to configure port mirroring%d on eswitch:%d\n",
937 dev_info(&adapter->pdev->dev,
938 "Configured eSwitch %d for port mirroring:%d\n",
945 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
946 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
948 size_t stats_size = sizeof(struct __qlcnic_esw_statistics);
949 struct __qlcnic_esw_statistics *stats;
950 dma_addr_t stats_dma_t;
955 if (esw_stats == NULL)
958 if (adapter->op_mode != QLCNIC_MGMT_FUNC &&
959 func != adapter->ahw.pci_func) {
960 dev_err(&adapter->pdev->dev,
961 "Not privilege to query stats for func=%d", func);
965 stats_addr = pci_alloc_consistent(adapter->pdev, stats_size,
968 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
971 memset(stats_addr, 0, stats_size);
973 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
974 arg1 |= rx_tx << 15 | stats_size << 16;
976 err = qlcnic_issue_cmd(adapter,
977 adapter->ahw.pci_func,
978 adapter->fw_hal_version,
982 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
985 stats = (struct __qlcnic_esw_statistics *)stats_addr;
986 esw_stats->context_id = le16_to_cpu(stats->context_id);
987 esw_stats->version = le16_to_cpu(stats->version);
988 esw_stats->size = le16_to_cpu(stats->size);
989 esw_stats->multicast_frames =
990 le64_to_cpu(stats->multicast_frames);
991 esw_stats->broadcast_frames =
992 le64_to_cpu(stats->broadcast_frames);
993 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
994 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
995 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
996 esw_stats->errors = le64_to_cpu(stats->errors);
997 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
1000 pci_free_consistent(adapter->pdev, stats_size, stats_addr,
1005 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
1006 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1008 struct __qlcnic_esw_statistics port_stats;
1012 if (esw_stats == NULL)
1014 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1016 if (adapter->npars == NULL)
1019 memset(esw_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1020 esw_stats->context_id = eswitch;
1022 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
1023 if (adapter->npars[i].phy_port != eswitch)
1026 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1027 if (qlcnic_get_port_stats(adapter, i, rx_tx, &port_stats))
1030 esw_stats->size = port_stats.size;
1031 esw_stats->version = port_stats.version;
1032 esw_stats->unicast_frames += port_stats.unicast_frames;
1033 esw_stats->multicast_frames += port_stats.multicast_frames;
1034 esw_stats->broadcast_frames += port_stats.broadcast_frames;
1035 esw_stats->dropped_frames += port_stats.dropped_frames;
1036 esw_stats->errors += port_stats.errors;
1037 esw_stats->local_frames += port_stats.local_frames;
1038 esw_stats->numbytes += port_stats.numbytes;
1045 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1046 const u8 port, const u8 rx_tx)
1051 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1054 if (func_esw == QLCNIC_STATS_PORT) {
1055 if (port >= QLCNIC_MAX_PCI_FUNC)
1057 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1058 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1064 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1067 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1068 arg1 |= BIT_14 | rx_tx << 15;
1070 return qlcnic_issue_cmd(adapter,
1071 adapter->ahw.pci_func,
1072 adapter->fw_hal_version,
1076 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
1079 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
1080 "rx_ctx=%d\n", func_esw, port, rx_tx);
1085 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1086 u32 *arg1, u32 *arg2)
1090 pci_func = (*arg1 >> 8);
1091 err = qlcnic_issue_cmd(adapter,
1092 adapter->ahw.pci_func,
1093 adapter->fw_hal_version,
1097 QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG);
1099 if (err == QLCNIC_RCODE_SUCCESS) {
1100 *arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
1101 *arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
1102 dev_info(&adapter->pdev->dev,
1103 "eSwitch port config for pci func %d\n", pci_func);
1105 dev_err(&adapter->pdev->dev,
1106 "Failed to get eswitch port config for pci func %d\n",
1111 /* Configure eSwitch port
1112 op_mode = 0 for setting default port behavior
1113 op_mode = 1 for setting vlan id
1114 op_mode = 2 for deleting vlan id
1115 op_type = 0 for vlan_id
1116 op_type = 1 for port vlan_id
1118 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1119 struct qlcnic_esw_func_cfg *esw_cfg)
1125 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1127 pci_func = esw_cfg->pci_func;
1128 arg1 = (adapter->npars[pci_func].phy_port & BIT_0);
1129 arg1 |= (pci_func << 8);
1131 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1133 arg1 &= ~(0x0ff << 8);
1134 arg1 |= (pci_func << 8);
1135 arg1 &= ~(BIT_2 | BIT_3);
1136 switch (esw_cfg->op_mode) {
1137 case QLCNIC_PORT_DEFAULTS:
1138 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1139 arg2 |= (BIT_0 | BIT_1);
1140 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1141 arg2 |= (BIT_2 | BIT_3);
1142 if (!(esw_cfg->discard_tagged))
1144 if (!(esw_cfg->promisc_mode))
1146 if (!(esw_cfg->mac_override))
1148 if (!(esw_cfg->mac_anti_spoof))
1150 if (!(esw_cfg->offload_flags & BIT_0))
1151 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1152 if (!(esw_cfg->offload_flags & BIT_1))
1154 if (!(esw_cfg->offload_flags & BIT_2))
1157 case QLCNIC_ADD_VLAN:
1158 arg1 |= (BIT_2 | BIT_5);
1159 arg1 |= (esw_cfg->vlan_id << 16);
1161 case QLCNIC_DEL_VLAN:
1162 arg1 |= (BIT_3 | BIT_5);
1163 arg1 &= ~(0x0ffff << 16);
1169 err = qlcnic_issue_cmd(adapter,
1170 adapter->ahw.pci_func,
1171 adapter->fw_hal_version,
1175 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
1177 if (err != QLCNIC_RCODE_SUCCESS) {
1178 dev_err(&adapter->pdev->dev,
1179 "Failed to configure eswitch pci func %d\n", pci_func);
1181 dev_info(&adapter->pdev->dev,
1182 "Configured eSwitch for pci func %d\n", pci_func);
1189 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1190 struct qlcnic_esw_func_cfg *esw_cfg)
1194 if (adapter->op_mode == QLCNIC_MGMT_FUNC)
1195 phy_port = adapter->npars[esw_cfg->pci_func].phy_port;
1197 phy_port = adapter->physical_port;
1199 arg1 |= (esw_cfg->pci_func << 8);
1200 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1203 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1204 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1205 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1206 esw_cfg->mac_override = !!(arg1 & BIT_7);
1207 esw_cfg->vlan_id = LSW(arg1 >> 16);
1208 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1209 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);