1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* This controls whether or not the driver will initialise devices
126 * with invalid MAC addresses stored in the EEPROM or flash. If true,
127 * such devices will be initialised with a random locally-generated
128 * MAC address. This allows for loading the sfc_mtd driver to
129 * reprogram the flash, even if the flash contents (including the MAC
130 * address) have previously been erased.
132 static unsigned int allow_bad_hwaddr;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * The default for RX should strike a balance between increasing the
138 * round-trip latency and reducing overhead.
140 static unsigned int rx_irq_mod_usec = 60;
142 /* Initial interrupt moderation settings. They can be modified after
143 * module load with ethtool.
145 * This default is chosen to ensure that a 10G link does not go idle
146 * while a TX queue is stopped after it has become full. A queue is
147 * restarted when it drops below half full. The time this takes (assuming
148 * worst case 3 descriptors per packet and 1024 descriptors) is
149 * 512 / 3 * 1.2 = 205 usec.
151 static unsigned int tx_irq_mod_usec = 150;
153 /* This is the first interrupt mode to try out of:
158 static unsigned int interrupt_mode;
160 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
161 * i.e. the number of CPUs among which we may distribute simultaneous
162 * interrupt handling.
164 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
165 * The default (0) means to assign an interrupt to each package (level II cache)
167 static unsigned int rss_cpus;
168 module_param(rss_cpus, uint, 0444);
169 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
171 static int phy_flash_cfg;
172 module_param(phy_flash_cfg, int, 0644);
173 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
175 static unsigned irq_adapt_low_thresh = 10000;
176 module_param(irq_adapt_low_thresh, uint, 0644);
177 MODULE_PARM_DESC(irq_adapt_low_thresh,
178 "Threshold score for reducing IRQ moderation");
180 static unsigned irq_adapt_high_thresh = 20000;
181 module_param(irq_adapt_high_thresh, uint, 0644);
182 MODULE_PARM_DESC(irq_adapt_high_thresh,
183 "Threshold score for increasing IRQ moderation");
185 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
186 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
187 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
188 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
189 module_param(debug, uint, 0);
190 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
192 /**************************************************************************
194 * Utility functions and prototypes
196 *************************************************************************/
198 static void efx_remove_channels(struct efx_nic *efx);
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_fini_napi(struct efx_nic *efx);
201 static void efx_fini_struct(struct efx_nic *efx);
202 static void efx_start_all(struct efx_nic *efx);
203 static void efx_stop_all(struct efx_nic *efx);
205 #define EFX_ASSERT_RESET_SERIALISED(efx) \
207 if ((efx->state == STATE_RUNNING) || \
208 (efx->state == STATE_DISABLED)) \
212 /**************************************************************************
214 * Event queue processing
216 *************************************************************************/
218 /* Process channel's event queue
220 * This function is responsible for processing the event queue of a
221 * single channel. The caller must guarantee that this function will
222 * never be concurrently called more than once on the same channel,
223 * though different channels may be being processed concurrently.
225 static int efx_process_channel(struct efx_channel *channel, int budget)
227 struct efx_nic *efx = channel->efx;
230 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
234 spent = efx_nic_process_eventq(channel, budget);
238 /* Deliver last RX packet. */
239 if (channel->rx_pkt) {
240 __efx_rx_packet(channel, channel->rx_pkt,
241 channel->rx_pkt_csummed);
242 channel->rx_pkt = NULL;
245 efx_rx_strategy(channel);
247 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
252 /* Mark channel as finished processing
254 * Note that since we will not receive further interrupts for this
255 * channel before we finish processing and call the eventq_read_ack()
256 * method, there is no need to use the interrupt hold-off timers.
258 static inline void efx_channel_processed(struct efx_channel *channel)
260 /* The interrupt handler for this channel may set work_pending
261 * as soon as we acknowledge the events we've seen. Make sure
262 * it's cleared before then. */
263 channel->work_pending = false;
266 efx_nic_eventq_read_ack(channel);
271 * NAPI guarantees serialisation of polls of the same device, which
272 * provides the guarantee required by efx_process_channel().
274 static int efx_poll(struct napi_struct *napi, int budget)
276 struct efx_channel *channel =
277 container_of(napi, struct efx_channel, napi_str);
278 struct efx_nic *efx = channel->efx;
281 netif_vdbg(efx, intr, efx->net_dev,
282 "channel %d NAPI poll executing on CPU %d\n",
283 channel->channel, raw_smp_processor_id());
285 spent = efx_process_channel(channel, budget);
287 if (spent < budget) {
288 if (channel->channel < efx->n_rx_channels &&
289 efx->irq_rx_adaptive &&
290 unlikely(++channel->irq_count == 1000)) {
291 if (unlikely(channel->irq_mod_score <
292 irq_adapt_low_thresh)) {
293 if (channel->irq_moderation > 1) {
294 channel->irq_moderation -= 1;
295 efx->type->push_irq_moderation(channel);
297 } else if (unlikely(channel->irq_mod_score >
298 irq_adapt_high_thresh)) {
299 if (channel->irq_moderation <
300 efx->irq_rx_moderation) {
301 channel->irq_moderation += 1;
302 efx->type->push_irq_moderation(channel);
305 channel->irq_count = 0;
306 channel->irq_mod_score = 0;
309 /* There is no race here; although napi_disable() will
310 * only wait for napi_complete(), this isn't a problem
311 * since efx_channel_processed() will have no effect if
312 * interrupts have already been disabled.
315 efx_channel_processed(channel);
321 /* Process the eventq of the specified channel immediately on this CPU
323 * Disable hardware generated interrupts, wait for any existing
324 * processing to finish, then directly poll (and ack ) the eventq.
325 * Finally reenable NAPI and interrupts.
327 * Since we are touching interrupts the caller should hold the suspend lock
329 void efx_process_channel_now(struct efx_channel *channel)
331 struct efx_nic *efx = channel->efx;
333 BUG_ON(channel->channel >= efx->n_channels);
334 BUG_ON(!channel->enabled);
336 /* Disable interrupts and wait for ISRs to complete */
337 efx_nic_disable_interrupts(efx);
339 synchronize_irq(efx->legacy_irq);
341 synchronize_irq(channel->irq);
343 /* Wait for any NAPI processing to complete */
344 napi_disable(&channel->napi_str);
346 /* Poll the channel */
347 efx_process_channel(channel, channel->eventq_mask + 1);
349 /* Ack the eventq. This may cause an interrupt to be generated
350 * when they are reenabled */
351 efx_channel_processed(channel);
353 napi_enable(&channel->napi_str);
354 efx_nic_enable_interrupts(efx);
357 /* Create event queue
358 * Event queue memory allocations are done only once. If the channel
359 * is reset, the memory buffer will be reused; this guards against
360 * errors during channel reset and also simplifies interrupt handling.
362 static int efx_probe_eventq(struct efx_channel *channel)
364 struct efx_nic *efx = channel->efx;
365 unsigned long entries;
367 netif_dbg(channel->efx, probe, channel->efx->net_dev,
368 "chan %d create event queue\n", channel->channel);
370 /* Build an event queue with room for one event per tx and rx buffer,
371 * plus some extra for link state events and MCDI completions. */
372 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
373 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
374 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
376 return efx_nic_probe_eventq(channel);
379 /* Prepare channel's event queue */
380 static void efx_init_eventq(struct efx_channel *channel)
382 netif_dbg(channel->efx, drv, channel->efx->net_dev,
383 "chan %d init event queue\n", channel->channel);
385 channel->eventq_read_ptr = 0;
387 efx_nic_init_eventq(channel);
390 static void efx_fini_eventq(struct efx_channel *channel)
392 netif_dbg(channel->efx, drv, channel->efx->net_dev,
393 "chan %d fini event queue\n", channel->channel);
395 efx_nic_fini_eventq(channel);
398 static void efx_remove_eventq(struct efx_channel *channel)
400 netif_dbg(channel->efx, drv, channel->efx->net_dev,
401 "chan %d remove event queue\n", channel->channel);
403 efx_nic_remove_eventq(channel);
406 /**************************************************************************
410 *************************************************************************/
412 /* Allocate and initialise a channel structure, optionally copying
413 * parameters (but not resources) from an old channel structure. */
414 static struct efx_channel *
415 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
417 struct efx_channel *channel;
418 struct efx_rx_queue *rx_queue;
419 struct efx_tx_queue *tx_queue;
423 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
427 *channel = *old_channel;
429 memset(&channel->eventq, 0, sizeof(channel->eventq));
431 rx_queue = &channel->rx_queue;
432 rx_queue->buffer = NULL;
433 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
435 for (j = 0; j < EFX_TXQ_TYPES; j++) {
436 tx_queue = &channel->tx_queue[j];
437 if (tx_queue->channel)
438 tx_queue->channel = channel;
439 tx_queue->buffer = NULL;
440 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
443 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
448 channel->channel = i;
450 for (j = 0; j < EFX_TXQ_TYPES; j++) {
451 tx_queue = &channel->tx_queue[j];
453 tx_queue->queue = i * EFX_TXQ_TYPES + j;
454 tx_queue->channel = channel;
458 spin_lock_init(&channel->tx_stop_lock);
459 atomic_set(&channel->tx_stop_count, 1);
461 rx_queue = &channel->rx_queue;
463 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
464 (unsigned long)rx_queue);
469 static int efx_probe_channel(struct efx_channel *channel)
471 struct efx_tx_queue *tx_queue;
472 struct efx_rx_queue *rx_queue;
475 netif_dbg(channel->efx, probe, channel->efx->net_dev,
476 "creating channel %d\n", channel->channel);
478 rc = efx_probe_eventq(channel);
482 efx_for_each_channel_tx_queue(tx_queue, channel) {
483 rc = efx_probe_tx_queue(tx_queue);
488 efx_for_each_channel_rx_queue(rx_queue, channel) {
489 rc = efx_probe_rx_queue(rx_queue);
494 channel->n_rx_frm_trunc = 0;
499 efx_for_each_channel_rx_queue(rx_queue, channel)
500 efx_remove_rx_queue(rx_queue);
502 efx_for_each_channel_tx_queue(tx_queue, channel)
503 efx_remove_tx_queue(tx_queue);
509 static void efx_set_channel_names(struct efx_nic *efx)
511 struct efx_channel *channel;
512 const char *type = "";
515 efx_for_each_channel(channel, efx) {
516 number = channel->channel;
517 if (efx->n_channels > efx->n_rx_channels) {
518 if (channel->channel < efx->n_rx_channels) {
522 number -= efx->n_rx_channels;
525 snprintf(efx->channel_name[channel->channel],
526 sizeof(efx->channel_name[0]),
527 "%s%s-%d", efx->name, type, number);
531 static int efx_probe_channels(struct efx_nic *efx)
533 struct efx_channel *channel;
536 /* Restart special buffer allocation */
537 efx->next_buffer_table = 0;
539 efx_for_each_channel(channel, efx) {
540 rc = efx_probe_channel(channel);
542 netif_err(efx, probe, efx->net_dev,
543 "failed to create channel %d\n",
548 efx_set_channel_names(efx);
553 efx_remove_channels(efx);
557 /* Channels are shutdown and reinitialised whilst the NIC is running
558 * to propagate configuration changes (mtu, checksum offload), or
559 * to clear hardware error conditions
561 static void efx_init_channels(struct efx_nic *efx)
563 struct efx_tx_queue *tx_queue;
564 struct efx_rx_queue *rx_queue;
565 struct efx_channel *channel;
567 /* Calculate the rx buffer allocation parameters required to
568 * support the current MTU, including padding for header
569 * alignment and overruns.
571 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
572 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
573 efx->type->rx_buffer_hash_size +
574 efx->type->rx_buffer_padding);
575 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
576 sizeof(struct efx_rx_page_state));
578 /* Initialise the channels */
579 efx_for_each_channel(channel, efx) {
580 netif_dbg(channel->efx, drv, channel->efx->net_dev,
581 "init chan %d\n", channel->channel);
583 efx_init_eventq(channel);
585 efx_for_each_channel_tx_queue(tx_queue, channel)
586 efx_init_tx_queue(tx_queue);
588 /* The rx buffer allocation strategy is MTU dependent */
589 efx_rx_strategy(channel);
591 efx_for_each_channel_rx_queue(rx_queue, channel)
592 efx_init_rx_queue(rx_queue);
594 WARN_ON(channel->rx_pkt != NULL);
595 efx_rx_strategy(channel);
599 /* This enables event queue processing and packet transmission.
601 * Note that this function is not allowed to fail, since that would
602 * introduce too much complexity into the suspend/resume path.
604 static void efx_start_channel(struct efx_channel *channel)
606 struct efx_rx_queue *rx_queue;
608 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
609 "starting chan %d\n", channel->channel);
611 /* The interrupt handler for this channel may set work_pending
612 * as soon as we enable it. Make sure it's cleared before
613 * then. Similarly, make sure it sees the enabled flag set. */
614 channel->work_pending = false;
615 channel->enabled = true;
618 /* Fill the queues before enabling NAPI */
619 efx_for_each_channel_rx_queue(rx_queue, channel)
620 efx_fast_push_rx_descriptors(rx_queue);
622 napi_enable(&channel->napi_str);
625 /* This disables event queue processing and packet transmission.
626 * This function does not guarantee that all queue processing
627 * (e.g. RX refill) is complete.
629 static void efx_stop_channel(struct efx_channel *channel)
631 if (!channel->enabled)
634 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
635 "stop chan %d\n", channel->channel);
637 channel->enabled = false;
638 napi_disable(&channel->napi_str);
641 static void efx_fini_channels(struct efx_nic *efx)
643 struct efx_channel *channel;
644 struct efx_tx_queue *tx_queue;
645 struct efx_rx_queue *rx_queue;
648 EFX_ASSERT_RESET_SERIALISED(efx);
649 BUG_ON(efx->port_enabled);
651 rc = efx_nic_flush_queues(efx);
652 if (rc && EFX_WORKAROUND_7803(efx)) {
653 /* Schedule a reset to recover from the flush failure. The
654 * descriptor caches reference memory we're about to free,
655 * but falcon_reconfigure_mac_wrapper() won't reconnect
656 * the MACs because of the pending reset. */
657 netif_err(efx, drv, efx->net_dev,
658 "Resetting to recover from flush failure\n");
659 efx_schedule_reset(efx, RESET_TYPE_ALL);
661 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
663 netif_dbg(efx, drv, efx->net_dev,
664 "successfully flushed all queues\n");
667 efx_for_each_channel(channel, efx) {
668 netif_dbg(channel->efx, drv, channel->efx->net_dev,
669 "shut down chan %d\n", channel->channel);
671 efx_for_each_channel_rx_queue(rx_queue, channel)
672 efx_fini_rx_queue(rx_queue);
673 efx_for_each_channel_tx_queue(tx_queue, channel)
674 efx_fini_tx_queue(tx_queue);
675 efx_fini_eventq(channel);
679 static void efx_remove_channel(struct efx_channel *channel)
681 struct efx_tx_queue *tx_queue;
682 struct efx_rx_queue *rx_queue;
684 netif_dbg(channel->efx, drv, channel->efx->net_dev,
685 "destroy chan %d\n", channel->channel);
687 efx_for_each_channel_rx_queue(rx_queue, channel)
688 efx_remove_rx_queue(rx_queue);
689 efx_for_each_channel_tx_queue(tx_queue, channel)
690 efx_remove_tx_queue(tx_queue);
691 efx_remove_eventq(channel);
694 static void efx_remove_channels(struct efx_nic *efx)
696 struct efx_channel *channel;
698 efx_for_each_channel(channel, efx)
699 efx_remove_channel(channel);
703 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
705 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
706 u32 old_rxq_entries, old_txq_entries;
711 efx_fini_channels(efx);
714 memset(other_channel, 0, sizeof(other_channel));
715 for (i = 0; i < efx->n_channels; i++) {
716 channel = efx_alloc_channel(efx, i, efx->channel[i]);
721 other_channel[i] = channel;
724 /* Swap entry counts and channel pointers */
725 old_rxq_entries = efx->rxq_entries;
726 old_txq_entries = efx->txq_entries;
727 efx->rxq_entries = rxq_entries;
728 efx->txq_entries = txq_entries;
729 for (i = 0; i < efx->n_channels; i++) {
730 channel = efx->channel[i];
731 efx->channel[i] = other_channel[i];
732 other_channel[i] = channel;
735 rc = efx_probe_channels(efx);
739 /* Destroy old channels */
740 for (i = 0; i < efx->n_channels; i++)
741 efx_remove_channel(other_channel[i]);
743 /* Free unused channel structures */
744 for (i = 0; i < efx->n_channels; i++)
745 kfree(other_channel[i]);
747 efx_init_channels(efx);
753 efx->rxq_entries = old_rxq_entries;
754 efx->txq_entries = old_txq_entries;
755 for (i = 0; i < efx->n_channels; i++) {
756 channel = efx->channel[i];
757 efx->channel[i] = other_channel[i];
758 other_channel[i] = channel;
763 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
765 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
768 /**************************************************************************
772 **************************************************************************/
774 /* This ensures that the kernel is kept informed (via
775 * netif_carrier_on/off) of the link status, and also maintains the
776 * link status's stop on the port's TX queue.
778 void efx_link_status_changed(struct efx_nic *efx)
780 struct efx_link_state *link_state = &efx->link_state;
782 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
783 * that no events are triggered between unregister_netdev() and the
784 * driver unloading. A more general condition is that NETDEV_CHANGE
785 * can only be generated between NETDEV_UP and NETDEV_DOWN */
786 if (!netif_running(efx->net_dev))
789 if (efx->port_inhibited) {
790 netif_carrier_off(efx->net_dev);
794 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
795 efx->n_link_state_changes++;
798 netif_carrier_on(efx->net_dev);
800 netif_carrier_off(efx->net_dev);
803 /* Status message for kernel log */
804 if (link_state->up) {
805 netif_info(efx, link, efx->net_dev,
806 "link up at %uMbps %s-duplex (MTU %d)%s\n",
807 link_state->speed, link_state->fd ? "full" : "half",
809 (efx->promiscuous ? " [PROMISC]" : ""));
811 netif_info(efx, link, efx->net_dev, "link down\n");
816 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
818 efx->link_advertising = advertising;
820 if (advertising & ADVERTISED_Pause)
821 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
823 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
824 if (advertising & ADVERTISED_Asym_Pause)
825 efx->wanted_fc ^= EFX_FC_TX;
829 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
831 efx->wanted_fc = wanted_fc;
832 if (efx->link_advertising) {
833 if (wanted_fc & EFX_FC_RX)
834 efx->link_advertising |= (ADVERTISED_Pause |
835 ADVERTISED_Asym_Pause);
837 efx->link_advertising &= ~(ADVERTISED_Pause |
838 ADVERTISED_Asym_Pause);
839 if (wanted_fc & EFX_FC_TX)
840 efx->link_advertising ^= ADVERTISED_Asym_Pause;
844 static void efx_fini_port(struct efx_nic *efx);
846 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
847 * the MAC appropriately. All other PHY configuration changes are pushed
848 * through phy_op->set_settings(), and pushed asynchronously to the MAC
849 * through efx_monitor().
851 * Callers must hold the mac_lock
853 int __efx_reconfigure_port(struct efx_nic *efx)
855 enum efx_phy_mode phy_mode;
858 WARN_ON(!mutex_is_locked(&efx->mac_lock));
860 /* Serialise the promiscuous flag with efx_set_multicast_list. */
861 if (efx_dev_registered(efx)) {
862 netif_addr_lock_bh(efx->net_dev);
863 netif_addr_unlock_bh(efx->net_dev);
866 /* Disable PHY transmit in mac level loopbacks */
867 phy_mode = efx->phy_mode;
868 if (LOOPBACK_INTERNAL(efx))
869 efx->phy_mode |= PHY_MODE_TX_DISABLED;
871 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
873 rc = efx->type->reconfigure_port(efx);
876 efx->phy_mode = phy_mode;
881 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
883 int efx_reconfigure_port(struct efx_nic *efx)
887 EFX_ASSERT_RESET_SERIALISED(efx);
889 mutex_lock(&efx->mac_lock);
890 rc = __efx_reconfigure_port(efx);
891 mutex_unlock(&efx->mac_lock);
896 /* Asynchronous work item for changing MAC promiscuity and multicast
897 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
899 static void efx_mac_work(struct work_struct *data)
901 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
903 mutex_lock(&efx->mac_lock);
904 if (efx->port_enabled) {
905 efx->type->push_multicast_hash(efx);
906 efx->mac_op->reconfigure(efx);
908 mutex_unlock(&efx->mac_lock);
911 static int efx_probe_port(struct efx_nic *efx)
915 netif_dbg(efx, probe, efx->net_dev, "create port\n");
918 efx->phy_mode = PHY_MODE_SPECIAL;
920 /* Connect up MAC/PHY operations table */
921 rc = efx->type->probe_port(efx);
925 /* Sanity check MAC address */
926 if (is_valid_ether_addr(efx->mac_address)) {
927 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
929 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
931 if (!allow_bad_hwaddr) {
935 random_ether_addr(efx->net_dev->dev_addr);
936 netif_info(efx, probe, efx->net_dev,
937 "using locally-generated MAC %pM\n",
938 efx->net_dev->dev_addr);
944 efx->type->remove_port(efx);
948 static int efx_init_port(struct efx_nic *efx)
952 netif_dbg(efx, drv, efx->net_dev, "init port\n");
954 mutex_lock(&efx->mac_lock);
956 rc = efx->phy_op->init(efx);
960 efx->port_initialized = true;
962 /* Reconfigure the MAC before creating dma queues (required for
963 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
964 efx->mac_op->reconfigure(efx);
966 /* Ensure the PHY advertises the correct flow control settings */
967 rc = efx->phy_op->reconfigure(efx);
971 mutex_unlock(&efx->mac_lock);
975 efx->phy_op->fini(efx);
977 mutex_unlock(&efx->mac_lock);
981 static void efx_start_port(struct efx_nic *efx)
983 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
984 BUG_ON(efx->port_enabled);
986 mutex_lock(&efx->mac_lock);
987 efx->port_enabled = true;
989 /* efx_mac_work() might have been scheduled after efx_stop_port(),
990 * and then cancelled by efx_flush_all() */
991 efx->type->push_multicast_hash(efx);
992 efx->mac_op->reconfigure(efx);
994 mutex_unlock(&efx->mac_lock);
997 /* Prevent efx_mac_work() and efx_monitor() from working */
998 static void efx_stop_port(struct efx_nic *efx)
1000 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1002 mutex_lock(&efx->mac_lock);
1003 efx->port_enabled = false;
1004 mutex_unlock(&efx->mac_lock);
1006 /* Serialise against efx_set_multicast_list() */
1007 if (efx_dev_registered(efx)) {
1008 netif_addr_lock_bh(efx->net_dev);
1009 netif_addr_unlock_bh(efx->net_dev);
1013 static void efx_fini_port(struct efx_nic *efx)
1015 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1017 if (!efx->port_initialized)
1020 efx->phy_op->fini(efx);
1021 efx->port_initialized = false;
1023 efx->link_state.up = false;
1024 efx_link_status_changed(efx);
1027 static void efx_remove_port(struct efx_nic *efx)
1029 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1031 efx->type->remove_port(efx);
1034 /**************************************************************************
1038 **************************************************************************/
1040 /* This configures the PCI device to enable I/O and DMA. */
1041 static int efx_init_io(struct efx_nic *efx)
1043 struct pci_dev *pci_dev = efx->pci_dev;
1044 dma_addr_t dma_mask = efx->type->max_dma_mask;
1047 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1049 rc = pci_enable_device(pci_dev);
1051 netif_err(efx, probe, efx->net_dev,
1052 "failed to enable PCI device\n");
1056 pci_set_master(pci_dev);
1058 /* Set the PCI DMA mask. Try all possibilities from our
1059 * genuine mask down to 32 bits, because some architectures
1060 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1061 * masks event though they reject 46 bit masks.
1063 while (dma_mask > 0x7fffffffUL) {
1064 if (pci_dma_supported(pci_dev, dma_mask) &&
1065 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1070 netif_err(efx, probe, efx->net_dev,
1071 "could not find a suitable DMA mask\n");
1074 netif_dbg(efx, probe, efx->net_dev,
1075 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1076 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1078 /* pci_set_consistent_dma_mask() is not *allowed* to
1079 * fail with a mask that pci_set_dma_mask() accepted,
1080 * but just in case...
1082 netif_err(efx, probe, efx->net_dev,
1083 "failed to set consistent DMA mask\n");
1087 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1088 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1090 netif_err(efx, probe, efx->net_dev,
1091 "request for memory BAR failed\n");
1095 efx->membase = ioremap_nocache(efx->membase_phys,
1096 efx->type->mem_map_size);
1097 if (!efx->membase) {
1098 netif_err(efx, probe, efx->net_dev,
1099 "could not map memory BAR at %llx+%x\n",
1100 (unsigned long long)efx->membase_phys,
1101 efx->type->mem_map_size);
1105 netif_dbg(efx, probe, efx->net_dev,
1106 "memory BAR at %llx+%x (virtual %p)\n",
1107 (unsigned long long)efx->membase_phys,
1108 efx->type->mem_map_size, efx->membase);
1113 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1115 efx->membase_phys = 0;
1117 pci_disable_device(efx->pci_dev);
1122 static void efx_fini_io(struct efx_nic *efx)
1124 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1127 iounmap(efx->membase);
1128 efx->membase = NULL;
1131 if (efx->membase_phys) {
1132 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1133 efx->membase_phys = 0;
1136 pci_disable_device(efx->pci_dev);
1139 /* Get number of channels wanted. Each channel will have its own IRQ,
1140 * 1 RX queue and/or 2 TX queues. */
1141 static int efx_wanted_channels(void)
1143 cpumask_var_t core_mask;
1147 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1149 "sfc: RSS disabled due to allocation failure\n");
1154 for_each_online_cpu(cpu) {
1155 if (!cpumask_test_cpu(cpu, core_mask)) {
1157 cpumask_or(core_mask, core_mask,
1158 topology_core_cpumask(cpu));
1162 free_cpumask_var(core_mask);
1166 /* Probe the number and type of interrupts we are able to obtain, and
1167 * the resulting numbers of channels and RX queues.
1169 static void efx_probe_interrupts(struct efx_nic *efx)
1172 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1175 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1176 struct msix_entry xentries[EFX_MAX_CHANNELS];
1179 n_channels = efx_wanted_channels();
1180 if (separate_tx_channels)
1182 n_channels = min(n_channels, max_channels);
1184 for (i = 0; i < n_channels; i++)
1185 xentries[i].entry = i;
1186 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1188 netif_err(efx, drv, efx->net_dev,
1189 "WARNING: Insufficient MSI-X vectors"
1190 " available (%d < %d).\n", rc, n_channels);
1191 netif_err(efx, drv, efx->net_dev,
1192 "WARNING: Performance may be reduced.\n");
1193 EFX_BUG_ON_PARANOID(rc >= n_channels);
1195 rc = pci_enable_msix(efx->pci_dev, xentries,
1200 efx->n_channels = n_channels;
1201 if (separate_tx_channels) {
1202 efx->n_tx_channels =
1203 max(efx->n_channels / 2, 1U);
1204 efx->n_rx_channels =
1205 max(efx->n_channels -
1206 efx->n_tx_channels, 1U);
1208 efx->n_tx_channels = efx->n_channels;
1209 efx->n_rx_channels = efx->n_channels;
1211 for (i = 0; i < n_channels; i++)
1212 efx_get_channel(efx, i)->irq =
1215 /* Fall back to single channel MSI */
1216 efx->interrupt_mode = EFX_INT_MODE_MSI;
1217 netif_err(efx, drv, efx->net_dev,
1218 "could not enable MSI-X\n");
1222 /* Try single interrupt MSI */
1223 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1224 efx->n_channels = 1;
1225 efx->n_rx_channels = 1;
1226 efx->n_tx_channels = 1;
1227 rc = pci_enable_msi(efx->pci_dev);
1229 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1231 netif_err(efx, drv, efx->net_dev,
1232 "could not enable MSI\n");
1233 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1237 /* Assume legacy interrupts */
1238 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1239 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1240 efx->n_rx_channels = 1;
1241 efx->n_tx_channels = 1;
1242 efx->legacy_irq = efx->pci_dev->irq;
1246 static void efx_remove_interrupts(struct efx_nic *efx)
1248 struct efx_channel *channel;
1250 /* Remove MSI/MSI-X interrupts */
1251 efx_for_each_channel(channel, efx)
1253 pci_disable_msi(efx->pci_dev);
1254 pci_disable_msix(efx->pci_dev);
1256 /* Remove legacy interrupt */
1257 efx->legacy_irq = 0;
1260 struct efx_tx_queue *
1261 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1263 unsigned tx_channel_offset =
1264 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1265 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1266 type >= EFX_TXQ_TYPES);
1267 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1270 static void efx_set_channels(struct efx_nic *efx)
1272 struct efx_channel *channel;
1273 struct efx_tx_queue *tx_queue;
1274 unsigned tx_channel_offset =
1275 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1277 /* Channel pointers were set in efx_init_struct() but we now
1278 * need to clear them for TX queues in any RX-only channels. */
1279 efx_for_each_channel(channel, efx) {
1280 if (channel->channel - tx_channel_offset >=
1281 efx->n_tx_channels) {
1282 efx_for_each_channel_tx_queue(tx_queue, channel)
1283 tx_queue->channel = NULL;
1288 static int efx_probe_nic(struct efx_nic *efx)
1293 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1295 /* Carry out hardware-type specific initialisation */
1296 rc = efx->type->probe(efx);
1300 /* Determine the number of channels and queues by trying to hook
1301 * in MSI-X interrupts. */
1302 efx_probe_interrupts(efx);
1304 if (efx->n_channels > 1)
1305 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1306 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1307 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1309 efx_set_channels(efx);
1310 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1311 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1313 /* Initialise the interrupt moderation settings */
1314 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1319 static void efx_remove_nic(struct efx_nic *efx)
1321 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1323 efx_remove_interrupts(efx);
1324 efx->type->remove(efx);
1327 /**************************************************************************
1329 * NIC startup/shutdown
1331 *************************************************************************/
1333 static int efx_probe_all(struct efx_nic *efx)
1337 rc = efx_probe_nic(efx);
1339 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1343 rc = efx_probe_port(efx);
1345 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1349 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1350 rc = efx_probe_channels(efx);
1354 rc = efx_probe_filters(efx);
1356 netif_err(efx, probe, efx->net_dev,
1357 "failed to create filter tables\n");
1364 efx_remove_channels(efx);
1366 efx_remove_port(efx);
1368 efx_remove_nic(efx);
1373 /* Called after previous invocation(s) of efx_stop_all, restarts the
1374 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1375 * and ensures that the port is scheduled to be reconfigured.
1376 * This function is safe to call multiple times when the NIC is in any
1378 static void efx_start_all(struct efx_nic *efx)
1380 struct efx_channel *channel;
1382 EFX_ASSERT_RESET_SERIALISED(efx);
1384 /* Check that it is appropriate to restart the interface. All
1385 * of these flags are safe to read under just the rtnl lock */
1386 if (efx->port_enabled)
1388 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1390 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1393 /* Mark the port as enabled so port reconfigurations can start, then
1394 * restart the transmit interface early so the watchdog timer stops */
1395 efx_start_port(efx);
1397 efx_for_each_channel(channel, efx) {
1398 if (efx_dev_registered(efx))
1399 efx_wake_queue(channel);
1400 efx_start_channel(channel);
1403 efx_nic_enable_interrupts(efx);
1405 /* Switch to event based MCDI completions after enabling interrupts.
1406 * If a reset has been scheduled, then we need to stay in polled mode.
1407 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1408 * reset_pending [modified from an atomic context], we instead guarantee
1409 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1410 efx_mcdi_mode_event(efx);
1411 if (efx->reset_pending != RESET_TYPE_NONE)
1412 efx_mcdi_mode_poll(efx);
1414 /* Start the hardware monitor if there is one. Otherwise (we're link
1415 * event driven), we have to poll the PHY because after an event queue
1416 * flush, we could have a missed a link state change */
1417 if (efx->type->monitor != NULL) {
1418 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1419 efx_monitor_interval);
1421 mutex_lock(&efx->mac_lock);
1422 if (efx->phy_op->poll(efx))
1423 efx_link_status_changed(efx);
1424 mutex_unlock(&efx->mac_lock);
1427 efx->type->start_stats(efx);
1430 /* Flush all delayed work. Should only be called when no more delayed work
1431 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1432 * since we're holding the rtnl_lock at this point. */
1433 static void efx_flush_all(struct efx_nic *efx)
1435 /* Make sure the hardware monitor is stopped */
1436 cancel_delayed_work_sync(&efx->monitor_work);
1437 /* Stop scheduled port reconfigurations */
1438 cancel_work_sync(&efx->mac_work);
1441 /* Quiesce hardware and software without bringing the link down.
1442 * Safe to call multiple times, when the nic and interface is in any
1443 * state. The caller is guaranteed to subsequently be in a position
1444 * to modify any hardware and software state they see fit without
1446 static void efx_stop_all(struct efx_nic *efx)
1448 struct efx_channel *channel;
1450 EFX_ASSERT_RESET_SERIALISED(efx);
1452 /* port_enabled can be read safely under the rtnl lock */
1453 if (!efx->port_enabled)
1456 efx->type->stop_stats(efx);
1458 /* Switch to MCDI polling on Siena before disabling interrupts */
1459 efx_mcdi_mode_poll(efx);
1461 /* Disable interrupts and wait for ISR to complete */
1462 efx_nic_disable_interrupts(efx);
1463 if (efx->legacy_irq)
1464 synchronize_irq(efx->legacy_irq);
1465 efx_for_each_channel(channel, efx) {
1467 synchronize_irq(channel->irq);
1470 /* Stop all NAPI processing and synchronous rx refills */
1471 efx_for_each_channel(channel, efx)
1472 efx_stop_channel(channel);
1474 /* Stop all asynchronous port reconfigurations. Since all
1475 * event processing has already been stopped, there is no
1476 * window to loose phy events */
1479 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1482 /* Stop the kernel transmit interface late, so the watchdog
1483 * timer isn't ticking over the flush */
1484 if (efx_dev_registered(efx)) {
1485 struct efx_channel *channel;
1486 efx_for_each_channel(channel, efx)
1487 efx_stop_queue(channel);
1488 netif_tx_lock_bh(efx->net_dev);
1489 netif_tx_unlock_bh(efx->net_dev);
1493 static void efx_remove_all(struct efx_nic *efx)
1495 efx_remove_filters(efx);
1496 efx_remove_channels(efx);
1497 efx_remove_port(efx);
1498 efx_remove_nic(efx);
1501 /**************************************************************************
1503 * Interrupt moderation
1505 **************************************************************************/
1507 static unsigned irq_mod_ticks(int usecs, int resolution)
1510 return 0; /* cannot receive interrupts ahead of time :-) */
1511 if (usecs < resolution)
1512 return 1; /* never round down to 0 */
1513 return usecs / resolution;
1516 /* Set interrupt moderation parameters */
1517 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1520 struct efx_channel *channel;
1521 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1522 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1524 EFX_ASSERT_RESET_SERIALISED(efx);
1526 efx->irq_rx_adaptive = rx_adaptive;
1527 efx->irq_rx_moderation = rx_ticks;
1528 efx_for_each_channel(channel, efx) {
1529 if (efx_channel_get_rx_queue(channel))
1530 channel->irq_moderation = rx_ticks;
1531 else if (efx_channel_get_tx_queue(channel, 0))
1532 channel->irq_moderation = tx_ticks;
1536 /**************************************************************************
1540 **************************************************************************/
1542 /* Run periodically off the general workqueue */
1543 static void efx_monitor(struct work_struct *data)
1545 struct efx_nic *efx = container_of(data, struct efx_nic,
1548 netif_vdbg(efx, timer, efx->net_dev,
1549 "hardware monitor executing on CPU %d\n",
1550 raw_smp_processor_id());
1551 BUG_ON(efx->type->monitor == NULL);
1553 /* If the mac_lock is already held then it is likely a port
1554 * reconfiguration is already in place, which will likely do
1555 * most of the work of monitor() anyway. */
1556 if (mutex_trylock(&efx->mac_lock)) {
1557 if (efx->port_enabled)
1558 efx->type->monitor(efx);
1559 mutex_unlock(&efx->mac_lock);
1562 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1563 efx_monitor_interval);
1566 /**************************************************************************
1570 *************************************************************************/
1573 * Context: process, rtnl_lock() held.
1575 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1577 struct efx_nic *efx = netdev_priv(net_dev);
1578 struct mii_ioctl_data *data = if_mii(ifr);
1580 EFX_ASSERT_RESET_SERIALISED(efx);
1582 /* Convert phy_id from older PRTAD/DEVAD format */
1583 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1584 (data->phy_id & 0xfc00) == 0x0400)
1585 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1587 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1590 /**************************************************************************
1594 **************************************************************************/
1596 static int efx_init_napi(struct efx_nic *efx)
1598 struct efx_channel *channel;
1600 efx_for_each_channel(channel, efx) {
1601 channel->napi_dev = efx->net_dev;
1602 netif_napi_add(channel->napi_dev, &channel->napi_str,
1603 efx_poll, napi_weight);
1608 static void efx_fini_napi(struct efx_nic *efx)
1610 struct efx_channel *channel;
1612 efx_for_each_channel(channel, efx) {
1613 if (channel->napi_dev)
1614 netif_napi_del(&channel->napi_str);
1615 channel->napi_dev = NULL;
1619 /**************************************************************************
1621 * Kernel netpoll interface
1623 *************************************************************************/
1625 #ifdef CONFIG_NET_POLL_CONTROLLER
1627 /* Although in the common case interrupts will be disabled, this is not
1628 * guaranteed. However, all our work happens inside the NAPI callback,
1629 * so no locking is required.
1631 static void efx_netpoll(struct net_device *net_dev)
1633 struct efx_nic *efx = netdev_priv(net_dev);
1634 struct efx_channel *channel;
1636 efx_for_each_channel(channel, efx)
1637 efx_schedule_channel(channel);
1642 /**************************************************************************
1644 * Kernel net device interface
1646 *************************************************************************/
1648 /* Context: process, rtnl_lock() held. */
1649 static int efx_net_open(struct net_device *net_dev)
1651 struct efx_nic *efx = netdev_priv(net_dev);
1652 EFX_ASSERT_RESET_SERIALISED(efx);
1654 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1655 raw_smp_processor_id());
1657 if (efx->state == STATE_DISABLED)
1659 if (efx->phy_mode & PHY_MODE_SPECIAL)
1661 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1664 /* Notify the kernel of the link state polled during driver load,
1665 * before the monitor starts running */
1666 efx_link_status_changed(efx);
1672 /* Context: process, rtnl_lock() held.
1673 * Note that the kernel will ignore our return code; this method
1674 * should really be a void.
1676 static int efx_net_stop(struct net_device *net_dev)
1678 struct efx_nic *efx = netdev_priv(net_dev);
1680 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1681 raw_smp_processor_id());
1683 if (efx->state != STATE_DISABLED) {
1684 /* Stop the device and flush all the channels */
1686 efx_fini_channels(efx);
1687 efx_init_channels(efx);
1693 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1694 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1696 struct efx_nic *efx = netdev_priv(net_dev);
1697 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1699 spin_lock_bh(&efx->stats_lock);
1700 efx->type->update_stats(efx);
1701 spin_unlock_bh(&efx->stats_lock);
1703 stats->rx_packets = mac_stats->rx_packets;
1704 stats->tx_packets = mac_stats->tx_packets;
1705 stats->rx_bytes = mac_stats->rx_bytes;
1706 stats->tx_bytes = mac_stats->tx_bytes;
1707 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1708 stats->multicast = mac_stats->rx_multicast;
1709 stats->collisions = mac_stats->tx_collision;
1710 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1711 mac_stats->rx_length_error);
1712 stats->rx_crc_errors = mac_stats->rx_bad;
1713 stats->rx_frame_errors = mac_stats->rx_align_error;
1714 stats->rx_fifo_errors = mac_stats->rx_overflow;
1715 stats->rx_missed_errors = mac_stats->rx_missed;
1716 stats->tx_window_errors = mac_stats->tx_late_collision;
1718 stats->rx_errors = (stats->rx_length_errors +
1719 stats->rx_crc_errors +
1720 stats->rx_frame_errors +
1721 mac_stats->rx_symbol_error);
1722 stats->tx_errors = (stats->tx_window_errors +
1728 /* Context: netif_tx_lock held, BHs disabled. */
1729 static void efx_watchdog(struct net_device *net_dev)
1731 struct efx_nic *efx = netdev_priv(net_dev);
1733 netif_err(efx, tx_err, efx->net_dev,
1734 "TX stuck with port_enabled=%d: resetting channels\n",
1737 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1741 /* Context: process, rtnl_lock() held. */
1742 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1744 struct efx_nic *efx = netdev_priv(net_dev);
1747 EFX_ASSERT_RESET_SERIALISED(efx);
1749 if (new_mtu > EFX_MAX_MTU)
1754 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1756 efx_fini_channels(efx);
1758 mutex_lock(&efx->mac_lock);
1759 /* Reconfigure the MAC before enabling the dma queues so that
1760 * the RX buffers don't overflow */
1761 net_dev->mtu = new_mtu;
1762 efx->mac_op->reconfigure(efx);
1763 mutex_unlock(&efx->mac_lock);
1765 efx_init_channels(efx);
1771 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1773 struct efx_nic *efx = netdev_priv(net_dev);
1774 struct sockaddr *addr = data;
1775 char *new_addr = addr->sa_data;
1777 EFX_ASSERT_RESET_SERIALISED(efx);
1779 if (!is_valid_ether_addr(new_addr)) {
1780 netif_err(efx, drv, efx->net_dev,
1781 "invalid ethernet MAC address requested: %pM\n",
1786 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1788 /* Reconfigure the MAC */
1789 mutex_lock(&efx->mac_lock);
1790 efx->mac_op->reconfigure(efx);
1791 mutex_unlock(&efx->mac_lock);
1796 /* Context: netif_addr_lock held, BHs disabled. */
1797 static void efx_set_multicast_list(struct net_device *net_dev)
1799 struct efx_nic *efx = netdev_priv(net_dev);
1800 struct netdev_hw_addr *ha;
1801 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1805 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1807 /* Build multicast hash table */
1808 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1809 memset(mc_hash, 0xff, sizeof(*mc_hash));
1811 memset(mc_hash, 0x00, sizeof(*mc_hash));
1812 netdev_for_each_mc_addr(ha, net_dev) {
1813 crc = ether_crc_le(ETH_ALEN, ha->addr);
1814 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1815 set_bit_le(bit, mc_hash->byte);
1818 /* Broadcast packets go through the multicast hash filter.
1819 * ether_crc_le() of the broadcast address is 0xbe2612ff
1820 * so we always add bit 0xff to the mask.
1822 set_bit_le(0xff, mc_hash->byte);
1825 if (efx->port_enabled)
1826 queue_work(efx->workqueue, &efx->mac_work);
1827 /* Otherwise efx_start_port() will do this */
1830 static const struct net_device_ops efx_netdev_ops = {
1831 .ndo_open = efx_net_open,
1832 .ndo_stop = efx_net_stop,
1833 .ndo_get_stats64 = efx_net_stats,
1834 .ndo_tx_timeout = efx_watchdog,
1835 .ndo_start_xmit = efx_hard_start_xmit,
1836 .ndo_validate_addr = eth_validate_addr,
1837 .ndo_do_ioctl = efx_ioctl,
1838 .ndo_change_mtu = efx_change_mtu,
1839 .ndo_set_mac_address = efx_set_mac_address,
1840 .ndo_set_multicast_list = efx_set_multicast_list,
1841 #ifdef CONFIG_NET_POLL_CONTROLLER
1842 .ndo_poll_controller = efx_netpoll,
1846 static void efx_update_name(struct efx_nic *efx)
1848 strcpy(efx->name, efx->net_dev->name);
1849 efx_mtd_rename(efx);
1850 efx_set_channel_names(efx);
1853 static int efx_netdev_event(struct notifier_block *this,
1854 unsigned long event, void *ptr)
1856 struct net_device *net_dev = ptr;
1858 if (net_dev->netdev_ops == &efx_netdev_ops &&
1859 event == NETDEV_CHANGENAME)
1860 efx_update_name(netdev_priv(net_dev));
1865 static struct notifier_block efx_netdev_notifier = {
1866 .notifier_call = efx_netdev_event,
1870 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1872 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1873 return sprintf(buf, "%d\n", efx->phy_type);
1875 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1877 static int efx_register_netdev(struct efx_nic *efx)
1879 struct net_device *net_dev = efx->net_dev;
1882 net_dev->watchdog_timeo = 5 * HZ;
1883 net_dev->irq = efx->pci_dev->irq;
1884 net_dev->netdev_ops = &efx_netdev_ops;
1885 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1887 /* Clear MAC statistics */
1888 efx->mac_op->update_stats(efx);
1889 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1893 rc = dev_alloc_name(net_dev, net_dev->name);
1896 efx_update_name(efx);
1898 rc = register_netdevice(net_dev);
1902 /* Always start with carrier off; PHY events will detect the link */
1903 netif_carrier_off(efx->net_dev);
1907 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1909 netif_err(efx, drv, efx->net_dev,
1910 "failed to init net dev attributes\n");
1911 goto fail_registered;
1918 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1922 unregister_netdev(net_dev);
1926 static void efx_unregister_netdev(struct efx_nic *efx)
1928 struct efx_channel *channel;
1929 struct efx_tx_queue *tx_queue;
1934 BUG_ON(netdev_priv(efx->net_dev) != efx);
1936 /* Free up any skbs still remaining. This has to happen before
1937 * we try to unregister the netdev as running their destructors
1938 * may be needed to get the device ref. count to 0. */
1939 efx_for_each_channel(channel, efx) {
1940 efx_for_each_channel_tx_queue(tx_queue, channel)
1941 efx_release_tx_buffers(tx_queue);
1944 if (efx_dev_registered(efx)) {
1945 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1946 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1947 unregister_netdev(efx->net_dev);
1951 /**************************************************************************
1953 * Device reset and suspend
1955 **************************************************************************/
1957 /* Tears down the entire software state and most of the hardware state
1959 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1961 EFX_ASSERT_RESET_SERIALISED(efx);
1964 mutex_lock(&efx->mac_lock);
1965 mutex_lock(&efx->spi_lock);
1967 efx_fini_channels(efx);
1968 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1969 efx->phy_op->fini(efx);
1970 efx->type->fini(efx);
1973 /* This function will always ensure that the locks acquired in
1974 * efx_reset_down() are released. A failure return code indicates
1975 * that we were unable to reinitialise the hardware, and the
1976 * driver should be disabled. If ok is false, then the rx and tx
1977 * engines are not restarted, pending a RESET_DISABLE. */
1978 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1982 EFX_ASSERT_RESET_SERIALISED(efx);
1984 rc = efx->type->init(efx);
1986 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
1993 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1994 rc = efx->phy_op->init(efx);
1997 if (efx->phy_op->reconfigure(efx))
1998 netif_err(efx, drv, efx->net_dev,
1999 "could not restore PHY settings\n");
2002 efx->mac_op->reconfigure(efx);
2004 efx_init_channels(efx);
2005 efx_restore_filters(efx);
2007 mutex_unlock(&efx->spi_lock);
2008 mutex_unlock(&efx->mac_lock);
2015 efx->port_initialized = false;
2017 mutex_unlock(&efx->spi_lock);
2018 mutex_unlock(&efx->mac_lock);
2023 /* Reset the NIC using the specified method. Note that the reset may
2024 * fail, in which case the card will be left in an unusable state.
2026 * Caller must hold the rtnl_lock.
2028 int efx_reset(struct efx_nic *efx, enum reset_type method)
2033 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2034 RESET_TYPE(method));
2036 efx_reset_down(efx, method);
2038 rc = efx->type->reset(efx, method);
2040 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2044 /* Allow resets to be rescheduled. */
2045 efx->reset_pending = RESET_TYPE_NONE;
2047 /* Reinitialise bus-mastering, which may have been turned off before
2048 * the reset was scheduled. This is still appropriate, even in the
2049 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2050 * can respond to requests. */
2051 pci_set_master(efx->pci_dev);
2054 /* Leave device stopped if necessary */
2055 disabled = rc || method == RESET_TYPE_DISABLE;
2056 rc2 = efx_reset_up(efx, method, !disabled);
2064 dev_close(efx->net_dev);
2065 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2066 efx->state = STATE_DISABLED;
2068 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2073 /* The worker thread exists so that code that cannot sleep can
2074 * schedule a reset for later.
2076 static void efx_reset_work(struct work_struct *data)
2078 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2080 if (efx->reset_pending == RESET_TYPE_NONE)
2083 /* If we're not RUNNING then don't reset. Leave the reset_pending
2084 * flag set so that efx_pci_probe_main will be retried */
2085 if (efx->state != STATE_RUNNING) {
2086 netif_info(efx, drv, efx->net_dev,
2087 "scheduled reset quenched. NIC not RUNNING\n");
2092 (void)efx_reset(efx, efx->reset_pending);
2096 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2098 enum reset_type method;
2100 if (efx->reset_pending != RESET_TYPE_NONE) {
2101 netif_info(efx, drv, efx->net_dev,
2102 "quenching already scheduled reset\n");
2107 case RESET_TYPE_INVISIBLE:
2108 case RESET_TYPE_ALL:
2109 case RESET_TYPE_WORLD:
2110 case RESET_TYPE_DISABLE:
2113 case RESET_TYPE_RX_RECOVERY:
2114 case RESET_TYPE_RX_DESC_FETCH:
2115 case RESET_TYPE_TX_DESC_FETCH:
2116 case RESET_TYPE_TX_SKIP:
2117 method = RESET_TYPE_INVISIBLE;
2119 case RESET_TYPE_MC_FAILURE:
2121 method = RESET_TYPE_ALL;
2126 netif_dbg(efx, drv, efx->net_dev,
2127 "scheduling %s reset for %s\n",
2128 RESET_TYPE(method), RESET_TYPE(type));
2130 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2131 RESET_TYPE(method));
2133 efx->reset_pending = method;
2135 /* efx_process_channel() will no longer read events once a
2136 * reset is scheduled. So switch back to poll'd MCDI completions. */
2137 efx_mcdi_mode_poll(efx);
2139 queue_work(reset_workqueue, &efx->reset_work);
2142 /**************************************************************************
2144 * List of NICs we support
2146 **************************************************************************/
2148 /* PCI device ID table */
2149 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2150 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2151 .driver_data = (unsigned long) &falcon_a1_nic_type},
2152 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2153 .driver_data = (unsigned long) &falcon_b0_nic_type},
2154 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2155 .driver_data = (unsigned long) &siena_a0_nic_type},
2156 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2157 .driver_data = (unsigned long) &siena_a0_nic_type},
2158 {0} /* end of list */
2161 /**************************************************************************
2163 * Dummy PHY/MAC operations
2165 * Can be used for some unimplemented operations
2166 * Needed so all function pointers are valid and do not have to be tested
2169 **************************************************************************/
2170 int efx_port_dummy_op_int(struct efx_nic *efx)
2174 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2176 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2181 static struct efx_phy_operations efx_dummy_phy_operations = {
2182 .init = efx_port_dummy_op_int,
2183 .reconfigure = efx_port_dummy_op_int,
2184 .poll = efx_port_dummy_op_poll,
2185 .fini = efx_port_dummy_op_void,
2188 /**************************************************************************
2192 **************************************************************************/
2194 /* This zeroes out and then fills in the invariants in a struct
2195 * efx_nic (including all sub-structures).
2197 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2198 struct pci_dev *pci_dev, struct net_device *net_dev)
2202 /* Initialise common structures */
2203 memset(efx, 0, sizeof(*efx));
2204 spin_lock_init(&efx->biu_lock);
2205 mutex_init(&efx->mdio_lock);
2206 mutex_init(&efx->spi_lock);
2207 #ifdef CONFIG_SFC_MTD
2208 INIT_LIST_HEAD(&efx->mtd_list);
2210 INIT_WORK(&efx->reset_work, efx_reset_work);
2211 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2212 efx->pci_dev = pci_dev;
2213 efx->msg_enable = debug;
2214 efx->state = STATE_INIT;
2215 efx->reset_pending = RESET_TYPE_NONE;
2216 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2218 efx->net_dev = net_dev;
2219 efx->rx_checksum_enabled = true;
2220 spin_lock_init(&efx->stats_lock);
2221 mutex_init(&efx->mac_lock);
2222 efx->mac_op = type->default_mac_ops;
2223 efx->phy_op = &efx_dummy_phy_operations;
2224 efx->mdio.dev = net_dev;
2225 INIT_WORK(&efx->mac_work, efx_mac_work);
2227 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2228 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2229 if (!efx->channel[i])
2235 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2237 /* Higher numbered interrupt modes are less capable! */
2238 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2241 /* Would be good to use the net_dev name, but we're too early */
2242 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2244 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2245 if (!efx->workqueue)
2251 efx_fini_struct(efx);
2255 static void efx_fini_struct(struct efx_nic *efx)
2259 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2260 kfree(efx->channel[i]);
2262 if (efx->workqueue) {
2263 destroy_workqueue(efx->workqueue);
2264 efx->workqueue = NULL;
2268 /**************************************************************************
2272 **************************************************************************/
2274 /* Main body of final NIC shutdown code
2275 * This is called only at module unload (or hotplug removal).
2277 static void efx_pci_remove_main(struct efx_nic *efx)
2279 efx_nic_fini_interrupt(efx);
2280 efx_fini_channels(efx);
2282 efx->type->fini(efx);
2284 efx_remove_all(efx);
2287 /* Final NIC shutdown
2288 * This is called only at module unload (or hotplug removal).
2290 static void efx_pci_remove(struct pci_dev *pci_dev)
2292 struct efx_nic *efx;
2294 efx = pci_get_drvdata(pci_dev);
2298 /* Mark the NIC as fini, then stop the interface */
2300 efx->state = STATE_FINI;
2301 dev_close(efx->net_dev);
2303 /* Allow any queued efx_resets() to complete */
2306 efx_unregister_netdev(efx);
2308 efx_mtd_remove(efx);
2310 /* Wait for any scheduled resets to complete. No more will be
2311 * scheduled from this point because efx_stop_all() has been
2312 * called, we are no longer registered with driverlink, and
2313 * the net_device's have been removed. */
2314 cancel_work_sync(&efx->reset_work);
2316 efx_pci_remove_main(efx);
2319 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2321 pci_set_drvdata(pci_dev, NULL);
2322 efx_fini_struct(efx);
2323 free_netdev(efx->net_dev);
2326 /* Main body of NIC initialisation
2327 * This is called at module load (or hotplug insertion, theoretically).
2329 static int efx_pci_probe_main(struct efx_nic *efx)
2333 /* Do start-of-day initialisation */
2334 rc = efx_probe_all(efx);
2338 rc = efx_init_napi(efx);
2342 rc = efx->type->init(efx);
2344 netif_err(efx, probe, efx->net_dev,
2345 "failed to initialise NIC\n");
2349 rc = efx_init_port(efx);
2351 netif_err(efx, probe, efx->net_dev,
2352 "failed to initialise port\n");
2356 efx_init_channels(efx);
2358 rc = efx_nic_init_interrupt(efx);
2365 efx_fini_channels(efx);
2368 efx->type->fini(efx);
2372 efx_remove_all(efx);
2377 /* NIC initialisation
2379 * This is called at module load (or hotplug insertion,
2380 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2381 * sets up and registers the network devices with the kernel and hooks
2382 * the interrupt service routine. It does not prepare the device for
2383 * transmission; this is left to the first time one of the network
2384 * interfaces is brought up (i.e. efx_net_open).
2386 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2387 const struct pci_device_id *entry)
2389 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2390 struct net_device *net_dev;
2391 struct efx_nic *efx;
2394 /* Allocate and initialise a struct net_device and struct efx_nic */
2395 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2398 net_dev->features |= (type->offload_features | NETIF_F_SG |
2399 NETIF_F_HIGHDMA | NETIF_F_TSO |
2401 if (type->offload_features & NETIF_F_V6_CSUM)
2402 net_dev->features |= NETIF_F_TSO6;
2403 /* Mask for features that also apply to VLAN devices */
2404 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2405 NETIF_F_HIGHDMA | NETIF_F_TSO);
2406 efx = netdev_priv(net_dev);
2407 pci_set_drvdata(pci_dev, efx);
2408 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2409 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2413 netif_info(efx, probe, efx->net_dev,
2414 "Solarflare Communications NIC detected\n");
2416 /* Set up basic I/O (BAR mappings etc) */
2417 rc = efx_init_io(efx);
2421 /* No serialisation is required with the reset path because
2422 * we're in STATE_INIT. */
2423 for (i = 0; i < 5; i++) {
2424 rc = efx_pci_probe_main(efx);
2426 /* Serialise against efx_reset(). No more resets will be
2427 * scheduled since efx_stop_all() has been called, and we
2428 * have not and never have been registered with either
2429 * the rtnetlink or driverlink layers. */
2430 cancel_work_sync(&efx->reset_work);
2433 if (efx->reset_pending != RESET_TYPE_NONE) {
2434 /* If there was a scheduled reset during
2435 * probe, the NIC is probably hosed anyway */
2436 efx_pci_remove_main(efx);
2443 /* Retry if a recoverably reset event has been scheduled */
2444 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2445 (efx->reset_pending != RESET_TYPE_ALL))
2448 efx->reset_pending = RESET_TYPE_NONE;
2452 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2456 /* Switch to the running state before we expose the device to the OS,
2457 * so that dev_open()|efx_start_all() will actually start the device */
2458 efx->state = STATE_RUNNING;
2460 rc = efx_register_netdev(efx);
2464 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2467 efx_mtd_probe(efx); /* allowed to fail */
2472 efx_pci_remove_main(efx);
2477 efx_fini_struct(efx);
2480 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2481 free_netdev(net_dev);
2485 static int efx_pm_freeze(struct device *dev)
2487 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2489 efx->state = STATE_FINI;
2491 netif_device_detach(efx->net_dev);
2494 efx_fini_channels(efx);
2499 static int efx_pm_thaw(struct device *dev)
2501 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2503 efx->state = STATE_INIT;
2505 efx_init_channels(efx);
2507 mutex_lock(&efx->mac_lock);
2508 efx->phy_op->reconfigure(efx);
2509 mutex_unlock(&efx->mac_lock);
2513 netif_device_attach(efx->net_dev);
2515 efx->state = STATE_RUNNING;
2517 efx->type->resume_wol(efx);
2519 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2520 queue_work(reset_workqueue, &efx->reset_work);
2525 static int efx_pm_poweroff(struct device *dev)
2527 struct pci_dev *pci_dev = to_pci_dev(dev);
2528 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2530 efx->type->fini(efx);
2532 efx->reset_pending = RESET_TYPE_NONE;
2534 pci_save_state(pci_dev);
2535 return pci_set_power_state(pci_dev, PCI_D3hot);
2538 /* Used for both resume and restore */
2539 static int efx_pm_resume(struct device *dev)
2541 struct pci_dev *pci_dev = to_pci_dev(dev);
2542 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2545 rc = pci_set_power_state(pci_dev, PCI_D0);
2548 pci_restore_state(pci_dev);
2549 rc = pci_enable_device(pci_dev);
2552 pci_set_master(efx->pci_dev);
2553 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2556 rc = efx->type->init(efx);
2563 static int efx_pm_suspend(struct device *dev)
2568 rc = efx_pm_poweroff(dev);
2574 static struct dev_pm_ops efx_pm_ops = {
2575 .suspend = efx_pm_suspend,
2576 .resume = efx_pm_resume,
2577 .freeze = efx_pm_freeze,
2578 .thaw = efx_pm_thaw,
2579 .poweroff = efx_pm_poweroff,
2580 .restore = efx_pm_resume,
2583 static struct pci_driver efx_pci_driver = {
2584 .name = KBUILD_MODNAME,
2585 .id_table = efx_pci_table,
2586 .probe = efx_pci_probe,
2587 .remove = efx_pci_remove,
2588 .driver.pm = &efx_pm_ops,
2591 /**************************************************************************
2593 * Kernel module interface
2595 *************************************************************************/
2597 module_param(interrupt_mode, uint, 0444);
2598 MODULE_PARM_DESC(interrupt_mode,
2599 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2601 static int __init efx_init_module(void)
2605 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2607 rc = register_netdevice_notifier(&efx_netdev_notifier);
2611 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2612 if (!reset_workqueue) {
2617 rc = pci_register_driver(&efx_pci_driver);
2624 destroy_workqueue(reset_workqueue);
2626 unregister_netdevice_notifier(&efx_netdev_notifier);
2631 static void __exit efx_exit_module(void)
2633 printk(KERN_INFO "Solarflare NET driver unloading\n");
2635 pci_unregister_driver(&efx_pci_driver);
2636 destroy_workqueue(reset_workqueue);
2637 unregister_netdevice_notifier(&efx_netdev_notifier);
2641 module_init(efx_init_module);
2642 module_exit(efx_exit_module);
2644 MODULE_AUTHOR("Solarflare Communications and "
2645 "Michael Brown <mbrown@fensystems.co.uk>");
2646 MODULE_DESCRIPTION("Solarflare Communications network driver");
2647 MODULE_LICENSE("GPL");
2648 MODULE_DEVICE_TABLE(pci, efx_pci_table);