1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
28 /**************************************************************************
32 **************************************************************************
35 /* Loopback mode names (see LOOPBACK_MODE()) */
36 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
37 const char *efx_loopback_mode_names[] = {
38 [LOOPBACK_NONE] = "NONE",
39 [LOOPBACK_GMAC] = "GMAC",
40 [LOOPBACK_XGMII] = "XGMII",
41 [LOOPBACK_XGXS] = "XGXS",
42 [LOOPBACK_XAUI] = "XAUI",
43 [LOOPBACK_GPHY] = "GPHY",
44 [LOOPBACK_PHYXS] = "PHYXS",
45 [LOOPBACK_PCS] = "PCS",
46 [LOOPBACK_PMAPMD] = "PMA/PMD",
47 [LOOPBACK_NETWORK] = "NETWORK",
50 /* Interrupt mode names (see INT_MODE())) */
51 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
52 const char *efx_interrupt_mode_names[] = {
53 [EFX_INT_MODE_MSIX] = "MSI-X",
54 [EFX_INT_MODE_MSI] = "MSI",
55 [EFX_INT_MODE_LEGACY] = "legacy",
58 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
59 const char *efx_reset_type_names[] = {
60 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
61 [RESET_TYPE_ALL] = "ALL",
62 [RESET_TYPE_WORLD] = "WORLD",
63 [RESET_TYPE_DISABLE] = "DISABLE",
64 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
65 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
66 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
67 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
68 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
69 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
72 #define EFX_MAX_MTU (9 * 1024)
74 /* RX slow fill workqueue. If memory allocation fails in the fast path,
75 * a work item is pushed onto this work queue to retry the allocation later,
76 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
77 * workqueue, there is nothing to be gained in making it per NIC
79 static struct workqueue_struct *refill_workqueue;
81 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
82 * queued onto this work queue. This is not a per-nic work queue, because
83 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
85 static struct workqueue_struct *reset_workqueue;
87 /**************************************************************************
91 *************************************************************************/
94 * Use separate channels for TX and RX events
96 * Set this to 1 to use separate channels for TX and RX. It allows us
97 * to control interrupt affinity separately for TX and RX.
99 * This is only used in MSI-X interrupt mode
101 static unsigned int separate_tx_channels;
102 module_param(separate_tx_channels, uint, 0644);
103 MODULE_PARM_DESC(separate_tx_channels,
104 "Use separate channels for TX and RX");
106 /* This is the weight assigned to each of the (per-channel) virtual
109 static int napi_weight = 64;
111 /* This is the time (in jiffies) between invocations of the hardware
112 * monitor, which checks for known hardware bugs and resets the
113 * hardware and driver as necessary.
115 unsigned int efx_monitor_interval = 1 * HZ;
117 /* This controls whether or not the driver will initialise devices
118 * with invalid MAC addresses stored in the EEPROM or flash. If true,
119 * such devices will be initialised with a random locally-generated
120 * MAC address. This allows for loading the sfc_mtd driver to
121 * reprogram the flash, even if the flash contents (including the MAC
122 * address) have previously been erased.
124 static unsigned int allow_bad_hwaddr;
126 /* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
132 static unsigned int rx_irq_mod_usec = 60;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
143 static unsigned int tx_irq_mod_usec = 150;
145 /* This is the first interrupt mode to try out of:
150 static unsigned int interrupt_mode;
152 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each package (level II cache)
159 static unsigned int rss_cpus;
160 module_param(rss_cpus, uint, 0444);
161 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
163 static int phy_flash_cfg;
164 module_param(phy_flash_cfg, int, 0644);
165 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
167 static unsigned irq_adapt_low_thresh = 10000;
168 module_param(irq_adapt_low_thresh, uint, 0644);
169 MODULE_PARM_DESC(irq_adapt_low_thresh,
170 "Threshold score for reducing IRQ moderation");
172 static unsigned irq_adapt_high_thresh = 20000;
173 module_param(irq_adapt_high_thresh, uint, 0644);
174 MODULE_PARM_DESC(irq_adapt_high_thresh,
175 "Threshold score for increasing IRQ moderation");
177 /**************************************************************************
179 * Utility functions and prototypes
181 *************************************************************************/
182 static void efx_remove_channel(struct efx_channel *channel);
183 static void efx_remove_port(struct efx_nic *efx);
184 static void efx_fini_napi(struct efx_nic *efx);
185 static void efx_fini_channels(struct efx_nic *efx);
187 #define EFX_ASSERT_RESET_SERIALISED(efx) \
189 if ((efx->state == STATE_RUNNING) || \
190 (efx->state == STATE_DISABLED)) \
194 /**************************************************************************
196 * Event queue processing
198 *************************************************************************/
200 /* Process channel's event queue
202 * This function is responsible for processing the event queue of a
203 * single channel. The caller must guarantee that this function will
204 * never be concurrently called more than once on the same channel,
205 * though different channels may be being processed concurrently.
207 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
209 struct efx_nic *efx = channel->efx;
212 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
216 rx_packets = falcon_process_eventq(channel, rx_quota);
220 /* Deliver last RX packet. */
221 if (channel->rx_pkt) {
222 __efx_rx_packet(channel, channel->rx_pkt,
223 channel->rx_pkt_csummed);
224 channel->rx_pkt = NULL;
227 efx_rx_strategy(channel);
229 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
234 /* Mark channel as finished processing
236 * Note that since we will not receive further interrupts for this
237 * channel before we finish processing and call the eventq_read_ack()
238 * method, there is no need to use the interrupt hold-off timers.
240 static inline void efx_channel_processed(struct efx_channel *channel)
242 /* The interrupt handler for this channel may set work_pending
243 * as soon as we acknowledge the events we've seen. Make sure
244 * it's cleared before then. */
245 channel->work_pending = false;
248 falcon_eventq_read_ack(channel);
253 * NAPI guarantees serialisation of polls of the same device, which
254 * provides the guarantee required by efx_process_channel().
256 static int efx_poll(struct napi_struct *napi, int budget)
258 struct efx_channel *channel =
259 container_of(napi, struct efx_channel, napi_str);
262 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
263 channel->channel, raw_smp_processor_id());
265 rx_packets = efx_process_channel(channel, budget);
267 if (rx_packets < budget) {
268 struct efx_nic *efx = channel->efx;
270 if (channel->used_flags & EFX_USED_BY_RX &&
271 efx->irq_rx_adaptive &&
272 unlikely(++channel->irq_count == 1000)) {
273 if (unlikely(channel->irq_mod_score <
274 irq_adapt_low_thresh)) {
275 if (channel->irq_moderation > 1) {
276 channel->irq_moderation -= 1;
277 falcon_set_int_moderation(channel);
279 } else if (unlikely(channel->irq_mod_score >
280 irq_adapt_high_thresh)) {
281 if (channel->irq_moderation <
282 efx->irq_rx_moderation) {
283 channel->irq_moderation += 1;
284 falcon_set_int_moderation(channel);
287 channel->irq_count = 0;
288 channel->irq_mod_score = 0;
291 /* There is no race here; although napi_disable() will
292 * only wait for napi_complete(), this isn't a problem
293 * since efx_channel_processed() will have no effect if
294 * interrupts have already been disabled.
297 efx_channel_processed(channel);
303 /* Process the eventq of the specified channel immediately on this CPU
305 * Disable hardware generated interrupts, wait for any existing
306 * processing to finish, then directly poll (and ack ) the eventq.
307 * Finally reenable NAPI and interrupts.
309 * Since we are touching interrupts the caller should hold the suspend lock
311 void efx_process_channel_now(struct efx_channel *channel)
313 struct efx_nic *efx = channel->efx;
315 BUG_ON(!channel->used_flags);
316 BUG_ON(!channel->enabled);
318 /* Disable interrupts and wait for ISRs to complete */
319 falcon_disable_interrupts(efx);
321 synchronize_irq(efx->legacy_irq);
323 synchronize_irq(channel->irq);
325 /* Wait for any NAPI processing to complete */
326 napi_disable(&channel->napi_str);
328 /* Poll the channel */
329 efx_process_channel(channel, EFX_EVQ_SIZE);
331 /* Ack the eventq. This may cause an interrupt to be generated
332 * when they are reenabled */
333 efx_channel_processed(channel);
335 napi_enable(&channel->napi_str);
336 falcon_enable_interrupts(efx);
339 /* Create event queue
340 * Event queue memory allocations are done only once. If the channel
341 * is reset, the memory buffer will be reused; this guards against
342 * errors during channel reset and also simplifies interrupt handling.
344 static int efx_probe_eventq(struct efx_channel *channel)
346 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
348 return falcon_probe_eventq(channel);
351 /* Prepare channel's event queue */
352 static void efx_init_eventq(struct efx_channel *channel)
354 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
356 channel->eventq_read_ptr = 0;
358 falcon_init_eventq(channel);
361 static void efx_fini_eventq(struct efx_channel *channel)
363 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
365 falcon_fini_eventq(channel);
368 static void efx_remove_eventq(struct efx_channel *channel)
370 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
372 falcon_remove_eventq(channel);
375 /**************************************************************************
379 *************************************************************************/
381 static int efx_probe_channel(struct efx_channel *channel)
383 struct efx_tx_queue *tx_queue;
384 struct efx_rx_queue *rx_queue;
387 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
389 rc = efx_probe_eventq(channel);
393 efx_for_each_channel_tx_queue(tx_queue, channel) {
394 rc = efx_probe_tx_queue(tx_queue);
399 efx_for_each_channel_rx_queue(rx_queue, channel) {
400 rc = efx_probe_rx_queue(rx_queue);
405 channel->n_rx_frm_trunc = 0;
410 efx_for_each_channel_rx_queue(rx_queue, channel)
411 efx_remove_rx_queue(rx_queue);
413 efx_for_each_channel_tx_queue(tx_queue, channel)
414 efx_remove_tx_queue(tx_queue);
420 static void efx_set_channel_names(struct efx_nic *efx)
422 struct efx_channel *channel;
423 const char *type = "";
426 efx_for_each_channel(channel, efx) {
427 number = channel->channel;
428 if (efx->n_channels > efx->n_rx_queues) {
429 if (channel->channel < efx->n_rx_queues) {
433 number -= efx->n_rx_queues;
436 snprintf(channel->name, sizeof(channel->name),
437 "%s%s-%d", efx->name, type, number);
441 /* Channels are shutdown and reinitialised whilst the NIC is running
442 * to propagate configuration changes (mtu, checksum offload), or
443 * to clear hardware error conditions
445 static void efx_init_channels(struct efx_nic *efx)
447 struct efx_tx_queue *tx_queue;
448 struct efx_rx_queue *rx_queue;
449 struct efx_channel *channel;
451 /* Calculate the rx buffer allocation parameters required to
452 * support the current MTU, including padding for header
453 * alignment and overruns.
455 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
456 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
457 efx->type->rx_buffer_padding);
458 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
460 /* Initialise the channels */
461 efx_for_each_channel(channel, efx) {
462 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
464 efx_init_eventq(channel);
466 efx_for_each_channel_tx_queue(tx_queue, channel)
467 efx_init_tx_queue(tx_queue);
469 /* The rx buffer allocation strategy is MTU dependent */
470 efx_rx_strategy(channel);
472 efx_for_each_channel_rx_queue(rx_queue, channel)
473 efx_init_rx_queue(rx_queue);
475 WARN_ON(channel->rx_pkt != NULL);
476 efx_rx_strategy(channel);
480 /* This enables event queue processing and packet transmission.
482 * Note that this function is not allowed to fail, since that would
483 * introduce too much complexity into the suspend/resume path.
485 static void efx_start_channel(struct efx_channel *channel)
487 struct efx_rx_queue *rx_queue;
489 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
491 /* The interrupt handler for this channel may set work_pending
492 * as soon as we enable it. Make sure it's cleared before
493 * then. Similarly, make sure it sees the enabled flag set. */
494 channel->work_pending = false;
495 channel->enabled = true;
498 napi_enable(&channel->napi_str);
500 /* Load up RX descriptors */
501 efx_for_each_channel_rx_queue(rx_queue, channel)
502 efx_fast_push_rx_descriptors(rx_queue);
505 /* This disables event queue processing and packet transmission.
506 * This function does not guarantee that all queue processing
507 * (e.g. RX refill) is complete.
509 static void efx_stop_channel(struct efx_channel *channel)
511 struct efx_rx_queue *rx_queue;
513 if (!channel->enabled)
516 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
518 channel->enabled = false;
519 napi_disable(&channel->napi_str);
521 /* Ensure that any worker threads have exited or will be no-ops */
522 efx_for_each_channel_rx_queue(rx_queue, channel) {
523 spin_lock_bh(&rx_queue->add_lock);
524 spin_unlock_bh(&rx_queue->add_lock);
528 static void efx_fini_channels(struct efx_nic *efx)
530 struct efx_channel *channel;
531 struct efx_tx_queue *tx_queue;
532 struct efx_rx_queue *rx_queue;
535 EFX_ASSERT_RESET_SERIALISED(efx);
536 BUG_ON(efx->port_enabled);
538 rc = falcon_flush_queues(efx);
540 EFX_ERR(efx, "failed to flush queues\n");
542 EFX_LOG(efx, "successfully flushed all queues\n");
544 efx_for_each_channel(channel, efx) {
545 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
547 efx_for_each_channel_rx_queue(rx_queue, channel)
548 efx_fini_rx_queue(rx_queue);
549 efx_for_each_channel_tx_queue(tx_queue, channel)
550 efx_fini_tx_queue(tx_queue);
551 efx_fini_eventq(channel);
555 static void efx_remove_channel(struct efx_channel *channel)
557 struct efx_tx_queue *tx_queue;
558 struct efx_rx_queue *rx_queue;
560 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
562 efx_for_each_channel_rx_queue(rx_queue, channel)
563 efx_remove_rx_queue(rx_queue);
564 efx_for_each_channel_tx_queue(tx_queue, channel)
565 efx_remove_tx_queue(tx_queue);
566 efx_remove_eventq(channel);
568 channel->used_flags = 0;
571 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
573 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
576 /**************************************************************************
580 **************************************************************************/
582 /* This ensures that the kernel is kept informed (via
583 * netif_carrier_on/off) of the link status, and also maintains the
584 * link status's stop on the port's TX queue.
586 static void efx_link_status_changed(struct efx_nic *efx)
588 struct efx_link_state *link_state = &efx->link_state;
590 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
591 * that no events are triggered between unregister_netdev() and the
592 * driver unloading. A more general condition is that NETDEV_CHANGE
593 * can only be generated between NETDEV_UP and NETDEV_DOWN */
594 if (!netif_running(efx->net_dev))
597 if (efx->port_inhibited) {
598 netif_carrier_off(efx->net_dev);
602 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
603 efx->n_link_state_changes++;
606 netif_carrier_on(efx->net_dev);
608 netif_carrier_off(efx->net_dev);
611 /* Status message for kernel log */
612 if (link_state->up) {
613 EFX_INFO(efx, "link up at %uMbps %s-duplex (MTU %d)%s\n",
614 link_state->speed, link_state->fd ? "full" : "half",
616 (efx->promiscuous ? " [PROMISC]" : ""));
618 EFX_INFO(efx, "link down\n");
623 static void efx_fini_port(struct efx_nic *efx);
625 /* This call reinitialises the MAC to pick up new PHY settings. The
626 * caller must hold the mac_lock */
627 void __efx_reconfigure_port(struct efx_nic *efx)
629 WARN_ON(!mutex_is_locked(&efx->mac_lock));
631 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
632 raw_smp_processor_id());
634 /* Serialise the promiscuous flag with efx_set_multicast_list. */
635 if (efx_dev_registered(efx)) {
636 netif_addr_lock_bh(efx->net_dev);
637 netif_addr_unlock_bh(efx->net_dev);
640 falcon_deconfigure_mac_wrapper(efx);
642 /* Reconfigure the PHY, disabling transmit in mac level loopback. */
643 if (LOOPBACK_INTERNAL(efx))
644 efx->phy_mode |= PHY_MODE_TX_DISABLED;
646 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
647 efx->phy_op->reconfigure(efx);
649 if (falcon_switch_mac(efx))
652 efx->mac_op->reconfigure(efx);
654 /* Inform kernel of loss/gain of carrier */
655 efx_link_status_changed(efx);
659 EFX_ERR(efx, "failed to reconfigure MAC\n");
660 efx->port_enabled = false;
664 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
666 void efx_reconfigure_port(struct efx_nic *efx)
668 EFX_ASSERT_RESET_SERIALISED(efx);
670 mutex_lock(&efx->mac_lock);
671 __efx_reconfigure_port(efx);
672 mutex_unlock(&efx->mac_lock);
675 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
676 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
677 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
678 static void efx_phy_work(struct work_struct *data)
680 struct efx_nic *efx = container_of(data, struct efx_nic, phy_work);
682 mutex_lock(&efx->mac_lock);
683 if (efx->port_enabled)
684 __efx_reconfigure_port(efx);
685 mutex_unlock(&efx->mac_lock);
688 static void efx_mac_work(struct work_struct *data)
690 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
692 mutex_lock(&efx->mac_lock);
693 if (efx->port_enabled)
694 efx->mac_op->irq(efx);
695 mutex_unlock(&efx->mac_lock);
698 static int efx_probe_port(struct efx_nic *efx)
702 EFX_LOG(efx, "create port\n");
704 /* Connect up MAC/PHY operations table and read MAC address */
705 rc = falcon_probe_port(efx);
710 efx->phy_mode = PHY_MODE_SPECIAL;
712 /* Sanity check MAC address */
713 if (is_valid_ether_addr(efx->mac_address)) {
714 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
716 EFX_ERR(efx, "invalid MAC address %pM\n",
718 if (!allow_bad_hwaddr) {
722 random_ether_addr(efx->net_dev->dev_addr);
723 EFX_INFO(efx, "using locally-generated MAC %pM\n",
724 efx->net_dev->dev_addr);
730 efx_remove_port(efx);
734 static int efx_init_port(struct efx_nic *efx)
738 EFX_LOG(efx, "init port\n");
740 mutex_lock(&efx->mac_lock);
742 rc = efx->phy_op->init(efx);
745 efx->phy_op->reconfigure(efx);
746 rc = falcon_switch_mac(efx);
749 efx->mac_op->reconfigure(efx);
751 efx->port_initialized = true;
752 efx_stats_enable(efx);
754 mutex_unlock(&efx->mac_lock);
758 efx->phy_op->fini(efx);
760 mutex_unlock(&efx->mac_lock);
764 /* Allow efx_reconfigure_port() to be scheduled, and close the window
765 * between efx_stop_port and efx_flush_all whereby a previously scheduled
766 * efx_phy_work()/efx_mac_work() may have been cancelled */
767 static void efx_start_port(struct efx_nic *efx)
769 EFX_LOG(efx, "start port\n");
770 BUG_ON(efx->port_enabled);
772 mutex_lock(&efx->mac_lock);
773 efx->port_enabled = true;
774 __efx_reconfigure_port(efx);
775 efx->mac_op->irq(efx);
776 mutex_unlock(&efx->mac_lock);
779 /* Prevent efx_phy_work, efx_mac_work, and efx_monitor() from executing,
780 * and efx_set_multicast_list() from scheduling efx_phy_work. efx_phy_work
781 * and efx_mac_work may still be scheduled via NAPI processing until
782 * efx_flush_all() is called */
783 static void efx_stop_port(struct efx_nic *efx)
785 EFX_LOG(efx, "stop port\n");
787 mutex_lock(&efx->mac_lock);
788 efx->port_enabled = false;
789 mutex_unlock(&efx->mac_lock);
791 /* Serialise against efx_set_multicast_list() */
792 if (efx_dev_registered(efx)) {
793 netif_addr_lock_bh(efx->net_dev);
794 netif_addr_unlock_bh(efx->net_dev);
798 static void efx_fini_port(struct efx_nic *efx)
800 EFX_LOG(efx, "shut down port\n");
802 if (!efx->port_initialized)
805 efx_stats_disable(efx);
806 efx->phy_op->fini(efx);
807 efx->port_initialized = false;
809 efx->link_state.up = false;
810 efx_link_status_changed(efx);
813 static void efx_remove_port(struct efx_nic *efx)
815 EFX_LOG(efx, "destroying port\n");
817 falcon_remove_port(efx);
820 /**************************************************************************
824 **************************************************************************/
826 /* This configures the PCI device to enable I/O and DMA. */
827 static int efx_init_io(struct efx_nic *efx)
829 struct pci_dev *pci_dev = efx->pci_dev;
830 dma_addr_t dma_mask = efx->type->max_dma_mask;
833 EFX_LOG(efx, "initialising I/O\n");
835 rc = pci_enable_device(pci_dev);
837 EFX_ERR(efx, "failed to enable PCI device\n");
841 pci_set_master(pci_dev);
843 /* Set the PCI DMA mask. Try all possibilities from our
844 * genuine mask down to 32 bits, because some architectures
845 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
846 * masks event though they reject 46 bit masks.
848 while (dma_mask > 0x7fffffffUL) {
849 if (pci_dma_supported(pci_dev, dma_mask) &&
850 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
855 EFX_ERR(efx, "could not find a suitable DMA mask\n");
858 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
859 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
861 /* pci_set_consistent_dma_mask() is not *allowed* to
862 * fail with a mask that pci_set_dma_mask() accepted,
863 * but just in case...
865 EFX_ERR(efx, "failed to set consistent DMA mask\n");
869 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
870 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
872 EFX_ERR(efx, "request for memory BAR failed\n");
876 efx->membase = ioremap_nocache(efx->membase_phys,
877 efx->type->mem_map_size);
879 EFX_ERR(efx, "could not map memory BAR at %llx+%x\n",
880 (unsigned long long)efx->membase_phys,
881 efx->type->mem_map_size);
885 EFX_LOG(efx, "memory BAR at %llx+%x (virtual %p)\n",
886 (unsigned long long)efx->membase_phys,
887 efx->type->mem_map_size, efx->membase);
892 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
894 efx->membase_phys = 0;
896 pci_disable_device(efx->pci_dev);
901 static void efx_fini_io(struct efx_nic *efx)
903 EFX_LOG(efx, "shutting down I/O\n");
906 iounmap(efx->membase);
910 if (efx->membase_phys) {
911 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
912 efx->membase_phys = 0;
915 pci_disable_device(efx->pci_dev);
918 /* Get number of RX queues wanted. Return number of online CPU
919 * packages in the expectation that an IRQ balancer will spread
920 * interrupts across them. */
921 static int efx_wanted_rx_queues(void)
923 cpumask_var_t core_mask;
927 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
929 "sfc: RSS disabled due to allocation failure\n");
934 for_each_online_cpu(cpu) {
935 if (!cpumask_test_cpu(cpu, core_mask)) {
937 cpumask_or(core_mask, core_mask,
938 topology_core_cpumask(cpu));
942 free_cpumask_var(core_mask);
946 /* Probe the number and type of interrupts we are able to obtain, and
947 * the resulting numbers of channels and RX queues.
949 static void efx_probe_interrupts(struct efx_nic *efx)
952 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
955 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
956 struct msix_entry xentries[EFX_MAX_CHANNELS];
960 /* We want one RX queue and interrupt per CPU package
961 * (or as specified by the rss_cpus module parameter).
962 * We will need one channel per interrupt.
964 rx_queues = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
965 wanted_ints = rx_queues + (separate_tx_channels ? 1 : 0);
966 wanted_ints = min(wanted_ints, max_channels);
968 for (i = 0; i < wanted_ints; i++)
969 xentries[i].entry = i;
970 rc = pci_enable_msix(efx->pci_dev, xentries, wanted_ints);
972 EFX_ERR(efx, "WARNING: Insufficient MSI-X vectors"
973 " available (%d < %d).\n", rc, wanted_ints);
974 EFX_ERR(efx, "WARNING: Performance may be reduced.\n");
975 EFX_BUG_ON_PARANOID(rc >= wanted_ints);
977 rc = pci_enable_msix(efx->pci_dev, xentries,
982 efx->n_rx_queues = min(rx_queues, wanted_ints);
983 efx->n_channels = wanted_ints;
984 for (i = 0; i < wanted_ints; i++)
985 efx->channel[i].irq = xentries[i].vector;
987 /* Fall back to single channel MSI */
988 efx->interrupt_mode = EFX_INT_MODE_MSI;
989 EFX_ERR(efx, "could not enable MSI-X\n");
993 /* Try single interrupt MSI */
994 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
995 efx->n_rx_queues = 1;
997 rc = pci_enable_msi(efx->pci_dev);
999 efx->channel[0].irq = efx->pci_dev->irq;
1001 EFX_ERR(efx, "could not enable MSI\n");
1002 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1006 /* Assume legacy interrupts */
1007 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1008 efx->n_rx_queues = 1;
1009 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1010 efx->legacy_irq = efx->pci_dev->irq;
1014 static void efx_remove_interrupts(struct efx_nic *efx)
1016 struct efx_channel *channel;
1018 /* Remove MSI/MSI-X interrupts */
1019 efx_for_each_channel(channel, efx)
1021 pci_disable_msi(efx->pci_dev);
1022 pci_disable_msix(efx->pci_dev);
1024 /* Remove legacy interrupt */
1025 efx->legacy_irq = 0;
1028 static void efx_set_channels(struct efx_nic *efx)
1030 struct efx_tx_queue *tx_queue;
1031 struct efx_rx_queue *rx_queue;
1033 efx_for_each_tx_queue(tx_queue, efx) {
1034 if (separate_tx_channels)
1035 tx_queue->channel = &efx->channel[efx->n_channels-1];
1037 tx_queue->channel = &efx->channel[0];
1038 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
1041 efx_for_each_rx_queue(rx_queue, efx) {
1042 rx_queue->channel = &efx->channel[rx_queue->queue];
1043 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
1047 static int efx_probe_nic(struct efx_nic *efx)
1051 EFX_LOG(efx, "creating NIC\n");
1053 /* Carry out hardware-type specific initialisation */
1054 rc = falcon_probe_nic(efx);
1058 /* Determine the number of channels and RX queues by trying to hook
1059 * in MSI-X interrupts. */
1060 efx_probe_interrupts(efx);
1062 efx_set_channels(efx);
1064 /* Initialise the interrupt moderation settings */
1065 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1070 static void efx_remove_nic(struct efx_nic *efx)
1072 EFX_LOG(efx, "destroying NIC\n");
1074 efx_remove_interrupts(efx);
1075 falcon_remove_nic(efx);
1078 /**************************************************************************
1080 * NIC startup/shutdown
1082 *************************************************************************/
1084 static int efx_probe_all(struct efx_nic *efx)
1086 struct efx_channel *channel;
1090 rc = efx_probe_nic(efx);
1092 EFX_ERR(efx, "failed to create NIC\n");
1097 rc = efx_probe_port(efx);
1099 EFX_ERR(efx, "failed to create port\n");
1103 /* Create channels */
1104 efx_for_each_channel(channel, efx) {
1105 rc = efx_probe_channel(channel);
1107 EFX_ERR(efx, "failed to create channel %d\n",
1112 efx_set_channel_names(efx);
1117 efx_for_each_channel(channel, efx)
1118 efx_remove_channel(channel);
1119 efx_remove_port(efx);
1121 efx_remove_nic(efx);
1126 /* Called after previous invocation(s) of efx_stop_all, restarts the
1127 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1128 * and ensures that the port is scheduled to be reconfigured.
1129 * This function is safe to call multiple times when the NIC is in any
1131 static void efx_start_all(struct efx_nic *efx)
1133 struct efx_channel *channel;
1135 EFX_ASSERT_RESET_SERIALISED(efx);
1137 /* Check that it is appropriate to restart the interface. All
1138 * of these flags are safe to read under just the rtnl lock */
1139 if (efx->port_enabled)
1141 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1143 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1146 /* Mark the port as enabled so port reconfigurations can start, then
1147 * restart the transmit interface early so the watchdog timer stops */
1148 efx_start_port(efx);
1149 if (efx_dev_registered(efx))
1150 efx_wake_queue(efx);
1152 efx_for_each_channel(channel, efx)
1153 efx_start_channel(channel);
1155 falcon_enable_interrupts(efx);
1157 /* Start hardware monitor if we're in RUNNING */
1158 if (efx->state == STATE_RUNNING)
1159 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1160 efx_monitor_interval);
1163 /* Flush all delayed work. Should only be called when no more delayed work
1164 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1165 * since we're holding the rtnl_lock at this point. */
1166 static void efx_flush_all(struct efx_nic *efx)
1168 struct efx_rx_queue *rx_queue;
1170 /* Make sure the hardware monitor is stopped */
1171 cancel_delayed_work_sync(&efx->monitor_work);
1173 /* Ensure that all RX slow refills are complete. */
1174 efx_for_each_rx_queue(rx_queue, efx)
1175 cancel_delayed_work_sync(&rx_queue->work);
1177 /* Stop scheduled port reconfigurations */
1178 cancel_work_sync(&efx->mac_work);
1179 cancel_work_sync(&efx->phy_work);
1183 /* Quiesce hardware and software without bringing the link down.
1184 * Safe to call multiple times, when the nic and interface is in any
1185 * state. The caller is guaranteed to subsequently be in a position
1186 * to modify any hardware and software state they see fit without
1188 static void efx_stop_all(struct efx_nic *efx)
1190 struct efx_channel *channel;
1192 EFX_ASSERT_RESET_SERIALISED(efx);
1194 /* port_enabled can be read safely under the rtnl lock */
1195 if (!efx->port_enabled)
1198 /* Disable interrupts and wait for ISR to complete */
1199 falcon_disable_interrupts(efx);
1200 if (efx->legacy_irq)
1201 synchronize_irq(efx->legacy_irq);
1202 efx_for_each_channel(channel, efx) {
1204 synchronize_irq(channel->irq);
1207 /* Stop all NAPI processing and synchronous rx refills */
1208 efx_for_each_channel(channel, efx)
1209 efx_stop_channel(channel);
1211 /* Stop all asynchronous port reconfigurations. Since all
1212 * event processing has already been stopped, there is no
1213 * window to loose phy events */
1216 /* Flush efx_phy_work, efx_mac_work, refill_workqueue, monitor_work */
1219 /* Isolate the MAC from the TX and RX engines, so that queue
1220 * flushes will complete in a timely fashion. */
1221 falcon_deconfigure_mac_wrapper(efx);
1222 msleep(10); /* Let the Rx FIFO drain */
1223 falcon_drain_tx_fifo(efx);
1225 /* Stop the kernel transmit interface late, so the watchdog
1226 * timer isn't ticking over the flush */
1227 if (efx_dev_registered(efx)) {
1228 efx_stop_queue(efx);
1229 netif_tx_lock_bh(efx->net_dev);
1230 netif_tx_unlock_bh(efx->net_dev);
1234 static void efx_remove_all(struct efx_nic *efx)
1236 struct efx_channel *channel;
1238 efx_for_each_channel(channel, efx)
1239 efx_remove_channel(channel);
1240 efx_remove_port(efx);
1241 efx_remove_nic(efx);
1244 /**************************************************************************
1246 * Interrupt moderation
1248 **************************************************************************/
1250 static unsigned irq_mod_ticks(int usecs, int resolution)
1253 return 0; /* cannot receive interrupts ahead of time :-) */
1254 if (usecs < resolution)
1255 return 1; /* never round down to 0 */
1256 return usecs / resolution;
1259 /* Set interrupt moderation parameters */
1260 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1263 struct efx_tx_queue *tx_queue;
1264 struct efx_rx_queue *rx_queue;
1265 unsigned tx_ticks = irq_mod_ticks(tx_usecs, FALCON_IRQ_MOD_RESOLUTION);
1266 unsigned rx_ticks = irq_mod_ticks(rx_usecs, FALCON_IRQ_MOD_RESOLUTION);
1268 EFX_ASSERT_RESET_SERIALISED(efx);
1270 efx_for_each_tx_queue(tx_queue, efx)
1271 tx_queue->channel->irq_moderation = tx_ticks;
1273 efx->irq_rx_adaptive = rx_adaptive;
1274 efx->irq_rx_moderation = rx_ticks;
1275 efx_for_each_rx_queue(rx_queue, efx)
1276 rx_queue->channel->irq_moderation = rx_ticks;
1279 /**************************************************************************
1283 **************************************************************************/
1285 /* Run periodically off the general workqueue. Serialised against
1286 * efx_reconfigure_port via the mac_lock */
1287 static void efx_monitor(struct work_struct *data)
1289 struct efx_nic *efx = container_of(data, struct efx_nic,
1293 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1294 raw_smp_processor_id());
1296 /* If the mac_lock is already held then it is likely a port
1297 * reconfiguration is already in place, which will likely do
1298 * most of the work of check_hw() anyway. */
1299 if (!mutex_trylock(&efx->mac_lock))
1301 if (!efx->port_enabled)
1303 rc = falcon_board(efx)->type->monitor(efx);
1305 EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
1306 (rc == -ERANGE) ? "reported fault" : "failed");
1307 efx->phy_mode |= PHY_MODE_LOW_POWER;
1308 falcon_sim_phy_event(efx);
1310 efx->phy_op->poll(efx);
1311 efx->mac_op->poll(efx);
1314 mutex_unlock(&efx->mac_lock);
1316 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1317 efx_monitor_interval);
1320 /**************************************************************************
1324 *************************************************************************/
1327 * Context: process, rtnl_lock() held.
1329 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1331 struct efx_nic *efx = netdev_priv(net_dev);
1332 struct mii_ioctl_data *data = if_mii(ifr);
1334 EFX_ASSERT_RESET_SERIALISED(efx);
1336 /* Convert phy_id from older PRTAD/DEVAD format */
1337 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1338 (data->phy_id & 0xfc00) == 0x0400)
1339 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1341 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1344 /**************************************************************************
1348 **************************************************************************/
1350 static int efx_init_napi(struct efx_nic *efx)
1352 struct efx_channel *channel;
1354 efx_for_each_channel(channel, efx) {
1355 channel->napi_dev = efx->net_dev;
1356 netif_napi_add(channel->napi_dev, &channel->napi_str,
1357 efx_poll, napi_weight);
1362 static void efx_fini_napi(struct efx_nic *efx)
1364 struct efx_channel *channel;
1366 efx_for_each_channel(channel, efx) {
1367 if (channel->napi_dev)
1368 netif_napi_del(&channel->napi_str);
1369 channel->napi_dev = NULL;
1373 /**************************************************************************
1375 * Kernel netpoll interface
1377 *************************************************************************/
1379 #ifdef CONFIG_NET_POLL_CONTROLLER
1381 /* Although in the common case interrupts will be disabled, this is not
1382 * guaranteed. However, all our work happens inside the NAPI callback,
1383 * so no locking is required.
1385 static void efx_netpoll(struct net_device *net_dev)
1387 struct efx_nic *efx = netdev_priv(net_dev);
1388 struct efx_channel *channel;
1390 efx_for_each_channel(channel, efx)
1391 efx_schedule_channel(channel);
1396 /**************************************************************************
1398 * Kernel net device interface
1400 *************************************************************************/
1402 /* Context: process, rtnl_lock() held. */
1403 static int efx_net_open(struct net_device *net_dev)
1405 struct efx_nic *efx = netdev_priv(net_dev);
1406 EFX_ASSERT_RESET_SERIALISED(efx);
1408 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1409 raw_smp_processor_id());
1411 if (efx->state == STATE_DISABLED)
1413 if (efx->phy_mode & PHY_MODE_SPECIAL)
1420 /* Context: process, rtnl_lock() held.
1421 * Note that the kernel will ignore our return code; this method
1422 * should really be a void.
1424 static int efx_net_stop(struct net_device *net_dev)
1426 struct efx_nic *efx = netdev_priv(net_dev);
1428 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1429 raw_smp_processor_id());
1431 if (efx->state != STATE_DISABLED) {
1432 /* Stop the device and flush all the channels */
1434 efx_fini_channels(efx);
1435 efx_init_channels(efx);
1441 void efx_stats_disable(struct efx_nic *efx)
1443 spin_lock(&efx->stats_lock);
1444 ++efx->stats_disable_count;
1445 spin_unlock(&efx->stats_lock);
1448 void efx_stats_enable(struct efx_nic *efx)
1450 spin_lock(&efx->stats_lock);
1451 --efx->stats_disable_count;
1452 spin_unlock(&efx->stats_lock);
1455 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1456 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1458 struct efx_nic *efx = netdev_priv(net_dev);
1459 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1460 struct net_device_stats *stats = &net_dev->stats;
1462 /* Update stats if possible, but do not wait if another thread
1463 * is updating them or if MAC stats fetches are temporarily
1464 * disabled; slightly stale stats are acceptable.
1466 if (!spin_trylock(&efx->stats_lock))
1468 if (!efx->stats_disable_count) {
1469 efx->mac_op->update_stats(efx);
1470 falcon_update_nic_stats(efx);
1472 spin_unlock(&efx->stats_lock);
1474 stats->rx_packets = mac_stats->rx_packets;
1475 stats->tx_packets = mac_stats->tx_packets;
1476 stats->rx_bytes = mac_stats->rx_bytes;
1477 stats->tx_bytes = mac_stats->tx_bytes;
1478 stats->multicast = mac_stats->rx_multicast;
1479 stats->collisions = mac_stats->tx_collision;
1480 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1481 mac_stats->rx_length_error);
1482 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1483 stats->rx_crc_errors = mac_stats->rx_bad;
1484 stats->rx_frame_errors = mac_stats->rx_align_error;
1485 stats->rx_fifo_errors = mac_stats->rx_overflow;
1486 stats->rx_missed_errors = mac_stats->rx_missed;
1487 stats->tx_window_errors = mac_stats->tx_late_collision;
1489 stats->rx_errors = (stats->rx_length_errors +
1490 stats->rx_over_errors +
1491 stats->rx_crc_errors +
1492 stats->rx_frame_errors +
1493 stats->rx_fifo_errors +
1494 stats->rx_missed_errors +
1495 mac_stats->rx_symbol_error);
1496 stats->tx_errors = (stats->tx_window_errors +
1502 /* Context: netif_tx_lock held, BHs disabled. */
1503 static void efx_watchdog(struct net_device *net_dev)
1505 struct efx_nic *efx = netdev_priv(net_dev);
1507 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d:"
1508 " resetting channels\n",
1509 atomic_read(&efx->netif_stop_count), efx->port_enabled);
1511 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1515 /* Context: process, rtnl_lock() held. */
1516 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1518 struct efx_nic *efx = netdev_priv(net_dev);
1521 EFX_ASSERT_RESET_SERIALISED(efx);
1523 if (new_mtu > EFX_MAX_MTU)
1528 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1530 efx_fini_channels(efx);
1531 net_dev->mtu = new_mtu;
1532 efx_init_channels(efx);
1538 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1540 struct efx_nic *efx = netdev_priv(net_dev);
1541 struct sockaddr *addr = data;
1542 char *new_addr = addr->sa_data;
1544 EFX_ASSERT_RESET_SERIALISED(efx);
1546 if (!is_valid_ether_addr(new_addr)) {
1547 EFX_ERR(efx, "invalid ethernet MAC address requested: %pM\n",
1552 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1554 /* Reconfigure the MAC */
1555 efx_reconfigure_port(efx);
1560 /* Context: netif_addr_lock held, BHs disabled. */
1561 static void efx_set_multicast_list(struct net_device *net_dev)
1563 struct efx_nic *efx = netdev_priv(net_dev);
1564 struct dev_mc_list *mc_list = net_dev->mc_list;
1565 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1566 bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
1567 bool changed = (efx->promiscuous != promiscuous);
1572 efx->promiscuous = promiscuous;
1574 /* Build multicast hash table */
1575 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1576 memset(mc_hash, 0xff, sizeof(*mc_hash));
1578 memset(mc_hash, 0x00, sizeof(*mc_hash));
1579 for (i = 0; i < net_dev->mc_count; i++) {
1580 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1581 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1582 set_bit_le(bit, mc_hash->byte);
1583 mc_list = mc_list->next;
1587 if (!efx->port_enabled)
1588 /* Delay pushing settings until efx_start_port() */
1592 queue_work(efx->workqueue, &efx->phy_work);
1594 /* Create and activate new global multicast hash table */
1595 falcon_set_multicast_hash(efx);
1598 static const struct net_device_ops efx_netdev_ops = {
1599 .ndo_open = efx_net_open,
1600 .ndo_stop = efx_net_stop,
1601 .ndo_get_stats = efx_net_stats,
1602 .ndo_tx_timeout = efx_watchdog,
1603 .ndo_start_xmit = efx_hard_start_xmit,
1604 .ndo_validate_addr = eth_validate_addr,
1605 .ndo_do_ioctl = efx_ioctl,
1606 .ndo_change_mtu = efx_change_mtu,
1607 .ndo_set_mac_address = efx_set_mac_address,
1608 .ndo_set_multicast_list = efx_set_multicast_list,
1609 #ifdef CONFIG_NET_POLL_CONTROLLER
1610 .ndo_poll_controller = efx_netpoll,
1614 static void efx_update_name(struct efx_nic *efx)
1616 strcpy(efx->name, efx->net_dev->name);
1617 efx_mtd_rename(efx);
1618 efx_set_channel_names(efx);
1621 static int efx_netdev_event(struct notifier_block *this,
1622 unsigned long event, void *ptr)
1624 struct net_device *net_dev = ptr;
1626 if (net_dev->netdev_ops == &efx_netdev_ops &&
1627 event == NETDEV_CHANGENAME)
1628 efx_update_name(netdev_priv(net_dev));
1633 static struct notifier_block efx_netdev_notifier = {
1634 .notifier_call = efx_netdev_event,
1638 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1640 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1641 return sprintf(buf, "%d\n", efx->phy_type);
1643 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1645 static int efx_register_netdev(struct efx_nic *efx)
1647 struct net_device *net_dev = efx->net_dev;
1650 net_dev->watchdog_timeo = 5 * HZ;
1651 net_dev->irq = efx->pci_dev->irq;
1652 net_dev->netdev_ops = &efx_netdev_ops;
1653 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1654 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1656 /* Clear MAC statistics */
1657 efx->mac_op->update_stats(efx);
1658 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1662 rc = dev_alloc_name(net_dev, net_dev->name);
1665 efx_update_name(efx);
1667 rc = register_netdevice(net_dev);
1671 /* Always start with carrier off; PHY events will detect the link */
1672 netif_carrier_off(efx->net_dev);
1676 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1678 EFX_ERR(efx, "failed to init net dev attributes\n");
1679 goto fail_registered;
1686 EFX_ERR(efx, "could not register net dev\n");
1690 unregister_netdev(net_dev);
1694 static void efx_unregister_netdev(struct efx_nic *efx)
1696 struct efx_tx_queue *tx_queue;
1701 BUG_ON(netdev_priv(efx->net_dev) != efx);
1703 /* Free up any skbs still remaining. This has to happen before
1704 * we try to unregister the netdev as running their destructors
1705 * may be needed to get the device ref. count to 0. */
1706 efx_for_each_tx_queue(tx_queue, efx)
1707 efx_release_tx_buffers(tx_queue);
1709 if (efx_dev_registered(efx)) {
1710 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1711 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1712 unregister_netdev(efx->net_dev);
1716 /**************************************************************************
1718 * Device reset and suspend
1720 **************************************************************************/
1722 /* Tears down the entire software state and most of the hardware state
1724 void efx_reset_down(struct efx_nic *efx, enum reset_type method,
1725 struct ethtool_cmd *ecmd)
1727 EFX_ASSERT_RESET_SERIALISED(efx);
1729 efx_stats_disable(efx);
1731 mutex_lock(&efx->mac_lock);
1732 mutex_lock(&efx->spi_lock);
1734 efx->phy_op->get_settings(efx, ecmd);
1736 efx_fini_channels(efx);
1737 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1738 efx->phy_op->fini(efx);
1741 /* This function will always ensure that the locks acquired in
1742 * efx_reset_down() are released. A failure return code indicates
1743 * that we were unable to reinitialise the hardware, and the
1744 * driver should be disabled. If ok is false, then the rx and tx
1745 * engines are not restarted, pending a RESET_DISABLE. */
1746 int efx_reset_up(struct efx_nic *efx, enum reset_type method,
1747 struct ethtool_cmd *ecmd, bool ok)
1751 EFX_ASSERT_RESET_SERIALISED(efx);
1753 rc = falcon_init_nic(efx);
1755 EFX_ERR(efx, "failed to initialise NIC\n");
1759 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1761 rc = efx->phy_op->init(efx);
1766 efx->port_initialized = false;
1770 efx_init_channels(efx);
1772 if (efx->phy_op->set_settings(efx, ecmd))
1773 EFX_ERR(efx, "could not restore PHY settings\n");
1776 mutex_unlock(&efx->spi_lock);
1777 mutex_unlock(&efx->mac_lock);
1781 efx_stats_enable(efx);
1786 /* Reset the NIC as transparently as possible. Do not reset the PHY
1787 * Note that the reset may fail, in which case the card will be left
1788 * in a most-probably-unusable state.
1790 * This function will sleep. You cannot reset from within an atomic
1791 * state; use efx_schedule_reset() instead.
1793 * Grabs the rtnl_lock.
1795 static int efx_reset(struct efx_nic *efx)
1797 struct ethtool_cmd ecmd;
1798 enum reset_type method = efx->reset_pending;
1801 /* Serialise with kernel interfaces */
1804 /* If we're not RUNNING then don't reset. Leave the reset_pending
1805 * flag set so that efx_pci_probe_main will be retried */
1806 if (efx->state != STATE_RUNNING) {
1807 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1811 EFX_INFO(efx, "resetting (%s)\n", RESET_TYPE(method));
1813 efx_reset_down(efx, method, &ecmd);
1815 rc = falcon_reset_hw(efx, method);
1817 EFX_ERR(efx, "failed to reset hardware\n");
1821 /* Allow resets to be rescheduled. */
1822 efx->reset_pending = RESET_TYPE_NONE;
1824 /* Reinitialise bus-mastering, which may have been turned off before
1825 * the reset was scheduled. This is still appropriate, even in the
1826 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1827 * can respond to requests. */
1828 pci_set_master(efx->pci_dev);
1830 /* Leave device stopped if necessary */
1831 if (method == RESET_TYPE_DISABLE) {
1832 efx_reset_up(efx, method, &ecmd, false);
1835 rc = efx_reset_up(efx, method, &ecmd, true);
1840 EFX_ERR(efx, "has been disabled\n");
1841 efx->state = STATE_DISABLED;
1842 dev_close(efx->net_dev);
1844 EFX_LOG(efx, "reset complete\n");
1852 /* The worker thread exists so that code that cannot sleep can
1853 * schedule a reset for later.
1855 static void efx_reset_work(struct work_struct *data)
1857 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1862 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1864 enum reset_type method;
1866 if (efx->reset_pending != RESET_TYPE_NONE) {
1867 EFX_INFO(efx, "quenching already scheduled reset\n");
1872 case RESET_TYPE_INVISIBLE:
1873 case RESET_TYPE_ALL:
1874 case RESET_TYPE_WORLD:
1875 case RESET_TYPE_DISABLE:
1878 case RESET_TYPE_RX_RECOVERY:
1879 case RESET_TYPE_RX_DESC_FETCH:
1880 case RESET_TYPE_TX_DESC_FETCH:
1881 case RESET_TYPE_TX_SKIP:
1882 method = RESET_TYPE_INVISIBLE;
1885 method = RESET_TYPE_ALL;
1890 EFX_LOG(efx, "scheduling %s reset for %s\n",
1891 RESET_TYPE(method), RESET_TYPE(type));
1893 EFX_LOG(efx, "scheduling %s reset\n", RESET_TYPE(method));
1895 efx->reset_pending = method;
1897 queue_work(reset_workqueue, &efx->reset_work);
1900 /**************************************************************************
1902 * List of NICs we support
1904 **************************************************************************/
1906 /* PCI device ID table */
1907 static struct pci_device_id efx_pci_table[] __devinitdata = {
1908 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1909 .driver_data = (unsigned long) &falcon_a_nic_type},
1910 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1911 .driver_data = (unsigned long) &falcon_b_nic_type},
1912 {0} /* end of list */
1915 /**************************************************************************
1917 * Dummy PHY/MAC operations
1919 * Can be used for some unimplemented operations
1920 * Needed so all function pointers are valid and do not have to be tested
1923 **************************************************************************/
1924 int efx_port_dummy_op_int(struct efx_nic *efx)
1928 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1929 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1933 static struct efx_mac_operations efx_dummy_mac_operations = {
1934 .reconfigure = efx_port_dummy_op_void,
1935 .poll = efx_port_dummy_op_void,
1936 .irq = efx_port_dummy_op_void,
1939 static struct efx_phy_operations efx_dummy_phy_operations = {
1940 .init = efx_port_dummy_op_int,
1941 .reconfigure = efx_port_dummy_op_void,
1942 .poll = efx_port_dummy_op_void,
1943 .fini = efx_port_dummy_op_void,
1944 .clear_interrupt = efx_port_dummy_op_void,
1947 /**************************************************************************
1951 **************************************************************************/
1953 /* This zeroes out and then fills in the invariants in a struct
1954 * efx_nic (including all sub-structures).
1956 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1957 struct pci_dev *pci_dev, struct net_device *net_dev)
1959 struct efx_channel *channel;
1960 struct efx_tx_queue *tx_queue;
1961 struct efx_rx_queue *rx_queue;
1964 /* Initialise common structures */
1965 memset(efx, 0, sizeof(*efx));
1966 spin_lock_init(&efx->biu_lock);
1967 spin_lock_init(&efx->phy_lock);
1968 mutex_init(&efx->spi_lock);
1969 INIT_WORK(&efx->reset_work, efx_reset_work);
1970 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1971 efx->pci_dev = pci_dev;
1972 efx->state = STATE_INIT;
1973 efx->reset_pending = RESET_TYPE_NONE;
1974 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1976 efx->net_dev = net_dev;
1977 efx->rx_checksum_enabled = true;
1978 spin_lock_init(&efx->netif_stop_lock);
1979 spin_lock_init(&efx->stats_lock);
1980 efx->stats_disable_count = 1;
1981 mutex_init(&efx->mac_lock);
1982 efx->mac_op = &efx_dummy_mac_operations;
1983 efx->phy_op = &efx_dummy_phy_operations;
1984 efx->mdio.dev = net_dev;
1985 INIT_WORK(&efx->phy_work, efx_phy_work);
1986 INIT_WORK(&efx->mac_work, efx_mac_work);
1987 atomic_set(&efx->netif_stop_count, 1);
1989 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1990 channel = &efx->channel[i];
1992 channel->channel = i;
1993 channel->work_pending = false;
1995 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
1996 tx_queue = &efx->tx_queue[i];
1997 tx_queue->efx = efx;
1998 tx_queue->queue = i;
1999 tx_queue->buffer = NULL;
2000 tx_queue->channel = &efx->channel[0]; /* for safety */
2001 tx_queue->tso_headers_free = NULL;
2003 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
2004 rx_queue = &efx->rx_queue[i];
2005 rx_queue->efx = efx;
2006 rx_queue->queue = i;
2007 rx_queue->channel = &efx->channel[0]; /* for safety */
2008 rx_queue->buffer = NULL;
2009 spin_lock_init(&rx_queue->add_lock);
2010 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
2015 /* As close as we can get to guaranteeing that we don't overflow */
2016 BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
2018 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2020 /* Higher numbered interrupt modes are less capable! */
2021 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2024 /* Would be good to use the net_dev name, but we're too early */
2025 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2027 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2028 if (!efx->workqueue)
2034 static void efx_fini_struct(struct efx_nic *efx)
2036 if (efx->workqueue) {
2037 destroy_workqueue(efx->workqueue);
2038 efx->workqueue = NULL;
2042 /**************************************************************************
2046 **************************************************************************/
2048 /* Main body of final NIC shutdown code
2049 * This is called only at module unload (or hotplug removal).
2051 static void efx_pci_remove_main(struct efx_nic *efx)
2053 falcon_fini_interrupt(efx);
2054 efx_fini_channels(efx);
2057 efx_remove_all(efx);
2060 /* Final NIC shutdown
2061 * This is called only at module unload (or hotplug removal).
2063 static void efx_pci_remove(struct pci_dev *pci_dev)
2065 struct efx_nic *efx;
2067 efx = pci_get_drvdata(pci_dev);
2071 /* Mark the NIC as fini, then stop the interface */
2073 efx->state = STATE_FINI;
2074 dev_close(efx->net_dev);
2076 /* Allow any queued efx_resets() to complete */
2079 efx_unregister_netdev(efx);
2081 efx_mtd_remove(efx);
2083 /* Wait for any scheduled resets to complete. No more will be
2084 * scheduled from this point because efx_stop_all() has been
2085 * called, we are no longer registered with driverlink, and
2086 * the net_device's have been removed. */
2087 cancel_work_sync(&efx->reset_work);
2089 efx_pci_remove_main(efx);
2092 EFX_LOG(efx, "shutdown successful\n");
2094 pci_set_drvdata(pci_dev, NULL);
2095 efx_fini_struct(efx);
2096 free_netdev(efx->net_dev);
2099 /* Main body of NIC initialisation
2100 * This is called at module load (or hotplug insertion, theoretically).
2102 static int efx_pci_probe_main(struct efx_nic *efx)
2106 /* Do start-of-day initialisation */
2107 rc = efx_probe_all(efx);
2111 rc = efx_init_napi(efx);
2115 rc = falcon_init_nic(efx);
2117 EFX_ERR(efx, "failed to initialise NIC\n");
2121 rc = efx_init_port(efx);
2123 EFX_ERR(efx, "failed to initialise port\n");
2127 efx_init_channels(efx);
2129 rc = falcon_init_interrupt(efx);
2136 efx_fini_channels(efx);
2142 efx_remove_all(efx);
2147 /* NIC initialisation
2149 * This is called at module load (or hotplug insertion,
2150 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2151 * sets up and registers the network devices with the kernel and hooks
2152 * the interrupt service routine. It does not prepare the device for
2153 * transmission; this is left to the first time one of the network
2154 * interfaces is brought up (i.e. efx_net_open).
2156 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2157 const struct pci_device_id *entry)
2159 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2160 struct net_device *net_dev;
2161 struct efx_nic *efx;
2164 /* Allocate and initialise a struct net_device and struct efx_nic */
2165 net_dev = alloc_etherdev(sizeof(*efx));
2168 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2169 NETIF_F_HIGHDMA | NETIF_F_TSO |
2171 /* Mask for features that also apply to VLAN devices */
2172 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2173 NETIF_F_HIGHDMA | NETIF_F_TSO);
2174 efx = netdev_priv(net_dev);
2175 pci_set_drvdata(pci_dev, efx);
2176 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2180 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2182 /* Set up basic I/O (BAR mappings etc) */
2183 rc = efx_init_io(efx);
2187 /* No serialisation is required with the reset path because
2188 * we're in STATE_INIT. */
2189 for (i = 0; i < 5; i++) {
2190 rc = efx_pci_probe_main(efx);
2192 /* Serialise against efx_reset(). No more resets will be
2193 * scheduled since efx_stop_all() has been called, and we
2194 * have not and never have been registered with either
2195 * the rtnetlink or driverlink layers. */
2196 cancel_work_sync(&efx->reset_work);
2199 if (efx->reset_pending != RESET_TYPE_NONE) {
2200 /* If there was a scheduled reset during
2201 * probe, the NIC is probably hosed anyway */
2202 efx_pci_remove_main(efx);
2209 /* Retry if a recoverably reset event has been scheduled */
2210 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2211 (efx->reset_pending != RESET_TYPE_ALL))
2214 efx->reset_pending = RESET_TYPE_NONE;
2218 EFX_ERR(efx, "Could not reset NIC\n");
2222 /* Switch to the running state before we expose the device to
2223 * the OS. This is to ensure that the initial gathering of
2224 * MAC stats succeeds. */
2225 efx->state = STATE_RUNNING;
2227 rc = efx_register_netdev(efx);
2231 EFX_LOG(efx, "initialisation successful\n");
2234 efx_mtd_probe(efx); /* allowed to fail */
2239 efx_pci_remove_main(efx);
2244 efx_fini_struct(efx);
2246 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2247 free_netdev(net_dev);
2251 static struct pci_driver efx_pci_driver = {
2252 .name = EFX_DRIVER_NAME,
2253 .id_table = efx_pci_table,
2254 .probe = efx_pci_probe,
2255 .remove = efx_pci_remove,
2258 /**************************************************************************
2260 * Kernel module interface
2262 *************************************************************************/
2264 module_param(interrupt_mode, uint, 0444);
2265 MODULE_PARM_DESC(interrupt_mode,
2266 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2268 static int __init efx_init_module(void)
2272 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2274 rc = register_netdevice_notifier(&efx_netdev_notifier);
2278 refill_workqueue = create_workqueue("sfc_refill");
2279 if (!refill_workqueue) {
2283 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2284 if (!reset_workqueue) {
2289 rc = pci_register_driver(&efx_pci_driver);
2296 destroy_workqueue(reset_workqueue);
2298 destroy_workqueue(refill_workqueue);
2300 unregister_netdevice_notifier(&efx_netdev_notifier);
2305 static void __exit efx_exit_module(void)
2307 printk(KERN_INFO "Solarflare NET driver unloading\n");
2309 pci_unregister_driver(&efx_pci_driver);
2310 destroy_workqueue(reset_workqueue);
2311 destroy_workqueue(refill_workqueue);
2312 unregister_netdevice_notifier(&efx_netdev_notifier);
2316 module_init(efx_init_module);
2317 module_exit(efx_exit_module);
2319 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2320 "Solarflare Communications");
2321 MODULE_DESCRIPTION("Solarflare Communications network driver");
2322 MODULE_LICENSE("GPL");
2323 MODULE_DEVICE_TABLE(pci, efx_pci_table);