1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
29 #include "workarounds.h"
31 /**************************************************************************
35 **************************************************************************
38 /* Loopback mode names (see LOOPBACK_MODE()) */
39 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
40 const char *efx_loopback_mode_names[] = {
41 [LOOPBACK_NONE] = "NONE",
42 [LOOPBACK_DATA] = "DATAPATH",
43 [LOOPBACK_GMAC] = "GMAC",
44 [LOOPBACK_XGMII] = "XGMII",
45 [LOOPBACK_XGXS] = "XGXS",
46 [LOOPBACK_XAUI] = "XAUI",
47 [LOOPBACK_GMII] = "GMII",
48 [LOOPBACK_SGMII] = "SGMII",
49 [LOOPBACK_XGBR] = "XGBR",
50 [LOOPBACK_XFI] = "XFI",
51 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
52 [LOOPBACK_GMII_FAR] = "GMII_FAR",
53 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
54 [LOOPBACK_XFI_FAR] = "XFI_FAR",
55 [LOOPBACK_GPHY] = "GPHY",
56 [LOOPBACK_PHYXS] = "PHYXS",
57 [LOOPBACK_PCS] = "PCS",
58 [LOOPBACK_PMAPMD] = "PMA/PMD",
59 [LOOPBACK_XPORT] = "XPORT",
60 [LOOPBACK_XGMII_WS] = "XGMII_WS",
61 [LOOPBACK_XAUI_WS] = "XAUI_WS",
62 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
63 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
64 [LOOPBACK_GMII_WS] = "GMII_WS",
65 [LOOPBACK_XFI_WS] = "XFI_WS",
66 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
67 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
70 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
71 const char *efx_reset_type_names[] = {
72 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
73 [RESET_TYPE_ALL] = "ALL",
74 [RESET_TYPE_WORLD] = "WORLD",
75 [RESET_TYPE_DISABLE] = "DISABLE",
76 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
77 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
78 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
79 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
80 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
81 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
82 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
85 #define EFX_MAX_MTU (9 * 1024)
87 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
88 * queued onto this work queue. This is not a per-nic work queue, because
89 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
91 static struct workqueue_struct *reset_workqueue;
93 /**************************************************************************
97 *************************************************************************/
100 * Use separate channels for TX and RX events
102 * Set this to 1 to use separate channels for TX and RX. It allows us
103 * to control interrupt affinity separately for TX and RX.
105 * This is only used in MSI-X interrupt mode
107 static unsigned int separate_tx_channels;
108 module_param(separate_tx_channels, uint, 0444);
109 MODULE_PARM_DESC(separate_tx_channels,
110 "Use separate channels for TX and RX");
112 /* This is the weight assigned to each of the (per-channel) virtual
115 static int napi_weight = 64;
117 /* This is the time (in jiffies) between invocations of the hardware
118 * monitor. On Falcon-based NICs, this will:
119 * - Check the on-board hardware monitor;
120 * - Poll the link state and reconfigure the hardware as necessary.
122 static unsigned int efx_monitor_interval = 1 * HZ;
124 /* This controls whether or not the driver will initialise devices
125 * with invalid MAC addresses stored in the EEPROM or flash. If true,
126 * such devices will be initialised with a random locally-generated
127 * MAC address. This allows for loading the sfc_mtd driver to
128 * reprogram the flash, even if the flash contents (including the MAC
129 * address) have previously been erased.
131 static unsigned int allow_bad_hwaddr;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * The default for RX should strike a balance between increasing the
137 * round-trip latency and reducing overhead.
139 static unsigned int rx_irq_mod_usec = 60;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * This default is chosen to ensure that a 10G link does not go idle
145 * while a TX queue is stopped after it has become full. A queue is
146 * restarted when it drops below half full. The time this takes (assuming
147 * worst case 3 descriptors per packet and 1024 descriptors) is
148 * 512 / 3 * 1.2 = 205 usec.
150 static unsigned int tx_irq_mod_usec = 150;
152 /* This is the first interrupt mode to try out of:
157 static unsigned int interrupt_mode;
159 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
160 * i.e. the number of CPUs among which we may distribute simultaneous
161 * interrupt handling.
163 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
164 * The default (0) means to assign an interrupt to each package (level II cache)
166 static unsigned int rss_cpus;
167 module_param(rss_cpus, uint, 0444);
168 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
170 static int phy_flash_cfg;
171 module_param(phy_flash_cfg, int, 0644);
172 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
174 static unsigned irq_adapt_low_thresh = 10000;
175 module_param(irq_adapt_low_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_low_thresh,
177 "Threshold score for reducing IRQ moderation");
179 static unsigned irq_adapt_high_thresh = 20000;
180 module_param(irq_adapt_high_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_high_thresh,
182 "Threshold score for increasing IRQ moderation");
184 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
185 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
186 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
187 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
188 module_param(debug, uint, 0);
189 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
191 /**************************************************************************
193 * Utility functions and prototypes
195 *************************************************************************/
197 static void efx_remove_channels(struct efx_nic *efx);
198 static void efx_remove_port(struct efx_nic *efx);
199 static void efx_fini_napi(struct efx_nic *efx);
200 static void efx_fini_struct(struct efx_nic *efx);
201 static void efx_start_all(struct efx_nic *efx);
202 static void efx_stop_all(struct efx_nic *efx);
204 #define EFX_ASSERT_RESET_SERIALISED(efx) \
206 if ((efx->state == STATE_RUNNING) || \
207 (efx->state == STATE_DISABLED)) \
211 /**************************************************************************
213 * Event queue processing
215 *************************************************************************/
217 /* Process channel's event queue
219 * This function is responsible for processing the event queue of a
220 * single channel. The caller must guarantee that this function will
221 * never be concurrently called more than once on the same channel,
222 * though different channels may be being processed concurrently.
224 static int efx_process_channel(struct efx_channel *channel, int budget)
226 struct efx_nic *efx = channel->efx;
229 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
233 spent = efx_nic_process_eventq(channel, budget);
237 /* Deliver last RX packet. */
238 if (channel->rx_pkt) {
239 __efx_rx_packet(channel, channel->rx_pkt,
240 channel->rx_pkt_csummed);
241 channel->rx_pkt = NULL;
244 efx_rx_strategy(channel);
246 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
251 /* Mark channel as finished processing
253 * Note that since we will not receive further interrupts for this
254 * channel before we finish processing and call the eventq_read_ack()
255 * method, there is no need to use the interrupt hold-off timers.
257 static inline void efx_channel_processed(struct efx_channel *channel)
259 /* The interrupt handler for this channel may set work_pending
260 * as soon as we acknowledge the events we've seen. Make sure
261 * it's cleared before then. */
262 channel->work_pending = false;
265 efx_nic_eventq_read_ack(channel);
270 * NAPI guarantees serialisation of polls of the same device, which
271 * provides the guarantee required by efx_process_channel().
273 static int efx_poll(struct napi_struct *napi, int budget)
275 struct efx_channel *channel =
276 container_of(napi, struct efx_channel, napi_str);
277 struct efx_nic *efx = channel->efx;
280 netif_vdbg(efx, intr, efx->net_dev,
281 "channel %d NAPI poll executing on CPU %d\n",
282 channel->channel, raw_smp_processor_id());
284 spent = efx_process_channel(channel, budget);
286 if (spent < budget) {
287 if (channel->channel < efx->n_rx_channels &&
288 efx->irq_rx_adaptive &&
289 unlikely(++channel->irq_count == 1000)) {
290 if (unlikely(channel->irq_mod_score <
291 irq_adapt_low_thresh)) {
292 if (channel->irq_moderation > 1) {
293 channel->irq_moderation -= 1;
294 efx->type->push_irq_moderation(channel);
296 } else if (unlikely(channel->irq_mod_score >
297 irq_adapt_high_thresh)) {
298 if (channel->irq_moderation <
299 efx->irq_rx_moderation) {
300 channel->irq_moderation += 1;
301 efx->type->push_irq_moderation(channel);
304 channel->irq_count = 0;
305 channel->irq_mod_score = 0;
308 /* There is no race here; although napi_disable() will
309 * only wait for napi_complete(), this isn't a problem
310 * since efx_channel_processed() will have no effect if
311 * interrupts have already been disabled.
314 efx_channel_processed(channel);
320 /* Process the eventq of the specified channel immediately on this CPU
322 * Disable hardware generated interrupts, wait for any existing
323 * processing to finish, then directly poll (and ack ) the eventq.
324 * Finally reenable NAPI and interrupts.
326 * Since we are touching interrupts the caller should hold the suspend lock
328 void efx_process_channel_now(struct efx_channel *channel)
330 struct efx_nic *efx = channel->efx;
332 BUG_ON(channel->channel >= efx->n_channels);
333 BUG_ON(!channel->enabled);
335 /* Disable interrupts and wait for ISRs to complete */
336 efx_nic_disable_interrupts(efx);
338 synchronize_irq(efx->legacy_irq);
340 synchronize_irq(channel->irq);
342 /* Wait for any NAPI processing to complete */
343 napi_disable(&channel->napi_str);
345 /* Poll the channel */
346 efx_process_channel(channel, channel->eventq_mask + 1);
348 /* Ack the eventq. This may cause an interrupt to be generated
349 * when they are reenabled */
350 efx_channel_processed(channel);
352 napi_enable(&channel->napi_str);
353 efx_nic_enable_interrupts(efx);
356 /* Create event queue
357 * Event queue memory allocations are done only once. If the channel
358 * is reset, the memory buffer will be reused; this guards against
359 * errors during channel reset and also simplifies interrupt handling.
361 static int efx_probe_eventq(struct efx_channel *channel)
363 struct efx_nic *efx = channel->efx;
364 unsigned long entries;
366 netif_dbg(channel->efx, probe, channel->efx->net_dev,
367 "chan %d create event queue\n", channel->channel);
369 /* Build an event queue with room for one event per tx and rx buffer,
370 * plus some extra for link state events and MCDI completions. */
371 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
372 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
373 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
375 return efx_nic_probe_eventq(channel);
378 /* Prepare channel's event queue */
379 static void efx_init_eventq(struct efx_channel *channel)
381 netif_dbg(channel->efx, drv, channel->efx->net_dev,
382 "chan %d init event queue\n", channel->channel);
384 channel->eventq_read_ptr = 0;
386 efx_nic_init_eventq(channel);
389 static void efx_fini_eventq(struct efx_channel *channel)
391 netif_dbg(channel->efx, drv, channel->efx->net_dev,
392 "chan %d fini event queue\n", channel->channel);
394 efx_nic_fini_eventq(channel);
397 static void efx_remove_eventq(struct efx_channel *channel)
399 netif_dbg(channel->efx, drv, channel->efx->net_dev,
400 "chan %d remove event queue\n", channel->channel);
402 efx_nic_remove_eventq(channel);
405 /**************************************************************************
409 *************************************************************************/
411 /* Allocate and initialise a channel structure, optionally copying
412 * parameters (but not resources) from an old channel structure. */
413 static struct efx_channel *
414 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
416 struct efx_channel *channel;
417 struct efx_rx_queue *rx_queue;
418 struct efx_tx_queue *tx_queue;
422 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
426 *channel = *old_channel;
428 memset(&channel->eventq, 0, sizeof(channel->eventq));
430 rx_queue = &channel->rx_queue;
431 rx_queue->buffer = NULL;
432 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
434 for (j = 0; j < EFX_TXQ_TYPES; j++) {
435 tx_queue = &channel->tx_queue[j];
436 if (tx_queue->channel)
437 tx_queue->channel = channel;
438 tx_queue->buffer = NULL;
439 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
442 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
447 channel->channel = i;
449 for (j = 0; j < EFX_TXQ_TYPES; j++) {
450 tx_queue = &channel->tx_queue[j];
452 tx_queue->queue = i * EFX_TXQ_TYPES + j;
453 tx_queue->channel = channel;
457 spin_lock_init(&channel->tx_stop_lock);
458 atomic_set(&channel->tx_stop_count, 1);
460 rx_queue = &channel->rx_queue;
462 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
463 (unsigned long)rx_queue);
468 static int efx_probe_channel(struct efx_channel *channel)
470 struct efx_tx_queue *tx_queue;
471 struct efx_rx_queue *rx_queue;
474 netif_dbg(channel->efx, probe, channel->efx->net_dev,
475 "creating channel %d\n", channel->channel);
477 rc = efx_probe_eventq(channel);
481 efx_for_each_channel_tx_queue(tx_queue, channel) {
482 rc = efx_probe_tx_queue(tx_queue);
487 efx_for_each_channel_rx_queue(rx_queue, channel) {
488 rc = efx_probe_rx_queue(rx_queue);
493 channel->n_rx_frm_trunc = 0;
498 efx_for_each_channel_rx_queue(rx_queue, channel)
499 efx_remove_rx_queue(rx_queue);
501 efx_for_each_channel_tx_queue(tx_queue, channel)
502 efx_remove_tx_queue(tx_queue);
508 static void efx_set_channel_names(struct efx_nic *efx)
510 struct efx_channel *channel;
511 const char *type = "";
514 efx_for_each_channel(channel, efx) {
515 number = channel->channel;
516 if (efx->n_channels > efx->n_rx_channels) {
517 if (channel->channel < efx->n_rx_channels) {
521 number -= efx->n_rx_channels;
524 snprintf(efx->channel_name[channel->channel],
525 sizeof(efx->channel_name[0]),
526 "%s%s-%d", efx->name, type, number);
530 static int efx_probe_channels(struct efx_nic *efx)
532 struct efx_channel *channel;
535 /* Restart special buffer allocation */
536 efx->next_buffer_table = 0;
538 efx_for_each_channel(channel, efx) {
539 rc = efx_probe_channel(channel);
541 netif_err(efx, probe, efx->net_dev,
542 "failed to create channel %d\n",
547 efx_set_channel_names(efx);
552 efx_remove_channels(efx);
556 /* Channels are shutdown and reinitialised whilst the NIC is running
557 * to propagate configuration changes (mtu, checksum offload), or
558 * to clear hardware error conditions
560 static void efx_init_channels(struct efx_nic *efx)
562 struct efx_tx_queue *tx_queue;
563 struct efx_rx_queue *rx_queue;
564 struct efx_channel *channel;
566 /* Calculate the rx buffer allocation parameters required to
567 * support the current MTU, including padding for header
568 * alignment and overruns.
570 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
571 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
572 efx->type->rx_buffer_hash_size +
573 efx->type->rx_buffer_padding);
574 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
575 sizeof(struct efx_rx_page_state));
577 /* Initialise the channels */
578 efx_for_each_channel(channel, efx) {
579 netif_dbg(channel->efx, drv, channel->efx->net_dev,
580 "init chan %d\n", channel->channel);
582 efx_init_eventq(channel);
584 efx_for_each_channel_tx_queue(tx_queue, channel)
585 efx_init_tx_queue(tx_queue);
587 /* The rx buffer allocation strategy is MTU dependent */
588 efx_rx_strategy(channel);
590 efx_for_each_channel_rx_queue(rx_queue, channel)
591 efx_init_rx_queue(rx_queue);
593 WARN_ON(channel->rx_pkt != NULL);
594 efx_rx_strategy(channel);
598 /* This enables event queue processing and packet transmission.
600 * Note that this function is not allowed to fail, since that would
601 * introduce too much complexity into the suspend/resume path.
603 static void efx_start_channel(struct efx_channel *channel)
605 struct efx_rx_queue *rx_queue;
607 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
608 "starting chan %d\n", channel->channel);
610 /* The interrupt handler for this channel may set work_pending
611 * as soon as we enable it. Make sure it's cleared before
612 * then. Similarly, make sure it sees the enabled flag set. */
613 channel->work_pending = false;
614 channel->enabled = true;
617 /* Fill the queues before enabling NAPI */
618 efx_for_each_channel_rx_queue(rx_queue, channel)
619 efx_fast_push_rx_descriptors(rx_queue);
621 napi_enable(&channel->napi_str);
624 /* This disables event queue processing and packet transmission.
625 * This function does not guarantee that all queue processing
626 * (e.g. RX refill) is complete.
628 static void efx_stop_channel(struct efx_channel *channel)
630 if (!channel->enabled)
633 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
634 "stop chan %d\n", channel->channel);
636 channel->enabled = false;
637 napi_disable(&channel->napi_str);
640 static void efx_fini_channels(struct efx_nic *efx)
642 struct efx_channel *channel;
643 struct efx_tx_queue *tx_queue;
644 struct efx_rx_queue *rx_queue;
647 EFX_ASSERT_RESET_SERIALISED(efx);
648 BUG_ON(efx->port_enabled);
650 rc = efx_nic_flush_queues(efx);
651 if (rc && EFX_WORKAROUND_7803(efx)) {
652 /* Schedule a reset to recover from the flush failure. The
653 * descriptor caches reference memory we're about to free,
654 * but falcon_reconfigure_mac_wrapper() won't reconnect
655 * the MACs because of the pending reset. */
656 netif_err(efx, drv, efx->net_dev,
657 "Resetting to recover from flush failure\n");
658 efx_schedule_reset(efx, RESET_TYPE_ALL);
660 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
662 netif_dbg(efx, drv, efx->net_dev,
663 "successfully flushed all queues\n");
666 efx_for_each_channel(channel, efx) {
667 netif_dbg(channel->efx, drv, channel->efx->net_dev,
668 "shut down chan %d\n", channel->channel);
670 efx_for_each_channel_rx_queue(rx_queue, channel)
671 efx_fini_rx_queue(rx_queue);
672 efx_for_each_channel_tx_queue(tx_queue, channel)
673 efx_fini_tx_queue(tx_queue);
674 efx_fini_eventq(channel);
678 static void efx_remove_channel(struct efx_channel *channel)
680 struct efx_tx_queue *tx_queue;
681 struct efx_rx_queue *rx_queue;
683 netif_dbg(channel->efx, drv, channel->efx->net_dev,
684 "destroy chan %d\n", channel->channel);
686 efx_for_each_channel_rx_queue(rx_queue, channel)
687 efx_remove_rx_queue(rx_queue);
688 efx_for_each_channel_tx_queue(tx_queue, channel)
689 efx_remove_tx_queue(tx_queue);
690 efx_remove_eventq(channel);
693 static void efx_remove_channels(struct efx_nic *efx)
695 struct efx_channel *channel;
697 efx_for_each_channel(channel, efx)
698 efx_remove_channel(channel);
702 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
704 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
705 u32 old_rxq_entries, old_txq_entries;
710 efx_fini_channels(efx);
713 memset(other_channel, 0, sizeof(other_channel));
714 for (i = 0; i < efx->n_channels; i++) {
715 channel = efx_alloc_channel(efx, i, efx->channel[i]);
720 other_channel[i] = channel;
723 /* Swap entry counts and channel pointers */
724 old_rxq_entries = efx->rxq_entries;
725 old_txq_entries = efx->txq_entries;
726 efx->rxq_entries = rxq_entries;
727 efx->txq_entries = txq_entries;
728 for (i = 0; i < efx->n_channels; i++) {
729 channel = efx->channel[i];
730 efx->channel[i] = other_channel[i];
731 other_channel[i] = channel;
734 rc = efx_probe_channels(efx);
738 /* Destroy old channels */
739 for (i = 0; i < efx->n_channels; i++)
740 efx_remove_channel(other_channel[i]);
742 /* Free unused channel structures */
743 for (i = 0; i < efx->n_channels; i++)
744 kfree(other_channel[i]);
746 efx_init_channels(efx);
752 efx->rxq_entries = old_rxq_entries;
753 efx->txq_entries = old_txq_entries;
754 for (i = 0; i < efx->n_channels; i++) {
755 channel = efx->channel[i];
756 efx->channel[i] = other_channel[i];
757 other_channel[i] = channel;
762 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
764 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
767 /**************************************************************************
771 **************************************************************************/
773 /* This ensures that the kernel is kept informed (via
774 * netif_carrier_on/off) of the link status, and also maintains the
775 * link status's stop on the port's TX queue.
777 void efx_link_status_changed(struct efx_nic *efx)
779 struct efx_link_state *link_state = &efx->link_state;
781 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
782 * that no events are triggered between unregister_netdev() and the
783 * driver unloading. A more general condition is that NETDEV_CHANGE
784 * can only be generated between NETDEV_UP and NETDEV_DOWN */
785 if (!netif_running(efx->net_dev))
788 if (efx->port_inhibited) {
789 netif_carrier_off(efx->net_dev);
793 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
794 efx->n_link_state_changes++;
797 netif_carrier_on(efx->net_dev);
799 netif_carrier_off(efx->net_dev);
802 /* Status message for kernel log */
803 if (link_state->up) {
804 netif_info(efx, link, efx->net_dev,
805 "link up at %uMbps %s-duplex (MTU %d)%s\n",
806 link_state->speed, link_state->fd ? "full" : "half",
808 (efx->promiscuous ? " [PROMISC]" : ""));
810 netif_info(efx, link, efx->net_dev, "link down\n");
815 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
817 efx->link_advertising = advertising;
819 if (advertising & ADVERTISED_Pause)
820 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
822 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
823 if (advertising & ADVERTISED_Asym_Pause)
824 efx->wanted_fc ^= EFX_FC_TX;
828 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
830 efx->wanted_fc = wanted_fc;
831 if (efx->link_advertising) {
832 if (wanted_fc & EFX_FC_RX)
833 efx->link_advertising |= (ADVERTISED_Pause |
834 ADVERTISED_Asym_Pause);
836 efx->link_advertising &= ~(ADVERTISED_Pause |
837 ADVERTISED_Asym_Pause);
838 if (wanted_fc & EFX_FC_TX)
839 efx->link_advertising ^= ADVERTISED_Asym_Pause;
843 static void efx_fini_port(struct efx_nic *efx);
845 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
846 * the MAC appropriately. All other PHY configuration changes are pushed
847 * through phy_op->set_settings(), and pushed asynchronously to the MAC
848 * through efx_monitor().
850 * Callers must hold the mac_lock
852 int __efx_reconfigure_port(struct efx_nic *efx)
854 enum efx_phy_mode phy_mode;
857 WARN_ON(!mutex_is_locked(&efx->mac_lock));
859 /* Serialise the promiscuous flag with efx_set_multicast_list. */
860 if (efx_dev_registered(efx)) {
861 netif_addr_lock_bh(efx->net_dev);
862 netif_addr_unlock_bh(efx->net_dev);
865 /* Disable PHY transmit in mac level loopbacks */
866 phy_mode = efx->phy_mode;
867 if (LOOPBACK_INTERNAL(efx))
868 efx->phy_mode |= PHY_MODE_TX_DISABLED;
870 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
872 rc = efx->type->reconfigure_port(efx);
875 efx->phy_mode = phy_mode;
880 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
882 int efx_reconfigure_port(struct efx_nic *efx)
886 EFX_ASSERT_RESET_SERIALISED(efx);
888 mutex_lock(&efx->mac_lock);
889 rc = __efx_reconfigure_port(efx);
890 mutex_unlock(&efx->mac_lock);
895 /* Asynchronous work item for changing MAC promiscuity and multicast
896 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
898 static void efx_mac_work(struct work_struct *data)
900 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
902 mutex_lock(&efx->mac_lock);
903 if (efx->port_enabled) {
904 efx->type->push_multicast_hash(efx);
905 efx->mac_op->reconfigure(efx);
907 mutex_unlock(&efx->mac_lock);
910 static int efx_probe_port(struct efx_nic *efx)
914 netif_dbg(efx, probe, efx->net_dev, "create port\n");
917 efx->phy_mode = PHY_MODE_SPECIAL;
919 /* Connect up MAC/PHY operations table */
920 rc = efx->type->probe_port(efx);
924 /* Sanity check MAC address */
925 if (is_valid_ether_addr(efx->mac_address)) {
926 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
928 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
930 if (!allow_bad_hwaddr) {
934 random_ether_addr(efx->net_dev->dev_addr);
935 netif_info(efx, probe, efx->net_dev,
936 "using locally-generated MAC %pM\n",
937 efx->net_dev->dev_addr);
943 efx->type->remove_port(efx);
947 static int efx_init_port(struct efx_nic *efx)
951 netif_dbg(efx, drv, efx->net_dev, "init port\n");
953 mutex_lock(&efx->mac_lock);
955 rc = efx->phy_op->init(efx);
959 efx->port_initialized = true;
961 /* Reconfigure the MAC before creating dma queues (required for
962 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
963 efx->mac_op->reconfigure(efx);
965 /* Ensure the PHY advertises the correct flow control settings */
966 rc = efx->phy_op->reconfigure(efx);
970 mutex_unlock(&efx->mac_lock);
974 efx->phy_op->fini(efx);
976 mutex_unlock(&efx->mac_lock);
980 static void efx_start_port(struct efx_nic *efx)
982 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
983 BUG_ON(efx->port_enabled);
985 mutex_lock(&efx->mac_lock);
986 efx->port_enabled = true;
988 /* efx_mac_work() might have been scheduled after efx_stop_port(),
989 * and then cancelled by efx_flush_all() */
990 efx->type->push_multicast_hash(efx);
991 efx->mac_op->reconfigure(efx);
993 mutex_unlock(&efx->mac_lock);
996 /* Prevent efx_mac_work() and efx_monitor() from working */
997 static void efx_stop_port(struct efx_nic *efx)
999 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1001 mutex_lock(&efx->mac_lock);
1002 efx->port_enabled = false;
1003 mutex_unlock(&efx->mac_lock);
1005 /* Serialise against efx_set_multicast_list() */
1006 if (efx_dev_registered(efx)) {
1007 netif_addr_lock_bh(efx->net_dev);
1008 netif_addr_unlock_bh(efx->net_dev);
1012 static void efx_fini_port(struct efx_nic *efx)
1014 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1016 if (!efx->port_initialized)
1019 efx->phy_op->fini(efx);
1020 efx->port_initialized = false;
1022 efx->link_state.up = false;
1023 efx_link_status_changed(efx);
1026 static void efx_remove_port(struct efx_nic *efx)
1028 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1030 efx->type->remove_port(efx);
1033 /**************************************************************************
1037 **************************************************************************/
1039 /* This configures the PCI device to enable I/O and DMA. */
1040 static int efx_init_io(struct efx_nic *efx)
1042 struct pci_dev *pci_dev = efx->pci_dev;
1043 dma_addr_t dma_mask = efx->type->max_dma_mask;
1046 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1048 rc = pci_enable_device(pci_dev);
1050 netif_err(efx, probe, efx->net_dev,
1051 "failed to enable PCI device\n");
1055 pci_set_master(pci_dev);
1057 /* Set the PCI DMA mask. Try all possibilities from our
1058 * genuine mask down to 32 bits, because some architectures
1059 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1060 * masks event though they reject 46 bit masks.
1062 while (dma_mask > 0x7fffffffUL) {
1063 if (pci_dma_supported(pci_dev, dma_mask) &&
1064 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1069 netif_err(efx, probe, efx->net_dev,
1070 "could not find a suitable DMA mask\n");
1073 netif_dbg(efx, probe, efx->net_dev,
1074 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1075 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1077 /* pci_set_consistent_dma_mask() is not *allowed* to
1078 * fail with a mask that pci_set_dma_mask() accepted,
1079 * but just in case...
1081 netif_err(efx, probe, efx->net_dev,
1082 "failed to set consistent DMA mask\n");
1086 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1087 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1089 netif_err(efx, probe, efx->net_dev,
1090 "request for memory BAR failed\n");
1094 efx->membase = ioremap_nocache(efx->membase_phys,
1095 efx->type->mem_map_size);
1096 if (!efx->membase) {
1097 netif_err(efx, probe, efx->net_dev,
1098 "could not map memory BAR at %llx+%x\n",
1099 (unsigned long long)efx->membase_phys,
1100 efx->type->mem_map_size);
1104 netif_dbg(efx, probe, efx->net_dev,
1105 "memory BAR at %llx+%x (virtual %p)\n",
1106 (unsigned long long)efx->membase_phys,
1107 efx->type->mem_map_size, efx->membase);
1112 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1114 efx->membase_phys = 0;
1116 pci_disable_device(efx->pci_dev);
1121 static void efx_fini_io(struct efx_nic *efx)
1123 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1126 iounmap(efx->membase);
1127 efx->membase = NULL;
1130 if (efx->membase_phys) {
1131 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1132 efx->membase_phys = 0;
1135 pci_disable_device(efx->pci_dev);
1138 /* Get number of channels wanted. Each channel will have its own IRQ,
1139 * 1 RX queue and/or 2 TX queues. */
1140 static int efx_wanted_channels(void)
1142 cpumask_var_t core_mask;
1146 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1148 "sfc: RSS disabled due to allocation failure\n");
1153 for_each_online_cpu(cpu) {
1154 if (!cpumask_test_cpu(cpu, core_mask)) {
1156 cpumask_or(core_mask, core_mask,
1157 topology_core_cpumask(cpu));
1161 free_cpumask_var(core_mask);
1165 /* Probe the number and type of interrupts we are able to obtain, and
1166 * the resulting numbers of channels and RX queues.
1168 static void efx_probe_interrupts(struct efx_nic *efx)
1171 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1174 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1175 struct msix_entry xentries[EFX_MAX_CHANNELS];
1178 n_channels = efx_wanted_channels();
1179 if (separate_tx_channels)
1181 n_channels = min(n_channels, max_channels);
1183 for (i = 0; i < n_channels; i++)
1184 xentries[i].entry = i;
1185 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1187 netif_err(efx, drv, efx->net_dev,
1188 "WARNING: Insufficient MSI-X vectors"
1189 " available (%d < %d).\n", rc, n_channels);
1190 netif_err(efx, drv, efx->net_dev,
1191 "WARNING: Performance may be reduced.\n");
1192 EFX_BUG_ON_PARANOID(rc >= n_channels);
1194 rc = pci_enable_msix(efx->pci_dev, xentries,
1199 efx->n_channels = n_channels;
1200 if (separate_tx_channels) {
1201 efx->n_tx_channels =
1202 max(efx->n_channels / 2, 1U);
1203 efx->n_rx_channels =
1204 max(efx->n_channels -
1205 efx->n_tx_channels, 1U);
1207 efx->n_tx_channels = efx->n_channels;
1208 efx->n_rx_channels = efx->n_channels;
1210 for (i = 0; i < n_channels; i++)
1211 efx_get_channel(efx, i)->irq =
1214 /* Fall back to single channel MSI */
1215 efx->interrupt_mode = EFX_INT_MODE_MSI;
1216 netif_err(efx, drv, efx->net_dev,
1217 "could not enable MSI-X\n");
1221 /* Try single interrupt MSI */
1222 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1223 efx->n_channels = 1;
1224 efx->n_rx_channels = 1;
1225 efx->n_tx_channels = 1;
1226 rc = pci_enable_msi(efx->pci_dev);
1228 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1230 netif_err(efx, drv, efx->net_dev,
1231 "could not enable MSI\n");
1232 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1236 /* Assume legacy interrupts */
1237 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1238 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1239 efx->n_rx_channels = 1;
1240 efx->n_tx_channels = 1;
1241 efx->legacy_irq = efx->pci_dev->irq;
1245 static void efx_remove_interrupts(struct efx_nic *efx)
1247 struct efx_channel *channel;
1249 /* Remove MSI/MSI-X interrupts */
1250 efx_for_each_channel(channel, efx)
1252 pci_disable_msi(efx->pci_dev);
1253 pci_disable_msix(efx->pci_dev);
1255 /* Remove legacy interrupt */
1256 efx->legacy_irq = 0;
1259 struct efx_tx_queue *
1260 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1262 unsigned tx_channel_offset =
1263 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1264 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1265 type >= EFX_TXQ_TYPES);
1266 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1269 static void efx_set_channels(struct efx_nic *efx)
1271 struct efx_channel *channel;
1272 struct efx_tx_queue *tx_queue;
1273 unsigned tx_channel_offset =
1274 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1276 /* Channel pointers were set in efx_init_struct() but we now
1277 * need to clear them for TX queues in any RX-only channels. */
1278 efx_for_each_channel(channel, efx) {
1279 if (channel->channel - tx_channel_offset >=
1280 efx->n_tx_channels) {
1281 efx_for_each_channel_tx_queue(tx_queue, channel)
1282 tx_queue->channel = NULL;
1287 static int efx_probe_nic(struct efx_nic *efx)
1292 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1294 /* Carry out hardware-type specific initialisation */
1295 rc = efx->type->probe(efx);
1299 /* Determine the number of channels and queues by trying to hook
1300 * in MSI-X interrupts. */
1301 efx_probe_interrupts(efx);
1303 if (efx->n_channels > 1)
1304 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1305 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1306 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1308 efx_set_channels(efx);
1309 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1310 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1312 /* Initialise the interrupt moderation settings */
1313 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1318 static void efx_remove_nic(struct efx_nic *efx)
1320 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1322 efx_remove_interrupts(efx);
1323 efx->type->remove(efx);
1326 /**************************************************************************
1328 * NIC startup/shutdown
1330 *************************************************************************/
1332 static int efx_probe_all(struct efx_nic *efx)
1336 rc = efx_probe_nic(efx);
1338 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1342 rc = efx_probe_port(efx);
1344 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1348 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1349 rc = efx_probe_channels(efx);
1353 rc = efx_probe_filters(efx);
1355 netif_err(efx, probe, efx->net_dev,
1356 "failed to create filter tables\n");
1363 efx_remove_channels(efx);
1365 efx_remove_port(efx);
1367 efx_remove_nic(efx);
1372 /* Called after previous invocation(s) of efx_stop_all, restarts the
1373 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1374 * and ensures that the port is scheduled to be reconfigured.
1375 * This function is safe to call multiple times when the NIC is in any
1377 static void efx_start_all(struct efx_nic *efx)
1379 struct efx_channel *channel;
1381 EFX_ASSERT_RESET_SERIALISED(efx);
1383 /* Check that it is appropriate to restart the interface. All
1384 * of these flags are safe to read under just the rtnl lock */
1385 if (efx->port_enabled)
1387 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1389 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1392 /* Mark the port as enabled so port reconfigurations can start, then
1393 * restart the transmit interface early so the watchdog timer stops */
1394 efx_start_port(efx);
1396 efx_for_each_channel(channel, efx) {
1397 if (efx_dev_registered(efx))
1398 efx_wake_queue(channel);
1399 efx_start_channel(channel);
1402 efx_nic_enable_interrupts(efx);
1404 /* Switch to event based MCDI completions after enabling interrupts.
1405 * If a reset has been scheduled, then we need to stay in polled mode.
1406 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1407 * reset_pending [modified from an atomic context], we instead guarantee
1408 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1409 efx_mcdi_mode_event(efx);
1410 if (efx->reset_pending != RESET_TYPE_NONE)
1411 efx_mcdi_mode_poll(efx);
1413 /* Start the hardware monitor if there is one. Otherwise (we're link
1414 * event driven), we have to poll the PHY because after an event queue
1415 * flush, we could have a missed a link state change */
1416 if (efx->type->monitor != NULL) {
1417 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1418 efx_monitor_interval);
1420 mutex_lock(&efx->mac_lock);
1421 if (efx->phy_op->poll(efx))
1422 efx_link_status_changed(efx);
1423 mutex_unlock(&efx->mac_lock);
1426 efx->type->start_stats(efx);
1429 /* Flush all delayed work. Should only be called when no more delayed work
1430 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1431 * since we're holding the rtnl_lock at this point. */
1432 static void efx_flush_all(struct efx_nic *efx)
1434 /* Make sure the hardware monitor is stopped */
1435 cancel_delayed_work_sync(&efx->monitor_work);
1436 /* Stop scheduled port reconfigurations */
1437 cancel_work_sync(&efx->mac_work);
1440 /* Quiesce hardware and software without bringing the link down.
1441 * Safe to call multiple times, when the nic and interface is in any
1442 * state. The caller is guaranteed to subsequently be in a position
1443 * to modify any hardware and software state they see fit without
1445 static void efx_stop_all(struct efx_nic *efx)
1447 struct efx_channel *channel;
1449 EFX_ASSERT_RESET_SERIALISED(efx);
1451 /* port_enabled can be read safely under the rtnl lock */
1452 if (!efx->port_enabled)
1455 efx->type->stop_stats(efx);
1457 /* Switch to MCDI polling on Siena before disabling interrupts */
1458 efx_mcdi_mode_poll(efx);
1460 /* Disable interrupts and wait for ISR to complete */
1461 efx_nic_disable_interrupts(efx);
1462 if (efx->legacy_irq)
1463 synchronize_irq(efx->legacy_irq);
1464 efx_for_each_channel(channel, efx) {
1466 synchronize_irq(channel->irq);
1469 /* Stop all NAPI processing and synchronous rx refills */
1470 efx_for_each_channel(channel, efx)
1471 efx_stop_channel(channel);
1473 /* Stop all asynchronous port reconfigurations. Since all
1474 * event processing has already been stopped, there is no
1475 * window to loose phy events */
1478 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1481 /* Stop the kernel transmit interface late, so the watchdog
1482 * timer isn't ticking over the flush */
1483 if (efx_dev_registered(efx)) {
1484 struct efx_channel *channel;
1485 efx_for_each_channel(channel, efx)
1486 efx_stop_queue(channel);
1487 netif_tx_lock_bh(efx->net_dev);
1488 netif_tx_unlock_bh(efx->net_dev);
1492 static void efx_remove_all(struct efx_nic *efx)
1494 efx_remove_filters(efx);
1495 efx_remove_channels(efx);
1496 efx_remove_port(efx);
1497 efx_remove_nic(efx);
1500 /**************************************************************************
1502 * Interrupt moderation
1504 **************************************************************************/
1506 static unsigned irq_mod_ticks(int usecs, int resolution)
1509 return 0; /* cannot receive interrupts ahead of time :-) */
1510 if (usecs < resolution)
1511 return 1; /* never round down to 0 */
1512 return usecs / resolution;
1515 /* Set interrupt moderation parameters */
1516 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1519 struct efx_channel *channel;
1520 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1521 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1523 EFX_ASSERT_RESET_SERIALISED(efx);
1525 efx->irq_rx_adaptive = rx_adaptive;
1526 efx->irq_rx_moderation = rx_ticks;
1527 efx_for_each_channel(channel, efx) {
1528 if (efx_channel_get_rx_queue(channel))
1529 channel->irq_moderation = rx_ticks;
1530 else if (efx_channel_get_tx_queue(channel, 0))
1531 channel->irq_moderation = tx_ticks;
1535 /**************************************************************************
1539 **************************************************************************/
1541 /* Run periodically off the general workqueue */
1542 static void efx_monitor(struct work_struct *data)
1544 struct efx_nic *efx = container_of(data, struct efx_nic,
1547 netif_vdbg(efx, timer, efx->net_dev,
1548 "hardware monitor executing on CPU %d\n",
1549 raw_smp_processor_id());
1550 BUG_ON(efx->type->monitor == NULL);
1552 /* If the mac_lock is already held then it is likely a port
1553 * reconfiguration is already in place, which will likely do
1554 * most of the work of monitor() anyway. */
1555 if (mutex_trylock(&efx->mac_lock)) {
1556 if (efx->port_enabled)
1557 efx->type->monitor(efx);
1558 mutex_unlock(&efx->mac_lock);
1561 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1562 efx_monitor_interval);
1565 /**************************************************************************
1569 *************************************************************************/
1572 * Context: process, rtnl_lock() held.
1574 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1576 struct efx_nic *efx = netdev_priv(net_dev);
1577 struct mii_ioctl_data *data = if_mii(ifr);
1579 EFX_ASSERT_RESET_SERIALISED(efx);
1581 /* Convert phy_id from older PRTAD/DEVAD format */
1582 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1583 (data->phy_id & 0xfc00) == 0x0400)
1584 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1586 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1589 /**************************************************************************
1593 **************************************************************************/
1595 static int efx_init_napi(struct efx_nic *efx)
1597 struct efx_channel *channel;
1599 efx_for_each_channel(channel, efx) {
1600 channel->napi_dev = efx->net_dev;
1601 netif_napi_add(channel->napi_dev, &channel->napi_str,
1602 efx_poll, napi_weight);
1607 static void efx_fini_napi(struct efx_nic *efx)
1609 struct efx_channel *channel;
1611 efx_for_each_channel(channel, efx) {
1612 if (channel->napi_dev)
1613 netif_napi_del(&channel->napi_str);
1614 channel->napi_dev = NULL;
1618 /**************************************************************************
1620 * Kernel netpoll interface
1622 *************************************************************************/
1624 #ifdef CONFIG_NET_POLL_CONTROLLER
1626 /* Although in the common case interrupts will be disabled, this is not
1627 * guaranteed. However, all our work happens inside the NAPI callback,
1628 * so no locking is required.
1630 static void efx_netpoll(struct net_device *net_dev)
1632 struct efx_nic *efx = netdev_priv(net_dev);
1633 struct efx_channel *channel;
1635 efx_for_each_channel(channel, efx)
1636 efx_schedule_channel(channel);
1641 /**************************************************************************
1643 * Kernel net device interface
1645 *************************************************************************/
1647 /* Context: process, rtnl_lock() held. */
1648 static int efx_net_open(struct net_device *net_dev)
1650 struct efx_nic *efx = netdev_priv(net_dev);
1651 EFX_ASSERT_RESET_SERIALISED(efx);
1653 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1654 raw_smp_processor_id());
1656 if (efx->state == STATE_DISABLED)
1658 if (efx->phy_mode & PHY_MODE_SPECIAL)
1660 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1663 /* Notify the kernel of the link state polled during driver load,
1664 * before the monitor starts running */
1665 efx_link_status_changed(efx);
1671 /* Context: process, rtnl_lock() held.
1672 * Note that the kernel will ignore our return code; this method
1673 * should really be a void.
1675 static int efx_net_stop(struct net_device *net_dev)
1677 struct efx_nic *efx = netdev_priv(net_dev);
1679 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1680 raw_smp_processor_id());
1682 if (efx->state != STATE_DISABLED) {
1683 /* Stop the device and flush all the channels */
1685 efx_fini_channels(efx);
1686 efx_init_channels(efx);
1692 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1693 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1695 struct efx_nic *efx = netdev_priv(net_dev);
1696 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1698 spin_lock_bh(&efx->stats_lock);
1699 efx->type->update_stats(efx);
1700 spin_unlock_bh(&efx->stats_lock);
1702 stats->rx_packets = mac_stats->rx_packets;
1703 stats->tx_packets = mac_stats->tx_packets;
1704 stats->rx_bytes = mac_stats->rx_bytes;
1705 stats->tx_bytes = mac_stats->tx_bytes;
1706 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1707 stats->multicast = mac_stats->rx_multicast;
1708 stats->collisions = mac_stats->tx_collision;
1709 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1710 mac_stats->rx_length_error);
1711 stats->rx_crc_errors = mac_stats->rx_bad;
1712 stats->rx_frame_errors = mac_stats->rx_align_error;
1713 stats->rx_fifo_errors = mac_stats->rx_overflow;
1714 stats->rx_missed_errors = mac_stats->rx_missed;
1715 stats->tx_window_errors = mac_stats->tx_late_collision;
1717 stats->rx_errors = (stats->rx_length_errors +
1718 stats->rx_crc_errors +
1719 stats->rx_frame_errors +
1720 mac_stats->rx_symbol_error);
1721 stats->tx_errors = (stats->tx_window_errors +
1727 /* Context: netif_tx_lock held, BHs disabled. */
1728 static void efx_watchdog(struct net_device *net_dev)
1730 struct efx_nic *efx = netdev_priv(net_dev);
1732 netif_err(efx, tx_err, efx->net_dev,
1733 "TX stuck with port_enabled=%d: resetting channels\n",
1736 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1740 /* Context: process, rtnl_lock() held. */
1741 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1743 struct efx_nic *efx = netdev_priv(net_dev);
1746 EFX_ASSERT_RESET_SERIALISED(efx);
1748 if (new_mtu > EFX_MAX_MTU)
1753 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1755 efx_fini_channels(efx);
1757 mutex_lock(&efx->mac_lock);
1758 /* Reconfigure the MAC before enabling the dma queues so that
1759 * the RX buffers don't overflow */
1760 net_dev->mtu = new_mtu;
1761 efx->mac_op->reconfigure(efx);
1762 mutex_unlock(&efx->mac_lock);
1764 efx_init_channels(efx);
1770 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1772 struct efx_nic *efx = netdev_priv(net_dev);
1773 struct sockaddr *addr = data;
1774 char *new_addr = addr->sa_data;
1776 EFX_ASSERT_RESET_SERIALISED(efx);
1778 if (!is_valid_ether_addr(new_addr)) {
1779 netif_err(efx, drv, efx->net_dev,
1780 "invalid ethernet MAC address requested: %pM\n",
1785 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1787 /* Reconfigure the MAC */
1788 mutex_lock(&efx->mac_lock);
1789 efx->mac_op->reconfigure(efx);
1790 mutex_unlock(&efx->mac_lock);
1795 /* Context: netif_addr_lock held, BHs disabled. */
1796 static void efx_set_multicast_list(struct net_device *net_dev)
1798 struct efx_nic *efx = netdev_priv(net_dev);
1799 struct netdev_hw_addr *ha;
1800 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1804 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1806 /* Build multicast hash table */
1807 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1808 memset(mc_hash, 0xff, sizeof(*mc_hash));
1810 memset(mc_hash, 0x00, sizeof(*mc_hash));
1811 netdev_for_each_mc_addr(ha, net_dev) {
1812 crc = ether_crc_le(ETH_ALEN, ha->addr);
1813 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1814 set_bit_le(bit, mc_hash->byte);
1817 /* Broadcast packets go through the multicast hash filter.
1818 * ether_crc_le() of the broadcast address is 0xbe2612ff
1819 * so we always add bit 0xff to the mask.
1821 set_bit_le(0xff, mc_hash->byte);
1824 if (efx->port_enabled)
1825 queue_work(efx->workqueue, &efx->mac_work);
1826 /* Otherwise efx_start_port() will do this */
1829 static const struct net_device_ops efx_netdev_ops = {
1830 .ndo_open = efx_net_open,
1831 .ndo_stop = efx_net_stop,
1832 .ndo_get_stats64 = efx_net_stats,
1833 .ndo_tx_timeout = efx_watchdog,
1834 .ndo_start_xmit = efx_hard_start_xmit,
1835 .ndo_validate_addr = eth_validate_addr,
1836 .ndo_do_ioctl = efx_ioctl,
1837 .ndo_change_mtu = efx_change_mtu,
1838 .ndo_set_mac_address = efx_set_mac_address,
1839 .ndo_set_multicast_list = efx_set_multicast_list,
1840 #ifdef CONFIG_NET_POLL_CONTROLLER
1841 .ndo_poll_controller = efx_netpoll,
1845 static void efx_update_name(struct efx_nic *efx)
1847 strcpy(efx->name, efx->net_dev->name);
1848 efx_mtd_rename(efx);
1849 efx_set_channel_names(efx);
1852 static int efx_netdev_event(struct notifier_block *this,
1853 unsigned long event, void *ptr)
1855 struct net_device *net_dev = ptr;
1857 if (net_dev->netdev_ops == &efx_netdev_ops &&
1858 event == NETDEV_CHANGENAME)
1859 efx_update_name(netdev_priv(net_dev));
1864 static struct notifier_block efx_netdev_notifier = {
1865 .notifier_call = efx_netdev_event,
1869 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1871 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1872 return sprintf(buf, "%d\n", efx->phy_type);
1874 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1876 static int efx_register_netdev(struct efx_nic *efx)
1878 struct net_device *net_dev = efx->net_dev;
1881 net_dev->watchdog_timeo = 5 * HZ;
1882 net_dev->irq = efx->pci_dev->irq;
1883 net_dev->netdev_ops = &efx_netdev_ops;
1884 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1886 /* Clear MAC statistics */
1887 efx->mac_op->update_stats(efx);
1888 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1892 rc = dev_alloc_name(net_dev, net_dev->name);
1895 efx_update_name(efx);
1897 rc = register_netdevice(net_dev);
1901 /* Always start with carrier off; PHY events will detect the link */
1902 netif_carrier_off(efx->net_dev);
1906 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1908 netif_err(efx, drv, efx->net_dev,
1909 "failed to init net dev attributes\n");
1910 goto fail_registered;
1917 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1921 unregister_netdev(net_dev);
1925 static void efx_unregister_netdev(struct efx_nic *efx)
1927 struct efx_channel *channel;
1928 struct efx_tx_queue *tx_queue;
1933 BUG_ON(netdev_priv(efx->net_dev) != efx);
1935 /* Free up any skbs still remaining. This has to happen before
1936 * we try to unregister the netdev as running their destructors
1937 * may be needed to get the device ref. count to 0. */
1938 efx_for_each_channel(channel, efx) {
1939 efx_for_each_channel_tx_queue(tx_queue, channel)
1940 efx_release_tx_buffers(tx_queue);
1943 if (efx_dev_registered(efx)) {
1944 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1945 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1946 unregister_netdev(efx->net_dev);
1950 /**************************************************************************
1952 * Device reset and suspend
1954 **************************************************************************/
1956 /* Tears down the entire software state and most of the hardware state
1958 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1960 EFX_ASSERT_RESET_SERIALISED(efx);
1963 mutex_lock(&efx->mac_lock);
1965 efx_fini_channels(efx);
1966 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1967 efx->phy_op->fini(efx);
1968 efx->type->fini(efx);
1971 /* This function will always ensure that the locks acquired in
1972 * efx_reset_down() are released. A failure return code indicates
1973 * that we were unable to reinitialise the hardware, and the
1974 * driver should be disabled. If ok is false, then the rx and tx
1975 * engines are not restarted, pending a RESET_DISABLE. */
1976 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1980 EFX_ASSERT_RESET_SERIALISED(efx);
1982 rc = efx->type->init(efx);
1984 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
1991 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1992 rc = efx->phy_op->init(efx);
1995 if (efx->phy_op->reconfigure(efx))
1996 netif_err(efx, drv, efx->net_dev,
1997 "could not restore PHY settings\n");
2000 efx->mac_op->reconfigure(efx);
2002 efx_init_channels(efx);
2003 efx_restore_filters(efx);
2005 mutex_unlock(&efx->mac_lock);
2012 efx->port_initialized = false;
2014 mutex_unlock(&efx->mac_lock);
2019 /* Reset the NIC using the specified method. Note that the reset may
2020 * fail, in which case the card will be left in an unusable state.
2022 * Caller must hold the rtnl_lock.
2024 int efx_reset(struct efx_nic *efx, enum reset_type method)
2029 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2030 RESET_TYPE(method));
2032 efx_reset_down(efx, method);
2034 rc = efx->type->reset(efx, method);
2036 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2040 /* Allow resets to be rescheduled. */
2041 efx->reset_pending = RESET_TYPE_NONE;
2043 /* Reinitialise bus-mastering, which may have been turned off before
2044 * the reset was scheduled. This is still appropriate, even in the
2045 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2046 * can respond to requests. */
2047 pci_set_master(efx->pci_dev);
2050 /* Leave device stopped if necessary */
2051 disabled = rc || method == RESET_TYPE_DISABLE;
2052 rc2 = efx_reset_up(efx, method, !disabled);
2060 dev_close(efx->net_dev);
2061 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2062 efx->state = STATE_DISABLED;
2064 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2069 /* The worker thread exists so that code that cannot sleep can
2070 * schedule a reset for later.
2072 static void efx_reset_work(struct work_struct *data)
2074 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2076 if (efx->reset_pending == RESET_TYPE_NONE)
2079 /* If we're not RUNNING then don't reset. Leave the reset_pending
2080 * flag set so that efx_pci_probe_main will be retried */
2081 if (efx->state != STATE_RUNNING) {
2082 netif_info(efx, drv, efx->net_dev,
2083 "scheduled reset quenched. NIC not RUNNING\n");
2088 (void)efx_reset(efx, efx->reset_pending);
2092 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2094 enum reset_type method;
2096 if (efx->reset_pending != RESET_TYPE_NONE) {
2097 netif_info(efx, drv, efx->net_dev,
2098 "quenching already scheduled reset\n");
2103 case RESET_TYPE_INVISIBLE:
2104 case RESET_TYPE_ALL:
2105 case RESET_TYPE_WORLD:
2106 case RESET_TYPE_DISABLE:
2109 case RESET_TYPE_RX_RECOVERY:
2110 case RESET_TYPE_RX_DESC_FETCH:
2111 case RESET_TYPE_TX_DESC_FETCH:
2112 case RESET_TYPE_TX_SKIP:
2113 method = RESET_TYPE_INVISIBLE;
2115 case RESET_TYPE_MC_FAILURE:
2117 method = RESET_TYPE_ALL;
2122 netif_dbg(efx, drv, efx->net_dev,
2123 "scheduling %s reset for %s\n",
2124 RESET_TYPE(method), RESET_TYPE(type));
2126 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2127 RESET_TYPE(method));
2129 efx->reset_pending = method;
2131 /* efx_process_channel() will no longer read events once a
2132 * reset is scheduled. So switch back to poll'd MCDI completions. */
2133 efx_mcdi_mode_poll(efx);
2135 queue_work(reset_workqueue, &efx->reset_work);
2138 /**************************************************************************
2140 * List of NICs we support
2142 **************************************************************************/
2144 /* PCI device ID table */
2145 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2146 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2147 .driver_data = (unsigned long) &falcon_a1_nic_type},
2148 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2149 .driver_data = (unsigned long) &falcon_b0_nic_type},
2150 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2151 .driver_data = (unsigned long) &siena_a0_nic_type},
2152 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2153 .driver_data = (unsigned long) &siena_a0_nic_type},
2154 {0} /* end of list */
2157 /**************************************************************************
2159 * Dummy PHY/MAC operations
2161 * Can be used for some unimplemented operations
2162 * Needed so all function pointers are valid and do not have to be tested
2165 **************************************************************************/
2166 int efx_port_dummy_op_int(struct efx_nic *efx)
2170 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2172 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2177 static struct efx_phy_operations efx_dummy_phy_operations = {
2178 .init = efx_port_dummy_op_int,
2179 .reconfigure = efx_port_dummy_op_int,
2180 .poll = efx_port_dummy_op_poll,
2181 .fini = efx_port_dummy_op_void,
2184 /**************************************************************************
2188 **************************************************************************/
2190 /* This zeroes out and then fills in the invariants in a struct
2191 * efx_nic (including all sub-structures).
2193 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2194 struct pci_dev *pci_dev, struct net_device *net_dev)
2198 /* Initialise common structures */
2199 memset(efx, 0, sizeof(*efx));
2200 spin_lock_init(&efx->biu_lock);
2201 #ifdef CONFIG_SFC_MTD
2202 INIT_LIST_HEAD(&efx->mtd_list);
2204 INIT_WORK(&efx->reset_work, efx_reset_work);
2205 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2206 efx->pci_dev = pci_dev;
2207 efx->msg_enable = debug;
2208 efx->state = STATE_INIT;
2209 efx->reset_pending = RESET_TYPE_NONE;
2210 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2212 efx->net_dev = net_dev;
2213 efx->rx_checksum_enabled = true;
2214 spin_lock_init(&efx->stats_lock);
2215 mutex_init(&efx->mac_lock);
2216 efx->mac_op = type->default_mac_ops;
2217 efx->phy_op = &efx_dummy_phy_operations;
2218 efx->mdio.dev = net_dev;
2219 INIT_WORK(&efx->mac_work, efx_mac_work);
2221 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2222 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2223 if (!efx->channel[i])
2229 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2231 /* Higher numbered interrupt modes are less capable! */
2232 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2235 /* Would be good to use the net_dev name, but we're too early */
2236 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2238 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2239 if (!efx->workqueue)
2245 efx_fini_struct(efx);
2249 static void efx_fini_struct(struct efx_nic *efx)
2253 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2254 kfree(efx->channel[i]);
2256 if (efx->workqueue) {
2257 destroy_workqueue(efx->workqueue);
2258 efx->workqueue = NULL;
2262 /**************************************************************************
2266 **************************************************************************/
2268 /* Main body of final NIC shutdown code
2269 * This is called only at module unload (or hotplug removal).
2271 static void efx_pci_remove_main(struct efx_nic *efx)
2273 efx_nic_fini_interrupt(efx);
2274 efx_fini_channels(efx);
2276 efx->type->fini(efx);
2278 efx_remove_all(efx);
2281 /* Final NIC shutdown
2282 * This is called only at module unload (or hotplug removal).
2284 static void efx_pci_remove(struct pci_dev *pci_dev)
2286 struct efx_nic *efx;
2288 efx = pci_get_drvdata(pci_dev);
2292 /* Mark the NIC as fini, then stop the interface */
2294 efx->state = STATE_FINI;
2295 dev_close(efx->net_dev);
2297 /* Allow any queued efx_resets() to complete */
2300 efx_unregister_netdev(efx);
2302 efx_mtd_remove(efx);
2304 /* Wait for any scheduled resets to complete. No more will be
2305 * scheduled from this point because efx_stop_all() has been
2306 * called, we are no longer registered with driverlink, and
2307 * the net_device's have been removed. */
2308 cancel_work_sync(&efx->reset_work);
2310 efx_pci_remove_main(efx);
2313 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2315 pci_set_drvdata(pci_dev, NULL);
2316 efx_fini_struct(efx);
2317 free_netdev(efx->net_dev);
2320 /* Main body of NIC initialisation
2321 * This is called at module load (or hotplug insertion, theoretically).
2323 static int efx_pci_probe_main(struct efx_nic *efx)
2327 /* Do start-of-day initialisation */
2328 rc = efx_probe_all(efx);
2332 rc = efx_init_napi(efx);
2336 rc = efx->type->init(efx);
2338 netif_err(efx, probe, efx->net_dev,
2339 "failed to initialise NIC\n");
2343 rc = efx_init_port(efx);
2345 netif_err(efx, probe, efx->net_dev,
2346 "failed to initialise port\n");
2350 efx_init_channels(efx);
2352 rc = efx_nic_init_interrupt(efx);
2359 efx_fini_channels(efx);
2362 efx->type->fini(efx);
2366 efx_remove_all(efx);
2371 /* NIC initialisation
2373 * This is called at module load (or hotplug insertion,
2374 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2375 * sets up and registers the network devices with the kernel and hooks
2376 * the interrupt service routine. It does not prepare the device for
2377 * transmission; this is left to the first time one of the network
2378 * interfaces is brought up (i.e. efx_net_open).
2380 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2381 const struct pci_device_id *entry)
2383 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2384 struct net_device *net_dev;
2385 struct efx_nic *efx;
2388 /* Allocate and initialise a struct net_device and struct efx_nic */
2389 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2392 net_dev->features |= (type->offload_features | NETIF_F_SG |
2393 NETIF_F_HIGHDMA | NETIF_F_TSO |
2395 if (type->offload_features & NETIF_F_V6_CSUM)
2396 net_dev->features |= NETIF_F_TSO6;
2397 /* Mask for features that also apply to VLAN devices */
2398 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2399 NETIF_F_HIGHDMA | NETIF_F_TSO);
2400 efx = netdev_priv(net_dev);
2401 pci_set_drvdata(pci_dev, efx);
2402 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2403 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2407 netif_info(efx, probe, efx->net_dev,
2408 "Solarflare Communications NIC detected\n");
2410 /* Set up basic I/O (BAR mappings etc) */
2411 rc = efx_init_io(efx);
2415 /* No serialisation is required with the reset path because
2416 * we're in STATE_INIT. */
2417 for (i = 0; i < 5; i++) {
2418 rc = efx_pci_probe_main(efx);
2420 /* Serialise against efx_reset(). No more resets will be
2421 * scheduled since efx_stop_all() has been called, and we
2422 * have not and never have been registered with either
2423 * the rtnetlink or driverlink layers. */
2424 cancel_work_sync(&efx->reset_work);
2427 if (efx->reset_pending != RESET_TYPE_NONE) {
2428 /* If there was a scheduled reset during
2429 * probe, the NIC is probably hosed anyway */
2430 efx_pci_remove_main(efx);
2437 /* Retry if a recoverably reset event has been scheduled */
2438 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2439 (efx->reset_pending != RESET_TYPE_ALL))
2442 efx->reset_pending = RESET_TYPE_NONE;
2446 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2450 /* Switch to the running state before we expose the device to the OS,
2451 * so that dev_open()|efx_start_all() will actually start the device */
2452 efx->state = STATE_RUNNING;
2454 rc = efx_register_netdev(efx);
2458 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2461 efx_mtd_probe(efx); /* allowed to fail */
2466 efx_pci_remove_main(efx);
2471 efx_fini_struct(efx);
2474 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2475 free_netdev(net_dev);
2479 static int efx_pm_freeze(struct device *dev)
2481 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2483 efx->state = STATE_FINI;
2485 netif_device_detach(efx->net_dev);
2488 efx_fini_channels(efx);
2493 static int efx_pm_thaw(struct device *dev)
2495 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2497 efx->state = STATE_INIT;
2499 efx_init_channels(efx);
2501 mutex_lock(&efx->mac_lock);
2502 efx->phy_op->reconfigure(efx);
2503 mutex_unlock(&efx->mac_lock);
2507 netif_device_attach(efx->net_dev);
2509 efx->state = STATE_RUNNING;
2511 efx->type->resume_wol(efx);
2513 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2514 queue_work(reset_workqueue, &efx->reset_work);
2519 static int efx_pm_poweroff(struct device *dev)
2521 struct pci_dev *pci_dev = to_pci_dev(dev);
2522 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2524 efx->type->fini(efx);
2526 efx->reset_pending = RESET_TYPE_NONE;
2528 pci_save_state(pci_dev);
2529 return pci_set_power_state(pci_dev, PCI_D3hot);
2532 /* Used for both resume and restore */
2533 static int efx_pm_resume(struct device *dev)
2535 struct pci_dev *pci_dev = to_pci_dev(dev);
2536 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2539 rc = pci_set_power_state(pci_dev, PCI_D0);
2542 pci_restore_state(pci_dev);
2543 rc = pci_enable_device(pci_dev);
2546 pci_set_master(efx->pci_dev);
2547 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2550 rc = efx->type->init(efx);
2557 static int efx_pm_suspend(struct device *dev)
2562 rc = efx_pm_poweroff(dev);
2568 static struct dev_pm_ops efx_pm_ops = {
2569 .suspend = efx_pm_suspend,
2570 .resume = efx_pm_resume,
2571 .freeze = efx_pm_freeze,
2572 .thaw = efx_pm_thaw,
2573 .poweroff = efx_pm_poweroff,
2574 .restore = efx_pm_resume,
2577 static struct pci_driver efx_pci_driver = {
2578 .name = KBUILD_MODNAME,
2579 .id_table = efx_pci_table,
2580 .probe = efx_pci_probe,
2581 .remove = efx_pci_remove,
2582 .driver.pm = &efx_pm_ops,
2585 /**************************************************************************
2587 * Kernel module interface
2589 *************************************************************************/
2591 module_param(interrupt_mode, uint, 0444);
2592 MODULE_PARM_DESC(interrupt_mode,
2593 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2595 static int __init efx_init_module(void)
2599 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2601 rc = register_netdevice_notifier(&efx_netdev_notifier);
2605 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2606 if (!reset_workqueue) {
2611 rc = pci_register_driver(&efx_pci_driver);
2618 destroy_workqueue(reset_workqueue);
2620 unregister_netdevice_notifier(&efx_netdev_notifier);
2625 static void __exit efx_exit_module(void)
2627 printk(KERN_INFO "Solarflare NET driver unloading\n");
2629 pci_unregister_driver(&efx_pci_driver);
2630 destroy_workqueue(reset_workqueue);
2631 unregister_netdevice_notifier(&efx_netdev_notifier);
2635 module_init(efx_init_module);
2636 module_exit(efx_exit_module);
2638 MODULE_AUTHOR("Solarflare Communications and "
2639 "Michael Brown <mbrown@fensystems.co.uk>");
2640 MODULE_DESCRIPTION("Solarflare Communications network driver");
2641 MODULE_LICENSE("GPL");
2642 MODULE_DEVICE_TABLE(pci, efx_pci_table);