1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* This controls whether or not the driver will initialise devices
126 * with invalid MAC addresses stored in the EEPROM or flash. If true,
127 * such devices will be initialised with a random locally-generated
128 * MAC address. This allows for loading the sfc_mtd driver to
129 * reprogram the flash, even if the flash contents (including the MAC
130 * address) have previously been erased.
132 static unsigned int allow_bad_hwaddr;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * The default for RX should strike a balance between increasing the
138 * round-trip latency and reducing overhead.
140 static unsigned int rx_irq_mod_usec = 60;
142 /* Initial interrupt moderation settings. They can be modified after
143 * module load with ethtool.
145 * This default is chosen to ensure that a 10G link does not go idle
146 * while a TX queue is stopped after it has become full. A queue is
147 * restarted when it drops below half full. The time this takes (assuming
148 * worst case 3 descriptors per packet and 1024 descriptors) is
149 * 512 / 3 * 1.2 = 205 usec.
151 static unsigned int tx_irq_mod_usec = 150;
153 /* This is the first interrupt mode to try out of:
158 static unsigned int interrupt_mode;
160 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
161 * i.e. the number of CPUs among which we may distribute simultaneous
162 * interrupt handling.
164 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
165 * The default (0) means to assign an interrupt to each package (level II cache)
167 static unsigned int rss_cpus;
168 module_param(rss_cpus, uint, 0444);
169 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
171 static int phy_flash_cfg;
172 module_param(phy_flash_cfg, int, 0644);
173 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
175 static unsigned irq_adapt_low_thresh = 10000;
176 module_param(irq_adapt_low_thresh, uint, 0644);
177 MODULE_PARM_DESC(irq_adapt_low_thresh,
178 "Threshold score for reducing IRQ moderation");
180 static unsigned irq_adapt_high_thresh = 20000;
181 module_param(irq_adapt_high_thresh, uint, 0644);
182 MODULE_PARM_DESC(irq_adapt_high_thresh,
183 "Threshold score for increasing IRQ moderation");
185 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
186 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
187 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
188 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
189 module_param(debug, uint, 0);
190 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
192 /**************************************************************************
194 * Utility functions and prototypes
196 *************************************************************************/
198 static void efx_remove_channels(struct efx_nic *efx);
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_fini_napi(struct efx_nic *efx);
201 static void efx_fini_struct(struct efx_nic *efx);
202 static void efx_start_all(struct efx_nic *efx);
203 static void efx_stop_all(struct efx_nic *efx);
205 #define EFX_ASSERT_RESET_SERIALISED(efx) \
207 if ((efx->state == STATE_RUNNING) || \
208 (efx->state == STATE_DISABLED)) \
212 /**************************************************************************
214 * Event queue processing
216 *************************************************************************/
218 /* Process channel's event queue
220 * This function is responsible for processing the event queue of a
221 * single channel. The caller must guarantee that this function will
222 * never be concurrently called more than once on the same channel,
223 * though different channels may be being processed concurrently.
225 static int efx_process_channel(struct efx_channel *channel, int budget)
227 struct efx_nic *efx = channel->efx;
230 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
234 spent = efx_nic_process_eventq(channel, budget);
238 /* Deliver last RX packet. */
239 if (channel->rx_pkt) {
240 __efx_rx_packet(channel, channel->rx_pkt,
241 channel->rx_pkt_csummed);
242 channel->rx_pkt = NULL;
245 efx_rx_strategy(channel);
247 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
252 /* Mark channel as finished processing
254 * Note that since we will not receive further interrupts for this
255 * channel before we finish processing and call the eventq_read_ack()
256 * method, there is no need to use the interrupt hold-off timers.
258 static inline void efx_channel_processed(struct efx_channel *channel)
260 /* The interrupt handler for this channel may set work_pending
261 * as soon as we acknowledge the events we've seen. Make sure
262 * it's cleared before then. */
263 channel->work_pending = false;
266 efx_nic_eventq_read_ack(channel);
271 * NAPI guarantees serialisation of polls of the same device, which
272 * provides the guarantee required by efx_process_channel().
274 static int efx_poll(struct napi_struct *napi, int budget)
276 struct efx_channel *channel =
277 container_of(napi, struct efx_channel, napi_str);
278 struct efx_nic *efx = channel->efx;
281 netif_vdbg(efx, intr, efx->net_dev,
282 "channel %d NAPI poll executing on CPU %d\n",
283 channel->channel, raw_smp_processor_id());
285 spent = efx_process_channel(channel, budget);
287 if (spent < budget) {
288 if (channel->channel < efx->n_rx_channels &&
289 efx->irq_rx_adaptive &&
290 unlikely(++channel->irq_count == 1000)) {
291 if (unlikely(channel->irq_mod_score <
292 irq_adapt_low_thresh)) {
293 if (channel->irq_moderation > 1) {
294 channel->irq_moderation -= 1;
295 efx->type->push_irq_moderation(channel);
297 } else if (unlikely(channel->irq_mod_score >
298 irq_adapt_high_thresh)) {
299 if (channel->irq_moderation <
300 efx->irq_rx_moderation) {
301 channel->irq_moderation += 1;
302 efx->type->push_irq_moderation(channel);
305 channel->irq_count = 0;
306 channel->irq_mod_score = 0;
309 /* There is no race here; although napi_disable() will
310 * only wait for napi_complete(), this isn't a problem
311 * since efx_channel_processed() will have no effect if
312 * interrupts have already been disabled.
315 efx_channel_processed(channel);
321 /* Process the eventq of the specified channel immediately on this CPU
323 * Disable hardware generated interrupts, wait for any existing
324 * processing to finish, then directly poll (and ack ) the eventq.
325 * Finally reenable NAPI and interrupts.
327 * Since we are touching interrupts the caller should hold the suspend lock
329 void efx_process_channel_now(struct efx_channel *channel)
331 struct efx_nic *efx = channel->efx;
333 BUG_ON(channel->channel >= efx->n_channels);
334 BUG_ON(!channel->enabled);
336 /* Disable interrupts and wait for ISRs to complete */
337 efx_nic_disable_interrupts(efx);
338 if (efx->legacy_irq) {
339 synchronize_irq(efx->legacy_irq);
340 efx->legacy_irq_enabled = false;
343 synchronize_irq(channel->irq);
345 /* Wait for any NAPI processing to complete */
346 napi_disable(&channel->napi_str);
348 /* Poll the channel */
349 efx_process_channel(channel, channel->eventq_mask + 1);
351 /* Ack the eventq. This may cause an interrupt to be generated
352 * when they are reenabled */
353 efx_channel_processed(channel);
355 napi_enable(&channel->napi_str);
357 efx->legacy_irq_enabled = true;
358 efx_nic_enable_interrupts(efx);
361 /* Create event queue
362 * Event queue memory allocations are done only once. If the channel
363 * is reset, the memory buffer will be reused; this guards against
364 * errors during channel reset and also simplifies interrupt handling.
366 static int efx_probe_eventq(struct efx_channel *channel)
368 struct efx_nic *efx = channel->efx;
369 unsigned long entries;
371 netif_dbg(channel->efx, probe, channel->efx->net_dev,
372 "chan %d create event queue\n", channel->channel);
374 /* Build an event queue with room for one event per tx and rx buffer,
375 * plus some extra for link state events and MCDI completions. */
376 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
377 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
378 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
380 return efx_nic_probe_eventq(channel);
383 /* Prepare channel's event queue */
384 static void efx_init_eventq(struct efx_channel *channel)
386 netif_dbg(channel->efx, drv, channel->efx->net_dev,
387 "chan %d init event queue\n", channel->channel);
389 channel->eventq_read_ptr = 0;
391 efx_nic_init_eventq(channel);
394 static void efx_fini_eventq(struct efx_channel *channel)
396 netif_dbg(channel->efx, drv, channel->efx->net_dev,
397 "chan %d fini event queue\n", channel->channel);
399 efx_nic_fini_eventq(channel);
402 static void efx_remove_eventq(struct efx_channel *channel)
404 netif_dbg(channel->efx, drv, channel->efx->net_dev,
405 "chan %d remove event queue\n", channel->channel);
407 efx_nic_remove_eventq(channel);
410 /**************************************************************************
414 *************************************************************************/
416 /* Allocate and initialise a channel structure, optionally copying
417 * parameters (but not resources) from an old channel structure. */
418 static struct efx_channel *
419 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
421 struct efx_channel *channel;
422 struct efx_rx_queue *rx_queue;
423 struct efx_tx_queue *tx_queue;
427 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
431 *channel = *old_channel;
433 memset(&channel->eventq, 0, sizeof(channel->eventq));
435 rx_queue = &channel->rx_queue;
436 rx_queue->buffer = NULL;
437 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
439 for (j = 0; j < EFX_TXQ_TYPES; j++) {
440 tx_queue = &channel->tx_queue[j];
441 if (tx_queue->channel)
442 tx_queue->channel = channel;
443 tx_queue->buffer = NULL;
444 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
447 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
452 channel->channel = i;
454 for (j = 0; j < EFX_TXQ_TYPES; j++) {
455 tx_queue = &channel->tx_queue[j];
457 tx_queue->queue = i * EFX_TXQ_TYPES + j;
458 tx_queue->channel = channel;
462 spin_lock_init(&channel->tx_stop_lock);
463 atomic_set(&channel->tx_stop_count, 1);
465 rx_queue = &channel->rx_queue;
467 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
468 (unsigned long)rx_queue);
473 static int efx_probe_channel(struct efx_channel *channel)
475 struct efx_tx_queue *tx_queue;
476 struct efx_rx_queue *rx_queue;
479 netif_dbg(channel->efx, probe, channel->efx->net_dev,
480 "creating channel %d\n", channel->channel);
482 rc = efx_probe_eventq(channel);
486 efx_for_each_channel_tx_queue(tx_queue, channel) {
487 rc = efx_probe_tx_queue(tx_queue);
492 efx_for_each_channel_rx_queue(rx_queue, channel) {
493 rc = efx_probe_rx_queue(rx_queue);
498 channel->n_rx_frm_trunc = 0;
503 efx_for_each_channel_rx_queue(rx_queue, channel)
504 efx_remove_rx_queue(rx_queue);
506 efx_for_each_channel_tx_queue(tx_queue, channel)
507 efx_remove_tx_queue(tx_queue);
513 static void efx_set_channel_names(struct efx_nic *efx)
515 struct efx_channel *channel;
516 const char *type = "";
519 efx_for_each_channel(channel, efx) {
520 number = channel->channel;
521 if (efx->n_channels > efx->n_rx_channels) {
522 if (channel->channel < efx->n_rx_channels) {
526 number -= efx->n_rx_channels;
529 snprintf(efx->channel_name[channel->channel],
530 sizeof(efx->channel_name[0]),
531 "%s%s-%d", efx->name, type, number);
535 static int efx_probe_channels(struct efx_nic *efx)
537 struct efx_channel *channel;
540 /* Restart special buffer allocation */
541 efx->next_buffer_table = 0;
543 efx_for_each_channel(channel, efx) {
544 rc = efx_probe_channel(channel);
546 netif_err(efx, probe, efx->net_dev,
547 "failed to create channel %d\n",
552 efx_set_channel_names(efx);
557 efx_remove_channels(efx);
561 /* Channels are shutdown and reinitialised whilst the NIC is running
562 * to propagate configuration changes (mtu, checksum offload), or
563 * to clear hardware error conditions
565 static void efx_init_channels(struct efx_nic *efx)
567 struct efx_tx_queue *tx_queue;
568 struct efx_rx_queue *rx_queue;
569 struct efx_channel *channel;
571 /* Calculate the rx buffer allocation parameters required to
572 * support the current MTU, including padding for header
573 * alignment and overruns.
575 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
576 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
577 efx->type->rx_buffer_hash_size +
578 efx->type->rx_buffer_padding);
579 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
580 sizeof(struct efx_rx_page_state));
582 /* Initialise the channels */
583 efx_for_each_channel(channel, efx) {
584 netif_dbg(channel->efx, drv, channel->efx->net_dev,
585 "init chan %d\n", channel->channel);
587 efx_init_eventq(channel);
589 efx_for_each_channel_tx_queue(tx_queue, channel)
590 efx_init_tx_queue(tx_queue);
592 /* The rx buffer allocation strategy is MTU dependent */
593 efx_rx_strategy(channel);
595 efx_for_each_channel_rx_queue(rx_queue, channel)
596 efx_init_rx_queue(rx_queue);
598 WARN_ON(channel->rx_pkt != NULL);
599 efx_rx_strategy(channel);
603 /* This enables event queue processing and packet transmission.
605 * Note that this function is not allowed to fail, since that would
606 * introduce too much complexity into the suspend/resume path.
608 static void efx_start_channel(struct efx_channel *channel)
610 struct efx_rx_queue *rx_queue;
612 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
613 "starting chan %d\n", channel->channel);
615 /* The interrupt handler for this channel may set work_pending
616 * as soon as we enable it. Make sure it's cleared before
617 * then. Similarly, make sure it sees the enabled flag set. */
618 channel->work_pending = false;
619 channel->enabled = true;
622 /* Fill the queues before enabling NAPI */
623 efx_for_each_channel_rx_queue(rx_queue, channel)
624 efx_fast_push_rx_descriptors(rx_queue);
626 napi_enable(&channel->napi_str);
629 /* This disables event queue processing and packet transmission.
630 * This function does not guarantee that all queue processing
631 * (e.g. RX refill) is complete.
633 static void efx_stop_channel(struct efx_channel *channel)
635 if (!channel->enabled)
638 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
639 "stop chan %d\n", channel->channel);
641 channel->enabled = false;
642 napi_disable(&channel->napi_str);
645 static void efx_fini_channels(struct efx_nic *efx)
647 struct efx_channel *channel;
648 struct efx_tx_queue *tx_queue;
649 struct efx_rx_queue *rx_queue;
652 EFX_ASSERT_RESET_SERIALISED(efx);
653 BUG_ON(efx->port_enabled);
655 rc = efx_nic_flush_queues(efx);
656 if (rc && EFX_WORKAROUND_7803(efx)) {
657 /* Schedule a reset to recover from the flush failure. The
658 * descriptor caches reference memory we're about to free,
659 * but falcon_reconfigure_mac_wrapper() won't reconnect
660 * the MACs because of the pending reset. */
661 netif_err(efx, drv, efx->net_dev,
662 "Resetting to recover from flush failure\n");
663 efx_schedule_reset(efx, RESET_TYPE_ALL);
665 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
667 netif_dbg(efx, drv, efx->net_dev,
668 "successfully flushed all queues\n");
671 efx_for_each_channel(channel, efx) {
672 netif_dbg(channel->efx, drv, channel->efx->net_dev,
673 "shut down chan %d\n", channel->channel);
675 efx_for_each_channel_rx_queue(rx_queue, channel)
676 efx_fini_rx_queue(rx_queue);
677 efx_for_each_channel_tx_queue(tx_queue, channel)
678 efx_fini_tx_queue(tx_queue);
679 efx_fini_eventq(channel);
683 static void efx_remove_channel(struct efx_channel *channel)
685 struct efx_tx_queue *tx_queue;
686 struct efx_rx_queue *rx_queue;
688 netif_dbg(channel->efx, drv, channel->efx->net_dev,
689 "destroy chan %d\n", channel->channel);
691 efx_for_each_channel_rx_queue(rx_queue, channel)
692 efx_remove_rx_queue(rx_queue);
693 efx_for_each_channel_tx_queue(tx_queue, channel)
694 efx_remove_tx_queue(tx_queue);
695 efx_remove_eventq(channel);
698 static void efx_remove_channels(struct efx_nic *efx)
700 struct efx_channel *channel;
702 efx_for_each_channel(channel, efx)
703 efx_remove_channel(channel);
707 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
709 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
710 u32 old_rxq_entries, old_txq_entries;
715 efx_fini_channels(efx);
718 memset(other_channel, 0, sizeof(other_channel));
719 for (i = 0; i < efx->n_channels; i++) {
720 channel = efx_alloc_channel(efx, i, efx->channel[i]);
725 other_channel[i] = channel;
728 /* Swap entry counts and channel pointers */
729 old_rxq_entries = efx->rxq_entries;
730 old_txq_entries = efx->txq_entries;
731 efx->rxq_entries = rxq_entries;
732 efx->txq_entries = txq_entries;
733 for (i = 0; i < efx->n_channels; i++) {
734 channel = efx->channel[i];
735 efx->channel[i] = other_channel[i];
736 other_channel[i] = channel;
739 rc = efx_probe_channels(efx);
743 /* Destroy old channels */
744 for (i = 0; i < efx->n_channels; i++)
745 efx_remove_channel(other_channel[i]);
747 /* Free unused channel structures */
748 for (i = 0; i < efx->n_channels; i++)
749 kfree(other_channel[i]);
751 efx_init_channels(efx);
757 efx->rxq_entries = old_rxq_entries;
758 efx->txq_entries = old_txq_entries;
759 for (i = 0; i < efx->n_channels; i++) {
760 channel = efx->channel[i];
761 efx->channel[i] = other_channel[i];
762 other_channel[i] = channel;
767 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
769 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
772 /**************************************************************************
776 **************************************************************************/
778 /* This ensures that the kernel is kept informed (via
779 * netif_carrier_on/off) of the link status, and also maintains the
780 * link status's stop on the port's TX queue.
782 void efx_link_status_changed(struct efx_nic *efx)
784 struct efx_link_state *link_state = &efx->link_state;
786 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
787 * that no events are triggered between unregister_netdev() and the
788 * driver unloading. A more general condition is that NETDEV_CHANGE
789 * can only be generated between NETDEV_UP and NETDEV_DOWN */
790 if (!netif_running(efx->net_dev))
793 if (efx->port_inhibited) {
794 netif_carrier_off(efx->net_dev);
798 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
799 efx->n_link_state_changes++;
802 netif_carrier_on(efx->net_dev);
804 netif_carrier_off(efx->net_dev);
807 /* Status message for kernel log */
808 if (link_state->up) {
809 netif_info(efx, link, efx->net_dev,
810 "link up at %uMbps %s-duplex (MTU %d)%s\n",
811 link_state->speed, link_state->fd ? "full" : "half",
813 (efx->promiscuous ? " [PROMISC]" : ""));
815 netif_info(efx, link, efx->net_dev, "link down\n");
820 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
822 efx->link_advertising = advertising;
824 if (advertising & ADVERTISED_Pause)
825 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
827 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
828 if (advertising & ADVERTISED_Asym_Pause)
829 efx->wanted_fc ^= EFX_FC_TX;
833 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
835 efx->wanted_fc = wanted_fc;
836 if (efx->link_advertising) {
837 if (wanted_fc & EFX_FC_RX)
838 efx->link_advertising |= (ADVERTISED_Pause |
839 ADVERTISED_Asym_Pause);
841 efx->link_advertising &= ~(ADVERTISED_Pause |
842 ADVERTISED_Asym_Pause);
843 if (wanted_fc & EFX_FC_TX)
844 efx->link_advertising ^= ADVERTISED_Asym_Pause;
848 static void efx_fini_port(struct efx_nic *efx);
850 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
851 * the MAC appropriately. All other PHY configuration changes are pushed
852 * through phy_op->set_settings(), and pushed asynchronously to the MAC
853 * through efx_monitor().
855 * Callers must hold the mac_lock
857 int __efx_reconfigure_port(struct efx_nic *efx)
859 enum efx_phy_mode phy_mode;
862 WARN_ON(!mutex_is_locked(&efx->mac_lock));
864 /* Serialise the promiscuous flag with efx_set_multicast_list. */
865 if (efx_dev_registered(efx)) {
866 netif_addr_lock_bh(efx->net_dev);
867 netif_addr_unlock_bh(efx->net_dev);
870 /* Disable PHY transmit in mac level loopbacks */
871 phy_mode = efx->phy_mode;
872 if (LOOPBACK_INTERNAL(efx))
873 efx->phy_mode |= PHY_MODE_TX_DISABLED;
875 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
877 rc = efx->type->reconfigure_port(efx);
880 efx->phy_mode = phy_mode;
885 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
887 int efx_reconfigure_port(struct efx_nic *efx)
891 EFX_ASSERT_RESET_SERIALISED(efx);
893 mutex_lock(&efx->mac_lock);
894 rc = __efx_reconfigure_port(efx);
895 mutex_unlock(&efx->mac_lock);
900 /* Asynchronous work item for changing MAC promiscuity and multicast
901 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
903 static void efx_mac_work(struct work_struct *data)
905 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
907 mutex_lock(&efx->mac_lock);
908 if (efx->port_enabled) {
909 efx->type->push_multicast_hash(efx);
910 efx->mac_op->reconfigure(efx);
912 mutex_unlock(&efx->mac_lock);
915 static int efx_probe_port(struct efx_nic *efx)
919 netif_dbg(efx, probe, efx->net_dev, "create port\n");
922 efx->phy_mode = PHY_MODE_SPECIAL;
924 /* Connect up MAC/PHY operations table */
925 rc = efx->type->probe_port(efx);
929 /* Sanity check MAC address */
930 if (is_valid_ether_addr(efx->mac_address)) {
931 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
933 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
935 if (!allow_bad_hwaddr) {
939 random_ether_addr(efx->net_dev->dev_addr);
940 netif_info(efx, probe, efx->net_dev,
941 "using locally-generated MAC %pM\n",
942 efx->net_dev->dev_addr);
948 efx->type->remove_port(efx);
952 static int efx_init_port(struct efx_nic *efx)
956 netif_dbg(efx, drv, efx->net_dev, "init port\n");
958 mutex_lock(&efx->mac_lock);
960 rc = efx->phy_op->init(efx);
964 efx->port_initialized = true;
966 /* Reconfigure the MAC before creating dma queues (required for
967 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
968 efx->mac_op->reconfigure(efx);
970 /* Ensure the PHY advertises the correct flow control settings */
971 rc = efx->phy_op->reconfigure(efx);
975 mutex_unlock(&efx->mac_lock);
979 efx->phy_op->fini(efx);
981 mutex_unlock(&efx->mac_lock);
985 static void efx_start_port(struct efx_nic *efx)
987 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
988 BUG_ON(efx->port_enabled);
990 mutex_lock(&efx->mac_lock);
991 efx->port_enabled = true;
993 /* efx_mac_work() might have been scheduled after efx_stop_port(),
994 * and then cancelled by efx_flush_all() */
995 efx->type->push_multicast_hash(efx);
996 efx->mac_op->reconfigure(efx);
998 mutex_unlock(&efx->mac_lock);
1001 /* Prevent efx_mac_work() and efx_monitor() from working */
1002 static void efx_stop_port(struct efx_nic *efx)
1004 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1006 mutex_lock(&efx->mac_lock);
1007 efx->port_enabled = false;
1008 mutex_unlock(&efx->mac_lock);
1010 /* Serialise against efx_set_multicast_list() */
1011 if (efx_dev_registered(efx)) {
1012 netif_addr_lock_bh(efx->net_dev);
1013 netif_addr_unlock_bh(efx->net_dev);
1017 static void efx_fini_port(struct efx_nic *efx)
1019 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1021 if (!efx->port_initialized)
1024 efx->phy_op->fini(efx);
1025 efx->port_initialized = false;
1027 efx->link_state.up = false;
1028 efx_link_status_changed(efx);
1031 static void efx_remove_port(struct efx_nic *efx)
1033 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1035 efx->type->remove_port(efx);
1038 /**************************************************************************
1042 **************************************************************************/
1044 /* This configures the PCI device to enable I/O and DMA. */
1045 static int efx_init_io(struct efx_nic *efx)
1047 struct pci_dev *pci_dev = efx->pci_dev;
1048 dma_addr_t dma_mask = efx->type->max_dma_mask;
1051 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1053 rc = pci_enable_device(pci_dev);
1055 netif_err(efx, probe, efx->net_dev,
1056 "failed to enable PCI device\n");
1060 pci_set_master(pci_dev);
1062 /* Set the PCI DMA mask. Try all possibilities from our
1063 * genuine mask down to 32 bits, because some architectures
1064 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1065 * masks event though they reject 46 bit masks.
1067 while (dma_mask > 0x7fffffffUL) {
1068 if (pci_dma_supported(pci_dev, dma_mask) &&
1069 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1074 netif_err(efx, probe, efx->net_dev,
1075 "could not find a suitable DMA mask\n");
1078 netif_dbg(efx, probe, efx->net_dev,
1079 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1080 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1082 /* pci_set_consistent_dma_mask() is not *allowed* to
1083 * fail with a mask that pci_set_dma_mask() accepted,
1084 * but just in case...
1086 netif_err(efx, probe, efx->net_dev,
1087 "failed to set consistent DMA mask\n");
1091 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1092 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1094 netif_err(efx, probe, efx->net_dev,
1095 "request for memory BAR failed\n");
1099 efx->membase = ioremap_nocache(efx->membase_phys,
1100 efx->type->mem_map_size);
1101 if (!efx->membase) {
1102 netif_err(efx, probe, efx->net_dev,
1103 "could not map memory BAR at %llx+%x\n",
1104 (unsigned long long)efx->membase_phys,
1105 efx->type->mem_map_size);
1109 netif_dbg(efx, probe, efx->net_dev,
1110 "memory BAR at %llx+%x (virtual %p)\n",
1111 (unsigned long long)efx->membase_phys,
1112 efx->type->mem_map_size, efx->membase);
1117 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1119 efx->membase_phys = 0;
1121 pci_disable_device(efx->pci_dev);
1126 static void efx_fini_io(struct efx_nic *efx)
1128 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1131 iounmap(efx->membase);
1132 efx->membase = NULL;
1135 if (efx->membase_phys) {
1136 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1137 efx->membase_phys = 0;
1140 pci_disable_device(efx->pci_dev);
1143 /* Get number of channels wanted. Each channel will have its own IRQ,
1144 * 1 RX queue and/or 2 TX queues. */
1145 static int efx_wanted_channels(void)
1147 cpumask_var_t core_mask;
1151 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1153 "sfc: RSS disabled due to allocation failure\n");
1158 for_each_online_cpu(cpu) {
1159 if (!cpumask_test_cpu(cpu, core_mask)) {
1161 cpumask_or(core_mask, core_mask,
1162 topology_core_cpumask(cpu));
1166 free_cpumask_var(core_mask);
1170 /* Probe the number and type of interrupts we are able to obtain, and
1171 * the resulting numbers of channels and RX queues.
1173 static void efx_probe_interrupts(struct efx_nic *efx)
1176 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1179 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1180 struct msix_entry xentries[EFX_MAX_CHANNELS];
1183 n_channels = efx_wanted_channels();
1184 if (separate_tx_channels)
1186 n_channels = min(n_channels, max_channels);
1188 for (i = 0; i < n_channels; i++)
1189 xentries[i].entry = i;
1190 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1192 netif_err(efx, drv, efx->net_dev,
1193 "WARNING: Insufficient MSI-X vectors"
1194 " available (%d < %d).\n", rc, n_channels);
1195 netif_err(efx, drv, efx->net_dev,
1196 "WARNING: Performance may be reduced.\n");
1197 EFX_BUG_ON_PARANOID(rc >= n_channels);
1199 rc = pci_enable_msix(efx->pci_dev, xentries,
1204 efx->n_channels = n_channels;
1205 if (separate_tx_channels) {
1206 efx->n_tx_channels =
1207 max(efx->n_channels / 2, 1U);
1208 efx->n_rx_channels =
1209 max(efx->n_channels -
1210 efx->n_tx_channels, 1U);
1212 efx->n_tx_channels = efx->n_channels;
1213 efx->n_rx_channels = efx->n_channels;
1215 for (i = 0; i < n_channels; i++)
1216 efx_get_channel(efx, i)->irq =
1219 /* Fall back to single channel MSI */
1220 efx->interrupt_mode = EFX_INT_MODE_MSI;
1221 netif_err(efx, drv, efx->net_dev,
1222 "could not enable MSI-X\n");
1226 /* Try single interrupt MSI */
1227 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1228 efx->n_channels = 1;
1229 efx->n_rx_channels = 1;
1230 efx->n_tx_channels = 1;
1231 rc = pci_enable_msi(efx->pci_dev);
1233 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1235 netif_err(efx, drv, efx->net_dev,
1236 "could not enable MSI\n");
1237 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1241 /* Assume legacy interrupts */
1242 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1243 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1244 efx->n_rx_channels = 1;
1245 efx->n_tx_channels = 1;
1246 efx->legacy_irq = efx->pci_dev->irq;
1250 static void efx_remove_interrupts(struct efx_nic *efx)
1252 struct efx_channel *channel;
1254 /* Remove MSI/MSI-X interrupts */
1255 efx_for_each_channel(channel, efx)
1257 pci_disable_msi(efx->pci_dev);
1258 pci_disable_msix(efx->pci_dev);
1260 /* Remove legacy interrupt */
1261 efx->legacy_irq = 0;
1264 struct efx_tx_queue *
1265 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1267 unsigned tx_channel_offset =
1268 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1269 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1270 type >= EFX_TXQ_TYPES);
1271 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1274 static void efx_set_channels(struct efx_nic *efx)
1276 struct efx_channel *channel;
1277 struct efx_tx_queue *tx_queue;
1278 unsigned tx_channel_offset =
1279 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1281 /* Channel pointers were set in efx_init_struct() but we now
1282 * need to clear them for TX queues in any RX-only channels. */
1283 efx_for_each_channel(channel, efx) {
1284 if (channel->channel - tx_channel_offset >=
1285 efx->n_tx_channels) {
1286 efx_for_each_channel_tx_queue(tx_queue, channel)
1287 tx_queue->channel = NULL;
1292 static int efx_probe_nic(struct efx_nic *efx)
1297 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1299 /* Carry out hardware-type specific initialisation */
1300 rc = efx->type->probe(efx);
1304 /* Determine the number of channels and queues by trying to hook
1305 * in MSI-X interrupts. */
1306 efx_probe_interrupts(efx);
1308 if (efx->n_channels > 1)
1309 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1310 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1311 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1313 efx_set_channels(efx);
1314 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1315 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1317 /* Initialise the interrupt moderation settings */
1318 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1323 static void efx_remove_nic(struct efx_nic *efx)
1325 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1327 efx_remove_interrupts(efx);
1328 efx->type->remove(efx);
1331 /**************************************************************************
1333 * NIC startup/shutdown
1335 *************************************************************************/
1337 static int efx_probe_all(struct efx_nic *efx)
1341 rc = efx_probe_nic(efx);
1343 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1347 rc = efx_probe_port(efx);
1349 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1353 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1354 rc = efx_probe_channels(efx);
1358 rc = efx_probe_filters(efx);
1360 netif_err(efx, probe, efx->net_dev,
1361 "failed to create filter tables\n");
1368 efx_remove_channels(efx);
1370 efx_remove_port(efx);
1372 efx_remove_nic(efx);
1377 /* Called after previous invocation(s) of efx_stop_all, restarts the
1378 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1379 * and ensures that the port is scheduled to be reconfigured.
1380 * This function is safe to call multiple times when the NIC is in any
1382 static void efx_start_all(struct efx_nic *efx)
1384 struct efx_channel *channel;
1386 EFX_ASSERT_RESET_SERIALISED(efx);
1388 /* Check that it is appropriate to restart the interface. All
1389 * of these flags are safe to read under just the rtnl lock */
1390 if (efx->port_enabled)
1392 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1394 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1397 /* Mark the port as enabled so port reconfigurations can start, then
1398 * restart the transmit interface early so the watchdog timer stops */
1399 efx_start_port(efx);
1401 efx_for_each_channel(channel, efx) {
1402 if (efx_dev_registered(efx))
1403 efx_wake_queue(channel);
1404 efx_start_channel(channel);
1407 if (efx->legacy_irq)
1408 efx->legacy_irq_enabled = true;
1409 efx_nic_enable_interrupts(efx);
1411 /* Switch to event based MCDI completions after enabling interrupts.
1412 * If a reset has been scheduled, then we need to stay in polled mode.
1413 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1414 * reset_pending [modified from an atomic context], we instead guarantee
1415 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1416 efx_mcdi_mode_event(efx);
1417 if (efx->reset_pending != RESET_TYPE_NONE)
1418 efx_mcdi_mode_poll(efx);
1420 /* Start the hardware monitor if there is one. Otherwise (we're link
1421 * event driven), we have to poll the PHY because after an event queue
1422 * flush, we could have a missed a link state change */
1423 if (efx->type->monitor != NULL) {
1424 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1425 efx_monitor_interval);
1427 mutex_lock(&efx->mac_lock);
1428 if (efx->phy_op->poll(efx))
1429 efx_link_status_changed(efx);
1430 mutex_unlock(&efx->mac_lock);
1433 efx->type->start_stats(efx);
1436 /* Flush all delayed work. Should only be called when no more delayed work
1437 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1438 * since we're holding the rtnl_lock at this point. */
1439 static void efx_flush_all(struct efx_nic *efx)
1441 /* Make sure the hardware monitor is stopped */
1442 cancel_delayed_work_sync(&efx->monitor_work);
1443 /* Stop scheduled port reconfigurations */
1444 cancel_work_sync(&efx->mac_work);
1447 /* Quiesce hardware and software without bringing the link down.
1448 * Safe to call multiple times, when the nic and interface is in any
1449 * state. The caller is guaranteed to subsequently be in a position
1450 * to modify any hardware and software state they see fit without
1452 static void efx_stop_all(struct efx_nic *efx)
1454 struct efx_channel *channel;
1456 EFX_ASSERT_RESET_SERIALISED(efx);
1458 /* port_enabled can be read safely under the rtnl lock */
1459 if (!efx->port_enabled)
1462 efx->type->stop_stats(efx);
1464 /* Switch to MCDI polling on Siena before disabling interrupts */
1465 efx_mcdi_mode_poll(efx);
1467 /* Disable interrupts and wait for ISR to complete */
1468 efx_nic_disable_interrupts(efx);
1469 if (efx->legacy_irq) {
1470 synchronize_irq(efx->legacy_irq);
1471 efx->legacy_irq_enabled = false;
1473 efx_for_each_channel(channel, efx) {
1475 synchronize_irq(channel->irq);
1478 /* Stop all NAPI processing and synchronous rx refills */
1479 efx_for_each_channel(channel, efx)
1480 efx_stop_channel(channel);
1482 /* Stop all asynchronous port reconfigurations. Since all
1483 * event processing has already been stopped, there is no
1484 * window to loose phy events */
1487 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1490 /* Stop the kernel transmit interface late, so the watchdog
1491 * timer isn't ticking over the flush */
1492 if (efx_dev_registered(efx)) {
1493 struct efx_channel *channel;
1494 efx_for_each_channel(channel, efx)
1495 efx_stop_queue(channel);
1496 netif_tx_lock_bh(efx->net_dev);
1497 netif_tx_unlock_bh(efx->net_dev);
1501 static void efx_remove_all(struct efx_nic *efx)
1503 efx_remove_filters(efx);
1504 efx_remove_channels(efx);
1505 efx_remove_port(efx);
1506 efx_remove_nic(efx);
1509 /**************************************************************************
1511 * Interrupt moderation
1513 **************************************************************************/
1515 static unsigned irq_mod_ticks(int usecs, int resolution)
1518 return 0; /* cannot receive interrupts ahead of time :-) */
1519 if (usecs < resolution)
1520 return 1; /* never round down to 0 */
1521 return usecs / resolution;
1524 /* Set interrupt moderation parameters */
1525 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1528 struct efx_channel *channel;
1529 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1530 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1532 EFX_ASSERT_RESET_SERIALISED(efx);
1534 efx->irq_rx_adaptive = rx_adaptive;
1535 efx->irq_rx_moderation = rx_ticks;
1536 efx_for_each_channel(channel, efx) {
1537 if (efx_channel_get_rx_queue(channel))
1538 channel->irq_moderation = rx_ticks;
1539 else if (efx_channel_get_tx_queue(channel, 0))
1540 channel->irq_moderation = tx_ticks;
1544 /**************************************************************************
1548 **************************************************************************/
1550 /* Run periodically off the general workqueue */
1551 static void efx_monitor(struct work_struct *data)
1553 struct efx_nic *efx = container_of(data, struct efx_nic,
1556 netif_vdbg(efx, timer, efx->net_dev,
1557 "hardware monitor executing on CPU %d\n",
1558 raw_smp_processor_id());
1559 BUG_ON(efx->type->monitor == NULL);
1561 /* If the mac_lock is already held then it is likely a port
1562 * reconfiguration is already in place, which will likely do
1563 * most of the work of monitor() anyway. */
1564 if (mutex_trylock(&efx->mac_lock)) {
1565 if (efx->port_enabled)
1566 efx->type->monitor(efx);
1567 mutex_unlock(&efx->mac_lock);
1570 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1571 efx_monitor_interval);
1574 /**************************************************************************
1578 *************************************************************************/
1581 * Context: process, rtnl_lock() held.
1583 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1585 struct efx_nic *efx = netdev_priv(net_dev);
1586 struct mii_ioctl_data *data = if_mii(ifr);
1588 EFX_ASSERT_RESET_SERIALISED(efx);
1590 /* Convert phy_id from older PRTAD/DEVAD format */
1591 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1592 (data->phy_id & 0xfc00) == 0x0400)
1593 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1595 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1598 /**************************************************************************
1602 **************************************************************************/
1604 static int efx_init_napi(struct efx_nic *efx)
1606 struct efx_channel *channel;
1608 efx_for_each_channel(channel, efx) {
1609 channel->napi_dev = efx->net_dev;
1610 netif_napi_add(channel->napi_dev, &channel->napi_str,
1611 efx_poll, napi_weight);
1616 static void efx_fini_napi(struct efx_nic *efx)
1618 struct efx_channel *channel;
1620 efx_for_each_channel(channel, efx) {
1621 if (channel->napi_dev)
1622 netif_napi_del(&channel->napi_str);
1623 channel->napi_dev = NULL;
1627 /**************************************************************************
1629 * Kernel netpoll interface
1631 *************************************************************************/
1633 #ifdef CONFIG_NET_POLL_CONTROLLER
1635 /* Although in the common case interrupts will be disabled, this is not
1636 * guaranteed. However, all our work happens inside the NAPI callback,
1637 * so no locking is required.
1639 static void efx_netpoll(struct net_device *net_dev)
1641 struct efx_nic *efx = netdev_priv(net_dev);
1642 struct efx_channel *channel;
1644 efx_for_each_channel(channel, efx)
1645 efx_schedule_channel(channel);
1650 /**************************************************************************
1652 * Kernel net device interface
1654 *************************************************************************/
1656 /* Context: process, rtnl_lock() held. */
1657 static int efx_net_open(struct net_device *net_dev)
1659 struct efx_nic *efx = netdev_priv(net_dev);
1660 EFX_ASSERT_RESET_SERIALISED(efx);
1662 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1663 raw_smp_processor_id());
1665 if (efx->state == STATE_DISABLED)
1667 if (efx->phy_mode & PHY_MODE_SPECIAL)
1669 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1672 /* Notify the kernel of the link state polled during driver load,
1673 * before the monitor starts running */
1674 efx_link_status_changed(efx);
1680 /* Context: process, rtnl_lock() held.
1681 * Note that the kernel will ignore our return code; this method
1682 * should really be a void.
1684 static int efx_net_stop(struct net_device *net_dev)
1686 struct efx_nic *efx = netdev_priv(net_dev);
1688 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1689 raw_smp_processor_id());
1691 if (efx->state != STATE_DISABLED) {
1692 /* Stop the device and flush all the channels */
1694 efx_fini_channels(efx);
1695 efx_init_channels(efx);
1701 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1702 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1704 struct efx_nic *efx = netdev_priv(net_dev);
1705 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1707 spin_lock_bh(&efx->stats_lock);
1708 efx->type->update_stats(efx);
1709 spin_unlock_bh(&efx->stats_lock);
1711 stats->rx_packets = mac_stats->rx_packets;
1712 stats->tx_packets = mac_stats->tx_packets;
1713 stats->rx_bytes = mac_stats->rx_bytes;
1714 stats->tx_bytes = mac_stats->tx_bytes;
1715 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1716 stats->multicast = mac_stats->rx_multicast;
1717 stats->collisions = mac_stats->tx_collision;
1718 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1719 mac_stats->rx_length_error);
1720 stats->rx_crc_errors = mac_stats->rx_bad;
1721 stats->rx_frame_errors = mac_stats->rx_align_error;
1722 stats->rx_fifo_errors = mac_stats->rx_overflow;
1723 stats->rx_missed_errors = mac_stats->rx_missed;
1724 stats->tx_window_errors = mac_stats->tx_late_collision;
1726 stats->rx_errors = (stats->rx_length_errors +
1727 stats->rx_crc_errors +
1728 stats->rx_frame_errors +
1729 mac_stats->rx_symbol_error);
1730 stats->tx_errors = (stats->tx_window_errors +
1736 /* Context: netif_tx_lock held, BHs disabled. */
1737 static void efx_watchdog(struct net_device *net_dev)
1739 struct efx_nic *efx = netdev_priv(net_dev);
1741 netif_err(efx, tx_err, efx->net_dev,
1742 "TX stuck with port_enabled=%d: resetting channels\n",
1745 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1749 /* Context: process, rtnl_lock() held. */
1750 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1752 struct efx_nic *efx = netdev_priv(net_dev);
1755 EFX_ASSERT_RESET_SERIALISED(efx);
1757 if (new_mtu > EFX_MAX_MTU)
1762 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1764 efx_fini_channels(efx);
1766 mutex_lock(&efx->mac_lock);
1767 /* Reconfigure the MAC before enabling the dma queues so that
1768 * the RX buffers don't overflow */
1769 net_dev->mtu = new_mtu;
1770 efx->mac_op->reconfigure(efx);
1771 mutex_unlock(&efx->mac_lock);
1773 efx_init_channels(efx);
1779 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1781 struct efx_nic *efx = netdev_priv(net_dev);
1782 struct sockaddr *addr = data;
1783 char *new_addr = addr->sa_data;
1785 EFX_ASSERT_RESET_SERIALISED(efx);
1787 if (!is_valid_ether_addr(new_addr)) {
1788 netif_err(efx, drv, efx->net_dev,
1789 "invalid ethernet MAC address requested: %pM\n",
1794 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1796 /* Reconfigure the MAC */
1797 mutex_lock(&efx->mac_lock);
1798 efx->mac_op->reconfigure(efx);
1799 mutex_unlock(&efx->mac_lock);
1804 /* Context: netif_addr_lock held, BHs disabled. */
1805 static void efx_set_multicast_list(struct net_device *net_dev)
1807 struct efx_nic *efx = netdev_priv(net_dev);
1808 struct netdev_hw_addr *ha;
1809 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1813 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1815 /* Build multicast hash table */
1816 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1817 memset(mc_hash, 0xff, sizeof(*mc_hash));
1819 memset(mc_hash, 0x00, sizeof(*mc_hash));
1820 netdev_for_each_mc_addr(ha, net_dev) {
1821 crc = ether_crc_le(ETH_ALEN, ha->addr);
1822 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1823 set_bit_le(bit, mc_hash->byte);
1826 /* Broadcast packets go through the multicast hash filter.
1827 * ether_crc_le() of the broadcast address is 0xbe2612ff
1828 * so we always add bit 0xff to the mask.
1830 set_bit_le(0xff, mc_hash->byte);
1833 if (efx->port_enabled)
1834 queue_work(efx->workqueue, &efx->mac_work);
1835 /* Otherwise efx_start_port() will do this */
1838 static const struct net_device_ops efx_netdev_ops = {
1839 .ndo_open = efx_net_open,
1840 .ndo_stop = efx_net_stop,
1841 .ndo_get_stats64 = efx_net_stats,
1842 .ndo_tx_timeout = efx_watchdog,
1843 .ndo_start_xmit = efx_hard_start_xmit,
1844 .ndo_validate_addr = eth_validate_addr,
1845 .ndo_do_ioctl = efx_ioctl,
1846 .ndo_change_mtu = efx_change_mtu,
1847 .ndo_set_mac_address = efx_set_mac_address,
1848 .ndo_set_multicast_list = efx_set_multicast_list,
1849 #ifdef CONFIG_NET_POLL_CONTROLLER
1850 .ndo_poll_controller = efx_netpoll,
1854 static void efx_update_name(struct efx_nic *efx)
1856 strcpy(efx->name, efx->net_dev->name);
1857 efx_mtd_rename(efx);
1858 efx_set_channel_names(efx);
1861 static int efx_netdev_event(struct notifier_block *this,
1862 unsigned long event, void *ptr)
1864 struct net_device *net_dev = ptr;
1866 if (net_dev->netdev_ops == &efx_netdev_ops &&
1867 event == NETDEV_CHANGENAME)
1868 efx_update_name(netdev_priv(net_dev));
1873 static struct notifier_block efx_netdev_notifier = {
1874 .notifier_call = efx_netdev_event,
1878 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1880 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1881 return sprintf(buf, "%d\n", efx->phy_type);
1883 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1885 static int efx_register_netdev(struct efx_nic *efx)
1887 struct net_device *net_dev = efx->net_dev;
1890 net_dev->watchdog_timeo = 5 * HZ;
1891 net_dev->irq = efx->pci_dev->irq;
1892 net_dev->netdev_ops = &efx_netdev_ops;
1893 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1895 /* Clear MAC statistics */
1896 efx->mac_op->update_stats(efx);
1897 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1901 rc = dev_alloc_name(net_dev, net_dev->name);
1904 efx_update_name(efx);
1906 rc = register_netdevice(net_dev);
1910 /* Always start with carrier off; PHY events will detect the link */
1911 netif_carrier_off(efx->net_dev);
1915 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1917 netif_err(efx, drv, efx->net_dev,
1918 "failed to init net dev attributes\n");
1919 goto fail_registered;
1926 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1930 unregister_netdev(net_dev);
1934 static void efx_unregister_netdev(struct efx_nic *efx)
1936 struct efx_channel *channel;
1937 struct efx_tx_queue *tx_queue;
1942 BUG_ON(netdev_priv(efx->net_dev) != efx);
1944 /* Free up any skbs still remaining. This has to happen before
1945 * we try to unregister the netdev as running their destructors
1946 * may be needed to get the device ref. count to 0. */
1947 efx_for_each_channel(channel, efx) {
1948 efx_for_each_channel_tx_queue(tx_queue, channel)
1949 efx_release_tx_buffers(tx_queue);
1952 if (efx_dev_registered(efx)) {
1953 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1954 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1955 unregister_netdev(efx->net_dev);
1959 /**************************************************************************
1961 * Device reset and suspend
1963 **************************************************************************/
1965 /* Tears down the entire software state and most of the hardware state
1967 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1969 EFX_ASSERT_RESET_SERIALISED(efx);
1972 mutex_lock(&efx->mac_lock);
1973 mutex_lock(&efx->spi_lock);
1975 efx_fini_channels(efx);
1976 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1977 efx->phy_op->fini(efx);
1978 efx->type->fini(efx);
1981 /* This function will always ensure that the locks acquired in
1982 * efx_reset_down() are released. A failure return code indicates
1983 * that we were unable to reinitialise the hardware, and the
1984 * driver should be disabled. If ok is false, then the rx and tx
1985 * engines are not restarted, pending a RESET_DISABLE. */
1986 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1990 EFX_ASSERT_RESET_SERIALISED(efx);
1992 rc = efx->type->init(efx);
1994 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2001 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2002 rc = efx->phy_op->init(efx);
2005 if (efx->phy_op->reconfigure(efx))
2006 netif_err(efx, drv, efx->net_dev,
2007 "could not restore PHY settings\n");
2010 efx->mac_op->reconfigure(efx);
2012 efx_init_channels(efx);
2013 efx_restore_filters(efx);
2015 mutex_unlock(&efx->spi_lock);
2016 mutex_unlock(&efx->mac_lock);
2023 efx->port_initialized = false;
2025 mutex_unlock(&efx->spi_lock);
2026 mutex_unlock(&efx->mac_lock);
2031 /* Reset the NIC using the specified method. Note that the reset may
2032 * fail, in which case the card will be left in an unusable state.
2034 * Caller must hold the rtnl_lock.
2036 int efx_reset(struct efx_nic *efx, enum reset_type method)
2041 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2042 RESET_TYPE(method));
2044 efx_reset_down(efx, method);
2046 rc = efx->type->reset(efx, method);
2048 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2052 /* Allow resets to be rescheduled. */
2053 efx->reset_pending = RESET_TYPE_NONE;
2055 /* Reinitialise bus-mastering, which may have been turned off before
2056 * the reset was scheduled. This is still appropriate, even in the
2057 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2058 * can respond to requests. */
2059 pci_set_master(efx->pci_dev);
2062 /* Leave device stopped if necessary */
2063 disabled = rc || method == RESET_TYPE_DISABLE;
2064 rc2 = efx_reset_up(efx, method, !disabled);
2072 dev_close(efx->net_dev);
2073 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2074 efx->state = STATE_DISABLED;
2076 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2081 /* The worker thread exists so that code that cannot sleep can
2082 * schedule a reset for later.
2084 static void efx_reset_work(struct work_struct *data)
2086 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2088 if (efx->reset_pending == RESET_TYPE_NONE)
2091 /* If we're not RUNNING then don't reset. Leave the reset_pending
2092 * flag set so that efx_pci_probe_main will be retried */
2093 if (efx->state != STATE_RUNNING) {
2094 netif_info(efx, drv, efx->net_dev,
2095 "scheduled reset quenched. NIC not RUNNING\n");
2100 (void)efx_reset(efx, efx->reset_pending);
2104 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2106 enum reset_type method;
2108 if (efx->reset_pending != RESET_TYPE_NONE) {
2109 netif_info(efx, drv, efx->net_dev,
2110 "quenching already scheduled reset\n");
2115 case RESET_TYPE_INVISIBLE:
2116 case RESET_TYPE_ALL:
2117 case RESET_TYPE_WORLD:
2118 case RESET_TYPE_DISABLE:
2121 case RESET_TYPE_RX_RECOVERY:
2122 case RESET_TYPE_RX_DESC_FETCH:
2123 case RESET_TYPE_TX_DESC_FETCH:
2124 case RESET_TYPE_TX_SKIP:
2125 method = RESET_TYPE_INVISIBLE;
2127 case RESET_TYPE_MC_FAILURE:
2129 method = RESET_TYPE_ALL;
2134 netif_dbg(efx, drv, efx->net_dev,
2135 "scheduling %s reset for %s\n",
2136 RESET_TYPE(method), RESET_TYPE(type));
2138 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2139 RESET_TYPE(method));
2141 efx->reset_pending = method;
2143 /* efx_process_channel() will no longer read events once a
2144 * reset is scheduled. So switch back to poll'd MCDI completions. */
2145 efx_mcdi_mode_poll(efx);
2147 queue_work(reset_workqueue, &efx->reset_work);
2150 /**************************************************************************
2152 * List of NICs we support
2154 **************************************************************************/
2156 /* PCI device ID table */
2157 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2158 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2159 .driver_data = (unsigned long) &falcon_a1_nic_type},
2160 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2161 .driver_data = (unsigned long) &falcon_b0_nic_type},
2162 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2163 .driver_data = (unsigned long) &siena_a0_nic_type},
2164 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2165 .driver_data = (unsigned long) &siena_a0_nic_type},
2166 {0} /* end of list */
2169 /**************************************************************************
2171 * Dummy PHY/MAC operations
2173 * Can be used for some unimplemented operations
2174 * Needed so all function pointers are valid and do not have to be tested
2177 **************************************************************************/
2178 int efx_port_dummy_op_int(struct efx_nic *efx)
2182 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2184 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2189 static struct efx_phy_operations efx_dummy_phy_operations = {
2190 .init = efx_port_dummy_op_int,
2191 .reconfigure = efx_port_dummy_op_int,
2192 .poll = efx_port_dummy_op_poll,
2193 .fini = efx_port_dummy_op_void,
2196 /**************************************************************************
2200 **************************************************************************/
2202 /* This zeroes out and then fills in the invariants in a struct
2203 * efx_nic (including all sub-structures).
2205 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2206 struct pci_dev *pci_dev, struct net_device *net_dev)
2210 /* Initialise common structures */
2211 memset(efx, 0, sizeof(*efx));
2212 spin_lock_init(&efx->biu_lock);
2213 mutex_init(&efx->mdio_lock);
2214 mutex_init(&efx->spi_lock);
2215 #ifdef CONFIG_SFC_MTD
2216 INIT_LIST_HEAD(&efx->mtd_list);
2218 INIT_WORK(&efx->reset_work, efx_reset_work);
2219 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2220 efx->pci_dev = pci_dev;
2221 efx->msg_enable = debug;
2222 efx->state = STATE_INIT;
2223 efx->reset_pending = RESET_TYPE_NONE;
2224 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2226 efx->net_dev = net_dev;
2227 efx->rx_checksum_enabled = true;
2228 spin_lock_init(&efx->stats_lock);
2229 mutex_init(&efx->mac_lock);
2230 efx->mac_op = type->default_mac_ops;
2231 efx->phy_op = &efx_dummy_phy_operations;
2232 efx->mdio.dev = net_dev;
2233 INIT_WORK(&efx->mac_work, efx_mac_work);
2235 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2236 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2237 if (!efx->channel[i])
2243 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2245 /* Higher numbered interrupt modes are less capable! */
2246 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2249 /* Would be good to use the net_dev name, but we're too early */
2250 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2252 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2253 if (!efx->workqueue)
2259 efx_fini_struct(efx);
2263 static void efx_fini_struct(struct efx_nic *efx)
2267 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2268 kfree(efx->channel[i]);
2270 if (efx->workqueue) {
2271 destroy_workqueue(efx->workqueue);
2272 efx->workqueue = NULL;
2276 /**************************************************************************
2280 **************************************************************************/
2282 /* Main body of final NIC shutdown code
2283 * This is called only at module unload (or hotplug removal).
2285 static void efx_pci_remove_main(struct efx_nic *efx)
2287 efx_nic_fini_interrupt(efx);
2288 efx_fini_channels(efx);
2290 efx->type->fini(efx);
2292 efx_remove_all(efx);
2295 /* Final NIC shutdown
2296 * This is called only at module unload (or hotplug removal).
2298 static void efx_pci_remove(struct pci_dev *pci_dev)
2300 struct efx_nic *efx;
2302 efx = pci_get_drvdata(pci_dev);
2306 /* Mark the NIC as fini, then stop the interface */
2308 efx->state = STATE_FINI;
2309 dev_close(efx->net_dev);
2311 /* Allow any queued efx_resets() to complete */
2314 efx_unregister_netdev(efx);
2316 efx_mtd_remove(efx);
2318 /* Wait for any scheduled resets to complete. No more will be
2319 * scheduled from this point because efx_stop_all() has been
2320 * called, we are no longer registered with driverlink, and
2321 * the net_device's have been removed. */
2322 cancel_work_sync(&efx->reset_work);
2324 efx_pci_remove_main(efx);
2327 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2329 pci_set_drvdata(pci_dev, NULL);
2330 efx_fini_struct(efx);
2331 free_netdev(efx->net_dev);
2334 /* Main body of NIC initialisation
2335 * This is called at module load (or hotplug insertion, theoretically).
2337 static int efx_pci_probe_main(struct efx_nic *efx)
2341 /* Do start-of-day initialisation */
2342 rc = efx_probe_all(efx);
2346 rc = efx_init_napi(efx);
2350 rc = efx->type->init(efx);
2352 netif_err(efx, probe, efx->net_dev,
2353 "failed to initialise NIC\n");
2357 rc = efx_init_port(efx);
2359 netif_err(efx, probe, efx->net_dev,
2360 "failed to initialise port\n");
2364 efx_init_channels(efx);
2366 rc = efx_nic_init_interrupt(efx);
2373 efx_fini_channels(efx);
2376 efx->type->fini(efx);
2380 efx_remove_all(efx);
2385 /* NIC initialisation
2387 * This is called at module load (or hotplug insertion,
2388 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2389 * sets up and registers the network devices with the kernel and hooks
2390 * the interrupt service routine. It does not prepare the device for
2391 * transmission; this is left to the first time one of the network
2392 * interfaces is brought up (i.e. efx_net_open).
2394 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2395 const struct pci_device_id *entry)
2397 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2398 struct net_device *net_dev;
2399 struct efx_nic *efx;
2402 /* Allocate and initialise a struct net_device and struct efx_nic */
2403 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2406 net_dev->features |= (type->offload_features | NETIF_F_SG |
2407 NETIF_F_HIGHDMA | NETIF_F_TSO |
2409 if (type->offload_features & NETIF_F_V6_CSUM)
2410 net_dev->features |= NETIF_F_TSO6;
2411 /* Mask for features that also apply to VLAN devices */
2412 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2413 NETIF_F_HIGHDMA | NETIF_F_TSO);
2414 efx = netdev_priv(net_dev);
2415 pci_set_drvdata(pci_dev, efx);
2416 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2417 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2421 netif_info(efx, probe, efx->net_dev,
2422 "Solarflare Communications NIC detected\n");
2424 /* Set up basic I/O (BAR mappings etc) */
2425 rc = efx_init_io(efx);
2429 /* No serialisation is required with the reset path because
2430 * we're in STATE_INIT. */
2431 for (i = 0; i < 5; i++) {
2432 rc = efx_pci_probe_main(efx);
2434 /* Serialise against efx_reset(). No more resets will be
2435 * scheduled since efx_stop_all() has been called, and we
2436 * have not and never have been registered with either
2437 * the rtnetlink or driverlink layers. */
2438 cancel_work_sync(&efx->reset_work);
2441 if (efx->reset_pending != RESET_TYPE_NONE) {
2442 /* If there was a scheduled reset during
2443 * probe, the NIC is probably hosed anyway */
2444 efx_pci_remove_main(efx);
2451 /* Retry if a recoverably reset event has been scheduled */
2452 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2453 (efx->reset_pending != RESET_TYPE_ALL))
2456 efx->reset_pending = RESET_TYPE_NONE;
2460 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2464 /* Switch to the running state before we expose the device to the OS,
2465 * so that dev_open()|efx_start_all() will actually start the device */
2466 efx->state = STATE_RUNNING;
2468 rc = efx_register_netdev(efx);
2472 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2475 efx_mtd_probe(efx); /* allowed to fail */
2480 efx_pci_remove_main(efx);
2485 efx_fini_struct(efx);
2488 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2489 free_netdev(net_dev);
2493 static int efx_pm_freeze(struct device *dev)
2495 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2497 efx->state = STATE_FINI;
2499 netif_device_detach(efx->net_dev);
2502 efx_fini_channels(efx);
2507 static int efx_pm_thaw(struct device *dev)
2509 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2511 efx->state = STATE_INIT;
2513 efx_init_channels(efx);
2515 mutex_lock(&efx->mac_lock);
2516 efx->phy_op->reconfigure(efx);
2517 mutex_unlock(&efx->mac_lock);
2521 netif_device_attach(efx->net_dev);
2523 efx->state = STATE_RUNNING;
2525 efx->type->resume_wol(efx);
2527 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2528 queue_work(reset_workqueue, &efx->reset_work);
2533 static int efx_pm_poweroff(struct device *dev)
2535 struct pci_dev *pci_dev = to_pci_dev(dev);
2536 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2538 efx->type->fini(efx);
2540 efx->reset_pending = RESET_TYPE_NONE;
2542 pci_save_state(pci_dev);
2543 return pci_set_power_state(pci_dev, PCI_D3hot);
2546 /* Used for both resume and restore */
2547 static int efx_pm_resume(struct device *dev)
2549 struct pci_dev *pci_dev = to_pci_dev(dev);
2550 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2553 rc = pci_set_power_state(pci_dev, PCI_D0);
2556 pci_restore_state(pci_dev);
2557 rc = pci_enable_device(pci_dev);
2560 pci_set_master(efx->pci_dev);
2561 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2564 rc = efx->type->init(efx);
2571 static int efx_pm_suspend(struct device *dev)
2576 rc = efx_pm_poweroff(dev);
2582 static struct dev_pm_ops efx_pm_ops = {
2583 .suspend = efx_pm_suspend,
2584 .resume = efx_pm_resume,
2585 .freeze = efx_pm_freeze,
2586 .thaw = efx_pm_thaw,
2587 .poweroff = efx_pm_poweroff,
2588 .restore = efx_pm_resume,
2591 static struct pci_driver efx_pci_driver = {
2592 .name = KBUILD_MODNAME,
2593 .id_table = efx_pci_table,
2594 .probe = efx_pci_probe,
2595 .remove = efx_pci_remove,
2596 .driver.pm = &efx_pm_ops,
2599 /**************************************************************************
2601 * Kernel module interface
2603 *************************************************************************/
2605 module_param(interrupt_mode, uint, 0444);
2606 MODULE_PARM_DESC(interrupt_mode,
2607 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2609 static int __init efx_init_module(void)
2613 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2615 rc = register_netdevice_notifier(&efx_netdev_notifier);
2619 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2620 if (!reset_workqueue) {
2625 rc = pci_register_driver(&efx_pci_driver);
2632 destroy_workqueue(reset_workqueue);
2634 unregister_netdevice_notifier(&efx_netdev_notifier);
2639 static void __exit efx_exit_module(void)
2641 printk(KERN_INFO "Solarflare NET driver unloading\n");
2643 pci_unregister_driver(&efx_pci_driver);
2644 destroy_workqueue(reset_workqueue);
2645 unregister_netdevice_notifier(&efx_netdev_notifier);
2649 module_init(efx_init_module);
2650 module_exit(efx_exit_module);
2652 MODULE_AUTHOR("Solarflare Communications and "
2653 "Michael Brown <mbrown@fensystems.co.uk>");
2654 MODULE_DESCRIPTION("Solarflare Communications network driver");
2655 MODULE_LICENSE("GPL");
2656 MODULE_DEVICE_TABLE(pci, efx_pci_table);