1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007-2008 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 #include <linux/delay.h>
11 #include <linux/rtnetlink.h>
12 #include <linux/seq_file.h>
18 #include "workarounds.h"
21 /* We expect these MMDs to be in the package. SFT9001 also has a
22 * clause 22 extension MMD, but since it doesn't have all the generic
23 * MMD registers it is pointless to include it here.
25 #define TENXPRESS_REQUIRED_DEVS (MDIO_DEVS_PMAPMD | \
30 #define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \
31 (1 << LOOPBACK_PCS) | \
32 (1 << LOOPBACK_PMAPMD) | \
33 (1 << LOOPBACK_NETWORK))
35 #define SFT9001_LOOPBACKS ((1 << LOOPBACK_GPHY) | \
36 (1 << LOOPBACK_PHYXS) | \
37 (1 << LOOPBACK_PCS) | \
38 (1 << LOOPBACK_PMAPMD) | \
39 (1 << LOOPBACK_NETWORK))
41 /* We complain if we fail to see the link partner as 10G capable this many
42 * times in a row (must be > 1 as sampling the autoneg. registers is racy)
44 #define MAX_BAD_LP_TRIES (5)
46 /* Extended control register */
47 #define PMA_PMD_XCONTROL_REG 49152
48 #define PMA_PMD_EXT_GMII_EN_LBN 1
49 #define PMA_PMD_EXT_GMII_EN_WIDTH 1
50 #define PMA_PMD_EXT_CLK_OUT_LBN 2
51 #define PMA_PMD_EXT_CLK_OUT_WIDTH 1
52 #define PMA_PMD_LNPGA_POWERDOWN_LBN 8 /* SFX7101 only */
53 #define PMA_PMD_LNPGA_POWERDOWN_WIDTH 1
54 #define PMA_PMD_EXT_CLK312_LBN 8 /* SFT9001 only */
55 #define PMA_PMD_EXT_CLK312_WIDTH 1
56 #define PMA_PMD_EXT_LPOWER_LBN 12
57 #define PMA_PMD_EXT_LPOWER_WIDTH 1
58 #define PMA_PMD_EXT_ROBUST_LBN 14
59 #define PMA_PMD_EXT_ROBUST_WIDTH 1
60 #define PMA_PMD_EXT_SSR_LBN 15
61 #define PMA_PMD_EXT_SSR_WIDTH 1
63 /* extended status register */
64 #define PMA_PMD_XSTATUS_REG 49153
65 #define PMA_PMD_XSTAT_MDIX_LBN 14
66 #define PMA_PMD_XSTAT_FLP_LBN (12)
68 /* LED control register */
69 #define PMA_PMD_LED_CTRL_REG 49159
70 #define PMA_PMA_LED_ACTIVITY_LBN (3)
72 /* LED function override register */
73 #define PMA_PMD_LED_OVERR_REG 49161
74 /* Bit positions for different LEDs (there are more but not wired on SFE4001)*/
75 #define PMA_PMD_LED_LINK_LBN (0)
76 #define PMA_PMD_LED_SPEED_LBN (2)
77 #define PMA_PMD_LED_TX_LBN (4)
78 #define PMA_PMD_LED_RX_LBN (6)
79 /* Override settings */
80 #define PMA_PMD_LED_AUTO (0) /* H/W control */
81 #define PMA_PMD_LED_ON (1)
82 #define PMA_PMD_LED_OFF (2)
83 #define PMA_PMD_LED_FLASH (3)
84 #define PMA_PMD_LED_MASK 3
85 /* All LEDs under hardware control */
86 #define SFT9001_PMA_PMD_LED_DEFAULT 0
87 /* Green and Amber under hardware control, Red off */
88 #define SFX7101_PMA_PMD_LED_DEFAULT (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
90 #define PMA_PMD_SPEED_ENABLE_REG 49192
91 #define PMA_PMD_100TX_ADV_LBN 1
92 #define PMA_PMD_100TX_ADV_WIDTH 1
93 #define PMA_PMD_1000T_ADV_LBN 2
94 #define PMA_PMD_1000T_ADV_WIDTH 1
95 #define PMA_PMD_10000T_ADV_LBN 3
96 #define PMA_PMD_10000T_ADV_WIDTH 1
97 #define PMA_PMD_SPEED_LBN 4
98 #define PMA_PMD_SPEED_WIDTH 4
100 /* Cable diagnostics - SFT9001 only */
101 #define PMA_PMD_CDIAG_CTRL_REG 49213
102 #define CDIAG_CTRL_IMMED_LBN 15
103 #define CDIAG_CTRL_BRK_LINK_LBN 12
104 #define CDIAG_CTRL_IN_PROG_LBN 11
105 #define CDIAG_CTRL_LEN_UNIT_LBN 10
106 #define CDIAG_CTRL_LEN_METRES 1
107 #define PMA_PMD_CDIAG_RES_REG 49174
108 #define CDIAG_RES_A_LBN 12
109 #define CDIAG_RES_B_LBN 8
110 #define CDIAG_RES_C_LBN 4
111 #define CDIAG_RES_D_LBN 0
112 #define CDIAG_RES_WIDTH 4
113 #define CDIAG_RES_OPEN 2
114 #define CDIAG_RES_OK 1
115 #define CDIAG_RES_INVALID 0
116 /* Set of 4 registers for pairs A-D */
117 #define PMA_PMD_CDIAG_LEN_REG 49175
119 /* Serdes control registers - SFT9001 only */
120 #define PMA_PMD_CSERDES_CTRL_REG 64258
121 /* Set the 156.25 MHz output to 312.5 MHz to drive Falcon's XMAC */
122 #define PMA_PMD_CSERDES_DEFAULT 0x000f
124 /* Misc register defines - SFX7101 only */
125 #define PCS_CLOCK_CTRL_REG 55297
126 #define PLL312_RST_N_LBN 2
128 #define PCS_SOFT_RST2_REG 55302
129 #define SERDES_RST_N_LBN 13
130 #define XGXS_RST_N_LBN 12
132 #define PCS_TEST_SELECT_REG 55303 /* PRM 10.5.8 */
133 #define CLK312_EN_LBN 3
135 /* PHYXS registers */
136 #define PHYXS_XCONTROL_REG 49152
137 #define PHYXS_RESET_LBN 15
138 #define PHYXS_RESET_WIDTH 1
140 #define PHYXS_TEST1 (49162)
141 #define LOOPBACK_NEAR_LBN (8)
142 #define LOOPBACK_NEAR_WIDTH (1)
144 /* Boot status register */
145 #define PCS_BOOT_STATUS_REG 53248
146 #define PCS_BOOT_FATAL_ERROR_LBN 0
147 #define PCS_BOOT_PROGRESS_LBN 1
148 #define PCS_BOOT_PROGRESS_WIDTH 2
149 #define PCS_BOOT_PROGRESS_INIT 0
150 #define PCS_BOOT_PROGRESS_WAIT_MDIO 1
151 #define PCS_BOOT_PROGRESS_CHECKSUM 2
152 #define PCS_BOOT_PROGRESS_JUMP 3
153 #define PCS_BOOT_DOWNLOAD_WAIT_LBN 3
154 #define PCS_BOOT_CODE_STARTED_LBN 4
156 /* 100M/1G PHY registers */
157 #define GPHY_XCONTROL_REG 49152
158 #define GPHY_ISOLATE_LBN 10
159 #define GPHY_ISOLATE_WIDTH 1
160 #define GPHY_DUPLEX_LBN 8
161 #define GPHY_DUPLEX_WIDTH 1
162 #define GPHY_LOOPBACK_NEAR_LBN 14
163 #define GPHY_LOOPBACK_NEAR_WIDTH 1
165 #define C22EXT_STATUS_REG 49153
166 #define C22EXT_STATUS_LINK_LBN 2
167 #define C22EXT_STATUS_LINK_WIDTH 1
169 #define C22EXT_MSTSLV_CTRL 49161
170 #define C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN 8
171 #define C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN 9
173 #define C22EXT_MSTSLV_STATUS 49162
174 #define C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN 10
175 #define C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN 11
177 /* Time to wait between powering down the LNPGA and turning off the power
179 #define LNPGA_PDOWN_WAIT (HZ / 5)
181 struct tenxpress_phy_data {
182 enum efx_loopback_mode loopback_mode;
183 enum efx_phy_mode phy_mode;
187 static ssize_t show_phy_short_reach(struct device *dev,
188 struct device_attribute *attr, char *buf)
190 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
193 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR);
194 return sprintf(buf, "%d\n", !!(reg & MDIO_PMA_10GBT_TXPWR_SHORT));
197 static ssize_t set_phy_short_reach(struct device *dev,
198 struct device_attribute *attr,
199 const char *buf, size_t count)
201 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
204 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR,
205 MDIO_PMA_10GBT_TXPWR_SHORT,
206 count != 0 && *buf != '0');
207 efx_reconfigure_port(efx);
213 static DEVICE_ATTR(phy_short_reach, 0644, show_phy_short_reach,
214 set_phy_short_reach);
216 int sft9001_wait_boot(struct efx_nic *efx)
218 unsigned long timeout = jiffies + HZ + 1;
222 boot_stat = efx_mdio_read(efx, MDIO_MMD_PCS,
223 PCS_BOOT_STATUS_REG);
224 if (boot_stat >= 0) {
225 EFX_LOG(efx, "PHY boot status = %#x\n", boot_stat);
227 ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
228 (3 << PCS_BOOT_PROGRESS_LBN) |
229 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) |
230 (1 << PCS_BOOT_CODE_STARTED_LBN))) {
231 case ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
232 (PCS_BOOT_PROGRESS_CHECKSUM <<
233 PCS_BOOT_PROGRESS_LBN)):
234 case ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
235 (PCS_BOOT_PROGRESS_INIT <<
236 PCS_BOOT_PROGRESS_LBN) |
237 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)):
239 case ((PCS_BOOT_PROGRESS_WAIT_MDIO <<
240 PCS_BOOT_PROGRESS_LBN) |
241 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)):
242 return (efx->phy_mode & PHY_MODE_SPECIAL) ?
244 case ((PCS_BOOT_PROGRESS_JUMP <<
245 PCS_BOOT_PROGRESS_LBN) |
246 (1 << PCS_BOOT_CODE_STARTED_LBN)):
247 case ((PCS_BOOT_PROGRESS_JUMP <<
248 PCS_BOOT_PROGRESS_LBN) |
249 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) |
250 (1 << PCS_BOOT_CODE_STARTED_LBN)):
251 return (efx->phy_mode & PHY_MODE_SPECIAL) ?
254 if (boot_stat & (1 << PCS_BOOT_FATAL_ERROR_LBN))
260 if (time_after_eq(jiffies, timeout))
267 static int tenxpress_init(struct efx_nic *efx)
271 if (efx->phy_type == PHY_TYPE_SFX7101) {
272 /* Enable 312.5 MHz clock */
273 efx_mdio_write(efx, MDIO_MMD_PCS, PCS_TEST_SELECT_REG,
276 /* Enable 312.5 MHz clock and GMII */
277 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
278 reg |= ((1 << PMA_PMD_EXT_GMII_EN_LBN) |
279 (1 << PMA_PMD_EXT_CLK_OUT_LBN) |
280 (1 << PMA_PMD_EXT_CLK312_LBN) |
281 (1 << PMA_PMD_EXT_ROBUST_LBN));
283 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
284 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT,
285 GPHY_XCONTROL_REG, 1 << GPHY_ISOLATE_LBN,
289 /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
290 if (efx->phy_type == PHY_TYPE_SFX7101) {
291 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG,
292 1 << PMA_PMA_LED_ACTIVITY_LBN, true);
293 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG,
294 SFX7101_PMA_PMD_LED_DEFAULT);
300 static int tenxpress_phy_init(struct efx_nic *efx)
302 struct tenxpress_phy_data *phy_data;
306 falcon_board(efx)->type->init_phy(efx);
308 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
311 efx->phy_data = phy_data;
312 phy_data->phy_mode = efx->phy_mode;
314 if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
315 if (efx->phy_type == PHY_TYPE_SFT9001A) {
317 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
318 PMA_PMD_XCONTROL_REG);
319 reg |= (1 << PMA_PMD_EXT_SSR_LBN);
320 efx_mdio_write(efx, MDIO_MMD_PMAPMD,
321 PMA_PMD_XCONTROL_REG, reg);
325 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
329 rc = efx_mdio_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
334 rc = tenxpress_init(efx);
338 /* Set pause advertising */
339 old_adv = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
340 adv = ((old_adv & ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) |
341 mii_advertise_flowctrl(efx->wanted_fc));
342 if (adv != old_adv) {
343 efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, adv);
344 mdio45_nway_restart(&efx->mdio);
347 if (efx->phy_type == PHY_TYPE_SFT9001B) {
348 rc = device_create_file(&efx->pci_dev->dev,
349 &dev_attr_phy_short_reach);
354 schedule_timeout_uninterruptible(HZ / 5); /* 200ms */
356 /* Let XGXS and SerDes out of reset */
357 falcon_reset_xaui(efx);
362 kfree(efx->phy_data);
363 efx->phy_data = NULL;
367 /* Perform a "special software reset" on the PHY. The caller is
368 * responsible for saving and restoring the PHY hardware registers
369 * properly, and masking/unmasking LASI */
370 static int tenxpress_special_reset(struct efx_nic *efx)
374 /* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
375 * a special software reset can glitch the XGMAC sufficiently for stats
376 * requests to fail. */
377 efx_stats_disable(efx);
380 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
381 reg |= (1 << PMA_PMD_EXT_SSR_LBN);
382 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
386 /* Wait for the blocks to come out of reset */
387 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
391 /* Try and reconfigure the device */
392 rc = tenxpress_init(efx);
396 /* Wait for the XGXS state machine to churn */
399 efx_stats_enable(efx);
403 static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok)
405 struct tenxpress_phy_data *pd = efx->phy_data;
412 /* Check that AN has started but not completed. */
413 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_STAT1);
414 if (!(reg & MDIO_AN_STAT1_LPABLE))
415 return; /* LP status is unknown */
416 bad_lp = !(reg & MDIO_AN_STAT1_COMPLETE);
421 /* Nothing to do if all is well and was previously so. */
422 if (!pd->bad_lp_tries)
425 /* Use the RX (red) LED as an error indicator once we've seen AN
426 * failure several times in a row, and also log a message. */
427 if (!bad_lp || pd->bad_lp_tries == MAX_BAD_LP_TRIES) {
428 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
429 PMA_PMD_LED_OVERR_REG);
430 reg &= ~(PMA_PMD_LED_MASK << PMA_PMD_LED_RX_LBN);
432 reg |= PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN;
434 reg |= PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN;
435 EFX_ERR(efx, "appears to be plugged into a port"
436 " that is not 10GBASE-T capable. The PHY"
437 " supports 10GBASE-T ONLY, so no link can"
438 " be established\n");
440 efx_mdio_write(efx, MDIO_MMD_PMAPMD,
441 PMA_PMD_LED_OVERR_REG, reg);
442 pd->bad_lp_tries = bad_lp;
446 static bool sfx7101_link_ok(struct efx_nic *efx)
448 return efx_mdio_links_ok(efx,
454 static bool sft9001_link_ok(struct efx_nic *efx, struct ethtool_cmd *ecmd)
458 if (efx_phy_mode_disabled(efx->phy_mode))
460 else if (efx->loopback_mode == LOOPBACK_GPHY)
462 else if (efx->loopback_mode)
463 return efx_mdio_links_ok(efx,
467 /* We must use the same definition of link state as LASI,
468 * otherwise we can miss a link state transition
470 if (ecmd->speed == 10000) {
471 reg = efx_mdio_read(efx, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1);
472 return reg & MDIO_PCS_10GBRT_STAT1_BLKLK;
474 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_STATUS_REG);
475 return reg & (1 << C22EXT_STATUS_LINK_LBN);
479 static void tenxpress_ext_loopback(struct efx_nic *efx)
481 efx_mdio_set_flag(efx, MDIO_MMD_PHYXS, PHYXS_TEST1,
482 1 << LOOPBACK_NEAR_LBN,
483 efx->loopback_mode == LOOPBACK_PHYXS);
484 if (efx->phy_type != PHY_TYPE_SFX7101)
485 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, GPHY_XCONTROL_REG,
486 1 << GPHY_LOOPBACK_NEAR_LBN,
487 efx->loopback_mode == LOOPBACK_GPHY);
490 static void tenxpress_low_power(struct efx_nic *efx)
492 if (efx->phy_type == PHY_TYPE_SFX7101)
493 efx_mdio_set_mmds_lpower(
494 efx, !!(efx->phy_mode & PHY_MODE_LOW_POWER),
495 TENXPRESS_REQUIRED_DEVS);
498 efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG,
499 1 << PMA_PMD_EXT_LPOWER_LBN,
500 !!(efx->phy_mode & PHY_MODE_LOW_POWER));
503 static void tenxpress_phy_reconfigure(struct efx_nic *efx)
505 struct tenxpress_phy_data *phy_data = efx->phy_data;
506 struct efx_link_state *link_state = &efx->link_state;
507 struct ethtool_cmd ecmd;
508 bool phy_mode_change, loop_reset;
510 if (efx->phy_mode & (PHY_MODE_OFF | PHY_MODE_SPECIAL)) {
511 phy_data->phy_mode = efx->phy_mode;
515 tenxpress_low_power(efx);
517 phy_mode_change = (efx->phy_mode == PHY_MODE_NORMAL &&
518 phy_data->phy_mode != PHY_MODE_NORMAL);
519 loop_reset = (LOOPBACK_OUT_OF(phy_data, efx, efx->phy_op->loopbacks) ||
520 LOOPBACK_CHANGED(phy_data, efx, 1 << LOOPBACK_GPHY));
522 if (loop_reset || phy_mode_change) {
525 efx->phy_op->get_settings(efx, &ecmd);
527 if (loop_reset || phy_mode_change) {
528 tenxpress_special_reset(efx);
530 /* Reset XAUI if we were in 10G, and are staying
531 * in 10G. If we're moving into and out of 10G
532 * then xaui will be reset anyway */
534 falcon_reset_xaui(efx);
537 rc = efx->phy_op->set_settings(efx, &ecmd);
541 efx_mdio_transmit_disable(efx);
542 efx_mdio_phy_reconfigure(efx);
543 tenxpress_ext_loopback(efx);
545 phy_data->loopback_mode = efx->loopback_mode;
546 phy_data->phy_mode = efx->phy_mode;
548 if (efx->phy_type == PHY_TYPE_SFX7101) {
549 link_state->speed = 10000;
550 link_state->fd = true;
551 link_state->up = sfx7101_link_ok(efx);
553 efx->phy_op->get_settings(efx, &ecmd);
554 link_state->speed = ecmd.speed;
555 link_state->fd = ecmd.duplex == DUPLEX_FULL;
556 link_state->up = sft9001_link_ok(efx, &ecmd);
558 link_state->fc = efx_mdio_get_pause(efx);
561 /* Poll PHY for interrupt */
562 static void tenxpress_phy_poll(struct efx_nic *efx)
564 struct tenxpress_phy_data *phy_data = efx->phy_data;
565 struct efx_link_state *link_state = &efx->link_state;
568 if (efx->phy_type == PHY_TYPE_SFX7101) {
569 bool link_ok = sfx7101_link_ok(efx);
570 if (link_ok != link_state->up) {
573 unsigned int link_fc = efx_mdio_get_pause(efx);
574 if (link_fc != link_state->fc)
577 sfx7101_check_bad_lp(efx, link_ok);
578 } else if (efx->loopback_mode) {
579 bool link_ok = sft9001_link_ok(efx, NULL);
580 if (link_ok != link_state->up)
583 int status = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
585 if (status & MDIO_PMA_LASI_LSALARM)
590 falcon_sim_phy_event(efx);
592 if (phy_data->phy_mode != PHY_MODE_NORMAL)
596 static void tenxpress_phy_fini(struct efx_nic *efx)
600 if (efx->phy_type == PHY_TYPE_SFT9001B)
601 device_remove_file(&efx->pci_dev->dev,
602 &dev_attr_phy_short_reach);
604 if (efx->phy_type == PHY_TYPE_SFX7101) {
605 /* Power down the LNPGA */
606 reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
607 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
609 /* Waiting here ensures that the board fini, which can turn
610 * off the power to the PHY, won't get run until the LNPGA
611 * powerdown has been given long enough to complete. */
612 schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
615 kfree(efx->phy_data);
616 efx->phy_data = NULL;
620 /* Override the RX, TX and link LEDs */
621 void tenxpress_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
627 reg = (PMA_PMD_LED_OFF << PMA_PMD_LED_TX_LBN) |
628 (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN) |
629 (PMA_PMD_LED_OFF << PMA_PMD_LED_LINK_LBN);
632 reg = (PMA_PMD_LED_ON << PMA_PMD_LED_TX_LBN) |
633 (PMA_PMD_LED_ON << PMA_PMD_LED_RX_LBN) |
634 (PMA_PMD_LED_ON << PMA_PMD_LED_LINK_LBN);
637 if (efx->phy_type == PHY_TYPE_SFX7101)
638 reg = SFX7101_PMA_PMD_LED_DEFAULT;
640 reg = SFT9001_PMA_PMD_LED_DEFAULT;
644 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, reg);
647 static const char *const sfx7101_test_names[] = {
652 sfx7101_run_tests(struct efx_nic *efx, int *results, unsigned flags)
656 if (!(flags & ETH_TEST_FL_OFFLINE))
659 /* BIST is automatically run after a special software reset */
660 rc = tenxpress_special_reset(efx);
661 results[0] = rc ? -1 : 1;
665 static const char *const sft9001_test_names[] = {
667 "cable.pairA.status",
668 "cable.pairB.status",
669 "cable.pairC.status",
670 "cable.pairD.status",
671 "cable.pairA.length",
672 "cable.pairB.length",
673 "cable.pairC.length",
674 "cable.pairD.length",
677 static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags)
679 struct ethtool_cmd ecmd;
680 int rc = 0, rc2, i, ctrl_reg, res_reg;
682 if (flags & ETH_TEST_FL_OFFLINE)
683 efx->phy_op->get_settings(efx, &ecmd);
685 /* Initialise cable diagnostic results to unknown failure */
686 for (i = 1; i < 9; ++i)
689 /* Run cable diagnostics; wait up to 5 seconds for them to complete.
690 * A cable fault is not a self-test failure, but a timeout is. */
691 ctrl_reg = ((1 << CDIAG_CTRL_IMMED_LBN) |
692 (CDIAG_CTRL_LEN_METRES << CDIAG_CTRL_LEN_UNIT_LBN));
693 if (flags & ETH_TEST_FL_OFFLINE) {
694 /* Break the link in order to run full diagnostics. We
695 * must reset the PHY to resume normal service. */
696 ctrl_reg |= (1 << CDIAG_CTRL_BRK_LINK_LBN);
698 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG,
701 while (efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG) &
702 (1 << CDIAG_CTRL_IN_PROG_LBN)) {
709 res_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_RES_REG);
710 for (i = 0; i < 4; i++) {
712 (res_reg >> (CDIAG_RES_A_LBN - i * CDIAG_RES_WIDTH))
713 & ((1 << CDIAG_RES_WIDTH) - 1);
714 int len_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
715 PMA_PMD_CDIAG_LEN_REG + i);
716 if (pair_res == CDIAG_RES_OK)
718 else if (pair_res == CDIAG_RES_INVALID)
721 results[1 + i] = -pair_res;
722 if (pair_res != CDIAG_RES_INVALID &&
723 pair_res != CDIAG_RES_OPEN &&
725 results[5 + i] = len_reg;
729 if (flags & ETH_TEST_FL_OFFLINE) {
730 /* Reset, running the BIST and then resuming normal service. */
731 rc2 = tenxpress_special_reset(efx);
732 results[0] = rc2 ? -1 : 1;
736 rc2 = efx->phy_op->set_settings(efx, &ecmd);
745 tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
747 u32 adv = 0, lpa = 0;
750 if (efx->phy_type != PHY_TYPE_SFX7101) {
751 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL);
752 if (reg & (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN))
753 adv |= ADVERTISED_1000baseT_Full;
754 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_STATUS);
755 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN))
756 lpa |= ADVERTISED_1000baseT_Half;
757 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN))
758 lpa |= ADVERTISED_1000baseT_Full;
760 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL);
761 if (reg & MDIO_AN_10GBT_CTRL_ADV10G)
762 adv |= ADVERTISED_10000baseT_Full;
763 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
764 if (reg & MDIO_AN_10GBT_STAT_LP10G)
765 lpa |= ADVERTISED_10000baseT_Full;
767 mdio45_ethtool_gset_npage(&efx->mdio, ecmd, adv, lpa);
769 ecmd->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
770 if (efx->phy_type != PHY_TYPE_SFX7101) {
771 ecmd->supported |= (SUPPORTED_100baseT_Full |
772 SUPPORTED_1000baseT_Full);
773 if (ecmd->speed != SPEED_10000) {
775 (efx_mdio_read(efx, MDIO_MMD_PMAPMD,
776 PMA_PMD_XSTATUS_REG) &
777 (1 << PMA_PMD_XSTAT_MDIX_LBN))
778 ? ETH_TP_MDI_X : ETH_TP_MDI;
782 /* In loopback, the PHY automatically brings up the correct interface,
783 * but doesn't advertise the correct speed. So override it */
784 if (efx->loopback_mode == LOOPBACK_GPHY)
785 ecmd->speed = SPEED_1000;
786 else if (LOOPBACK_MASK(efx) & efx->phy_op->loopbacks)
787 ecmd->speed = SPEED_10000;
790 static int tenxpress_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
795 return efx_mdio_set_settings(efx, ecmd);
798 static void sfx7101_set_npage_adv(struct efx_nic *efx, u32 advertising)
800 efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
801 MDIO_AN_10GBT_CTRL_ADV10G,
802 advertising & ADVERTISED_10000baseT_Full);
805 static void sft9001_set_npage_adv(struct efx_nic *efx, u32 advertising)
807 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL,
808 1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN,
809 advertising & ADVERTISED_1000baseT_Full);
810 efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
811 MDIO_AN_10GBT_CTRL_ADV10G,
812 advertising & ADVERTISED_10000baseT_Full);
815 struct efx_phy_operations falcon_sfx7101_phy_ops = {
817 .init = tenxpress_phy_init,
818 .reconfigure = tenxpress_phy_reconfigure,
819 .poll = tenxpress_phy_poll,
820 .fini = tenxpress_phy_fini,
821 .clear_interrupt = efx_port_dummy_op_void,
822 .get_settings = tenxpress_get_settings,
823 .set_settings = tenxpress_set_settings,
824 .set_npage_adv = sfx7101_set_npage_adv,
825 .num_tests = ARRAY_SIZE(sfx7101_test_names),
826 .test_names = sfx7101_test_names,
827 .run_tests = sfx7101_run_tests,
828 .mmds = TENXPRESS_REQUIRED_DEVS,
829 .loopbacks = SFX7101_LOOPBACKS,
832 struct efx_phy_operations falcon_sft9001_phy_ops = {
833 .macs = EFX_GMAC | EFX_XMAC,
834 .init = tenxpress_phy_init,
835 .reconfigure = tenxpress_phy_reconfigure,
836 .poll = tenxpress_phy_poll,
837 .fini = tenxpress_phy_fini,
838 .clear_interrupt = efx_port_dummy_op_void,
839 .get_settings = tenxpress_get_settings,
840 .set_settings = tenxpress_set_settings,
841 .set_npage_adv = sft9001_set_npage_adv,
842 .num_tests = ARRAY_SIZE(sft9001_test_names),
843 .test_names = sft9001_test_names,
844 .run_tests = sft9001_run_tests,
845 .mmds = TENXPRESS_REQUIRED_DEVS,
846 .loopbacks = SFT9001_LOOPBACKS,