1 /* sun3lance.c: Ethernet driver for SUN3 Lance chip */
4 Sun3 Lance ethernet driver, by Sam Creasey (sammy@users.qual.net).
5 This driver is a part of the linux kernel, and is thus distributed
6 under the GNU General Public License.
8 The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically
9 true for the correct IRQ and address of the lance registers. They
10 have not been widely tested, however. What we probably need is a
11 "proper" way to search for a device in the sun3's prom, but, alas,
12 linux has no such thing.
14 This driver is largely based on atarilance.c, by Roman Hodek. Other
15 sources of inspiration were the NetBSD sun3 am7990 driver, and the
16 linux sparc lance driver (sunlance.c).
18 There are more assumptions made throughout this driver, it almost
19 certainly still needs work, but it does work at least for RARP/BOOTP and
20 mounting the root NFS filesystem.
24 static char *version = "sun3lance.c: v1.2 1/12/2001 Sam Creasey (sammy@sammy.net)\n";
26 #include <linux/module.h>
27 #include <linux/stddef.h>
28 #include <linux/kernel.h>
29 #include <linux/string.h>
30 #include <linux/errno.h>
31 #include <linux/slab.h>
32 #include <linux/interrupt.h>
33 #include <linux/init.h>
34 #include <linux/ioport.h>
35 #include <linux/delay.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/skbuff.h>
39 #include <linux/bitops.h>
41 #include <asm/cacheflush.h>
42 #include <asm/setup.h>
45 #include <asm/pgtable.h>
47 #include <asm/idprom.h>
48 #include <asm/machines.h>
51 #include <asm/sun3mmu.h>
53 #include <asm/sun3xprom.h>
56 /* sun3/60 addr/irq for the lance chip. If your sun is different,
58 #define LANCE_OBIO 0x120000
59 #define LANCE_IRQ IRQ_AUTO_3
62 * 0 = silent, print only serious errors
63 * 1 = normal, print error messages
64 * 2 = debug, print debug infos
65 * 3 = debug, print even more debug infos (packet data)
71 static int lance_debug = LANCE_DEBUG;
73 static int lance_debug = 1;
75 module_param(lance_debug, int, 0);
76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");
77 MODULE_LICENSE("GPL");
79 #define DPRINTK(n,a) \
81 if (lance_debug >= n) \
86 /* we're only using 32k of memory, so we use 4 TX
87 buffers and 16 RX buffers. These values are expressed as log2. */
89 #define TX_LOG_RING_SIZE 3
90 #define RX_LOG_RING_SIZE 5
92 /* These are the derived values */
94 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
95 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
98 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
99 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
102 /* Definitions for packet buffer access: */
103 #define PKT_BUF_SZ 1544
105 /* Get the address of a packet buffer corresponding to a given buffer head */
106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base)
109 /* The LANCE Rx and Tx ring descriptors. */
110 struct lance_rx_head {
111 unsigned short base; /* Low word of base addr */
112 volatile unsigned char flag;
113 unsigned char base_hi; /* High word of base addr (unused) */
114 short buf_length; /* This length is 2s complement! */
115 volatile short msg_length; /* This length is "normal". */
118 struct lance_tx_head {
119 unsigned short base; /* Low word of base addr */
120 volatile unsigned char flag;
121 unsigned char base_hi; /* High word of base addr (unused) */
122 short length; /* Length is 2s complement! */
126 /* The LANCE initialization block, described in databook. */
127 struct lance_init_block {
128 unsigned short mode; /* Pre-set mode */
129 unsigned char hwaddr[6]; /* Physical ethernet address */
130 unsigned int filter[2]; /* Multicast filter (unused). */
131 /* Receive and transmit ring base, along with length bits. */
136 unsigned short pad[4]; /* is thie needed? */
139 /* The whole layout of the Lance shared memory */
140 struct lance_memory {
141 struct lance_init_block init;
142 struct lance_tx_head tx_head[TX_RING_SIZE];
143 struct lance_rx_head rx_head[RX_RING_SIZE];
144 char rx_data[RX_RING_SIZE][PKT_BUF_SZ];
145 char tx_data[TX_RING_SIZE][PKT_BUF_SZ];
148 /* The driver's private device structure */
150 struct lance_private {
151 volatile unsigned short *iobase;
152 struct lance_memory *mem;
153 int new_rx, new_tx; /* The next free ring entry */
154 int old_tx, old_rx; /* ring entry to be processed */
155 /* These two must be longs for set_bit() */
160 /* I/O register access macros */
163 #define DREG lp->iobase[0]
164 #define AREG lp->iobase[1]
165 #define REGA(a) (*( AREG = (a), &DREG ))
167 /* Definitions for the Lance */
170 #define TMD1_ENP 0x01 /* end of packet */
171 #define TMD1_STP 0x02 /* start of packet */
172 #define TMD1_DEF 0x04 /* deferred */
173 #define TMD1_ONE 0x08 /* one retry needed */
174 #define TMD1_MORE 0x10 /* more than one retry needed */
175 #define TMD1_ERR 0x40 /* error summary */
176 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
178 #define TMD1_OWN_CHIP TMD1_OWN
179 #define TMD1_OWN_HOST 0
181 /* tx_head misc field */
182 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
183 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
184 #define TMD3_LCAR 0x0800 /* carrier lost */
185 #define TMD3_LCOL 0x1000 /* late collision */
186 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
187 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
190 #define RMD1_ENP 0x01 /* end of packet */
191 #define RMD1_STP 0x02 /* start of packet */
192 #define RMD1_BUFF 0x04 /* buffer error */
193 #define RMD1_CRC 0x08 /* CRC error */
194 #define RMD1_OFLO 0x10 /* overflow */
195 #define RMD1_FRAM 0x20 /* framing error */
196 #define RMD1_ERR 0x40 /* error summary */
197 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
199 #define RMD1_OWN_CHIP RMD1_OWN
200 #define RMD1_OWN_HOST 0
203 #define CSR0 0 /* mode/status */
204 #define CSR1 1 /* init block addr (low) */
205 #define CSR2 2 /* init block addr (high) */
206 #define CSR3 3 /* misc */
207 #define CSR8 8 /* address filter */
208 #define CSR15 15 /* promiscuous mode */
211 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
212 #define CSR0_INIT 0x0001 /* initialize (RS) */
213 #define CSR0_STRT 0x0002 /* start (RS) */
214 #define CSR0_STOP 0x0004 /* stop (RS) */
215 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
216 #define CSR0_TXON 0x0010 /* transmitter on (R) */
217 #define CSR0_RXON 0x0020 /* receiver on (R) */
218 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
219 #define CSR0_INTR 0x0080 /* interrupt active (R) */
220 #define CSR0_IDON 0x0100 /* initialization done (RC) */
221 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
222 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
223 #define CSR0_MERR 0x0800 /* memory error (RC) */
224 #define CSR0_MISS 0x1000 /* missed frame (RC) */
225 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
226 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
227 #define CSR0_ERR 0x8000 /* error (RC) */
230 #define CSR3_BCON 0x0001 /* byte control */
231 #define CSR3_ACON 0x0002 /* ALE control */
232 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
234 /***************************** Prototypes *****************************/
236 static int lance_probe( struct net_device *dev);
237 static int lance_open( struct net_device *dev );
238 static void lance_init_ring( struct net_device *dev );
239 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
240 static irqreturn_t lance_interrupt( int irq, void *dev_id);
241 static int lance_rx( struct net_device *dev );
242 static int lance_close( struct net_device *dev );
243 static void set_multicast_list( struct net_device *dev );
245 /************************* End of Prototypes **************************/
247 struct net_device * __init sun3lance_probe(int unit)
249 struct net_device *dev;
253 /* check that this machine has an onboard lance */
254 switch(idprom->id_machtype) {
255 case SM_SUN3|SM_3_50:
256 case SM_SUN3|SM_3_60:
257 case SM_SUN3X|SM_3_80:
258 /* these machines have lance */
262 return ERR_PTR(-ENODEV);
266 return ERR_PTR(-ENODEV);
268 dev = alloc_etherdev(sizeof(struct lance_private));
270 return ERR_PTR(-ENOMEM);
272 sprintf(dev->name, "eth%d", unit);
273 netdev_boot_setup_check(dev);
276 if (!lance_probe(dev))
279 err = register_netdev(dev);
287 iounmap((void __iomem *)dev->base_addr);
294 static int __init lance_probe( struct net_device *dev)
296 unsigned long ioaddr;
298 struct lance_private *lp;
300 static int did_version;
301 volatile unsigned short *ioaddr_probe;
302 unsigned short tmp1, tmp2;
305 ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE);
309 ioaddr = SUN3X_LANCE;
312 /* test to see if there's really a lance here */
313 /* (CSRO_INIT shouldn't be readable) */
315 ioaddr_probe = (volatile unsigned short *)ioaddr;
316 tmp1 = ioaddr_probe[0];
317 tmp2 = ioaddr_probe[1];
319 ioaddr_probe[1] = CSR0;
320 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
322 if(ioaddr_probe[0] != CSR0_STOP) {
323 ioaddr_probe[0] = tmp1;
324 ioaddr_probe[1] = tmp2;
327 iounmap((void __iomem *)ioaddr);
332 lp = netdev_priv(dev);
335 MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000);
338 iounmap((void __iomem *)ioaddr);
340 printk(KERN_WARNING "SUN3 Lance couldn't allocate DVMA memory\n");
344 lp->iobase = (volatile unsigned short *)ioaddr;
345 dev->base_addr = (unsigned long)ioaddr; /* informational only */
347 REGA(CSR0) = CSR0_STOP;
349 if (request_irq(LANCE_IRQ, lance_interrupt, IRQF_DISABLED, "SUN3 Lance", dev) < 0) {
351 iounmap((void __iomem *)ioaddr);
353 dvma_free((void *)MEM);
354 printk(KERN_WARNING "SUN3 Lance unable to allocate IRQ\n");
357 dev->irq = (unsigned short)LANCE_IRQ;
360 printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ",
362 (unsigned long)ioaddr,
366 /* copy in the ethernet address from the prom */
367 for(i = 0; i < 6 ; i++)
368 dev->dev_addr[i] = idprom->id_ethaddr[i];
370 /* tell the card it's ether address, bytes swapped */
371 MEM->init.hwaddr[0] = dev->dev_addr[1];
372 MEM->init.hwaddr[1] = dev->dev_addr[0];
373 MEM->init.hwaddr[2] = dev->dev_addr[3];
374 MEM->init.hwaddr[3] = dev->dev_addr[2];
375 MEM->init.hwaddr[4] = dev->dev_addr[5];
376 MEM->init.hwaddr[5] = dev->dev_addr[4];
378 for( i = 0; i < 6; ++i )
379 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
381 MEM->init.mode = 0x0000;
382 MEM->init.filter[0] = 0x00000000;
383 MEM->init.filter[1] = 0x00000000;
384 MEM->init.rdra = dvma_vtob(MEM->rx_head);
385 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
386 (dvma_vtob(MEM->rx_head) >> 16);
387 MEM->init.tdra = dvma_vtob(MEM->tx_head);
388 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
389 (dvma_vtob(MEM->tx_head) >> 16);
391 DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n",
392 dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head),
393 (dvma_vtob(MEM->tx_head))));
395 if (did_version++ == 0)
398 /* The LANCE-specific entries in the device structure. */
399 dev->open = &lance_open;
400 dev->hard_start_xmit = &lance_start_xmit;
401 dev->stop = &lance_close;
402 dev->set_multicast_list = &set_multicast_list;
403 dev->set_mac_address = NULL;
404 // KLUDGE -- REMOVE ME
405 set_bit(__LINK_STATE_PRESENT, &dev->state);
411 static int lance_open( struct net_device *dev )
413 struct lance_private *lp = netdev_priv(dev);
416 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
418 REGA(CSR0) = CSR0_STOP;
420 lance_init_ring(dev);
422 /* From now on, AREG is kept to point to CSR0 */
423 REGA(CSR0) = CSR0_INIT;
427 if (DREG & CSR0_IDON)
429 if (i < 0 || (DREG & CSR0_ERR)) {
430 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
431 dev->name, i, DREG ));
436 DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA;
438 netif_start_queue(dev);
440 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
446 /* Initialize the LANCE Rx and Tx rings. */
448 static void lance_init_ring( struct net_device *dev )
450 struct lance_private *lp = netdev_priv(dev);
455 lp->new_rx = lp->new_tx = 0;
456 lp->old_rx = lp->old_tx = 0;
458 for( i = 0; i < TX_RING_SIZE; i++ ) {
459 MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]);
460 MEM->tx_head[i].flag = 0;
461 MEM->tx_head[i].base_hi =
462 (dvma_vtob(MEM->tx_data[i])) >>16;
463 MEM->tx_head[i].length = 0;
464 MEM->tx_head[i].misc = 0;
467 for( i = 0; i < RX_RING_SIZE; i++ ) {
468 MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]);
469 MEM->rx_head[i].flag = RMD1_OWN_CHIP;
470 MEM->rx_head[i].base_hi =
471 (dvma_vtob(MEM->rx_data[i])) >> 16;
472 MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000;
473 MEM->rx_head[i].msg_length = 0;
476 /* tell the card it's ether address, bytes swapped */
477 MEM->init.hwaddr[0] = dev->dev_addr[1];
478 MEM->init.hwaddr[1] = dev->dev_addr[0];
479 MEM->init.hwaddr[2] = dev->dev_addr[3];
480 MEM->init.hwaddr[3] = dev->dev_addr[2];
481 MEM->init.hwaddr[4] = dev->dev_addr[5];
482 MEM->init.hwaddr[5] = dev->dev_addr[4];
484 MEM->init.mode = 0x0000;
485 MEM->init.filter[0] = 0x00000000;
486 MEM->init.filter[1] = 0x00000000;
487 MEM->init.rdra = dvma_vtob(MEM->rx_head);
488 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
489 (dvma_vtob(MEM->rx_head) >> 16);
490 MEM->init.tdra = dvma_vtob(MEM->tx_head);
491 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
492 (dvma_vtob(MEM->tx_head) >> 16);
495 /* tell the lance the address of its init block */
496 REGA(CSR1) = dvma_vtob(&(MEM->init));
497 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16;
500 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON;
502 REGA(CSR3) = CSR3_BSWP;
508 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
510 struct lance_private *lp = netdev_priv(dev);
512 struct lance_tx_head *head;
515 DPRINTK( 1, ( "%s: transmit start.\n",
518 /* Transmitter timeout, serious problems. */
519 if (netif_queue_stopped(dev)) {
520 int tickssofar = jiffies - dev->trans_start;
524 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
528 * Always set BSWP after a STOP as STOP puts it back into
529 * little endian mode.
531 REGA(CSR3) = CSR3_BSWP;
532 dev->stats.tx_errors++;
534 if(lance_debug >= 2) {
536 printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n",
537 lp->old_tx, lp->new_tx,
538 lp->tx_full ? " (full)" : "",
540 for( i = 0 ; i < RX_RING_SIZE; i++ )
541 printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
542 i, MEM->rx_head[i].base,
543 -MEM->rx_head[i].buf_length,
544 MEM->rx_head[i].msg_length);
545 for( i = 0 ; i < TX_RING_SIZE; i++ )
546 printk("tx #%d: base=%04x len=%04x misc=%04x\n",
547 i, MEM->tx_head[i].base,
548 -MEM->tx_head[i].length,
549 MEM->tx_head[i].misc );
552 lance_init_ring(dev);
553 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
555 netif_start_queue(dev);
556 dev->trans_start = jiffies;
562 /* Block a timer-based transmit from overlapping. This could better be
563 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
565 /* Block a timer-based transmit from overlapping with us by
566 stopping the queue for a bit... */
568 netif_stop_queue(dev);
570 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) {
571 printk( "%s: tx queue lock!.\n", dev->name);
572 /* don't clear dev->tbusy flag. */
577 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
581 /* this weirdness doesn't appear on sun3... */
582 if(!(DREG & CSR0_INIT)) {
583 DPRINTK( 1, ("INIT not set, reinitializing...\n"));
584 REGA( CSR0 ) = CSR0_STOP;
585 lance_init_ring(dev);
586 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT;
590 /* Fill in a Tx ring entry */
592 if (lance_debug >= 2) {
595 printk( "%s: TX pkt %d type 0x%04x from ", dev->name,
596 lp->new_tx, ((u_short *)skb->data)[6]);
597 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
598 printk("%02x%s", *p++, i != 5 ? ":" : "" );
600 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
601 printk("%02x%s", *p++, i != 5 ? ":" : "" );
602 printk(" data at 0x%08x len %d\n", (int)skb->data,
606 /* We're not prepared for the int until the last flags are set/reset.
607 * And the int may happen already after setting the OWN_CHIP... */
608 local_irq_save(flags);
610 /* Mask to ring buffer boundary. */
612 head = &(MEM->tx_head[entry]);
614 /* Caution: the write order is important here, set the "ownership" bits
618 /* the sun3's lance needs it's buffer padded to the minimum
620 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
622 // head->length = -len;
623 head->length = (-len) | 0xf000;
626 skb_copy_from_linear_data(skb, PKTBUF_ADDR(head), skb->len);
628 memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len);
630 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
631 lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK;
632 dev->stats.tx_bytes += skb->len;
634 /* Trigger an immediate send poll. */
635 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;
637 DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n",
639 dev->trans_start = jiffies;
640 dev_kfree_skb( skb );
643 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
645 netif_start_queue(dev);
647 local_irq_restore(flags);
652 /* The LANCE interrupt handler. */
654 static irqreturn_t lance_interrupt( int irq, void *dev_id)
656 struct net_device *dev = dev_id;
657 struct lance_private *lp = netdev_priv(dev);
659 static int in_interrupt;
662 DPRINTK( 1, ( "lance_interrupt(): invalid dev_id\n" ));
667 DPRINTK( 2, ( "%s: Re-entering the interrupt handler.\n", dev->name ));
677 DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON);
681 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS;
684 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
685 dev->name, csr0, DREG ));
687 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
688 int old_tx = lp->old_tx;
690 // if(lance_debug >= 3) {
693 // printk("%s: tx int\n", dev->name);
695 // for(i = 0; i < TX_RING_SIZE; i++)
696 // printk("ring %d flag=%04x\n", i,
697 // MEM->tx_head[i].flag);
700 while( old_tx != lp->new_tx) {
701 struct lance_tx_head *head = &(MEM->tx_head[old_tx]);
703 DPRINTK(3, ("on tx_ring %d\n", old_tx));
705 if (head->flag & TMD1_OWN_CHIP)
706 break; /* It still hasn't been Txed */
708 if (head->flag & TMD1_ERR) {
709 int status = head->misc;
710 dev->stats.tx_errors++;
711 if (status & TMD3_RTRY) dev->stats.tx_aborted_errors++;
712 if (status & TMD3_LCAR) dev->stats.tx_carrier_errors++;
713 if (status & TMD3_LCOL) dev->stats.tx_window_errors++;
714 if (status & (TMD3_UFLO | TMD3_BUFF)) {
715 dev->stats.tx_fifo_errors++;
716 printk("%s: Tx FIFO error\n",
718 REGA(CSR0) = CSR0_STOP;
719 REGA(CSR3) = CSR3_BSWP;
720 lance_init_ring(dev);
721 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
724 } else if(head->flag & (TMD1_ENP | TMD1_STP)) {
726 head->flag &= ~(TMD1_ENP | TMD1_STP);
727 if(head->flag & (TMD1_ONE | TMD1_MORE))
728 dev->stats.collisions++;
730 dev->stats.tx_packets++;
731 DPRINTK(3, ("cleared tx ring %d\n", old_tx));
733 old_tx = (old_tx +1) & TX_RING_MOD_MASK;
740 if (netif_queue_stopped(dev)) {
741 /* The ring is no longer full, clear tbusy. */
742 netif_start_queue(dev);
743 netif_wake_queue(dev);
746 if (csr0 & CSR0_RINT) /* Rx interrupt */
749 /* Log misc errors. */
750 if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */
751 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */
752 if (csr0 & CSR0_MERR) {
753 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
754 "status %04x.\n", dev->name, csr0 ));
755 /* Restart the chip. */
756 REGA(CSR0) = CSR0_STOP;
757 REGA(CSR3) = CSR3_BSWP;
758 lance_init_ring(dev);
759 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
763 /* Clear any other interrupt, and set interrupt enable. */
764 // DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
765 // CSR0_IDON | CSR0_INEA;
767 REGA(CSR0) = CSR0_INEA;
769 if(DREG & (CSR0_RINT | CSR0_TINT)) {
770 DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG));
774 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
780 /* get packet, toss into skbuff */
781 static int lance_rx( struct net_device *dev )
783 struct lance_private *lp = netdev_priv(dev);
784 int entry = lp->new_rx;
786 /* If we own the next entry, it's a new packet. Send it up. */
787 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
788 struct lance_rx_head *head = &(MEM->rx_head[entry]);
789 int status = head->flag;
791 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
792 /* There is a tricky error noted by John Murphy,
793 <murf@perftech.com> to Russ Nelson: Even with
794 full-sized buffers it's possible for a jabber packet to use two
795 buffers, with only the last correctly noting the error. */
796 if (status & RMD1_ENP) /* Only count a general error at the */
797 dev->stats.rx_errors++; /* end of a packet.*/
798 if (status & RMD1_FRAM) dev->stats.rx_frame_errors++;
799 if (status & RMD1_OFLO) dev->stats.rx_over_errors++;
800 if (status & RMD1_CRC) dev->stats.rx_crc_errors++;
801 if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++;
802 head->flag &= (RMD1_ENP|RMD1_STP);
804 /* Malloc up new buffer, compatible with net-3. */
805 // short pkt_len = head->msg_length;// & 0xfff;
806 short pkt_len = (head->msg_length & 0xfff) - 4;
810 printk( "%s: Runt packet!\n", dev->name );
811 dev->stats.rx_errors++;
814 skb = dev_alloc_skb( pkt_len+2 );
816 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
819 dev->stats.rx_dropped++;
820 head->msg_length = 0;
821 head->flag |= RMD1_OWN_CHIP;
822 lp->new_rx = (lp->new_rx+1) &
827 if (lance_debug >= 3) {
828 u_char *data = PKTBUF_ADDR(head), *p;
829 printk( "%s: RX pkt %d type 0x%04x from ", dev->name, entry, ((u_short *)data)[6]);
830 for( p = &data[6], i = 0; i < 6; i++ )
831 printk("%02x%s", *p++, i != 5 ? ":" : "" );
833 for( p = data, i = 0; i < 6; i++ )
834 printk("%02x%s", *p++, i != 5 ? ":" : "" );
835 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
837 data[15], data[16], data[17], data[18],
838 data[19], data[20], data[21], data[22],
842 if (lance_debug >= 3) {
843 u_char *data = PKTBUF_ADDR(head);
844 printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len);
848 skb_reserve( skb, 2 ); /* 16 byte align */
849 skb_put( skb, pkt_len ); /* Make room */
850 skb_copy_to_linear_data(skb,
854 skb->protocol = eth_type_trans( skb, dev );
856 dev->last_rx = jiffies;
857 dev->stats.rx_packets++;
858 dev->stats.rx_bytes += pkt_len;
862 // head->buf_length = -PKT_BUF_SZ | 0xf000;
863 head->msg_length = 0;
864 head->flag = RMD1_OWN_CHIP;
866 entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK;
869 /* From lance.c (Donald Becker): */
870 /* We should check that at least two ring entries are free.
871 If not, we should free one and mark stats->rx_dropped++. */
877 static int lance_close( struct net_device *dev )
879 struct lance_private *lp = netdev_priv(dev);
881 netif_stop_queue(dev);
885 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
888 /* We stop the LANCE here -- it occasionally polls
889 memory if we don't. */
895 /* Set or clear the multicast filter for this adaptor.
896 num_addrs == -1 Promiscuous mode, receive all packets
897 num_addrs == 0 Normal mode, clear multicast list
898 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
899 best-effort filtering.
902 /* completely untested on a sun3 */
903 static void set_multicast_list( struct net_device *dev )
905 struct lance_private *lp = netdev_priv(dev);
907 if(netif_queue_stopped(dev))
908 /* Only possible if board is already started */
911 /* We take the simple way out and always enable promiscuous mode. */
912 DREG = CSR0_STOP; /* Temporarily stop the lance. */
914 if (dev->flags & IFF_PROMISC) {
915 /* Log any net taps. */
916 DPRINTK( 3, ( "%s: Promiscuous mode enabled.\n", dev->name ));
917 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
919 short multicast_table[4];
920 int num_addrs = dev->mc_count;
922 /* We don't use the multicast table, but rely on upper-layer
924 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
925 sizeof(multicast_table) );
926 for( i = 0; i < 4; i++ )
927 REGA( CSR8+i ) = multicast_table[i];
928 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
932 * Always set BSWP after a STOP as STOP puts it back into
933 * little endian mode.
935 REGA( CSR3 ) = CSR3_BSWP;
937 /* Resume normal operation and reset AREG to CSR0 */
938 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
944 static struct net_device *sun3lance_dev;
946 int __init init_module(void)
948 sun3lance_dev = sun3lance_probe(-1);
949 if (IS_ERR(sun3lance_dev))
950 return PTR_ERR(sun3lance_dev);
954 void __exit cleanup_module(void)
956 unregister_netdev(sun3lance_dev);
958 iounmap((void __iomem *)sun3lance_dev->base_addr);
960 free_netdev(sun3lance_dev);