drivers/net/sunhme.c

   1 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
   2  *           auto carrier detecting ethernet driver.  Also known as the
   3  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
   4  *
   5  * Copyright (C) 1996, 1998, 1999, 2002, 2003,
   6  *              2006, 2008 David S. Miller (davem@davemloft.net)
   7  *
   8  * Changes :
   9  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
  10  *   - port to non-sparc architectures. Tested only on x86 and
  11  *     only currently works with QFE PCI cards.
  12  *   - ability to specify the MAC address at module load time by passing this
  13  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/kernel.h>
  18 #include <linux/types.h>
  19 #include <linux/fcntl.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/ioport.h>
  22 #include <linux/in.h>
  23 #include <linux/slab.h>
  24 #include <linux/string.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/ethtool.h>
  28 #include <linux/mii.h>
  29 #include <linux/crc32.h>
  30 #include <linux/random.h>
  31 #include <linux/errno.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/mm.h>
  36 #include <linux/bitops.h>
  37 #include <linux/dma-mapping.h>
  38
  39 #include <asm/system.h>
  40 #include <asm/io.h>
  41 #include <asm/dma.h>
  42 #include <asm/byteorder.h>
  43
  44 #ifdef CONFIG_SPARC
  45 #include <linux/of.h>
  46 #include <linux/of_device.h>
  47 #include <asm/idprom.h>
  48 #include <asm/openprom.h>
  49 #include <asm/oplib.h>
  50 #include <asm/prom.h>
  51 #include <asm/auxio.h>
  52 #endif
  53 #include <asm/uaccess.h>
  54
  55 #include <asm/pgtable.h>
  56 #include <asm/irq.h>
  57
  58 #ifdef CONFIG_PCI
  59 #include <linux/pci.h>
  60 #endif
  61
  62 #include "sunhme.h"
  63
  64 #define DRV_NAME        "sunhme"
  65 #define DRV_VERSION     "3.10"
  66 #define DRV_RELDATE     "August 26, 2008"
  67 #define DRV_AUTHOR      "David S. Miller (davem@davemloft.net)"
  68
  69 static char version[] =
  70         DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  71
  72 MODULE_VERSION(DRV_VERSION);
  73 MODULE_AUTHOR(DRV_AUTHOR);
  74 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
  75 MODULE_LICENSE("GPL");
  76
  77 static int macaddr[6];
  78
  79 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  80 module_param_array(macaddr, int, NULL, 0);
  81 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
  82
  83 #ifdef CONFIG_SBUS
  84 static struct quattro *qfe_sbus_list;
  85 #endif
  86
  87 #ifdef CONFIG_PCI
  88 static struct quattro *qfe_pci_list;
  89 #endif
  90
  91 #undef HMEDEBUG
  92 #undef SXDEBUG
  93 #undef RXDEBUG
  94 #undef TXDEBUG
  95 #undef TXLOGGING
  96
  97 #ifdef TXLOGGING
  98 struct hme_tx_logent {
  99         unsigned int tstamp;
 100         int tx_new, tx_old;
 101         unsigned int action;
 102 #define TXLOG_ACTION_IRQ        0x01
 103 #define TXLOG_ACTION_TXMIT      0x02
 104 #define TXLOG_ACTION_TBUSY      0x04
 105 #define TXLOG_ACTION_NBUFS      0x08
 106         unsigned int status;
 107 };
 108 #define TX_LOG_LEN      128
 109 static struct hme_tx_logent tx_log[TX_LOG_LEN];
 110 static int txlog_cur_entry;
 111 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
 112 {
 113         struct hme_tx_logent *tlp;
 114         unsigned long flags;
 115
 116         local_irq_save(flags);
 117         tlp = &tx_log[txlog_cur_entry];
 118         tlp->tstamp = (unsigned int)jiffies;
 119         tlp->tx_new = hp->tx_new;
 120         tlp->tx_old = hp->tx_old;
 121         tlp->action = a;
 122         tlp->status = s;
 123         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
 124         local_irq_restore(flags);
 125 }
 126 static __inline__ void tx_dump_log(void)
 127 {
 128         int i, this;
 129
 130         this = txlog_cur_entry;
 131         for (i = 0; i < TX_LOG_LEN; i++) {
 132                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
 133                        tx_log[this].tstamp,
 134                        tx_log[this].tx_new, tx_log[this].tx_old,
 135                        tx_log[this].action, tx_log[this].status);
 136                 this = (this + 1) & (TX_LOG_LEN - 1);
 137         }
 138 }
 139 static __inline__ void tx_dump_ring(struct happy_meal *hp)
 140 {
 141         struct hmeal_init_block *hb = hp->happy_block;
 142         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
 143         int i;
 144
 145         for (i = 0; i < TX_RING_SIZE; i+=4) {
 146                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
 147                        i, i + 4,
 148                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
 149                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
 150                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
 151                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
 152         }
 153 }
 154 #else
 155 #define tx_add_log(hp, a, s)            do { } while(0)
 156 #define tx_dump_log()                   do { } while(0)
 157 #define tx_dump_ring(hp)                do { } while(0)
 158 #endif
 159
 160 #ifdef HMEDEBUG
 161 #define HMD(x)  printk x
 162 #else
 163 #define HMD(x)
 164 #endif
 165
 166 /* #define AUTO_SWITCH_DEBUG */
 167
 168 #ifdef AUTO_SWITCH_DEBUG
 169 #define ASD(x)  printk x
 170 #else
 171 #define ASD(x)
 172 #endif
 173
 174 #define DEFAULT_IPG0      16 /* For lance-mode only */
 175 #define DEFAULT_IPG1       8 /* For all modes */
 176 #define DEFAULT_IPG2       4 /* For all modes */
 177 #define DEFAULT_JAMSIZE    4 /* Toe jam */
 178
 179 /* NOTE: In the descriptor writes one _must_ write the address
 180  *       member _first_.  The card must not be allowed to see
 181  *       the updated descriptor flags until the address is
 182  *       correct.  I've added a write memory barrier between
 183  *       the two stores so that I can sleep well at night... -DaveM
 184  */
 185
 186 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
 187 static void sbus_hme_write32(void __iomem *reg, u32 val)
 188 {
 189         sbus_writel(val, reg);
 190 }
 191
 192 static u32 sbus_hme_read32(void __iomem *reg)
 193 {
 194         return sbus_readl(reg);
 195 }
 196
 197 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 198 {
 199         rxd->rx_addr = (__force hme32)addr;
 200         wmb();
 201         rxd->rx_flags = (__force hme32)flags;
 202 }
 203
 204 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 205 {
 206         txd->tx_addr = (__force hme32)addr;
 207         wmb();
 208         txd->tx_flags = (__force hme32)flags;
 209 }
 210
 211 static u32 sbus_hme_read_desc32(hme32 *p)
 212 {
 213         return (__force u32)*p;
 214 }
 215
 216 static void pci_hme_write32(void __iomem *reg, u32 val)
 217 {
 218         writel(val, reg);
 219 }
 220
 221 static u32 pci_hme_read32(void __iomem *reg)
 222 {
 223         return readl(reg);
 224 }
 225
 226 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 227 {
 228         rxd->rx_addr = (__force hme32)cpu_to_le32(addr);
 229         wmb();
 230         rxd->rx_flags = (__force hme32)cpu_to_le32(flags);
 231 }
 232
 233 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 234 {
 235         txd->tx_addr = (__force hme32)cpu_to_le32(addr);
 236         wmb();
 237         txd->tx_flags = (__force hme32)cpu_to_le32(flags);
 238 }
 239
 240 static u32 pci_hme_read_desc32(hme32 *p)
 241 {
 242         return le32_to_cpup((__le32 *)p);
 243 }
 244
 245 #define hme_write32(__hp, __reg, __val) \
 246         ((__hp)->write32((__reg), (__val)))
 247 #define hme_read32(__hp, __reg) \
 248         ((__hp)->read32(__reg))
 249 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 250         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
 251 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 252         ((__hp)->write_txd((__txd), (__flags), (__addr)))
 253 #define hme_read_desc32(__hp, __p) \
 254         ((__hp)->read_desc32(__p))
 255 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 256         ((__hp)->dma_map((__hp)->dma_dev, (__ptr), (__size), (__dir)))
 257 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 258         ((__hp)->dma_unmap((__hp)->dma_dev, (__addr), (__size), (__dir)))
 259 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 260         ((__hp)->dma_sync_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir)))
 261 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 262         ((__hp)->dma_sync_for_device((__hp)->dma_dev, (__addr), (__size), (__dir)))
 263 #else
 264 #ifdef CONFIG_SBUS
 265 /* SBUS only compilation */
 266 #define hme_write32(__hp, __reg, __val) \
 267         sbus_writel((__val), (__reg))
 268 #define hme_read32(__hp, __reg) \
 269         sbus_readl(__reg)
 270 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 271 do {    (__rxd)->rx_addr = (__force hme32)(u32)(__addr); \
 272         wmb(); \
 273         (__rxd)->rx_flags = (__force hme32)(u32)(__flags); \
 274 } while(0)
 275 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 276 do {    (__txd)->tx_addr = (__force hme32)(u32)(__addr); \
 277         wmb(); \
 278         (__txd)->tx_flags = (__force hme32)(u32)(__flags); \
 279 } while(0)
 280 #define hme_read_desc32(__hp, __p)      ((__force u32)(hme32)*(__p))
 281 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 282         dma_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
 283 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 284         dma_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
 285 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 286         dma_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
 287 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 288         dma_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
 289 #else
 290 /* PCI only compilation */
 291 #define hme_write32(__hp, __reg, __val) \
 292         writel((__val), (__reg))
 293 #define hme_read32(__hp, __reg) \
 294         readl(__reg)
 295 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 296 do {    (__rxd)->rx_addr = (__force hme32)cpu_to_le32(__addr); \
 297         wmb(); \
 298         (__rxd)->rx_flags = (__force hme32)cpu_to_le32(__flags); \
 299 } while(0)
 300 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 301 do {    (__txd)->tx_addr = (__force hme32)cpu_to_le32(__addr); \
 302         wmb(); \
 303         (__txd)->tx_flags = (__force hme32)cpu_to_le32(__flags); \
 304 } while(0)
 305 static inline u32 hme_read_desc32(struct happy_meal *hp, hme32 *p)
 306 {
 307         return le32_to_cpup((__le32 *)p);
 308 }
 309 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 310         pci_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
 311 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 312         pci_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
 313 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 314         pci_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
 315 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 316         pci_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
 317 #endif
 318 #endif
 319
 320
 321 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
 322 static void BB_PUT_BIT(struct happy_meal *hp, void __iomem *tregs, int bit)
 323 {
 324         hme_write32(hp, tregs + TCVR_BBDATA, bit);
 325         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 326         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 327 }
 328
 329 #if 0
 330 static u32 BB_GET_BIT(struct happy_meal *hp, void __iomem *tregs, int internal)
 331 {
 332         u32 ret;
 333
 334         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 335         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 336         ret = hme_read32(hp, tregs + TCVR_CFG);
 337         if (internal)
 338                 ret &= TCV_CFG_MDIO0;
 339         else
 340                 ret &= TCV_CFG_MDIO1;
 341
 342         return ret;
 343 }
 344 #endif
 345
 346 static u32 BB_GET_BIT2(struct happy_meal *hp, void __iomem *tregs, int internal)
 347 {
 348         u32 retval;
 349
 350         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 351         udelay(1);
 352         retval = hme_read32(hp, tregs + TCVR_CFG);
 353         if (internal)
 354                 retval &= TCV_CFG_MDIO0;
 355         else
 356                 retval &= TCV_CFG_MDIO1;
 357         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 358
 359         return retval;
 360 }
 361
 362 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
 363
 364 static int happy_meal_bb_read(struct happy_meal *hp,
 365                               void __iomem *tregs, int reg)
 366 {
 367         u32 tmp;
 368         int retval = 0;
 369         int i;
 370
 371         ASD(("happy_meal_bb_read: reg=%d ", reg));
 372
 373         /* Enable the MIF BitBang outputs. */
 374         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 375
 376         /* Force BitBang into the idle state. */
 377         for (i = 0; i < 32; i++)
 378                 BB_PUT_BIT(hp, tregs, 1);
 379
 380         /* Give it the read sequence. */
 381         BB_PUT_BIT(hp, tregs, 0);
 382         BB_PUT_BIT(hp, tregs, 1);
 383         BB_PUT_BIT(hp, tregs, 1);
 384         BB_PUT_BIT(hp, tregs, 0);
 385
 386         /* Give it the PHY address. */
 387         tmp = hp->paddr & 0xff;
 388         for (i = 4; i >= 0; i--)
 389                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 390
 391         /* Tell it what register we want to read. */
 392         tmp = (reg & 0xff);
 393         for (i = 4; i >= 0; i--)
 394                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 395
 396         /* Close down the MIF BitBang outputs. */
 397         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 398
 399         /* Now read in the value. */
 400         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 401         for (i = 15; i >= 0; i--)
 402                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 403         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 404         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 405         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 406         ASD(("value=%x\n", retval));
 407         return retval;
 408 }
 409
 410 static void happy_meal_bb_write(struct happy_meal *hp,
 411                                 void __iomem *tregs, int reg,
 412                                 unsigned short value)
 413 {
 414         u32 tmp;
 415         int i;
 416
 417         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
 418
 419         /* Enable the MIF BitBang outputs. */
 420         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 421
 422         /* Force BitBang into the idle state. */
 423         for (i = 0; i < 32; i++)
 424                 BB_PUT_BIT(hp, tregs, 1);
 425
 426         /* Give it write sequence. */
 427         BB_PUT_BIT(hp, tregs, 0);
 428         BB_PUT_BIT(hp, tregs, 1);
 429         BB_PUT_BIT(hp, tregs, 0);
 430         BB_PUT_BIT(hp, tregs, 1);
 431
 432         /* Give it the PHY address. */
 433         tmp = (hp->paddr & 0xff);
 434         for (i = 4; i >= 0; i--)
 435                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 436
 437         /* Tell it what register we will be writing. */
 438         tmp = (reg & 0xff);
 439         for (i = 4; i >= 0; i--)
 440                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 441
 442         /* Tell it to become ready for the bits. */
 443         BB_PUT_BIT(hp, tregs, 1);
 444         BB_PUT_BIT(hp, tregs, 0);
 445
 446         for (i = 15; i >= 0; i--)
 447                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
 448
 449         /* Close down the MIF BitBang outputs. */
 450         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 451 }
 452
 453 #define TCVR_READ_TRIES   16
 454
 455 static int happy_meal_tcvr_read(struct happy_meal *hp,
 456                                 void __iomem *tregs, int reg)
 457 {
 458         int tries = TCVR_READ_TRIES;
 459         int retval;
 460
 461         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
 462         if (hp->tcvr_type == none) {
 463                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
 464                 return TCVR_FAILURE;
 465         }
 466
 467         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 468                 ASD(("doing bit bang\n"));
 469                 return happy_meal_bb_read(hp, tregs, reg);
 470         }
 471
 472         hme_write32(hp, tregs + TCVR_FRAME,
 473                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
 474         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 475                 udelay(20);
 476         if (!tries) {
 477                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
 478                 return TCVR_FAILURE;
 479         }
 480         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
 481         ASD(("value=%04x\n", retval));
 482         return retval;
 483 }
 484
 485 #define TCVR_WRITE_TRIES  16
 486
 487 static void happy_meal_tcvr_write(struct happy_meal *hp,
 488                                   void __iomem *tregs, int reg,
 489                                   unsigned short value)
 490 {
 491         int tries = TCVR_WRITE_TRIES;
 492
 493         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
 494
 495         /* Welcome to Sun Microsystems, can I take your order please? */
 496         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 497                 happy_meal_bb_write(hp, tregs, reg, value);
 498                 return;
 499         }
 500
 501         /* Would you like fries with that? */
 502         hme_write32(hp, tregs + TCVR_FRAME,
 503                     (FRAME_WRITE | (hp->paddr << 23) |
 504                      ((reg & 0xff) << 18) | (value & 0xffff)));
 505         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 506                 udelay(20);
 507
 508         /* Anything else? */
 509         if (!tries)
 510                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
 511
 512         /* Fifty-two cents is your change, have a nice day. */
 513 }
 514
 515 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
 516  * that keeps watching the auto negotiation process as it progresses.
 517  * The DP83840 is first told to start doing it's thing, we set up the time
 518  * and place the timer state machine in it's initial state.
 519  *
 520  * Here the timer peeks at the DP83840 status registers at each click to see
 521  * if the auto negotiation has completed, we assume here that the DP83840 PHY
 522  * will time out at some point and just tell us what (didn't) happen.  For
 523  * complete coverage we only allow so many of the ticks at this level to run,
 524  * when this has expired we print a warning message and try another strategy.
 525  * This "other" strategy is to force the interface into various speed/duplex
 526  * configurations and we stop when we see a link-up condition before the
 527  * maximum number of "peek" ticks have occurred.
 528  *
 529  * Once a valid link status has been detected we configure the BigMAC and
 530  * the rest of the Happy Meal to speak the most efficient protocol we could
 531  * get a clean link for.  The priority for link configurations, highest first
 532  * is:
 533  *                 100 Base-T Full Duplex
 534  *                 100 Base-T Half Duplex
 535  *                 10 Base-T Full Duplex
 536  *                 10 Base-T Half Duplex
 537  *
 538  * We start a new timer now, after a successful auto negotiation status has
 539  * been detected.  This timer just waits for the link-up bit to get set in
 540  * the BMCR of the DP83840.  When this occurs we print a kernel log message
 541  * describing the link type in use and the fact that it is up.
 542  *
 543  * If a fatal error of some sort is signalled and detected in the interrupt
 544  * service routine, and the chip is reset, or the link is ifconfig'd down
 545  * and then back up, this entire process repeats itself all over again.
 546  */
 547 static int try_next_permutation(struct happy_meal *hp, void __iomem *tregs)
 548 {
 549         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 550
 551         /* Downgrade from full to half duplex.  Only possible
 552          * via ethtool.
 553          */
 554         if (hp->sw_bmcr & BMCR_FULLDPLX) {
 555                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
 556                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 557                 return 0;
 558         }
 559
 560         /* Downgrade from 100 to 10. */
 561         if (hp->sw_bmcr & BMCR_SPEED100) {
 562                 hp->sw_bmcr &= ~(BMCR_SPEED100);
 563                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 564                 return 0;
 565         }
 566
 567         /* We've tried everything. */
 568         return -1;
 569 }
 570
 571 static void display_link_mode(struct happy_meal *hp, void __iomem *tregs)
 572 {
 573         printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
 574         if (hp->tcvr_type == external)
 575                 printk("external ");
 576         else
 577                 printk("internal ");
 578         printk("transceiver at ");
 579         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 580         if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
 581                 if (hp->sw_lpa & LPA_100FULL)
 582                         printk("100Mb/s, Full Duplex.\n");
 583                 else
 584                         printk("100Mb/s, Half Duplex.\n");
 585         } else {
 586                 if (hp->sw_lpa & LPA_10FULL)
 587                         printk("10Mb/s, Full Duplex.\n");
 588                 else
 589                         printk("10Mb/s, Half Duplex.\n");
 590         }
 591 }
 592
 593 static void display_forced_link_mode(struct happy_meal *hp, void __iomem *tregs)
 594 {
 595         printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
 596         if (hp->tcvr_type == external)
 597                 printk("external ");
 598         else
 599                 printk("internal ");
 600         printk("transceiver at ");
 601         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 602         if (hp->sw_bmcr & BMCR_SPEED100)
 603                 printk("100Mb/s, ");
 604         else
 605                 printk("10Mb/s, ");
 606         if (hp->sw_bmcr & BMCR_FULLDPLX)
 607                 printk("Full Duplex.\n");
 608         else
 609                 printk("Half Duplex.\n");
 610 }
 611
 612 static int set_happy_link_modes(struct happy_meal *hp, void __iomem *tregs)
 613 {
 614         int full;
 615
 616         /* All we care about is making sure the bigmac tx_cfg has a
 617          * proper duplex setting.
 618          */
 619         if (hp->timer_state == arbwait) {
 620                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 621                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
 622                         goto no_response;
 623                 if (hp->sw_lpa & LPA_100FULL)
 624                         full = 1;
 625                 else if (hp->sw_lpa & LPA_100HALF)
 626                         full = 0;
 627                 else if (hp->sw_lpa & LPA_10FULL)
 628                         full = 1;
 629                 else
 630                         full = 0;
 631         } else {
 632                 /* Forcing a link mode. */
 633                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 634                 if (hp->sw_bmcr & BMCR_FULLDPLX)
 635                         full = 1;
 636                 else
 637                         full = 0;
 638         }
 639
 640         /* Before changing other bits in the tx_cfg register, and in
 641          * general any of other the TX config registers too, you
 642          * must:
 643          * 1) Clear Enable
 644          * 2) Poll with reads until that bit reads back as zero
 645          * 3) Make TX configuration changes
 646          * 4) Set Enable once more
 647          */
 648         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 649                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 650                     ~(BIGMAC_TXCFG_ENABLE));
 651         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
 652                 barrier();
 653         if (full) {
 654                 hp->happy_flags |= HFLAG_FULL;
 655                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 656                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 657                             BIGMAC_TXCFG_FULLDPLX);
 658         } else {
 659                 hp->happy_flags &= ~(HFLAG_FULL);
 660                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 661                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 662                             ~(BIGMAC_TXCFG_FULLDPLX));
 663         }
 664         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 665                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 666                     BIGMAC_TXCFG_ENABLE);
 667         return 0;
 668 no_response:
 669         return 1;
 670 }
 671
 672 static int happy_meal_init(struct happy_meal *hp);
 673
 674 static int is_lucent_phy(struct happy_meal *hp)
 675 {
 676         void __iomem *tregs = hp->tcvregs;
 677         unsigned short mr2, mr3;
 678         int ret = 0;
 679
 680         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
 681         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
 682         if ((mr2 & 0xffff) == 0x0180 &&
 683             ((mr3 & 0xffff) >> 10) == 0x1d)
 684                 ret = 1;
 685
 686         return ret;
 687 }
 688
 689 static void happy_meal_timer(unsigned long data)
 690 {
 691         struct happy_meal *hp = (struct happy_meal *) data;
 692         void __iomem *tregs = hp->tcvregs;
 693         int restart_timer = 0;
 694
 695         spin_lock_irq(&hp->happy_lock);
 696
 697         hp->timer_ticks++;
 698         switch(hp->timer_state) {
 699         case arbwait:
 700                 /* Only allow for 5 ticks, thats 10 seconds and much too
 701                  * long to wait for arbitration to complete.
 702                  */
 703                 if (hp->timer_ticks >= 10) {
 704                         /* Enter force mode. */
 705         do_force_mode:
 706                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 707                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
 708                                hp->dev->name);
 709                         hp->sw_bmcr = BMCR_SPEED100;
 710                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 711
 712                         if (!is_lucent_phy(hp)) {
 713                                 /* OK, seems we need do disable the transceiver for the first
 714                                  * tick to make sure we get an accurate link state at the
 715                                  * second tick.
 716                                  */
 717                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 718                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 719                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
 720                         }
 721                         hp->timer_state = ltrywait;
 722                         hp->timer_ticks = 0;
 723                         restart_timer = 1;
 724                 } else {
 725                         /* Anything interesting happen? */
 726                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 727                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
 728                                 int ret;
 729
 730                                 /* Just what we've been waiting for... */
 731                                 ret = set_happy_link_modes(hp, tregs);
 732                                 if (ret) {
 733                                         /* Ooops, something bad happened, go to force
 734                                          * mode.
 735                                          *
 736                                          * XXX Broken hubs which don't support 802.3u
 737                                          * XXX auto-negotiation make this happen as well.
 738                                          */
 739                                         goto do_force_mode;
 740                                 }
 741
 742                                 /* Success, at least so far, advance our state engine. */
 743                                 hp->timer_state = lupwait;
 744                                 restart_timer = 1;
 745                         } else {
 746                                 restart_timer = 1;
 747                         }
 748                 }
 749                 break;
 750
 751         case lupwait:
 752                 /* Auto negotiation was successful and we are awaiting a
 753                  * link up status.  I have decided to let this timer run
 754                  * forever until some sort of error is signalled, reporting
 755                  * a message to the user at 10 second intervals.
 756                  */
 757                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 758                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 759                         /* Wheee, it's up, display the link mode in use and put
 760                          * the timer to sleep.
 761                          */
 762                         display_link_mode(hp, tregs);
 763                         hp->timer_state = asleep;
 764                         restart_timer = 0;
 765                 } else {
 766                         if (hp->timer_ticks >= 10) {
 767                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
 768                                        "not completely up.\n", hp->dev->name);
 769                                 hp->timer_ticks = 0;
 770                                 restart_timer = 1;
 771                         } else {
 772                                 restart_timer = 1;
 773                         }
 774                 }
 775                 break;
 776
 777         case ltrywait:
 778                 /* Making the timeout here too long can make it take
 779                  * annoyingly long to attempt all of the link mode
 780                  * permutations, but then again this is essentially
 781                  * error recovery code for the most part.
 782                  */
 783                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 784                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 785                 if (hp->timer_ticks == 1) {
 786                         if (!is_lucent_phy(hp)) {
 787                                 /* Re-enable transceiver, we'll re-enable the transceiver next
 788                                  * tick, then check link state on the following tick.
 789                                  */
 790                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 791                                 happy_meal_tcvr_write(hp, tregs,
 792                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 793                         }
 794                         restart_timer = 1;
 795                         break;
 796                 }
 797                 if (hp->timer_ticks == 2) {
 798                         if (!is_lucent_phy(hp)) {
 799                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 800                                 happy_meal_tcvr_write(hp, tregs,
 801                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 802                         }
 803                         restart_timer = 1;
 804                         break;
 805                 }
 806                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 807                         /* Force mode selection success. */
 808                         display_forced_link_mode(hp, tregs);
 809                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
 810                         hp->timer_state = asleep;
 811                         restart_timer = 0;
 812                 } else {
 813                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
 814                                 int ret;
 815
 816                                 ret = try_next_permutation(hp, tregs);
 817                                 if (ret == -1) {
 818                                         /* Aieee, tried them all, reset the
 819                                          * chip and try all over again.
 820                                          */
 821
 822                                         /* Let the user know... */
 823                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
 824                                                hp->dev->name);
 825
 826                                         ret = happy_meal_init(hp);
 827                                         if (ret) {
 828                                                 /* ho hum... */
 829                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
 830                                                        "Happy Meal.\n", hp->dev->name);
 831                                         }
 832                                         goto out;
 833                                 }
 834                                 if (!is_lucent_phy(hp)) {
 835                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
 836                                                                                DP83840_CSCONFIG);
 837                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 838                                         happy_meal_tcvr_write(hp, tregs,
 839                                                               DP83840_CSCONFIG, hp->sw_csconfig);
 840                                 }
 841                                 hp->timer_ticks = 0;
 842                                 restart_timer = 1;
 843                         } else {
 844                                 restart_timer = 1;
 845                         }
 846                 }
 847                 break;
 848
 849         case asleep:
 850         default:
 851                 /* Can't happens.... */
 852                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
 853                        hp->dev->name);
 854                 restart_timer = 0;
 855                 hp->timer_ticks = 0;
 856                 hp->timer_state = asleep; /* foo on you */
 857                 break;
 858         }
 859
 860         if (restart_timer) {
 861                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
 862                 add_timer(&hp->happy_timer);
 863         }
 864
 865 out:
 866         spin_unlock_irq(&hp->happy_lock);
 867 }
 868
 869 #define TX_RESET_TRIES     32
 870 #define RX_RESET_TRIES     32
 871
 872 /* hp->happy_lock must be held */
 873 static void happy_meal_tx_reset(struct happy_meal *hp, void __iomem *bregs)
 874 {
 875         int tries = TX_RESET_TRIES;
 876
 877         HMD(("happy_meal_tx_reset: reset, "));
 878
 879         /* Would you like to try our SMCC Delux? */
 880         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
 881         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
 882                 udelay(20);
 883
 884         /* Lettuce, tomato, buggy hardware (no extra charge)? */
 885         if (!tries)
 886                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
 887
 888         /* Take care. */
 889         HMD(("done\n"));
 890 }
 891
 892 /* hp->happy_lock must be held */
 893 static void happy_meal_rx_reset(struct happy_meal *hp, void __iomem *bregs)
 894 {
 895         int tries = RX_RESET_TRIES;
 896
 897         HMD(("happy_meal_rx_reset: reset, "));
 898
 899         /* We have a special on GNU/Viking hardware bugs today. */
 900         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
 901         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
 902                 udelay(20);
 903
 904         /* Will that be all? */
 905         if (!tries)
 906                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
 907
 908         /* Don't forget your vik_1137125_wa.  Have a nice day. */
 909         HMD(("done\n"));
 910 }
 911
 912 #define STOP_TRIES         16
 913
 914 /* hp->happy_lock must be held */
 915 static void happy_meal_stop(struct happy_meal *hp, void __iomem *gregs)
 916 {
 917         int tries = STOP_TRIES;
 918
 919         HMD(("happy_meal_stop: reset, "));
 920
 921         /* We're consolidating our STB products, it's your lucky day. */
 922         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
 923         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
 924                 udelay(20);
 925
 926         /* Come back next week when we are "Sun Microelectronics". */
 927         if (!tries)
 928                 printk(KERN_ERR "happy meal: Fry guys.");
 929
 930         /* Remember: "Different name, same old buggy as shit hardware." */
 931         HMD(("done\n"));
 932 }
 933
 934 /* hp->happy_lock must be held */
 935 static void happy_meal_get_counters(struct happy_meal *hp, void __iomem *bregs)
 936 {
 937         struct net_device_stats *stats = &hp->net_stats;
 938
 939         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
 940         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
 941
 942         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
 943         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
 944
 945         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
 946         hme_write32(hp, bregs + BMAC_GLECTR, 0);
 947
 948         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
 949
 950         stats->collisions +=
 951                 (hme_read32(hp, bregs + BMAC_EXCTR) +
 952                  hme_read32(hp, bregs + BMAC_LTCTR));
 953         hme_write32(hp, bregs + BMAC_EXCTR, 0);
 954         hme_write32(hp, bregs + BMAC_LTCTR, 0);
 955 }
 956
 957 /* hp->happy_lock must be held */
 958 static void happy_meal_poll_stop(struct happy_meal *hp, void __iomem *tregs)
 959 {
 960         ASD(("happy_meal_poll_stop: "));
 961
 962         /* If polling disabled or not polling already, nothing to do. */
 963         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
 964            (HFLAG_POLLENABLE | HFLAG_POLL)) {
 965                 HMD(("not polling, return\n"));
 966                 return;
 967         }
 968
 969         /* Shut up the MIF. */
 970         ASD(("were polling, mif ints off, "));
 971         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
 972
 973         /* Turn off polling. */
 974         ASD(("polling off, "));
 975         hme_write32(hp, tregs + TCVR_CFG,
 976                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
 977
 978         /* We are no longer polling. */
 979         hp->happy_flags &= ~(HFLAG_POLL);
 980
 981         /* Let the bits set. */
 982         udelay(200);
 983         ASD(("done\n"));
 984 }
 985
 986 /* Only Sun can take such nice parts and fuck up the programming interface
 987  * like this.  Good job guys...
 988  */
 989 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
 990 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
 991
 992 /* hp->happy_lock must be held */
 993 static int happy_meal_tcvr_reset(struct happy_meal *hp, void __iomem *tregs)
 994 {
 995         u32 tconfig;
 996         int result, tries = TCVR_RESET_TRIES;
 997
 998         tconfig = hme_read32(hp, tregs + TCVR_CFG);
 999         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1000         if (hp->tcvr_type == external) {
1001                 ASD(("external<"));
1002                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1003                 hp->tcvr_type = internal;
1004                 hp->paddr = TCV_PADDR_ITX;
1005                 ASD(("ISOLATE,"));
1006                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1007                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1008                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1009                 if (result == TCVR_FAILURE) {
1010                         ASD(("phyread_fail>\n"));
1011                         return -1;
1012                 }
1013                 ASD(("phyread_ok,PSELECT>"));
1014                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1015                 hp->tcvr_type = external;
1016                 hp->paddr = TCV_PADDR_ETX;
1017         } else {
1018                 if (tconfig & TCV_CFG_MDIO1) {
1019                         ASD(("internal<PSELECT,"));
1020                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1021                         ASD(("ISOLATE,"));
1022                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1023                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1024                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1025                         if (result == TCVR_FAILURE) {
1026                                 ASD(("phyread_fail>\n"));
1027                                 return -1;
1028                         }
1029                         ASD(("phyread_ok,~PSELECT>"));
1030                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1031                         hp->tcvr_type = internal;
1032                         hp->paddr = TCV_PADDR_ITX;
1033                 }
1034         }
1035
1036         ASD(("BMCR_RESET "));
1037         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1038
1039         while (--tries) {
1040                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1041                 if (result == TCVR_FAILURE)
1042                         return -1;
1043                 hp->sw_bmcr = result;
1044                 if (!(result & BMCR_RESET))
1045                         break;
1046                 udelay(20);
1047         }
1048         if (!tries) {
1049                 ASD(("BMCR RESET FAILED!\n"));
1050                 return -1;
1051         }
1052         ASD(("RESET_OK\n"));
1053
1054         /* Get fresh copies of the PHY registers. */
1055         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1056         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1057         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1058         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1059
1060         ASD(("UNISOLATE"));
1061         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1062         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1063
1064         tries = TCVR_UNISOLATE_TRIES;
1065         while (--tries) {
1066                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1067                 if (result == TCVR_FAILURE)
1068                         return -1;
1069                 if (!(result & BMCR_ISOLATE))
1070                         break;
1071                 udelay(20);
1072         }
1073         if (!tries) {
1074                 ASD((" FAILED!\n"));
1075                 return -1;
1076         }
1077         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1078         if (!is_lucent_phy(hp)) {
1079                 result = happy_meal_tcvr_read(hp, tregs,
1080                                               DP83840_CSCONFIG);
1081                 happy_meal_tcvr_write(hp, tregs,
1082                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1083         }
1084         return 0;
1085 }
1086
1087 /* Figure out whether we have an internal or external transceiver.
1088  *
1089  * hp->happy_lock must be held
1090  */
1091 static void happy_meal_transceiver_check(struct happy_meal *hp, void __iomem *tregs)
1092 {
1093         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1094
1095         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1096         if (hp->happy_flags & HFLAG_POLL) {
1097                 /* If we are polling, we must stop to get the transceiver type. */
1098                 ASD(("<polling> "));
1099                 if (hp->tcvr_type == internal) {
1100                         if (tconfig & TCV_CFG_MDIO1) {
1101                                 ASD(("<internal> <poll stop> "));
1102                                 happy_meal_poll_stop(hp, tregs);
1103                                 hp->paddr = TCV_PADDR_ETX;
1104                                 hp->tcvr_type = external;
1105                                 ASD(("<external>\n"));
1106                                 tconfig &= ~(TCV_CFG_PENABLE);
1107                                 tconfig |= TCV_CFG_PSELECT;
1108                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1109                         }
1110                 } else {
1111                         if (hp->tcvr_type == external) {
1112                                 ASD(("<external> "));
1113                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1114                                         ASD(("<poll stop> "));
1115                                         happy_meal_poll_stop(hp, tregs);
1116                                         hp->paddr = TCV_PADDR_ITX;
1117                                         hp->tcvr_type = internal;
1118                                         ASD(("<internal>\n"));
1119                                         hme_write32(hp, tregs + TCVR_CFG,
1120                                                     hme_read32(hp, tregs + TCVR_CFG) &
1121                                                     ~(TCV_CFG_PSELECT));
1122                                 }
1123                                 ASD(("\n"));
1124                         } else {
1125                                 ASD(("<none>\n"));
1126                         }
1127                 }
1128         } else {
1129                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1130
1131                 /* Else we can just work off of the MDIO bits. */
1132                 ASD(("<not polling> "));
1133                 if (reread & TCV_CFG_MDIO1) {
1134                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1135                         hp->paddr = TCV_PADDR_ETX;
1136                         hp->tcvr_type = external;
1137                         ASD(("<external>\n"));
1138                 } else {
1139                         if (reread & TCV_CFG_MDIO0) {
1140                                 hme_write32(hp, tregs + TCVR_CFG,
1141                                             tconfig & ~(TCV_CFG_PSELECT));
1142                                 hp->paddr = TCV_PADDR_ITX;
1143                                 hp->tcvr_type = internal;
1144                                 ASD(("<internal>\n"));
1145                         } else {
1146                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1147                                 hp->tcvr_type = none; /* Grrr... */
1148                                 ASD(("<none>\n"));
1149                         }
1150                 }
1151         }
1152 }
1153
1154 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1155  *
1156  * The buffers we dma into must be 64 byte aligned.  So we use a special
1157  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1158  * we really need.
1159  *
1160  * We use skb_reserve() to align the data block we get in the skb.  We
1161  * also program the etxregs->cfg register to use an offset of 2.  This
1162  * imperical constant plus the ethernet header size will always leave
1163  * us with a nicely aligned ip header once we pass things up to the
1164  * protocol layers.
1165  *
1166  * The numbers work out to:
1167  *
1168  *         Max ethernet frame size         1518
1169  *         Ethernet header size              14
1170  *         Happy Meal base offset             2
1171  *
1172  * Say a skb data area is at 0xf001b010, and its size alloced is
1173  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1174  *
1175  * First our alloc_skb() routine aligns the data base to a 64 byte
1176  * boundary.  We now have 0xf001b040 as our skb data address.  We
1177  * plug this into the receive descriptor address.
1178  *
1179  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1180  * So now the data we will end up looking at starts at 0xf001b042.  When
1181  * the packet arrives, we will check out the size received and subtract
1182  * this from the skb->length.  Then we just pass the packet up to the
1183  * protocols as is, and allocate a new skb to replace this slot we have
1184  * just received from.
1185  *
1186  * The ethernet layer will strip the ether header from the front of the
1187  * skb we just sent to it, this leaves us with the ip header sitting
1188  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1189  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1190  * bit checksum is obtained from the low bits of the receive descriptor
1191  * flags, thus:
1192  *
1193  *      skb->csum = rxd->rx_flags & 0xffff;
1194  *      skb->ip_summed = CHECKSUM_COMPLETE;
1195  *
1196  * before sending off the skb to the protocols, and we are good as gold.
1197  */
1198 static void happy_meal_clean_rings(struct happy_meal *hp)
1199 {
1200         int i;
1201
1202         for (i = 0; i < RX_RING_SIZE; i++) {
1203                 if (hp->rx_skbs[i] != NULL) {
1204                         struct sk_buff *skb = hp->rx_skbs[i];
1205                         struct happy_meal_rxd *rxd;
1206                         u32 dma_addr;
1207
1208                         rxd = &hp->happy_block->happy_meal_rxd[i];
1209                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1210                         dma_unmap_single(hp->dma_dev, dma_addr,
1211                                          RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
1212                         dev_kfree_skb_any(skb);
1213                         hp->rx_skbs[i] = NULL;
1214                 }
1215         }
1216
1217         for (i = 0; i < TX_RING_SIZE; i++) {
1218                 if (hp->tx_skbs[i] != NULL) {
1219                         struct sk_buff *skb = hp->tx_skbs[i];
1220                         struct happy_meal_txd *txd;
1221                         u32 dma_addr;
1222                         int frag;
1223
1224                         hp->tx_skbs[i] = NULL;
1225
1226                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1227                                 txd = &hp->happy_block->happy_meal_txd[i];
1228                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1229                                 if (!frag)
1230                                         dma_unmap_single(hp->dma_dev, dma_addr,
1231                                                          (hme_read_desc32(hp, &txd->tx_flags)
1232                                                           & TXFLAG_SIZE),
1233                                                          DMA_TO_DEVICE);
1234                                 else
1235                                         dma_unmap_page(hp->dma_dev, dma_addr,
1236                                                          (hme_read_desc32(hp, &txd->tx_flags)
1237                                                           & TXFLAG_SIZE),
1238                                                          DMA_TO_DEVICE);
1239
1240                                 if (frag != skb_shinfo(skb)->nr_frags)
1241                                         i++;
1242                         }
1243
1244                         dev_kfree_skb_any(skb);
1245                 }
1246         }
1247 }
1248
1249 /* hp->happy_lock must be held */
1250 static void happy_meal_init_rings(struct happy_meal *hp)
1251 {
1252         struct hmeal_init_block *hb = hp->happy_block;
1253         struct net_device *dev = hp->dev;
1254         int i;
1255
1256         HMD(("happy_meal_init_rings: counters to zero, "));
1257         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1258
1259         /* Free any skippy bufs left around in the rings. */
1260         HMD(("clean, "));
1261         happy_meal_clean_rings(hp);
1262
1263         /* Now get new skippy bufs for the receive ring. */
1264         HMD(("init rxring, "));
1265         for (i = 0; i < RX_RING_SIZE; i++) {
1266                 struct sk_buff *skb;
1267
1268                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1269                 if (!skb) {
1270                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1271                         continue;
1272                 }
1273                 hp->rx_skbs[i] = skb;
1274                 skb->dev = dev;
1275
1276                 /* Because we reserve afterwards. */
1277                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
1278                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1279                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1280                               dma_map_single(hp->dma_dev, skb->data, RX_BUF_ALLOC_SIZE,
1281                                              DMA_FROM_DEVICE));
1282                 skb_reserve(skb, RX_OFFSET);
1283         }
1284
1285         HMD(("init txring, "));
1286         for (i = 0; i < TX_RING_SIZE; i++)
1287                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1288
1289         HMD(("done\n"));
1290 }
1291
1292 /* hp->happy_lock must be held */
1293 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1294                                               void __iomem *tregs,
1295                                               struct ethtool_cmd *ep)
1296 {
1297         int timeout;
1298
1299         /* Read all of the registers we are interested in now. */
1300         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1301         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1302         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1303         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1304
1305         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1306
1307         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1308         if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1309                 /* Advertise everything we can support. */
1310                 if (hp->sw_bmsr & BMSR_10HALF)
1311                         hp->sw_advertise |= (ADVERTISE_10HALF);
1312                 else
1313                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1314
1315                 if (hp->sw_bmsr & BMSR_10FULL)
1316                         hp->sw_advertise |= (ADVERTISE_10FULL);
1317                 else
1318                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1319                 if (hp->sw_bmsr & BMSR_100HALF)
1320                         hp->sw_advertise |= (ADVERTISE_100HALF);
1321                 else
1322                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1323                 if (hp->sw_bmsr & BMSR_100FULL)
1324                         hp->sw_advertise |= (ADVERTISE_100FULL);
1325                 else
1326                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1327                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1328
1329                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1330                  * XXX and this is because the DP83840 does not support it, changes
1331                  * XXX would need to be made to the tx/rx logic in the driver as well
1332                  * XXX so I completely skip checking for it in the BMSR for now.
1333                  */
1334
1335 #ifdef AUTO_SWITCH_DEBUG
1336                 ASD(("%s: Advertising [ ", hp->dev->name));
1337                 if (hp->sw_advertise & ADVERTISE_10HALF)
1338                         ASD(("10H "));
1339                 if (hp->sw_advertise & ADVERTISE_10FULL)
1340                         ASD(("10F "));
1341                 if (hp->sw_advertise & ADVERTISE_100HALF)
1342                         ASD(("100H "));
1343                 if (hp->sw_advertise & ADVERTISE_100FULL)
1344                         ASD(("100F "));
1345 #endif
1346
1347                 /* Enable Auto-Negotiation, this is usually on already... */
1348                 hp->sw_bmcr |= BMCR_ANENABLE;
1349                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1350
1351                 /* Restart it to make sure it is going. */
1352                 hp->sw_bmcr |= BMCR_ANRESTART;
1353                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1354
1355                 /* BMCR_ANRESTART self clears when the process has begun. */
1356
1357                 timeout = 64;  /* More than enough. */
1358                 while (--timeout) {
1359                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1360                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1361                                 break; /* got it. */
1362                         udelay(10);
1363                 }
1364                 if (!timeout) {
1365                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1366                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1367                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1368                                hp->dev->name);
1369                         goto force_link;
1370                 } else {
1371                         hp->timer_state = arbwait;
1372                 }
1373         } else {
1374 force_link:
1375                 /* Force the link up, trying first a particular mode.
1376                  * Either we are here at the request of ethtool or
1377                  * because the Happy Meal would not start to autoneg.
1378                  */
1379
1380                 /* Disable auto-negotiation in BMCR, enable the duplex and
1381                  * speed setting, init the timer state machine, and fire it off.
1382                  */
1383                 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1384                         hp->sw_bmcr = BMCR_SPEED100;
1385                 } else {
1386                         if (ep->speed == SPEED_100)
1387                                 hp->sw_bmcr = BMCR_SPEED100;
1388                         else
1389                                 hp->sw_bmcr = 0;
1390                         if (ep->duplex == DUPLEX_FULL)
1391                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1392                 }
1393                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1394
1395                 if (!is_lucent_phy(hp)) {
1396                         /* OK, seems we need do disable the transceiver for the first
1397                          * tick to make sure we get an accurate link state at the
1398                          * second tick.
1399                          */
1400                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1401                                                                DP83840_CSCONFIG);
1402                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1403                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1404                                               hp->sw_csconfig);
1405                 }
1406                 hp->timer_state = ltrywait;
1407         }
1408
1409         hp->timer_ticks = 0;
1410         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1411         hp->happy_timer.data = (unsigned long) hp;
1412         hp->happy_timer.function = &happy_meal_timer;
1413         add_timer(&hp->happy_timer);
1414 }
1415
1416 /* hp->happy_lock must be held */
1417 static int happy_meal_init(struct happy_meal *hp)
1418 {
1419         void __iomem *gregs        = hp->gregs;
1420         void __iomem *etxregs      = hp->etxregs;
1421         void __iomem *erxregs      = hp->erxregs;
1422         void __iomem *bregs        = hp->bigmacregs;
1423         void __iomem *tregs        = hp->tcvregs;
1424         u32 regtmp, rxcfg;
1425         unsigned char *e = &hp->dev->dev_addr[0];
1426
1427         /* If auto-negotiation timer is running, kill it. */
1428         del_timer(&hp->happy_timer);
1429
1430         HMD(("happy_meal_init: happy_flags[%08x] ",
1431              hp->happy_flags));
1432         if (!(hp->happy_flags & HFLAG_INIT)) {
1433                 HMD(("set HFLAG_INIT, "));
1434                 hp->happy_flags |= HFLAG_INIT;
1435                 happy_meal_get_counters(hp, bregs);
1436         }
1437
1438         /* Stop polling. */
1439         HMD(("to happy_meal_poll_stop\n"));
1440         happy_meal_poll_stop(hp, tregs);
1441
1442         /* Stop transmitter and receiver. */
1443         HMD(("happy_meal_init: to happy_meal_stop\n"));
1444         happy_meal_stop(hp, gregs);
1445
1446         /* Alloc and reset the tx/rx descriptor chains. */
1447         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1448         happy_meal_init_rings(hp);
1449
1450         /* Shut up the MIF. */
1451         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1452              hme_read32(hp, tregs + TCVR_IMASK)));
1453         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1454
1455         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1456         if (hp->happy_flags & HFLAG_FENABLE) {
1457                 HMD(("use frame old[%08x], ",
1458                      hme_read32(hp, tregs + TCVR_CFG)));
1459                 hme_write32(hp, tregs + TCVR_CFG,
1460                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1461         } else {
1462                 HMD(("use bitbang old[%08x], ",
1463                      hme_read32(hp, tregs + TCVR_CFG)));
1464                 hme_write32(hp, tregs + TCVR_CFG,
1465                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1466         }
1467
1468         /* Check the state of the transceiver. */
1469         HMD(("to happy_meal_transceiver_check\n"));
1470         happy_meal_transceiver_check(hp, tregs);
1471
1472         /* Put the Big Mac into a sane state. */
1473         HMD(("happy_meal_init: "));
1474         switch(hp->tcvr_type) {
1475         case none:
1476                 /* Cannot operate if we don't know the transceiver type! */
1477                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1478                 return -EAGAIN;
1479
1480         case internal:
1481                 /* Using the MII buffers. */
1482                 HMD(("internal, using MII, "));
1483                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1484                 break;
1485
1486         case external:
1487                 /* Not using the MII, disable it. */
1488                 HMD(("external, disable MII, "));
1489                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1490                 break;
1491         }
1492
1493         if (happy_meal_tcvr_reset(hp, tregs))
1494                 return -EAGAIN;
1495
1496         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1497         HMD(("tx/rx reset, "));
1498         happy_meal_tx_reset(hp, bregs);
1499         happy_meal_rx_reset(hp, bregs);
1500
1501         /* Set jam size and inter-packet gaps to reasonable defaults. */
1502         HMD(("jsize/ipg1/ipg2, "));
1503         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1504         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1505         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1506
1507         /* Load up the MAC address and random seed. */
1508         HMD(("rseed/macaddr, "));
1509
1510         /* The docs recommend to use the 10LSB of our MAC here. */
1511         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1512
1513         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1514         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1515         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1516
1517         HMD(("htable, "));
1518         if ((hp->dev->flags & IFF_ALLMULTI) ||
1519             (netdev_mc_count(hp->dev) > 64)) {
1520                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1521                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1522                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1523                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1524         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1525                 u16 hash_table[4];
1526                 struct netdev_hw_addr *ha;
1527                 char *addrs;
1528                 u32 crc;
1529
1530                 memset(hash_table, 0, sizeof(hash_table));
1531                 netdev_for_each_mc_addr(ha, hp->dev) {
1532                         addrs = ha->addr;
1533
1534                         if (!(*addrs & 1))
1535                                 continue;
1536
1537                         crc = ether_crc_le(6, addrs);
1538                         crc >>= 26;
1539                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1540                 }
1541                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1542                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1543                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1544                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1545         } else {
1546                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1547                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1548                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1549                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1550         }
1551
1552         /* Set the RX and TX ring ptrs. */
1553         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1554              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1555              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1556         hme_write32(hp, erxregs + ERX_RING,
1557                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1558         hme_write32(hp, etxregs + ETX_RING,
1559                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1560
1561         /* Parity issues in the ERX unit of some HME revisions can cause some
1562          * registers to not be written unless their parity is even.  Detect such
1563          * lost writes and simply rewrite with a low bit set (which will be ignored
1564          * since the rxring needs to be 2K aligned).
1565          */
1566         if (hme_read32(hp, erxregs + ERX_RING) !=
1567             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1568                 hme_write32(hp, erxregs + ERX_RING,
1569                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1570                             | 0x4);
1571
1572         /* Set the supported burst sizes. */
1573         HMD(("happy_meal_init: old[%08x] bursts<",
1574              hme_read32(hp, gregs + GREG_CFG)));
1575
1576 #ifndef CONFIG_SPARC
1577         /* It is always PCI and can handle 64byte bursts. */
1578         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1579 #else
1580         if ((hp->happy_bursts & DMA_BURST64) &&
1581             ((hp->happy_flags & HFLAG_PCI) != 0
1582 #ifdef CONFIG_SBUS
1583              || sbus_can_burst64()
1584 #endif
1585              || 0)) {
1586                 u32 gcfg = GREG_CFG_BURST64;
1587
1588                 /* I have no idea if I should set the extended
1589                  * transfer mode bit for Cheerio, so for now I
1590                  * do not.  -DaveM
1591                  */
1592 #ifdef CONFIG_SBUS
1593                 if ((hp->happy_flags & HFLAG_PCI) == 0) {
1594                         struct of_device *op = hp->happy_dev;
1595                         if (sbus_can_dma_64bit()) {
1596                                 sbus_set_sbus64(&op->dev,
1597                                                 hp->happy_bursts);
1598                                 gcfg |= GREG_CFG_64BIT;
1599                         }
1600                 }
1601 #endif
1602
1603                 HMD(("64>"));
1604                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1605         } else if (hp->happy_bursts & DMA_BURST32) {
1606                 HMD(("32>"));
1607                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1608         } else if (hp->happy_bursts & DMA_BURST16) {
1609                 HMD(("16>"));
1610                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1611         } else {
1612                 HMD(("XXX>"));
1613                 hme_write32(hp, gregs + GREG_CFG, 0);
1614         }
1615 #endif /* CONFIG_SPARC */
1616
1617         /* Turn off interrupts we do not want to hear. */
1618         HMD((", enable global interrupts, "));
1619         hme_write32(hp, gregs + GREG_IMASK,
1620                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1621                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1622
1623         /* Set the transmit ring buffer size. */
1624         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1625              hme_read32(hp, etxregs + ETX_RSIZE)));
1626         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1627
1628         /* Enable transmitter DVMA. */
1629         HMD(("tx dma enable old[%08x], ",
1630              hme_read32(hp, etxregs + ETX_CFG)));
1631         hme_write32(hp, etxregs + ETX_CFG,
1632                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1633
1634         /* This chip really rots, for the receiver sometimes when you
1635          * write to its control registers not all the bits get there
1636          * properly.  I cannot think of a sane way to provide complete
1637          * coverage for this hardware bug yet.
1638          */
1639         HMD(("erx regs bug old[%08x]\n",
1640              hme_read32(hp, erxregs + ERX_CFG)));
1641         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1642         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1643         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1644         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1645                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1646                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1647                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1648                 /* XXX Should return failure here... */
1649         }
1650
1651         /* Enable Big Mac hash table filter. */
1652         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1653              hme_read32(hp, bregs + BMAC_RXCFG)));
1654         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1655         if (hp->dev->flags & IFF_PROMISC)
1656                 rxcfg |= BIGMAC_RXCFG_PMISC;
1657         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1658
1659         /* Let the bits settle in the chip. */
1660         udelay(10);
1661
1662         /* Ok, configure the Big Mac transmitter. */
1663         HMD(("BIGMAC init, "));
1664         regtmp = 0;
1665         if (hp->happy_flags & HFLAG_FULL)
1666                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1667
1668         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1669          * to deadlock with the PHY if a Jabber occurs.
1670          */
1671         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1672
1673         /* Give up after 16 TX attempts. */
1674         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1675
1676         /* Enable the output drivers no matter what. */
1677         regtmp = BIGMAC_XCFG_ODENABLE;
1678
1679         /* If card can do lance mode, enable it. */
1680         if (hp->happy_flags & HFLAG_LANCE)
1681                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1682
1683         /* Disable the MII buffers if using external transceiver. */
1684         if (hp->tcvr_type == external)
1685                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1686
1687         HMD(("XIF config old[%08x], ",
1688              hme_read32(hp, bregs + BMAC_XIFCFG)));
1689         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1690
1691         /* Start things up. */
1692         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1693              hme_read32(hp, bregs + BMAC_TXCFG),
1694              hme_read32(hp, bregs + BMAC_RXCFG)));
1695
1696         /* Set larger TX/RX size to allow for 802.1q */
1697         hme_write32(hp, bregs + BMAC_TXMAX, ETH_FRAME_LEN + 8);
1698         hme_write32(hp, bregs + BMAC_RXMAX, ETH_FRAME_LEN + 8);
1699
1700         hme_write32(hp, bregs + BMAC_TXCFG,
1701                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1702         hme_write32(hp, bregs + BMAC_RXCFG,
1703                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1704
1705         /* Get the autonegotiation started, and the watch timer ticking. */
1706         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1707
1708         /* Success. */
1709         return 0;
1710 }
1711
1712 /* hp->happy_lock must be held */
1713 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1714 {
1715         void __iomem *tregs     = hp->tcvregs;
1716         void __iomem *bregs     = hp->bigmacregs;
1717         void __iomem *gregs     = hp->gregs;
1718
1719         happy_meal_stop(hp, gregs);
1720         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1721         if (hp->happy_flags & HFLAG_FENABLE)
1722                 hme_write32(hp, tregs + TCVR_CFG,
1723                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1724         else
1725                 hme_write32(hp, tregs + TCVR_CFG,
1726                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1727         happy_meal_transceiver_check(hp, tregs);
1728         switch(hp->tcvr_type) {
1729         case none:
1730                 return;
1731         case internal:
1732                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1733                 break;
1734         case external:
1735                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1736                 break;
1737         }
1738         if (happy_meal_tcvr_reset(hp, tregs))
1739                 return;
1740
1741         /* Latch PHY registers as of now. */
1742         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1743         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1744
1745         /* Advertise everything we can support. */
1746         if (hp->sw_bmsr & BMSR_10HALF)
1747                 hp->sw_advertise |= (ADVERTISE_10HALF);
1748         else
1749                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1750
1751         if (hp->sw_bmsr & BMSR_10FULL)
1752                 hp->sw_advertise |= (ADVERTISE_10FULL);
1753         else
1754                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1755         if (hp->sw_bmsr & BMSR_100HALF)
1756                 hp->sw_advertise |= (ADVERTISE_100HALF);
1757         else
1758                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1759         if (hp->sw_bmsr & BMSR_100FULL)
1760                 hp->sw_advertise |= (ADVERTISE_100FULL);
1761         else
1762                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1763
1764         /* Update the PHY advertisement register. */
1765         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1766 }
1767
1768 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1769  * the hardware, so we cannot re-read it and get a correct value.
1770  *
1771  * hp->happy_lock must be held
1772  */
1773 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1774 {
1775         int reset = 0;
1776
1777         /* Only print messages for non-counter related interrupts. */
1778         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1779                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1780                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1781                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1782                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1783                       GREG_STAT_SLVPERR))
1784                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1785                        hp->dev->name, status);
1786
1787         if (status & GREG_STAT_RFIFOVF) {
1788                 /* Receive FIFO overflow is harmless and the hardware will take
1789                    care of it, just some packets are lost. Who cares. */
1790                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1791         }
1792
1793         if (status & GREG_STAT_STSTERR) {
1794                 /* BigMAC SQE link test failed. */
1795                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1796                 reset = 1;
1797         }
1798
1799         if (status & GREG_STAT_TFIFO_UND) {
1800                 /* Transmit FIFO underrun, again DMA error likely. */
1801                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1802                        hp->dev->name);
1803                 reset = 1;
1804         }
1805
1806         if (status & GREG_STAT_MAXPKTERR) {
1807                 /* Driver error, tried to transmit something larger
1808                  * than ethernet max mtu.
1809                  */
1810                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1811                 reset = 1;
1812         }
1813
1814         if (status & GREG_STAT_NORXD) {
1815                 /* This is harmless, it just means the system is
1816                  * quite loaded and the incoming packet rate was
1817                  * faster than the interrupt handler could keep up
1818                  * with.
1819                  */
1820                 printk(KERN_INFO "%s: Happy Meal out of receive "
1821                        "descriptors, packet dropped.\n",
1822                        hp->dev->name);
1823         }
1824
1825         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1826                 /* All sorts of DMA receive errors. */
1827                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1828                 if (status & GREG_STAT_RXERR)
1829                         printk("GenericError ");
1830                 if (status & GREG_STAT_RXPERR)
1831                         printk("ParityError ");
1832                 if (status & GREG_STAT_RXTERR)
1833                         printk("RxTagBotch ");
1834                 printk("]\n");
1835                 reset = 1;
1836         }
1837
1838         if (status & GREG_STAT_EOPERR) {
1839                 /* Driver bug, didn't set EOP bit in tx descriptor given
1840                  * to the happy meal.
1841                  */
1842                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1843                        hp->dev->name);
1844                 reset = 1;
1845         }
1846
1847         if (status & GREG_STAT_MIFIRQ) {
1848                 /* MIF signalled an interrupt, were we polling it? */
1849                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1850         }
1851
1852         if (status &
1853             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1854                 /* All sorts of transmit DMA errors. */
1855                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1856                 if (status & GREG_STAT_TXEACK)
1857                         printk("GenericError ");
1858                 if (status & GREG_STAT_TXLERR)
1859                         printk("LateError ");
1860                 if (status & GREG_STAT_TXPERR)
1861                         printk("ParityErro ");
1862                 if (status & GREG_STAT_TXTERR)
1863                         printk("TagBotch ");
1864                 printk("]\n");
1865                 reset = 1;
1866         }
1867
1868         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1869                 /* Bus or parity error when cpu accessed happy meal registers
1870                  * or it's internal FIFO's.  Should never see this.
1871                  */
1872                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1873                        hp->dev->name,
1874                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1875                 reset = 1;
1876         }
1877
1878         if (reset) {
1879                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1880                 happy_meal_init(hp);
1881                 return 1;
1882         }
1883         return 0;
1884 }
1885
1886 /* hp->happy_lock must be held */
1887 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1888 {
1889         void __iomem *tregs = hp->tcvregs;
1890
1891         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1892         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1893         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1894
1895         /* Use the fastest transmission protocol possible. */
1896         if (hp->sw_lpa & LPA_100FULL) {
1897                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1898                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1899         } else if (hp->sw_lpa & LPA_100HALF) {
1900                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1901                 hp->sw_bmcr |= BMCR_SPEED100;
1902         } else if (hp->sw_lpa & LPA_10FULL) {
1903                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1904                 hp->sw_bmcr |= BMCR_FULLDPLX;
1905         } else {
1906                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1907         }
1908         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1909
1910         /* Finally stop polling and shut up the MIF. */
1911         happy_meal_poll_stop(hp, tregs);
1912 }
1913
1914 #ifdef TXDEBUG
1915 #define TXD(x) printk x
1916 #else
1917 #define TXD(x)
1918 #endif
1919
1920 /* hp->happy_lock must be held */
1921 static void happy_meal_tx(struct happy_meal *hp)
1922 {
1923         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1924         struct happy_meal_txd *this;
1925         struct net_device *dev = hp->dev;
1926         int elem;
1927
1928         elem = hp->tx_old;
1929         TXD(("TX<"));
1930         while (elem != hp->tx_new) {
1931                 struct sk_buff *skb;
1932                 u32 flags, dma_addr, dma_len;
1933                 int frag;
1934
1935                 TXD(("[%d]", elem));
1936                 this = &txbase[elem];
1937                 flags = hme_read_desc32(hp, &this->tx_flags);
1938                 if (flags & TXFLAG_OWN)
1939                         break;
1940                 skb = hp->tx_skbs[elem];
1941                 if (skb_shinfo(skb)->nr_frags) {
1942                         int last;
1943
1944                         last = elem + skb_shinfo(skb)->nr_frags;
1945                         last &= (TX_RING_SIZE - 1);
1946                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1947                         if (flags & TXFLAG_OWN)
1948                                 break;
1949                 }
1950                 hp->tx_skbs[elem] = NULL;
1951                 hp->net_stats.tx_bytes += skb->len;
1952
1953                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1954                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1955                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1956
1957                         dma_len &= TXFLAG_SIZE;
1958                         if (!frag)
1959                                 dma_unmap_single(hp->dma_dev, dma_addr, dma_len, DMA_TO_DEVICE);
1960                         else
1961                                 dma_unmap_page(hp->dma_dev, dma_addr, dma_len, DMA_TO_DEVICE);
1962
1963                         elem = NEXT_TX(elem);
1964                         this = &txbase[elem];
1965                 }
1966
1967                 dev_kfree_skb_irq(skb);
1968                 hp->net_stats.tx_packets++;
1969         }
1970         hp->tx_old = elem;
1971         TXD((">"));
1972
1973         if (netif_queue_stopped(dev) &&
1974             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1975                 netif_wake_queue(dev);
1976 }
1977
1978 #ifdef RXDEBUG
1979 #define RXD(x) printk x
1980 #else
1981 #define RXD(x)
1982 #endif
1983
1984 /* Originally I used to handle the allocation failure by just giving back just
1985  * that one ring buffer to the happy meal.  Problem is that usually when that
1986  * condition is triggered, the happy meal expects you to do something reasonable
1987  * with all of the packets it has DMA'd in.  So now I just drop the entire
1988  * ring when we cannot get a new skb and give them all back to the happy meal,
1989  * maybe things will be "happier" now.
1990  *
1991  * hp->happy_lock must be held
1992  */
1993 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
1994 {
1995         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
1996         struct happy_meal_rxd *this;
1997         int elem = hp->rx_new, drops = 0;
1998         u32 flags;
1999
2000         RXD(("RX<"));
2001         this = &rxbase[elem];
2002         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
2003                 struct sk_buff *skb;
2004                 int len = flags >> 16;
2005                 u16 csum = flags & RXFLAG_CSUM;
2006                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2007
2008                 RXD(("[%d ", elem));
2009
2010                 /* Check for errors. */
2011                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2012                         RXD(("ERR(%08x)]", flags));
2013                         hp->net_stats.rx_errors++;
2014                         if (len < ETH_ZLEN)
2015                                 hp->net_stats.rx_length_errors++;
2016                         if (len & (RXFLAG_OVERFLOW >> 16)) {
2017                                 hp->net_stats.rx_over_errors++;
2018                                 hp->net_stats.rx_fifo_errors++;
2019                         }
2020
2021                         /* Return it to the Happy meal. */
2022         drop_it:
2023                         hp->net_stats.rx_dropped++;
2024                         hme_write_rxd(hp, this,
2025                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2026                                       dma_addr);
2027                         goto next;
2028                 }
2029                 skb = hp->rx_skbs[elem];
2030                 if (len > RX_COPY_THRESHOLD) {
2031                         struct sk_buff *new_skb;
2032
2033                         /* Now refill the entry, if we can. */
2034                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2035                         if (new_skb == NULL) {
2036                                 drops++;
2037                                 goto drop_it;
2038                         }
2039                         dma_unmap_single(hp->dma_dev, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
2040                         hp->rx_skbs[elem] = new_skb;
2041                         new_skb->dev = dev;
2042                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
2043                         hme_write_rxd(hp, this,
2044                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2045                                       dma_map_single(hp->dma_dev, new_skb->data, RX_BUF_ALLOC_SIZE,
2046                                                      DMA_FROM_DEVICE));
2047                         skb_reserve(new_skb, RX_OFFSET);
2048
2049                         /* Trim the original skb for the netif. */
2050                         skb_trim(skb, len);
2051                 } else {
2052                         struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2053
2054                         if (copy_skb == NULL) {
2055                                 drops++;
2056                                 goto drop_it;
2057                         }
2058
2059                         skb_reserve(copy_skb, 2);
2060                         skb_put(copy_skb, len);
2061                         dma_sync_single_for_cpu(hp->dma_dev, dma_addr, len, DMA_FROM_DEVICE);
2062                         skb_copy_from_linear_data(skb, copy_skb->data, len);
2063                         dma_sync_single_for_device(hp->dma_dev, dma_addr, len, DMA_FROM_DEVICE);
2064                         /* Reuse original ring buffer. */
2065                         hme_write_rxd(hp, this,
2066                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2067                                       dma_addr);
2068
2069                         skb = copy_skb;
2070                 }
2071
2072                 /* This card is _fucking_ hot... */
2073                 skb->csum = csum_unfold(~(__force __sum16)htons(csum));
2074                 skb->ip_summed = CHECKSUM_COMPLETE;
2075
2076                 RXD(("len=%d csum=%4x]", len, csum));
2077                 skb->protocol = eth_type_trans(skb, dev);
2078                 netif_rx(skb);
2079
2080                 hp->net_stats.rx_packets++;
2081                 hp->net_stats.rx_bytes += len;
2082         next:
2083                 elem = NEXT_RX(elem);
2084                 this = &rxbase[elem];
2085         }
2086         hp->rx_new = elem;
2087         if (drops)
2088                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2089         RXD((">"));
2090 }
2091
2092 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id)
2093 {
2094         struct net_device *dev = dev_id;
2095         struct happy_meal *hp  = netdev_priv(dev);
2096         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2097
2098         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2099
2100         spin_lock(&hp->happy_lock);
2101
2102         if (happy_status & GREG_STAT_ERRORS) {
2103                 HMD(("ERRORS "));
2104                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2105                         goto out;
2106         }
2107
2108         if (happy_status & GREG_STAT_MIFIRQ) {
2109                 HMD(("MIFIRQ "));
2110                 happy_meal_mif_interrupt(hp);
2111         }
2112
2113         if (happy_status & GREG_STAT_TXALL) {
2114                 HMD(("TXALL "));
2115                 happy_meal_tx(hp);
2116         }
2117
2118         if (happy_status & GREG_STAT_RXTOHOST) {
2119                 HMD(("RXTOHOST "));
2120                 happy_meal_rx(hp, dev);
2121         }
2122
2123         HMD(("done\n"));
2124 out:
2125         spin_unlock(&hp->happy_lock);
2126
2127         return IRQ_HANDLED;
2128 }
2129
2130 #ifdef CONFIG_SBUS
2131 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie)
2132 {
2133         struct quattro *qp = (struct quattro *) cookie;
2134         int i;
2135
2136         for (i = 0; i < 4; i++) {
2137                 struct net_device *dev = qp->happy_meals[i];
2138                 struct happy_meal *hp  = netdev_priv(dev);
2139                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2140
2141                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2142
2143                 if (!(happy_status & (GREG_STAT_ERRORS |
2144                                       GREG_STAT_MIFIRQ |
2145                                       GREG_STAT_TXALL |
2146                                       GREG_STAT_RXTOHOST)))
2147                         continue;
2148
2149                 spin_lock(&hp->happy_lock);
2150
2151                 if (happy_status & GREG_STAT_ERRORS) {
2152                         HMD(("ERRORS "));
2153                         if (happy_meal_is_not_so_happy(hp, happy_status))
2154                                 goto next;
2155                 }
2156
2157                 if (happy_status & GREG_STAT_MIFIRQ) {
2158                         HMD(("MIFIRQ "));
2159                         happy_meal_mif_interrupt(hp);
2160                 }
2161
2162                 if (happy_status & GREG_STAT_TXALL) {
2163                         HMD(("TXALL "));
2164                         happy_meal_tx(hp);
2165                 }
2166
2167                 if (happy_status & GREG_STAT_RXTOHOST) {
2168                         HMD(("RXTOHOST "));
2169                         happy_meal_rx(hp, dev);
2170                 }
2171
2172         next:
2173                 spin_unlock(&hp->happy_lock);
2174         }
2175         HMD(("done\n"));
2176
2177         return IRQ_HANDLED;
2178 }
2179 #endif
2180
2181 static int happy_meal_open(struct net_device *dev)
2182 {
2183         struct happy_meal *hp = netdev_priv(dev);
2184         int res;
2185
2186         HMD(("happy_meal_open: "));
2187
2188         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2189          * into a single source which we register handling at probe time.
2190          */
2191         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2192                 if (request_irq(dev->irq, happy_meal_interrupt,
2193                                 IRQF_SHARED, dev->name, (void *)dev)) {
2194                         HMD(("EAGAIN\n"));
2195                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2196                                dev->irq);
2197
2198                         return -EAGAIN;
2199                 }
2200         }
2201
2202         HMD(("to happy_meal_init\n"));
2203
2204         spin_lock_irq(&hp->happy_lock);
2205         res = happy_meal_init(hp);
2206         spin_unlock_irq(&hp->happy_lock);
2207
2208         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2209                 free_irq(dev->irq, dev);
2210         return res;
2211 }
2212
2213 static int happy_meal_close(struct net_device *dev)
2214 {
2215         struct happy_meal *hp = netdev_priv(dev);
2216
2217         spin_lock_irq(&hp->happy_lock);
2218         happy_meal_stop(hp, hp->gregs);
2219         happy_meal_clean_rings(hp);
2220
2221         /* If auto-negotiation timer is running, kill it. */
2222         del_timer(&hp->happy_timer);
2223
2224         spin_unlock_irq(&hp->happy_lock);
2225
2226         /* On Quattro QFE cards, all hme interrupts are concentrated
2227          * into a single source which we register handling at probe
2228          * time and never unregister.
2229          */
2230         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2231                 free_irq(dev->irq, dev);
2232
2233         return 0;
2234 }
2235
2236 #ifdef SXDEBUG
2237 #define SXD(x) printk x
2238 #else
2239 #define SXD(x)
2240 #endif
2241
2242 static void happy_meal_tx_timeout(struct net_device *dev)
2243 {
2244         struct happy_meal *hp = netdev_priv(dev);
2245
2246         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2247         tx_dump_log();
2248         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2249                 hme_read32(hp, hp->gregs + GREG_STAT),
2250                 hme_read32(hp, hp->etxregs + ETX_CFG),
2251                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2252
2253         spin_lock_irq(&hp->happy_lock);
2254         happy_meal_init(hp);
2255         spin_unlock_irq(&hp->happy_lock);
2256
2257         netif_wake_queue(dev);
2258 }
2259
2260 static netdev_tx_t happy_meal_start_xmit(struct sk_buff *skb,
2261                                          struct net_device *dev)
2262 {
2263         struct happy_meal *hp = netdev_priv(dev);
2264         int entry;
2265         u32 tx_flags;
2266
2267         tx_flags = TXFLAG_OWN;
2268         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2269                 const u32 csum_start_off = skb_transport_offset(skb);
2270                 const u32 csum_stuff_off = csum_start_off + skb->csum_offset;
2271
2272                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2273                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2274                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2275         }
2276
2277         spin_lock_irq(&hp->happy_lock);
2278
2279         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2280                 netif_stop_queue(dev);
2281                 spin_unlock_irq(&hp->happy_lock);
2282                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2283                        dev->name);
2284                 return NETDEV_TX_BUSY;
2285         }
2286
2287         entry = hp->tx_new;
2288         SXD(("SX<l[%d]e[%d]>", len, entry));
2289         hp->tx_skbs[entry] = skb;
2290
2291         if (skb_shinfo(skb)->nr_frags == 0) {
2292                 u32 mapping, len;
2293
2294                 len = skb->len;
2295                 mapping = dma_map_single(hp->dma_dev, skb->data, len, DMA_TO_DEVICE);
2296                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2297                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2298                               (tx_flags | (len & TXFLAG_SIZE)),
2299                               mapping);
2300                 entry = NEXT_TX(entry);
2301         } else {
2302                 u32 first_len, first_mapping;
2303                 int frag, first_entry = entry;
2304
2305                 /* We must give this initial chunk to the device last.
2306                  * Otherwise we could race with the device.
2307                  */
2308                 first_len = skb_headlen(skb);
2309                 first_mapping = dma_map_single(hp->dma_dev, skb->data, first_len,
2310                                                DMA_TO_DEVICE);
2311                 entry = NEXT_TX(entry);
2312
2313                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2314                         skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2315                         u32 len, mapping, this_txflags;
2316
2317                         len = this_frag->size;
2318                         mapping = dma_map_page(hp->dma_dev, this_frag->page,
2319                                                this_frag->page_offset, len,
2320                                                DMA_TO_DEVICE);
2321                         this_txflags = tx_flags;
2322                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2323                                 this_txflags |= TXFLAG_EOP;
2324                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2325                                       (this_txflags | (len & TXFLAG_SIZE)),
2326                                       mapping);
2327                         entry = NEXT_TX(entry);
2328                 }
2329                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2330                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2331                               first_mapping);
2332         }
2333
2334         hp->tx_new = entry;
2335
2336         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2337                 netif_stop_queue(dev);
2338
2339         /* Get it going. */
2340         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2341
2342         spin_unlock_irq(&hp->happy_lock);
2343
2344         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2345         return NETDEV_TX_OK;
2346 }
2347
2348 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2349 {
2350         struct happy_meal *hp = netdev_priv(dev);
2351
2352         spin_lock_irq(&hp->happy_lock);
2353         happy_meal_get_counters(hp, hp->bigmacregs);
2354         spin_unlock_irq(&hp->happy_lock);
2355
2356         return &hp->net_stats;
2357 }
2358
2359 static void happy_meal_set_multicast(struct net_device *dev)
2360 {
2361         struct happy_meal *hp = netdev_priv(dev);
2362         void __iomem *bregs = hp->bigmacregs;
2363         struct netdev_hw_addr *ha;
2364         char *addrs;
2365         u32 crc;
2366
2367         spin_lock_irq(&hp->happy_lock);
2368
2369         if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 64)) {
2370                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2371                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2372                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2373                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2374         } else if (dev->flags & IFF_PROMISC) {
2375                 hme_write32(hp, bregs + BMAC_RXCFG,
2376                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2377         } else {
2378                 u16 hash_table[4];
2379
2380                 memset(hash_table, 0, sizeof(hash_table));
2381                 netdev_for_each_mc_addr(ha, dev) {
2382                         addrs = ha->addr;
2383
2384                         if (!(*addrs & 1))
2385                                 continue;
2386
2387                         crc = ether_crc_le(6, addrs);
2388                         crc >>= 26;
2389                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2390                 }
2391                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2392                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2393                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2394                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2395         }
2396
2397         spin_unlock_irq(&hp->happy_lock);
2398 }
2399
2400 /* Ethtool support... */
2401 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2402 {
2403         struct happy_meal *hp = netdev_priv(dev);
2404
2405         cmd->supported =
2406                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2407                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2408                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2409
2410         /* XXX hardcoded stuff for now */
2411         cmd->port = PORT_TP; /* XXX no MII support */
2412         cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2413         cmd->phy_address = 0; /* XXX fixed PHYAD */
2414
2415         /* Record PHY settings. */
2416         spin_lock_irq(&hp->happy_lock);
2417         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2418         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2419         spin_unlock_irq(&hp->happy_lock);
2420
2421         if (hp->sw_bmcr & BMCR_ANENABLE) {
2422                 cmd->autoneg = AUTONEG_ENABLE;
2423                 cmd->speed =
2424                         (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2425                         SPEED_100 : SPEED_10;
2426                 if (cmd->speed == SPEED_100)
2427                         cmd->duplex =
2428                                 (hp->sw_lpa & (LPA_100FULL)) ?
2429                                 DUPLEX_FULL : DUPLEX_HALF;
2430                 else
2431                         cmd->duplex =
2432                                 (hp->sw_lpa & (LPA_10FULL)) ?
2433                                 DUPLEX_FULL : DUPLEX_HALF;
2434         } else {
2435                 cmd->autoneg = AUTONEG_DISABLE;
2436                 cmd->speed =
2437                         (hp->sw_bmcr & BMCR_SPEED100) ?
2438                         SPEED_100 : SPEED_10;
2439                 cmd->duplex =
2440                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2441                         DUPLEX_FULL : DUPLEX_HALF;
2442         }
2443         return 0;
2444 }
2445
2446 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2447 {
2448         struct happy_meal *hp = netdev_priv(dev);
2449
2450         /* Verify the settings we care about. */
2451         if (cmd->autoneg != AUTONEG_ENABLE &&
2452             cmd->autoneg != AUTONEG_DISABLE)
2453                 return -EINVAL;
2454         if (cmd->autoneg == AUTONEG_DISABLE &&
2455             ((cmd->speed != SPEED_100 &&
2456               cmd->speed != SPEED_10) ||
2457              (cmd->duplex != DUPLEX_HALF &&
2458               cmd->duplex != DUPLEX_FULL)))
2459                 return -EINVAL;
2460
2461         /* Ok, do it to it. */
2462         spin_lock_irq(&hp->happy_lock);
2463         del_timer(&hp->happy_timer);
2464         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2465         spin_unlock_irq(&hp->happy_lock);
2466
2467         return 0;
2468 }
2469
2470 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2471 {
2472         struct happy_meal *hp = netdev_priv(dev);
2473
2474         strcpy(info->driver, "sunhme");
2475         strcpy(info->version, "2.02");
2476         if (hp->happy_flags & HFLAG_PCI) {
2477                 struct pci_dev *pdev = hp->happy_dev;
2478                 strcpy(info->bus_info, pci_name(pdev));
2479         }
2480 #ifdef CONFIG_SBUS
2481         else {
2482                 const struct linux_prom_registers *regs;
2483                 struct of_device *op = hp->happy_dev;
2484                 regs = of_get_property(op->dev.of_node, "regs", NULL);
2485                 if (regs)
2486                         sprintf(info->bus_info, "SBUS:%d",
2487                                 regs->which_io);
2488         }
2489 #endif
2490 }
2491
2492 static u32 hme_get_link(struct net_device *dev)
2493 {
2494         struct happy_meal *hp = netdev_priv(dev);
2495
2496         spin_lock_irq(&hp->happy_lock);
2497         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2498         spin_unlock_irq(&hp->happy_lock);
2499
2500         return (hp->sw_bmsr & BMSR_LSTATUS);
2501 }
2502
2503 static const struct ethtool_ops hme_ethtool_ops = {
2504         .get_settings           = hme_get_settings,
2505         .set_settings           = hme_set_settings,
2506         .get_drvinfo            = hme_get_drvinfo,
2507         .get_link               = hme_get_link,
2508 };
2509
2510 static int hme_version_printed;
2511
2512 #ifdef CONFIG_SBUS
2513 /* Given a happy meal sbus device, find it's quattro parent.
2514  * If none exist, allocate and return a new one.
2515  *
2516  * Return NULL on failure.
2517  */
2518 static struct quattro * __devinit quattro_sbus_find(struct of_device *child)
2519 {
2520         struct device *parent = child->dev.parent;
2521         struct of_device *op;
2522         struct quattro *qp;
2523
2524         op = to_of_device(parent);
2525         qp = dev_get_drvdata(&op->dev);
2526         if (qp)
2527                 return qp;
2528
2529         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2530         if (qp != NULL) {
2531                 int i;
2532
2533                 for (i = 0; i < 4; i++)
2534                         qp->happy_meals[i] = NULL;
2535
2536                 qp->quattro_dev = child;
2537                 qp->next = qfe_sbus_list;
2538                 qfe_sbus_list = qp;
2539
2540                 dev_set_drvdata(&op->dev, qp);
2541         }
2542         return qp;
2543 }
2544
2545 /* After all quattro cards have been probed, we call these functions
2546  * to register the IRQ handlers for the cards that have been
2547  * successfully probed and skip the cards that failed to initialize
2548  */
2549 static int __init quattro_sbus_register_irqs(void)
2550 {
2551         struct quattro *qp;
2552
2553         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2554                 struct of_device *op = qp->quattro_dev;
2555                 int err, qfe_slot, skip = 0;
2556
2557                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2558                         if (!qp->happy_meals[qfe_slot])
2559                                 skip = 1;
2560                 }
2561                 if (skip)
2562                         continue;
2563
2564                 err = request_irq(op->archdata.irqs[0],
2565                                   quattro_sbus_interrupt,
2566                                   IRQF_SHARED, "Quattro",
2567                                   qp);
2568                 if (err != 0) {
2569                         printk(KERN_ERR "Quattro HME: IRQ registration "
2570                                "error %d.\n", err);
2571                         return err;
2572                 }
2573         }
2574
2575         return 0;
2576 }
2577
2578 static void quattro_sbus_free_irqs(void)
2579 {
2580         struct quattro *qp;
2581
2582         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2583                 struct of_device *op = qp->quattro_dev;
2584                 int qfe_slot, skip = 0;
2585
2586                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2587                         if (!qp->happy_meals[qfe_slot])
2588                                 skip = 1;
2589                 }
2590                 if (skip)
2591                         continue;
2592
2593                 free_irq(op->archdata.irqs[0], qp);
2594         }
2595 }
2596 #endif /* CONFIG_SBUS */
2597
2598 #ifdef CONFIG_PCI
2599 static struct quattro * __devinit quattro_pci_find(struct pci_dev *pdev)
2600 {
2601         struct pci_dev *bdev = pdev->bus->self;
2602         struct quattro *qp;
2603
2604         if (!bdev) return NULL;
2605         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2606                 struct pci_dev *qpdev = qp->quattro_dev;
2607
2608                 if (qpdev == bdev)
2609                         return qp;
2610         }
2611         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2612         if (qp != NULL) {
2613                 int i;
2614
2615                 for (i = 0; i < 4; i++)
2616                         qp->happy_meals[i] = NULL;
2617
2618                 qp->quattro_dev = bdev;
2619                 qp->next = qfe_pci_list;
2620                 qfe_pci_list = qp;
2621
2622                 /* No range tricks necessary on PCI. */
2623                 qp->nranges = 0;
2624         }
2625         return qp;
2626 }
2627 #endif /* CONFIG_PCI */
2628
2629 static const struct net_device_ops hme_netdev_ops = {
2630         .ndo_open               = happy_meal_open,
2631         .ndo_stop               = happy_meal_close,
2632         .ndo_start_xmit         = happy_meal_start_xmit,
2633         .ndo_tx_timeout         = happy_meal_tx_timeout,
2634         .ndo_get_stats          = happy_meal_get_stats,
2635         .ndo_set_multicast_list = happy_meal_set_multicast,
2636         .ndo_change_mtu         = eth_change_mtu,
2637         .ndo_set_mac_address    = eth_mac_addr,
2638         .ndo_validate_addr      = eth_validate_addr,
2639 };
2640
2641 #ifdef CONFIG_SBUS
2642 static int __devinit happy_meal_sbus_probe_one(struct of_device *op, int is_qfe)
2643 {
2644         struct device_node *dp = op->dev.of_node, *sbus_dp;
2645         struct quattro *qp = NULL;
2646         struct happy_meal *hp;
2647         struct net_device *dev;
2648         int i, qfe_slot = -1;
2649         int err = -ENODEV;
2650
2651         sbus_dp = to_of_device(op->dev.parent)->dev.of_node;
2652
2653         /* We can match PCI devices too, do not accept those here. */
2654         if (strcmp(sbus_dp->name, "sbus"))
2655                 return err;
2656
2657         if (is_qfe) {
2658                 qp = quattro_sbus_find(op);
2659                 if (qp == NULL)
2660                         goto err_out;
2661                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2662                         if (qp->happy_meals[qfe_slot] == NULL)
2663                                 break;
2664                 if (qfe_slot == 4)
2665                         goto err_out;
2666         }
2667
2668         err = -ENOMEM;
2669         dev = alloc_etherdev(sizeof(struct happy_meal));
2670         if (!dev)
2671                 goto err_out;
2672         SET_NETDEV_DEV(dev, &op->dev);
2673
2674         if (hme_version_printed++ == 0)
2675                 printk(KERN_INFO "%s", version);
2676
2677         /* If user did not specify a MAC address specifically, use
2678          * the Quattro local-mac-address property...
2679          */
2680         for (i = 0; i < 6; i++) {
2681                 if (macaddr[i] != 0)
2682                         break;
2683         }
2684         if (i < 6) { /* a mac address was given */
2685                 for (i = 0; i < 6; i++)
2686                         dev->dev_addr[i] = macaddr[i];
2687                 macaddr[5]++;
2688         } else {
2689                 const unsigned char *addr;
2690                 int len;
2691
2692                 addr = of_get_property(dp, "local-mac-address", &len);
2693
2694                 if (qfe_slot != -1 && addr && len == 6)
2695                         memcpy(dev->dev_addr, addr, 6);
2696                 else
2697                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2698         }
2699
2700         hp = netdev_priv(dev);
2701
2702         hp->happy_dev = op;
2703         hp->dma_dev = &op->dev;
2704
2705         spin_lock_init(&hp->happy_lock);
2706
2707         err = -ENODEV;
2708         if (qp != NULL) {
2709                 hp->qfe_parent = qp;
2710                 hp->qfe_ent = qfe_slot;
2711                 qp->happy_meals[qfe_slot] = dev;
2712         }
2713
2714         hp->gregs = of_ioremap(&op->resource[0], 0,
2715                                GREG_REG_SIZE, "HME Global Regs");
2716         if (!hp->gregs) {
2717                 printk(KERN_ERR "happymeal: Cannot map global registers.\n");
2718                 goto err_out_free_netdev;
2719         }
2720
2721         hp->etxregs = of_ioremap(&op->resource[1], 0,
2722                                  ETX_REG_SIZE, "HME TX Regs");
2723         if (!hp->etxregs) {
2724                 printk(KERN_ERR "happymeal: Cannot map MAC TX registers.\n");
2725                 goto err_out_iounmap;
2726         }
2727
2728         hp->erxregs = of_ioremap(&op->resource[2], 0,
2729                                  ERX_REG_SIZE, "HME RX Regs");
2730         if (!hp->erxregs) {
2731                 printk(KERN_ERR "happymeal: Cannot map MAC RX registers.\n");
2732                 goto err_out_iounmap;
2733         }
2734
2735         hp->bigmacregs = of_ioremap(&op->resource[3], 0,
2736                                     BMAC_REG_SIZE, "HME BIGMAC Regs");
2737         if (!hp->bigmacregs) {
2738                 printk(KERN_ERR "happymeal: Cannot map BIGMAC registers.\n");
2739                 goto err_out_iounmap;
2740         }
2741
2742         hp->tcvregs = of_ioremap(&op->resource[4], 0,
2743                                  TCVR_REG_SIZE, "HME Tranceiver Regs");
2744         if (!hp->tcvregs) {
2745                 printk(KERN_ERR "happymeal: Cannot map TCVR registers.\n");
2746                 goto err_out_iounmap;
2747         }
2748
2749         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
2750         if (hp->hm_revision == 0xff)
2751                 hp->hm_revision = 0xa0;
2752
2753         /* Now enable the feature flags we can. */
2754         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2755                 hp->happy_flags = HFLAG_20_21;
2756         else if (hp->hm_revision != 0xa0)
2757                 hp->happy_flags = HFLAG_NOT_A0;
2758
2759         if (qp != NULL)
2760                 hp->happy_flags |= HFLAG_QUATTRO;
2761
2762         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2763         hp->happy_bursts = of_getintprop_default(sbus_dp,
2764                                                  "burst-sizes", 0x00);
2765
2766         hp->happy_block = dma_alloc_coherent(hp->dma_dev,
2767                                              PAGE_SIZE,
2768                                              &hp->hblock_dvma,
2769                                              GFP_ATOMIC);
2770         err = -ENOMEM;
2771         if (!hp->happy_block) {
2772                 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2773                 goto err_out_iounmap;
2774         }
2775
2776         /* Force check of the link first time we are brought up. */
2777         hp->linkcheck = 0;
2778
2779         /* Force timer state to 'asleep' with count of zero. */
2780         hp->timer_state = asleep;
2781         hp->timer_ticks = 0;
2782
2783         init_timer(&hp->happy_timer);
2784
2785         hp->dev = dev;
2786         dev->netdev_ops = &hme_netdev_ops;
2787         dev->watchdog_timeo = 5*HZ;
2788         dev->ethtool_ops = &hme_ethtool_ops;
2789
2790         /* Happy Meal can do it all... */
2791         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2792
2793         dev->irq = op->archdata.irqs[0];
2794
2795 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2796         /* Hook up SBUS register/descriptor accessors. */
2797         hp->read_desc32 = sbus_hme_read_desc32;
2798         hp->write_txd = sbus_hme_write_txd;
2799         hp->write_rxd = sbus_hme_write_rxd;
2800         hp->read32 = sbus_hme_read32;
2801         hp->write32 = sbus_hme_write32;
2802 #endif
2803
2804         /* Grrr, Happy Meal comes up by default not advertising
2805          * full duplex 100baseT capabilities, fix this.
2806          */
2807         spin_lock_irq(&hp->happy_lock);
2808         happy_meal_set_initial_advertisement(hp);
2809         spin_unlock_irq(&hp->happy_lock);
2810
2811         if (register_netdev(hp->dev)) {
2812                 printk(KERN_ERR "happymeal: Cannot register net device, "
2813                        "aborting.\n");
2814                 goto err_out_free_coherent;
2815         }
2816
2817         dev_set_drvdata(&op->dev, hp);
2818
2819         if (qfe_slot != -1)
2820                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2821                        dev->name, qfe_slot);
2822         else
2823                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2824                        dev->name);
2825
2826         printk("%pM\n", dev->dev_addr);
2827
2828         return 0;
2829
2830 err_out_free_coherent:
2831         dma_free_coherent(hp->dma_dev,
2832                           PAGE_SIZE,
2833                           hp->happy_block,
2834                           hp->hblock_dvma);
2835
2836 err_out_iounmap:
2837         if (hp->gregs)
2838                 of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
2839         if (hp->etxregs)
2840                 of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
2841         if (hp->erxregs)
2842                 of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
2843         if (hp->bigmacregs)
2844                 of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
2845         if (hp->tcvregs)
2846                 of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
2847
2848         if (qp)
2849                 qp->happy_meals[qfe_slot] = NULL;
2850
2851 err_out_free_netdev:
2852         free_netdev(dev);
2853
2854 err_out:
2855         return err;
2856 }
2857 #endif
2858
2859 #ifdef CONFIG_PCI
2860 #ifndef CONFIG_SPARC
2861 static int is_quattro_p(struct pci_dev *pdev)
2862 {
2863         struct pci_dev *busdev = pdev->bus->self;
2864         struct list_head *tmp;
2865         int n_hmes;
2866
2867         if (busdev == NULL ||
2868             busdev->vendor != PCI_VENDOR_ID_DEC ||
2869             busdev->device != PCI_DEVICE_ID_DEC_21153)
2870                 return 0;
2871
2872         n_hmes = 0;
2873         tmp = pdev->bus->devices.next;
2874         while (tmp != &pdev->bus->devices) {
2875                 struct pci_dev *this_pdev = pci_dev_b(tmp);
2876
2877                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2878                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2879                         n_hmes++;
2880
2881                 tmp = tmp->next;
2882         }
2883
2884         if (n_hmes != 4)
2885                 return 0;
2886
2887         return 1;
2888 }
2889
2890 /* Fetch MAC address from vital product data of PCI ROM. */
2891 static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, int index, unsigned char *dev_addr)
2892 {
2893         int this_offset;
2894
2895         for (this_offset = 0x20; this_offset < len; this_offset++) {
2896                 void __iomem *p = rom_base + this_offset;
2897
2898                 if (readb(p + 0) != 0x90 ||
2899                     readb(p + 1) != 0x00 ||
2900                     readb(p + 2) != 0x09 ||
2901                     readb(p + 3) != 0x4e ||
2902                     readb(p + 4) != 0x41 ||
2903                     readb(p + 5) != 0x06)
2904                         continue;
2905
2906                 this_offset += 6;
2907                 p += 6;
2908
2909                 if (index == 0) {
2910                         int i;
2911
2912                         for (i = 0; i < 6; i++)
2913                                 dev_addr[i] = readb(p + i);
2914                         return 1;
2915                 }
2916                 index--;
2917         }
2918         return 0;
2919 }
2920
2921 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2922 {
2923         size_t size;
2924         void __iomem *p = pci_map_rom(pdev, &size);
2925
2926         if (p) {
2927                 int index = 0;
2928                 int found;
2929
2930                 if (is_quattro_p(pdev))
2931                         index = PCI_SLOT(pdev->devfn);
2932
2933                 found = readb(p) == 0x55 &&
2934                         readb(p + 1) == 0xaa &&
2935                         find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2936                 pci_unmap_rom(pdev, p);
2937                 if (found)
2938                         return;
2939         }
2940
2941         /* Sun MAC prefix then 3 random bytes. */
2942         dev_addr[0] = 0x08;
2943         dev_addr[1] = 0x00;
2944         dev_addr[2] = 0x20;
2945         get_random_bytes(&dev_addr[3], 3);
2946 }
2947 #endif /* !(CONFIG_SPARC) */
2948
2949 static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,
2950                                           const struct pci_device_id *ent)
2951 {
2952         struct quattro *qp = NULL;
2953 #ifdef CONFIG_SPARC
2954         struct device_node *dp;
2955 #endif
2956         struct happy_meal *hp;
2957         struct net_device *dev;
2958         void __iomem *hpreg_base;
2959         unsigned long hpreg_res;
2960         int i, qfe_slot = -1;
2961         char prom_name[64];
2962         int err;
2963
2964         /* Now make sure pci_dev cookie is there. */
2965 #ifdef CONFIG_SPARC
2966         dp = pci_device_to_OF_node(pdev);
2967         strcpy(prom_name, dp->name);
2968 #else
2969         if (is_quattro_p(pdev))
2970                 strcpy(prom_name, "SUNW,qfe");
2971         else
2972                 strcpy(prom_name, "SUNW,hme");
2973 #endif
2974
2975         err = -ENODEV;
2976
2977         if (pci_enable_device(pdev))
2978                 goto err_out;
2979         pci_set_master(pdev);
2980
2981         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
2982                 qp = quattro_pci_find(pdev);
2983                 if (qp == NULL)
2984                         goto err_out;
2985                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2986                         if (qp->happy_meals[qfe_slot] == NULL)
2987                                 break;
2988                 if (qfe_slot == 4)
2989                         goto err_out;
2990         }
2991
2992         dev = alloc_etherdev(sizeof(struct happy_meal));
2993         err = -ENOMEM;
2994         if (!dev)
2995                 goto err_out;
2996         SET_NETDEV_DEV(dev, &pdev->dev);
2997
2998         if (hme_version_printed++ == 0)
2999                 printk(KERN_INFO "%s", version);
3000
3001         dev->base_addr = (long) pdev;
3002
3003         hp = netdev_priv(dev);
3004
3005         hp->happy_dev = pdev;
3006         hp->dma_dev = &pdev->dev;
3007
3008         spin_lock_init(&hp->happy_lock);
3009
3010         if (qp != NULL) {
3011                 hp->qfe_parent = qp;
3012                 hp->qfe_ent = qfe_slot;
3013                 qp->happy_meals[qfe_slot] = dev;
3014         }
3015
3016         hpreg_res = pci_resource_start(pdev, 0);
3017         err = -ENODEV;
3018         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3019                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3020                 goto err_out_clear_quattro;
3021         }
3022         if (pci_request_regions(pdev, DRV_NAME)) {
3023                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3024                        "aborting.\n");
3025                 goto err_out_clear_quattro;
3026         }
3027
3028         if ((hpreg_base = ioremap(hpreg_res, 0x8000)) == NULL) {
3029                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3030                 goto err_out_free_res;
3031         }
3032
3033         for (i = 0; i < 6; i++) {
3034                 if (macaddr[i] != 0)
3035                         break;
3036         }
3037         if (i < 6) { /* a mac address was given */
3038                 for (i = 0; i < 6; i++)
3039                         dev->dev_addr[i] = macaddr[i];
3040                 macaddr[5]++;
3041         } else {
3042 #ifdef CONFIG_SPARC
3043                 const unsigned char *addr;
3044                 int len;
3045
3046                 if (qfe_slot != -1 &&
3047                     (addr = of_get_property(dp, "local-mac-address", &len))
3048                         != NULL &&
3049                     len == 6) {
3050                         memcpy(dev->dev_addr, addr, 6);
3051                 } else {
3052                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3053                 }
3054 #else
3055                 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3056 #endif
3057         }
3058
3059         /* Layout registers. */
3060         hp->gregs      = (hpreg_base + 0x0000UL);
3061         hp->etxregs    = (hpreg_base + 0x2000UL);
3062         hp->erxregs    = (hpreg_base + 0x4000UL);
3063         hp->bigmacregs = (hpreg_base + 0x6000UL);
3064         hp->tcvregs    = (hpreg_base + 0x7000UL);
3065
3066 #ifdef CONFIG_SPARC
3067         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
3068         if (hp->hm_revision == 0xff)
3069                 hp->hm_revision = 0xc0 | (pdev->revision & 0x0f);
3070 #else
3071         /* works with this on non-sparc hosts */
3072         hp->hm_revision = 0x20;
3073 #endif
3074
3075         /* Now enable the feature flags we can. */
3076         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3077                 hp->happy_flags = HFLAG_20_21;
3078         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3079                 hp->happy_flags = HFLAG_NOT_A0;
3080
3081         if (qp != NULL)
3082                 hp->happy_flags |= HFLAG_QUATTRO;
3083
3084         /* And of course, indicate this is PCI. */
3085         hp->happy_flags |= HFLAG_PCI;
3086
3087 #ifdef CONFIG_SPARC
3088         /* Assume PCI happy meals can handle all burst sizes. */
3089         hp->happy_bursts = DMA_BURSTBITS;
3090 #endif
3091
3092         hp->happy_block = (struct hmeal_init_block *)
3093                 dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &hp->hblock_dvma, GFP_KERNEL);
3094
3095         err = -ENODEV;
3096         if (!hp->happy_block) {
3097                 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3098                 goto err_out_iounmap;
3099         }
3100
3101         hp->linkcheck = 0;
3102         hp->timer_state = asleep;
3103         hp->timer_ticks = 0;
3104
3105         init_timer(&hp->happy_timer);
3106
3107         hp->dev = dev;
3108         dev->netdev_ops = &hme_netdev_ops;
3109         dev->watchdog_timeo = 5*HZ;
3110         dev->ethtool_ops = &hme_ethtool_ops;
3111         dev->irq = pdev->irq;
3112         dev->dma = 0;
3113
3114         /* Happy Meal can do it all... */
3115         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3116
3117 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3118         /* Hook up PCI register/descriptor accessors. */
3119         hp->read_desc32 = pci_hme_read_desc32;
3120         hp->write_txd = pci_hme_write_txd;
3121         hp->write_rxd = pci_hme_write_rxd;
3122         hp->read32 = pci_hme_read32;
3123         hp->write32 = pci_hme_write32;
3124 #endif
3125
3126         /* Grrr, Happy Meal comes up by default not advertising
3127          * full duplex 100baseT capabilities, fix this.
3128          */
3129         spin_lock_irq(&hp->happy_lock);
3130         happy_meal_set_initial_advertisement(hp);
3131         spin_unlock_irq(&hp->happy_lock);
3132
3133         if (register_netdev(hp->dev)) {
3134                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3135                        "aborting.\n");
3136                 goto err_out_iounmap;
3137         }
3138
3139         dev_set_drvdata(&pdev->dev, hp);
3140
3141         if (!qfe_slot) {
3142                 struct pci_dev *qpdev = qp->quattro_dev;
3143
3144                 prom_name[0] = 0;
3145                 if (!strncmp(dev->name, "eth", 3)) {
3146                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3147                         sprintf(prom_name, "-%d", i + 3);
3148                 }
3149                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3150                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3151                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3152                         printk("DEC 21153 PCI Bridge\n");
3153                 else
3154                         printk("unknown bridge %04x.%04x\n",
3155                                 qpdev->vendor, qpdev->device);
3156         }
3157
3158         if (qfe_slot != -1)
3159                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3160                        dev->name, qfe_slot);
3161         else
3162                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3163                        dev->name);
3164
3165         printk("%pM\n", dev->dev_addr);
3166
3167         return 0;
3168
3169 err_out_iounmap:
3170         iounmap(hp->gregs);
3171
3172 err_out_free_res:
3173         pci_release_regions(pdev);
3174
3175 err_out_clear_quattro:
3176         if (qp != NULL)
3177                 qp->happy_meals[qfe_slot] = NULL;
3178
3179         free_netdev(dev);
3180
3181 err_out:
3182         return err;
3183 }
3184
3185 static void __devexit happy_meal_pci_remove(struct pci_dev *pdev)
3186 {
3187         struct happy_meal *hp = dev_get_drvdata(&pdev->dev);
3188         struct net_device *net_dev = hp->dev;
3189
3190         unregister_netdev(net_dev);
3191
3192         dma_free_coherent(hp->dma_dev, PAGE_SIZE,
3193                           hp->happy_block, hp->hblock_dvma);
3194         iounmap(hp->gregs);
3195         pci_release_regions(hp->happy_dev);
3196
3197         free_netdev(net_dev);
3198
3199         dev_set_drvdata(&pdev->dev, NULL);
3200 }
3201
3202 static DEFINE_PCI_DEVICE_TABLE(happymeal_pci_ids) = {
3203         { PCI_DEVICE(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_HAPPYMEAL) },
3204         { }                     /* Terminating entry */
3205 };
3206
3207 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
3208
3209 static struct pci_driver hme_pci_driver = {
3210         .name           = "hme",
3211         .id_table       = happymeal_pci_ids,
3212         .probe          = happy_meal_pci_probe,
3213         .remove         = __devexit_p(happy_meal_pci_remove),
3214 };
3215
3216 static int __init happy_meal_pci_init(void)
3217 {
3218         return pci_register_driver(&hme_pci_driver);
3219 }
3220
3221 static void happy_meal_pci_exit(void)
3222 {
3223         pci_unregister_driver(&hme_pci_driver);
3224
3225         while (qfe_pci_list) {
3226                 struct quattro *qfe = qfe_pci_list;
3227                 struct quattro *next = qfe->next;
3228
3229                 kfree(qfe);
3230
3231                 qfe_pci_list = next;
3232         }
3233 }
3234
3235 #endif
3236
3237 #ifdef CONFIG_SBUS
3238 static int __devinit hme_sbus_probe(struct of_device *op, const struct of_device_id *match)
3239 {
3240         struct device_node *dp = op->dev.of_node;
3241         const char *model = of_get_property(dp, "model", NULL);
3242         int is_qfe = (match->data != NULL);
3243
3244         if (!is_qfe && model && !strcmp(model, "SUNW,sbus-qfe"))
3245                 is_qfe = 1;
3246
3247         return happy_meal_sbus_probe_one(op, is_qfe);
3248 }
3249
3250 static int __devexit hme_sbus_remove(struct of_device *op)
3251 {
3252         struct happy_meal *hp = dev_get_drvdata(&op->dev);
3253         struct net_device *net_dev = hp->dev;
3254
3255         unregister_netdev(net_dev);
3256
3257         /* XXX qfe parent interrupt... */
3258
3259         of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
3260         of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
3261         of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
3262         of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
3263         of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
3264         dma_free_coherent(hp->dma_dev,
3265                           PAGE_SIZE,
3266                           hp->happy_block,
3267                           hp->hblock_dvma);
3268
3269         free_netdev(net_dev);
3270
3271         dev_set_drvdata(&op->dev, NULL);
3272
3273         return 0;
3274 }
3275
3276 static const struct of_device_id hme_sbus_match[] = {
3277         {
3278                 .name = "SUNW,hme",
3279         },
3280         {
3281                 .name = "SUNW,qfe",
3282                 .data = (void *) 1,
3283         },
3284         {
3285                 .name = "qfe",
3286                 .data = (void *) 1,
3287         },
3288         {},
3289 };
3290
3291 MODULE_DEVICE_TABLE(of, hme_sbus_match);
3292
3293 static struct of_platform_driver hme_sbus_driver = {
3294         .driver = {
3295                 .name = "hme",
3296                 .owner = THIS_MODULE,
3297                 .of_match_table = hme_sbus_match,
3298         },
3299         .probe          = hme_sbus_probe,
3300         .remove         = __devexit_p(hme_sbus_remove),
3301 };
3302
3303 static int __init happy_meal_sbus_init(void)
3304 {
3305         int err;
3306
3307         err = of_register_platform_driver(&hme_sbus_driver);
3308         if (!err)
3309                 err = quattro_sbus_register_irqs();
3310
3311         return err;
3312 }
3313
3314 static void happy_meal_sbus_exit(void)
3315 {
3316         of_unregister_platform_driver(&hme_sbus_driver);
3317         quattro_sbus_free_irqs();
3318
3319         while (qfe_sbus_list) {
3320                 struct quattro *qfe = qfe_sbus_list;
3321                 struct quattro *next = qfe->next;
3322
3323                 kfree(qfe);
3324
3325                 qfe_sbus_list = next;
3326         }
3327 }
3328 #endif
3329
3330 static int __init happy_meal_probe(void)
3331 {
3332         int err = 0;
3333
3334 #ifdef CONFIG_SBUS
3335         err = happy_meal_sbus_init();
3336 #endif
3337 #ifdef CONFIG_PCI
3338         if (!err) {
3339                 err = happy_meal_pci_init();
3340 #ifdef CONFIG_SBUS
3341                 if (err)
3342                         happy_meal_sbus_exit();
3343 #endif
3344         }
3345 #endif
3346
3347         return err;
3348 }
3349
3350
3351 static void __exit happy_meal_exit(void)
3352 {
3353 #ifdef CONFIG_SBUS
3354         happy_meal_sbus_exit();
3355 #endif
3356 #ifdef CONFIG_PCI
3357         happy_meal_pci_exit();
3358 #endif
3359 }
3360
3361 module_init(happy_meal_probe);
3362 module_exit(happy_meal_exit);