drivers/net/tc35815.c

   1 /*
   2  * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
   3  *
   4  * Based on skelton.c by Donald Becker.
   5  *
   6  * This driver is a replacement of older and less maintained version.
   7  * This is a header of the older version:
   8  *      -----<snip>-----
   9  *      Copyright 2001 MontaVista Software Inc.
  10  *      Author: MontaVista Software, Inc.
  11  *              ahennessy@mvista.com
  12  *      Copyright (C) 2000-2001 Toshiba Corporation
  13  *      static const char *version =
  14  *              "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15  *      -----<snip>-----
  16  *
  17  * This file is subject to the terms and conditions of the GNU General Public
  18  * License.  See the file "COPYING" in the main directory of this archive
  19  * for more details.
  20  *
  21  * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22  * All Rights Reserved.
  23  */
  24
  25 #define TC35815_NAPI
  26 #ifdef TC35815_NAPI
  27 #define DRV_VERSION     "1.38-NAPI"
  28 #else
  29 #define DRV_VERSION     "1.38"
  30 #endif
  31 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  32 #define MODNAME                 "tc35815"
  33
  34 #include <linux/module.h>
  35 #include <linux/kernel.h>
  36 #include <linux/types.h>
  37 #include <linux/fcntl.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/ioport.h>
  40 #include <linux/in.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/slab.h>
  43 #include <linux/string.h>
  44 #include <linux/spinlock.h>
  45 #include <linux/errno.h>
  46 #include <linux/init.h>
  47 #include <linux/netdevice.h>
  48 #include <linux/etherdevice.h>
  49 #include <linux/skbuff.h>
  50 #include <linux/delay.h>
  51 #include <linux/pci.h>
  52 #include <linux/phy.h>
  53 #include <linux/workqueue.h>
  54 #include <linux/platform_device.h>
  55 #include <asm/io.h>
  56 #include <asm/byteorder.h>
  57
  58 /* First, a few definitions that the brave might change. */
  59
  60 #define GATHER_TXINT    /* On-Demand Tx Interrupt */
  61 #define WORKAROUND_LOSTCAR
  62 #define WORKAROUND_100HALF_PROMISC
  63 /* #define TC35815_USE_PACKEDBUFFER */
  64
  65 enum tc35815_chiptype {
  66         TC35815CF = 0,
  67         TC35815_NWU,
  68         TC35815_TX4939,
  69 };
  70
  71 /* indexed by tc35815_chiptype, above */
  72 static const struct {
  73         const char *name;
  74 } chip_info[] __devinitdata = {
  75         { "TOSHIBA TC35815CF 10/100BaseTX" },
  76         { "TOSHIBA TC35815 with Wake on LAN" },
  77         { "TOSHIBA TC35815/TX4939" },
  78 };
  79
  80 static const struct pci_device_id tc35815_pci_tbl[] = {
  81         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  82         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  83         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  84         {0,}
  85 };
  86 MODULE_DEVICE_TABLE(pci, tc35815_pci_tbl);
  87
  88 /* see MODULE_PARM_DESC */
  89 static struct tc35815_options {
  90         int speed;
  91         int duplex;
  92 } options;
  93
  94 /*
  95  * Registers
  96  */
  97 struct tc35815_regs {
  98         __u32 DMA_Ctl;          /* 0x00 */
  99         __u32 TxFrmPtr;
 100         __u32 TxThrsh;
 101         __u32 TxPollCtr;
 102         __u32 BLFrmPtr;
 103         __u32 RxFragSize;
 104         __u32 Int_En;
 105         __u32 FDA_Bas;
 106         __u32 FDA_Lim;          /* 0x20 */
 107         __u32 Int_Src;
 108         __u32 unused0[2];
 109         __u32 PauseCnt;
 110         __u32 RemPauCnt;
 111         __u32 TxCtlFrmStat;
 112         __u32 unused1;
 113         __u32 MAC_Ctl;          /* 0x40 */
 114         __u32 CAM_Ctl;
 115         __u32 Tx_Ctl;
 116         __u32 Tx_Stat;
 117         __u32 Rx_Ctl;
 118         __u32 Rx_Stat;
 119         __u32 MD_Data;
 120         __u32 MD_CA;
 121         __u32 CAM_Adr;          /* 0x60 */
 122         __u32 CAM_Data;
 123         __u32 CAM_Ena;
 124         __u32 PROM_Ctl;
 125         __u32 PROM_Data;
 126         __u32 Algn_Cnt;
 127         __u32 CRC_Cnt;
 128         __u32 Miss_Cnt;
 129 };
 130
 131 /*
 132  * Bit assignments
 133  */
 134 /* DMA_Ctl bit asign ------------------------------------------------------- */
 135 #define DMA_RxAlign            0x00c00000 /* 1:Reception Alignment           */
 136 #define DMA_RxAlign_1          0x00400000
 137 #define DMA_RxAlign_2          0x00800000
 138 #define DMA_RxAlign_3          0x00c00000
 139 #define DMA_M66EnStat          0x00080000 /* 1:66MHz Enable State            */
 140 #define DMA_IntMask            0x00040000 /* 1:Interupt mask                 */
 141 #define DMA_SWIntReq           0x00020000 /* 1:Software Interrupt request    */
 142 #define DMA_TxWakeUp           0x00010000 /* 1:Transmit Wake Up              */
 143 #define DMA_RxBigE             0x00008000 /* 1:Receive Big Endian            */
 144 #define DMA_TxBigE             0x00004000 /* 1:Transmit Big Endian           */
 145 #define DMA_TestMode           0x00002000 /* 1:Test Mode                     */
 146 #define DMA_PowrMgmnt          0x00001000 /* 1:Power Management              */
 147 #define DMA_DmBurst_Mask       0x000001fc /* DMA Burst size                  */
 148
 149 /* RxFragSize bit asign ---------------------------------------------------- */
 150 #define RxFrag_EnPack          0x00008000 /* 1:Enable Packing                */
 151 #define RxFrag_MinFragMask     0x00000ffc /* Minimum Fragment                */
 152
 153 /* MAC_Ctl bit asign ------------------------------------------------------- */
 154 #define MAC_Link10             0x00008000 /* 1:Link Status 10Mbits           */
 155 #define MAC_EnMissRoll         0x00002000 /* 1:Enable Missed Roll            */
 156 #define MAC_MissRoll           0x00000400 /* 1:Missed Roll                   */
 157 #define MAC_Loop10             0x00000080 /* 1:Loop 10 Mbps                  */
 158 #define MAC_Conn_Auto          0x00000000 /*00:Connection mode (Automatic)   */
 159 #define MAC_Conn_10M           0x00000020 /*01:                (10Mbps endec)*/
 160 #define MAC_Conn_Mll           0x00000040 /*10:                (Mll clock)   */
 161 #define MAC_MacLoop            0x00000010 /* 1:MAC Loopback                  */
 162 #define MAC_FullDup            0x00000008 /* 1:Full Duplex 0:Half Duplex     */
 163 #define MAC_Reset              0x00000004 /* 1:Software Reset                */
 164 #define MAC_HaltImm            0x00000002 /* 1:Halt Immediate                */
 165 #define MAC_HaltReq            0x00000001 /* 1:Halt request                  */
 166
 167 /* PROM_Ctl bit asign ------------------------------------------------------ */
 168 #define PROM_Busy              0x00008000 /* 1:Busy (Start Operation)        */
 169 #define PROM_Read              0x00004000 /*10:Read operation                */
 170 #define PROM_Write             0x00002000 /*01:Write operation               */
 171 #define PROM_Erase             0x00006000 /*11:Erase operation               */
 172                                           /*00:Enable or Disable Writting,   */
 173                                           /*      as specified in PROM_Addr. */
 174 #define PROM_Addr_Ena          0x00000030 /*11xxxx:PROM Write enable         */
 175                                           /*00xxxx:           disable        */
 176
 177 /* CAM_Ctl bit asign ------------------------------------------------------- */
 178 #define CAM_CompEn             0x00000010 /* 1:CAM Compare Enable            */
 179 #define CAM_NegCAM             0x00000008 /* 1:Reject packets CAM recognizes,*/
 180                                           /*                    accept other */
 181 #define CAM_BroadAcc           0x00000004 /* 1:Broadcast assept              */
 182 #define CAM_GroupAcc           0x00000002 /* 1:Multicast assept              */
 183 #define CAM_StationAcc         0x00000001 /* 1:unicast accept                */
 184
 185 /* CAM_Ena bit asign ------------------------------------------------------- */
 186 #define CAM_ENTRY_MAX                  21   /* CAM Data entry max count      */
 187 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits)  */
 188 #define CAM_Ena_Bit(index)      (1 << (index))
 189 #define CAM_ENTRY_DESTINATION   0
 190 #define CAM_ENTRY_SOURCE        1
 191 #define CAM_ENTRY_MACCTL        20
 192
 193 /* Tx_Ctl bit asign -------------------------------------------------------- */
 194 #define Tx_En                  0x00000001 /* 1:Transmit enable               */
 195 #define Tx_TxHalt              0x00000002 /* 1:Transmit Halt Request         */
 196 #define Tx_NoPad               0x00000004 /* 1:Suppress Padding              */
 197 #define Tx_NoCRC               0x00000008 /* 1:Suppress Padding              */
 198 #define Tx_FBack               0x00000010 /* 1:Fast Back-off                 */
 199 #define Tx_EnUnder             0x00000100 /* 1:Enable Underrun               */
 200 #define Tx_EnExDefer           0x00000200 /* 1:Enable Excessive Deferral     */
 201 #define Tx_EnLCarr             0x00000400 /* 1:Enable Lost Carrier           */
 202 #define Tx_EnExColl            0x00000800 /* 1:Enable Excessive Collision    */
 203 #define Tx_EnLateColl          0x00001000 /* 1:Enable Late Collision         */
 204 #define Tx_EnTxPar             0x00002000 /* 1:Enable Transmit Parity        */
 205 #define Tx_EnComp              0x00004000 /* 1:Enable Completion             */
 206
 207 /* Tx_Stat bit asign ------------------------------------------------------- */
 208 #define Tx_TxColl_MASK         0x0000000F /* Tx Collision Count              */
 209 #define Tx_ExColl              0x00000010 /* Excessive Collision             */
 210 #define Tx_TXDefer             0x00000020 /* Transmit Defered                */
 211 #define Tx_Paused              0x00000040 /* Transmit Paused                 */
 212 #define Tx_IntTx               0x00000080 /* Interrupt on Tx                 */
 213 #define Tx_Under               0x00000100 /* Underrun                        */
 214 #define Tx_Defer               0x00000200 /* Deferral                        */
 215 #define Tx_NCarr               0x00000400 /* No Carrier                      */
 216 #define Tx_10Stat              0x00000800 /* 10Mbps Status                   */
 217 #define Tx_LateColl            0x00001000 /* Late Collision                  */
 218 #define Tx_TxPar               0x00002000 /* Tx Parity Error                 */
 219 #define Tx_Comp                0x00004000 /* Completion                      */
 220 #define Tx_Halted              0x00008000 /* Tx Halted                       */
 221 #define Tx_SQErr               0x00010000 /* Signal Quality Error(SQE)       */
 222
 223 /* Rx_Ctl bit asign -------------------------------------------------------- */
 224 #define Rx_EnGood              0x00004000 /* 1:Enable Good                   */
 225 #define Rx_EnRxPar             0x00002000 /* 1:Enable Receive Parity         */
 226 #define Rx_EnLongErr           0x00000800 /* 1:Enable Long Error             */
 227 #define Rx_EnOver              0x00000400 /* 1:Enable OverFlow               */
 228 #define Rx_EnCRCErr            0x00000200 /* 1:Enable CRC Error              */
 229 #define Rx_EnAlign             0x00000100 /* 1:Enable Alignment              */
 230 #define Rx_IgnoreCRC           0x00000040 /* 1:Ignore CRC Value              */
 231 #define Rx_StripCRC            0x00000010 /* 1:Strip CRC Value               */
 232 #define Rx_ShortEn             0x00000008 /* 1:Short Enable                  */
 233 #define Rx_LongEn              0x00000004 /* 1:Long Enable                   */
 234 #define Rx_RxHalt              0x00000002 /* 1:Receive Halt Request          */
 235 #define Rx_RxEn                0x00000001 /* 1:Receive Intrrupt Enable       */
 236
 237 /* Rx_Stat bit asign ------------------------------------------------------- */
 238 #define Rx_Halted              0x00008000 /* Rx Halted                       */
 239 #define Rx_Good                0x00004000 /* Rx Good                         */
 240 #define Rx_RxPar               0x00002000 /* Rx Parity Error                 */
 241 #define Rx_TypePkt             0x00001000 /* Rx Type Packet                  */
 242 #define Rx_LongErr             0x00000800 /* Rx Long Error                   */
 243 #define Rx_Over                0x00000400 /* Rx Overflow                     */
 244 #define Rx_CRCErr              0x00000200 /* Rx CRC Error                    */
 245 #define Rx_Align               0x00000100 /* Rx Alignment Error              */
 246 #define Rx_10Stat              0x00000080 /* Rx 10Mbps Status                */
 247 #define Rx_IntRx               0x00000040 /* Rx Interrupt                    */
 248 #define Rx_CtlRecd             0x00000020 /* Rx Control Receive              */
 249 #define Rx_InLenErr            0x00000010 /* Rx In Range Frame Length Error  */
 250
 251 #define Rx_Stat_Mask           0x0000FFF0 /* Rx All Status Mask              */
 252
 253 /* Int_En bit asign -------------------------------------------------------- */
 254 #define Int_NRAbtEn            0x00000800 /* 1:Non-recoverable Abort Enable  */
 255 #define Int_TxCtlCmpEn         0x00000400 /* 1:Transmit Ctl Complete Enable  */
 256 #define Int_DmParErrEn         0x00000200 /* 1:DMA Parity Error Enable       */
 257 #define Int_DParDEn            0x00000100 /* 1:Data Parity Error Enable      */
 258 #define Int_EarNotEn           0x00000080 /* 1:Early Notify Enable           */
 259 #define Int_DParErrEn          0x00000040 /* 1:Detected Parity Error Enable  */
 260 #define Int_SSysErrEn          0x00000020 /* 1:Signalled System Error Enable */
 261 #define Int_RMasAbtEn          0x00000010 /* 1:Received Master Abort Enable  */
 262 #define Int_RTargAbtEn         0x00000008 /* 1:Received Target Abort Enable  */
 263 #define Int_STargAbtEn         0x00000004 /* 1:Signalled Target Abort Enable */
 264 #define Int_BLExEn             0x00000002 /* 1:Buffer List Exhausted Enable  */
 265 #define Int_FDAExEn            0x00000001 /* 1:Free Descriptor Area          */
 266                                           /*               Exhausted Enable  */
 267
 268 /* Int_Src bit asign ------------------------------------------------------- */
 269 #define Int_NRabt              0x00004000 /* 1:Non Recoverable error         */
 270 #define Int_DmParErrStat       0x00002000 /* 1:DMA Parity Error & Clear      */
 271 #define Int_BLEx               0x00001000 /* 1:Buffer List Empty & Clear     */
 272 #define Int_FDAEx              0x00000800 /* 1:FDA Empty & Clear             */
 273 #define Int_IntNRAbt           0x00000400 /* 1:Non Recoverable Abort         */
 274 #define Int_IntCmp             0x00000200 /* 1:MAC control packet complete   */
 275 #define Int_IntExBD            0x00000100 /* 1:Interrupt Extra BD & Clear    */
 276 #define Int_DmParErr           0x00000080 /* 1:DMA Parity Error & Clear      */
 277 #define Int_IntEarNot          0x00000040 /* 1:Receive Data write & Clear    */
 278 #define Int_SWInt              0x00000020 /* 1:Software request & Clear      */
 279 #define Int_IntBLEx            0x00000010 /* 1:Buffer List Empty & Clear     */
 280 #define Int_IntFDAEx           0x00000008 /* 1:FDA Empty & Clear             */
 281 #define Int_IntPCI             0x00000004 /* 1:PCI controller & Clear        */
 282 #define Int_IntMacRx           0x00000002 /* 1:Rx controller & Clear         */
 283 #define Int_IntMacTx           0x00000001 /* 1:Tx controller & Clear         */
 284
 285 /* MD_CA bit asign --------------------------------------------------------- */
 286 #define MD_CA_PreSup           0x00001000 /* 1:Preamble Supress              */
 287 #define MD_CA_Busy             0x00000800 /* 1:Busy (Start Operation)        */
 288 #define MD_CA_Wr               0x00000400 /* 1:Write 0:Read                  */
 289
 290
 291 /*
 292  * Descriptors
 293  */
 294
 295 /* Frame descripter */
 296 struct FDesc {
 297         volatile __u32 FDNext;
 298         volatile __u32 FDSystem;
 299         volatile __u32 FDStat;
 300         volatile __u32 FDCtl;
 301 };
 302
 303 /* Buffer descripter */
 304 struct BDesc {
 305         volatile __u32 BuffData;
 306         volatile __u32 BDCtl;
 307 };
 308
 309 #define FD_ALIGN        16
 310
 311 /* Frame Descripter bit asign ---------------------------------------------- */
 312 #define FD_FDLength_MASK       0x0000FFFF /* Length MASK                     */
 313 #define FD_BDCnt_MASK          0x001F0000 /* BD count MASK in FD             */
 314 #define FD_FrmOpt_MASK         0x7C000000 /* Frame option MASK               */
 315 #define FD_FrmOpt_BigEndian    0x40000000 /* Tx/Rx */
 316 #define FD_FrmOpt_IntTx        0x20000000 /* Tx only */
 317 #define FD_FrmOpt_NoCRC        0x10000000 /* Tx only */
 318 #define FD_FrmOpt_NoPadding    0x08000000 /* Tx only */
 319 #define FD_FrmOpt_Packing      0x04000000 /* Rx only */
 320 #define FD_CownsFD             0x80000000 /* FD Controller owner bit         */
 321 #define FD_Next_EOL            0x00000001 /* FD EOL indicator                */
 322 #define FD_BDCnt_SHIFT         16
 323
 324 /* Buffer Descripter bit asign --------------------------------------------- */
 325 #define BD_BuffLength_MASK     0x0000FFFF /* Recieve Data Size               */
 326 #define BD_RxBDID_MASK         0x00FF0000 /* BD ID Number MASK               */
 327 #define BD_RxBDSeqN_MASK       0x7F000000 /* Rx BD Sequence Number           */
 328 #define BD_CownsBD             0x80000000 /* BD Controller owner bit         */
 329 #define BD_RxBDID_SHIFT        16
 330 #define BD_RxBDSeqN_SHIFT      24
 331
 332
 333 /* Some useful constants. */
 334 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
 335
 336 #ifdef NO_CHECK_CARRIER
 337 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 338         Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
 339         Tx_En)  /* maybe  0x7b01 */
 340 #else
 341 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 342         Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
 343         Tx_En)  /* maybe  0x7b01 */
 344 #endif
 345 /* Do not use Rx_StripCRC -- it causes trouble on BLEx/FDAEx condition */
 346 #define RX_CTL_CMD      (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
 347         | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
 348 #define INT_EN_CMD  (Int_NRAbtEn | \
 349         Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
 350         Int_SSysErrEn  | Int_RMasAbtEn | Int_RTargAbtEn | \
 351         Int_STargAbtEn | \
 352         Int_BLExEn  | Int_FDAExEn) /* maybe 0xb7f*/
 353 #define DMA_CTL_CMD     DMA_BURST_SIZE
 354 #define HAVE_DMA_RXALIGN(lp)    likely((lp)->chiptype != TC35815CF)
 355
 356 /* Tuning parameters */
 357 #define DMA_BURST_SIZE  32
 358 #define TX_THRESHOLD    1024
 359 /* used threshold with packet max byte for low pci transfer ability.*/
 360 #define TX_THRESHOLD_MAX 1536
 361 /* setting threshold max value when overrun error occured this count. */
 362 #define TX_THRESHOLD_KEEP_LIMIT 10
 363
 364 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
 365 #ifdef TC35815_USE_PACKEDBUFFER
 366 #define FD_PAGE_NUM 2
 367 #define RX_BUF_NUM      8       /* >= 2 */
 368 #define RX_FD_NUM       250     /* >= 32 */
 369 #define TX_FD_NUM       128
 370 #define RX_BUF_SIZE     PAGE_SIZE
 371 #else /* TC35815_USE_PACKEDBUFFER */
 372 #define FD_PAGE_NUM 4
 373 #define RX_BUF_NUM      128     /* < 256 */
 374 #define RX_FD_NUM       256     /* >= 32 */
 375 #define TX_FD_NUM       128
 376 #if RX_CTL_CMD & Rx_LongEn
 377 #define RX_BUF_SIZE     PAGE_SIZE
 378 #elif RX_CTL_CMD & Rx_StripCRC
 379 #define RX_BUF_SIZE     \
 380         L1_CACHE_ALIGN(ETH_FRAME_LEN + VLAN_HLEN + NET_IP_ALIGN)
 381 #else
 382 #define RX_BUF_SIZE     \
 383         L1_CACHE_ALIGN(ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN + NET_IP_ALIGN)
 384 #endif
 385 #endif /* TC35815_USE_PACKEDBUFFER */
 386 #define RX_FD_RESERVE   (2 / 2) /* max 2 BD per RxFD */
 387 #define NAPI_WEIGHT     16
 388
 389 struct TxFD {
 390         struct FDesc fd;
 391         struct BDesc bd;
 392         struct BDesc unused;
 393 };
 394
 395 struct RxFD {
 396         struct FDesc fd;
 397         struct BDesc bd[0];     /* variable length */
 398 };
 399
 400 struct FrFD {
 401         struct FDesc fd;
 402         struct BDesc bd[RX_BUF_NUM];
 403 };
 404
 405
 406 #define tc_readl(addr)  ioread32(addr)
 407 #define tc_writel(d, addr)      iowrite32(d, addr)
 408
 409 #define TC35815_TX_TIMEOUT  msecs_to_jiffies(400)
 410
 411 /* Information that need to be kept for each controller. */
 412 struct tc35815_local {
 413         struct pci_dev *pci_dev;
 414
 415         struct net_device *dev;
 416         struct napi_struct napi;
 417
 418         /* statistics */
 419         struct {
 420                 int max_tx_qlen;
 421                 int tx_ints;
 422                 int rx_ints;
 423                 int tx_underrun;
 424         } lstats;
 425
 426         /* Tx control lock.  This protects the transmit buffer ring
 427          * state along with the "tx full" state of the driver.  This
 428          * means all netif_queue flow control actions are protected
 429          * by this lock as well.
 430          */
 431         spinlock_t lock;
 432
 433         struct mii_bus *mii_bus;
 434         struct phy_device *phy_dev;
 435         int duplex;
 436         int speed;
 437         int link;
 438         struct work_struct restart_work;
 439
 440         /*
 441          * Transmitting: Batch Mode.
 442          *      1 BD in 1 TxFD.
 443          * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
 444          *      1 circular FD for Free Buffer List.
 445          *      RX_BUF_NUM BD in Free Buffer FD.
 446          *      One Free Buffer BD has PAGE_SIZE data buffer.
 447          * Or Non-Packing Mode.
 448          *      1 circular FD for Free Buffer List.
 449          *      RX_BUF_NUM BD in Free Buffer FD.
 450          *      One Free Buffer BD has ETH_FRAME_LEN data buffer.
 451          */
 452         void *fd_buf;   /* for TxFD, RxFD, FrFD */
 453         dma_addr_t fd_buf_dma;
 454         struct TxFD *tfd_base;
 455         unsigned int tfd_start;
 456         unsigned int tfd_end;
 457         struct RxFD *rfd_base;
 458         struct RxFD *rfd_limit;
 459         struct RxFD *rfd_cur;
 460         struct FrFD *fbl_ptr;
 461 #ifdef TC35815_USE_PACKEDBUFFER
 462         unsigned char fbl_curid;
 463         void *data_buf[RX_BUF_NUM];             /* packing */
 464         dma_addr_t data_buf_dma[RX_BUF_NUM];
 465         struct {
 466                 struct sk_buff *skb;
 467                 dma_addr_t skb_dma;
 468         } tx_skbs[TX_FD_NUM];
 469 #else
 470         unsigned int fbl_count;
 471         struct {
 472                 struct sk_buff *skb;
 473                 dma_addr_t skb_dma;
 474         } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
 475 #endif
 476         u32 msg_enable;
 477         enum tc35815_chiptype chiptype;
 478 };
 479
 480 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
 481 {
 482         return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
 483 }
 484 #ifdef DEBUG
 485 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 486 {
 487         return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
 488 }
 489 #endif
 490 #ifdef TC35815_USE_PACKEDBUFFER
 491 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 492 {
 493         int i;
 494         for (i = 0; i < RX_BUF_NUM; i++) {
 495                 if (bus >= lp->data_buf_dma[i] &&
 496                     bus < lp->data_buf_dma[i] + PAGE_SIZE)
 497                         return (void *)((u8 *)lp->data_buf[i] +
 498                                         (bus - lp->data_buf_dma[i]));
 499         }
 500         return NULL;
 501 }
 502
 503 #define TC35815_DMA_SYNC_ONDEMAND
 504 static void *alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
 505 {
 506 #ifdef TC35815_DMA_SYNC_ONDEMAND
 507         void *buf;
 508         /* pci_map + pci_dma_sync will be more effective than
 509          * pci_alloc_consistent on some archs. */
 510         buf = (void *)__get_free_page(GFP_ATOMIC);
 511         if (!buf)
 512                 return NULL;
 513         *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
 514                                      PCI_DMA_FROMDEVICE);
 515         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
 516                 free_page((unsigned long)buf);
 517                 return NULL;
 518         }
 519         return buf;
 520 #else
 521         return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
 522 #endif
 523 }
 524
 525 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
 526 {
 527 #ifdef TC35815_DMA_SYNC_ONDEMAND
 528         pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
 529         free_page((unsigned long)buf);
 530 #else
 531         pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
 532 #endif
 533 }
 534 #else /* TC35815_USE_PACKEDBUFFER */
 535 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
 536                                        struct pci_dev *hwdev,
 537                                        dma_addr_t *dma_handle)
 538 {
 539         struct sk_buff *skb;
 540         skb = dev_alloc_skb(RX_BUF_SIZE);
 541         if (!skb)
 542                 return NULL;
 543         *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
 544                                      PCI_DMA_FROMDEVICE);
 545         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
 546                 dev_kfree_skb_any(skb);
 547                 return NULL;
 548         }
 549         skb_reserve(skb, 2);    /* make IP header 4byte aligned */
 550         return skb;
 551 }
 552
 553 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
 554 {
 555         pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
 556                          PCI_DMA_FROMDEVICE);
 557         dev_kfree_skb_any(skb);
 558 }
 559 #endif /* TC35815_USE_PACKEDBUFFER */
 560
 561 /* Index to functions, as function prototypes. */
 562
 563 static int      tc35815_open(struct net_device *dev);
 564 static int      tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
 565 static irqreturn_t      tc35815_interrupt(int irq, void *dev_id);
 566 #ifdef TC35815_NAPI
 567 static int      tc35815_rx(struct net_device *dev, int limit);
 568 static int      tc35815_poll(struct napi_struct *napi, int budget);
 569 #else
 570 static void     tc35815_rx(struct net_device *dev);
 571 #endif
 572 static void     tc35815_txdone(struct net_device *dev);
 573 static int      tc35815_close(struct net_device *dev);
 574 static struct   net_device_stats *tc35815_get_stats(struct net_device *dev);
 575 static void     tc35815_set_multicast_list(struct net_device *dev);
 576 static void     tc35815_tx_timeout(struct net_device *dev);
 577 static int      tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 578 #ifdef CONFIG_NET_POLL_CONTROLLER
 579 static void     tc35815_poll_controller(struct net_device *dev);
 580 #endif
 581 static const struct ethtool_ops tc35815_ethtool_ops;
 582
 583 /* Example routines you must write ;->. */
 584 static void     tc35815_chip_reset(struct net_device *dev);
 585 static void     tc35815_chip_init(struct net_device *dev);
 586
 587 #ifdef DEBUG
 588 static void     panic_queues(struct net_device *dev);
 589 #endif
 590
 591 static void tc35815_restart_work(struct work_struct *work);
 592
 593 static int tc_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 594 {
 595         struct net_device *dev = bus->priv;
 596         struct tc35815_regs __iomem *tr =
 597                 (struct tc35815_regs __iomem *)dev->base_addr;
 598         unsigned long timeout = jiffies + HZ;
 599
 600         tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA);
 601         udelay(12); /* it takes 32 x 400ns at least */
 602         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 603                 if (time_after(jiffies, timeout))
 604                         return -EIO;
 605                 cpu_relax();
 606         }
 607         return tc_readl(&tr->MD_Data) & 0xffff;
 608 }
 609
 610 static int tc_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 val)
 611 {
 612         struct net_device *dev = bus->priv;
 613         struct tc35815_regs __iomem *tr =
 614                 (struct tc35815_regs __iomem *)dev->base_addr;
 615         unsigned long timeout = jiffies + HZ;
 616
 617         tc_writel(val, &tr->MD_Data);
 618         tc_writel(MD_CA_Busy | MD_CA_Wr | (mii_id << 5) | (regnum & 0x1f),
 619                   &tr->MD_CA);
 620         udelay(12); /* it takes 32 x 400ns at least */
 621         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 622                 if (time_after(jiffies, timeout))
 623                         return -EIO;
 624                 cpu_relax();
 625         }
 626         return 0;
 627 }
 628
 629 static void tc_handle_link_change(struct net_device *dev)
 630 {
 631         struct tc35815_local *lp = netdev_priv(dev);
 632         struct phy_device *phydev = lp->phy_dev;
 633         unsigned long flags;
 634         int status_change = 0;
 635
 636         spin_lock_irqsave(&lp->lock, flags);
 637         if (phydev->link &&
 638             (lp->speed != phydev->speed || lp->duplex != phydev->duplex)) {
 639                 struct tc35815_regs __iomem *tr =
 640                         (struct tc35815_regs __iomem *)dev->base_addr;
 641                 u32 reg;
 642
 643                 reg = tc_readl(&tr->MAC_Ctl);
 644                 reg |= MAC_HaltReq;
 645                 tc_writel(reg, &tr->MAC_Ctl);
 646                 if (phydev->duplex == DUPLEX_FULL)
 647                         reg |= MAC_FullDup;
 648                 else
 649                         reg &= ~MAC_FullDup;
 650                 tc_writel(reg, &tr->MAC_Ctl);
 651                 reg &= ~MAC_HaltReq;
 652                 tc_writel(reg, &tr->MAC_Ctl);
 653
 654                 /*
 655                  * TX4939 PCFG.SPEEDn bit will be changed on
 656                  * NETDEV_CHANGE event.
 657                  */
 658
 659 #if !defined(NO_CHECK_CARRIER) && defined(WORKAROUND_LOSTCAR)
 660                 /*
 661                  * WORKAROUND: enable LostCrS only if half duplex
 662                  * operation.
 663                  * (TX4939 does not have EnLCarr)
 664                  */
 665                 if (phydev->duplex == DUPLEX_HALF &&
 666                     lp->chiptype != TC35815_TX4939)
 667                         tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr,
 668                                   &tr->Tx_Ctl);
 669 #endif
 670
 671                 lp->speed = phydev->speed;
 672                 lp->duplex = phydev->duplex;
 673                 status_change = 1;
 674         }
 675
 676         if (phydev->link != lp->link) {
 677                 if (phydev->link) {
 678 #ifdef WORKAROUND_100HALF_PROMISC
 679                         /* delayed promiscuous enabling */
 680                         if (dev->flags & IFF_PROMISC)
 681                                 tc35815_set_multicast_list(dev);
 682 #endif
 683                 } else {
 684                         lp->speed = 0;
 685                         lp->duplex = -1;
 686                 }
 687                 lp->link = phydev->link;
 688
 689                 status_change = 1;
 690         }
 691         spin_unlock_irqrestore(&lp->lock, flags);
 692
 693         if (status_change && netif_msg_link(lp)) {
 694                 phy_print_status(phydev);
 695                 pr_debug("%s: MII BMCR %04x BMSR %04x LPA %04x\n",
 696                          dev->name,
 697                          phy_read(phydev, MII_BMCR),
 698                          phy_read(phydev, MII_BMSR),
 699                          phy_read(phydev, MII_LPA));
 700         }
 701 }
 702
 703 static int tc_mii_probe(struct net_device *dev)
 704 {
 705         struct tc35815_local *lp = netdev_priv(dev);
 706         struct phy_device *phydev = NULL;
 707         int phy_addr;
 708         u32 dropmask;
 709
 710         /* find the first phy */
 711         for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
 712                 if (lp->mii_bus->phy_map[phy_addr]) {
 713                         if (phydev) {
 714                                 printk(KERN_ERR "%s: multiple PHYs found\n",
 715                                        dev->name);
 716                                 return -EINVAL;
 717                         }
 718                         phydev = lp->mii_bus->phy_map[phy_addr];
 719                         break;
 720                 }
 721         }
 722
 723         if (!phydev) {
 724                 printk(KERN_ERR "%s: no PHY found\n", dev->name);
 725                 return -ENODEV;
 726         }
 727
 728         /* attach the mac to the phy */
 729         phydev = phy_connect(dev, dev_name(&phydev->dev),
 730                              &tc_handle_link_change, 0,
 731                              lp->chiptype == TC35815_TX4939 ?
 732                              PHY_INTERFACE_MODE_RMII : PHY_INTERFACE_MODE_MII);
 733         if (IS_ERR(phydev)) {
 734                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
 735                 return PTR_ERR(phydev);
 736         }
 737         printk(KERN_INFO "%s: attached PHY driver [%s] "
 738                 "(mii_bus:phy_addr=%s, id=%x)\n",
 739                 dev->name, phydev->drv->name, dev_name(&phydev->dev),
 740                 phydev->phy_id);
 741
 742         /* mask with MAC supported features */
 743         phydev->supported &= PHY_BASIC_FEATURES;
 744         dropmask = 0;
 745         if (options.speed == 10)
 746                 dropmask |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
 747         else if (options.speed == 100)
 748                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
 749         if (options.duplex == 1)
 750                 dropmask |= SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full;
 751         else if (options.duplex == 2)
 752                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_100baseT_Half;
 753         phydev->supported &= ~dropmask;
 754         phydev->advertising = phydev->supported;
 755
 756         lp->link = 0;
 757         lp->speed = 0;
 758         lp->duplex = -1;
 759         lp->phy_dev = phydev;
 760
 761         return 0;
 762 }
 763
 764 static int tc_mii_init(struct net_device *dev)
 765 {
 766         struct tc35815_local *lp = netdev_priv(dev);
 767         int err;
 768         int i;
 769
 770         lp->mii_bus = mdiobus_alloc();
 771         if (lp->mii_bus == NULL) {
 772                 err = -ENOMEM;
 773                 goto err_out;
 774         }
 775
 776         lp->mii_bus->name = "tc35815_mii_bus";
 777         lp->mii_bus->read = tc_mdio_read;
 778         lp->mii_bus->write = tc_mdio_write;
 779         snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "%x",
 780                  (lp->pci_dev->bus->number << 8) | lp->pci_dev->devfn);
 781         lp->mii_bus->priv = dev;
 782         lp->mii_bus->parent = &lp->pci_dev->dev;
 783         lp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
 784         if (!lp->mii_bus->irq) {
 785                 err = -ENOMEM;
 786                 goto err_out_free_mii_bus;
 787         }
 788
 789         for (i = 0; i < PHY_MAX_ADDR; i++)
 790                 lp->mii_bus->irq[i] = PHY_POLL;
 791
 792         err = mdiobus_register(lp->mii_bus);
 793         if (err)
 794                 goto err_out_free_mdio_irq;
 795         err = tc_mii_probe(dev);
 796         if (err)
 797                 goto err_out_unregister_bus;
 798         return 0;
 799
 800 err_out_unregister_bus:
 801         mdiobus_unregister(lp->mii_bus);
 802 err_out_free_mdio_irq:
 803         kfree(lp->mii_bus->irq);
 804 err_out_free_mii_bus:
 805         mdiobus_free(lp->mii_bus);
 806 err_out:
 807         return err;
 808 }
 809
 810 #ifdef CONFIG_CPU_TX49XX
 811 /*
 812  * Find a platform_device providing a MAC address.  The platform code
 813  * should provide a "tc35815-mac" device with a MAC address in its
 814  * platform_data.
 815  */
 816 static int __devinit tc35815_mac_match(struct device *dev, void *data)
 817 {
 818         struct platform_device *plat_dev = to_platform_device(dev);
 819         struct pci_dev *pci_dev = data;
 820         unsigned int id = pci_dev->irq;
 821         return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
 822 }
 823
 824 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 825 {
 826         struct tc35815_local *lp = netdev_priv(dev);
 827         struct device *pd = bus_find_device(&platform_bus_type, NULL,
 828                                             lp->pci_dev, tc35815_mac_match);
 829         if (pd) {
 830                 if (pd->platform_data)
 831                         memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
 832                 put_device(pd);
 833                 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
 834         }
 835         return -ENODEV;
 836 }
 837 #else
 838 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 839 {
 840         return -ENODEV;
 841 }
 842 #endif
 843
 844 static int __devinit tc35815_init_dev_addr(struct net_device *dev)
 845 {
 846         struct tc35815_regs __iomem *tr =
 847                 (struct tc35815_regs __iomem *)dev->base_addr;
 848         int i;
 849
 850         while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 851                 ;
 852         for (i = 0; i < 6; i += 2) {
 853                 unsigned short data;
 854                 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
 855                 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 856                         ;
 857                 data = tc_readl(&tr->PROM_Data);
 858                 dev->dev_addr[i] = data & 0xff;
 859                 dev->dev_addr[i+1] = data >> 8;
 860         }
 861         if (!is_valid_ether_addr(dev->dev_addr))
 862                 return tc35815_read_plat_dev_addr(dev);
 863         return 0;
 864 }
 865
 866 static const struct net_device_ops tc35815_netdev_ops = {
 867         .ndo_open               = tc35815_open,
 868         .ndo_stop               = tc35815_close,
 869         .ndo_start_xmit         = tc35815_send_packet,
 870         .ndo_get_stats          = tc35815_get_stats,
 871         .ndo_set_multicast_list = tc35815_set_multicast_list,
 872         .ndo_tx_timeout         = tc35815_tx_timeout,
 873         .ndo_do_ioctl           = tc35815_ioctl,
 874         .ndo_validate_addr      = eth_validate_addr,
 875         .ndo_change_mtu         = eth_change_mtu,
 876         .ndo_set_mac_address    = eth_mac_addr,
 877 #ifdef CONFIG_NET_POLL_CONTROLLER
 878         .ndo_poll_controller    = tc35815_poll_controller,
 879 #endif
 880 };
 881
 882 static int __devinit tc35815_init_one(struct pci_dev *pdev,
 883                                       const struct pci_device_id *ent)
 884 {
 885         void __iomem *ioaddr = NULL;
 886         struct net_device *dev;
 887         struct tc35815_local *lp;
 888         int rc;
 889
 890         static int printed_version;
 891         if (!printed_version++) {
 892                 printk(version);
 893                 dev_printk(KERN_DEBUG, &pdev->dev,
 894                            "speed:%d duplex:%d\n",
 895                            options.speed, options.duplex);
 896         }
 897
 898         if (!pdev->irq) {
 899                 dev_warn(&pdev->dev, "no IRQ assigned.\n");
 900                 return -ENODEV;
 901         }
 902
 903         /* dev zeroed in alloc_etherdev */
 904         dev = alloc_etherdev(sizeof(*lp));
 905         if (dev == NULL) {
 906                 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
 907                 return -ENOMEM;
 908         }
 909         SET_NETDEV_DEV(dev, &pdev->dev);
 910         lp = netdev_priv(dev);
 911         lp->dev = dev;
 912
 913         /* enable device (incl. PCI PM wakeup), and bus-mastering */
 914         rc = pcim_enable_device(pdev);
 915         if (rc)
 916                 goto err_out;
 917         rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
 918         if (rc)
 919                 goto err_out;
 920         pci_set_master(pdev);
 921         ioaddr = pcim_iomap_table(pdev)[1];
 922
 923         /* Initialize the device structure. */
 924         dev->netdev_ops = &tc35815_netdev_ops;
 925         dev->ethtool_ops = &tc35815_ethtool_ops;
 926         dev->watchdog_timeo = TC35815_TX_TIMEOUT;
 927 #ifdef TC35815_NAPI
 928         netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
 929 #endif
 930
 931         dev->irq = pdev->irq;
 932         dev->base_addr = (unsigned long)ioaddr;
 933
 934         INIT_WORK(&lp->restart_work, tc35815_restart_work);
 935         spin_lock_init(&lp->lock);
 936         lp->pci_dev = pdev;
 937         lp->chiptype = ent->driver_data;
 938
 939         lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
 940         pci_set_drvdata(pdev, dev);
 941
 942         /* Soft reset the chip. */
 943         tc35815_chip_reset(dev);
 944
 945         /* Retrieve the ethernet address. */
 946         if (tc35815_init_dev_addr(dev)) {
 947                 dev_warn(&pdev->dev, "not valid ether addr\n");
 948                 random_ether_addr(dev->dev_addr);
 949         }
 950
 951         rc = register_netdev(dev);
 952         if (rc)
 953                 goto err_out;
 954
 955         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 956         printk(KERN_INFO "%s: %s at 0x%lx, %pM, IRQ %d\n",
 957                 dev->name,
 958                 chip_info[ent->driver_data].name,
 959                 dev->base_addr,
 960                 dev->dev_addr,
 961                 dev->irq);
 962
 963         rc = tc_mii_init(dev);
 964         if (rc)
 965                 goto err_out_unregister;
 966
 967         return 0;
 968
 969 err_out_unregister:
 970         unregister_netdev(dev);
 971 err_out:
 972         free_netdev(dev);
 973         return rc;
 974 }
 975
 976
 977 static void __devexit tc35815_remove_one(struct pci_dev *pdev)
 978 {
 979         struct net_device *dev = pci_get_drvdata(pdev);
 980         struct tc35815_local *lp = netdev_priv(dev);
 981
 982         phy_disconnect(lp->phy_dev);
 983         mdiobus_unregister(lp->mii_bus);
 984         kfree(lp->mii_bus->irq);
 985         mdiobus_free(lp->mii_bus);
 986         unregister_netdev(dev);
 987         free_netdev(dev);
 988         pci_set_drvdata(pdev, NULL);
 989 }
 990
 991 static int
 992 tc35815_init_queues(struct net_device *dev)
 993 {
 994         struct tc35815_local *lp = netdev_priv(dev);
 995         int i;
 996         unsigned long fd_addr;
 997
 998         if (!lp->fd_buf) {
 999                 BUG_ON(sizeof(struct FDesc) +
1000                        sizeof(struct BDesc) * RX_BUF_NUM +
1001                        sizeof(struct FDesc) * RX_FD_NUM +
1002                        sizeof(struct TxFD) * TX_FD_NUM >
1003                        PAGE_SIZE * FD_PAGE_NUM);
1004
1005                 lp->fd_buf = pci_alloc_consistent(lp->pci_dev,
1006                                                   PAGE_SIZE * FD_PAGE_NUM,
1007                                                   &lp->fd_buf_dma);
1008                 if (!lp->fd_buf)
1009                         return -ENOMEM;
1010                 for (i = 0; i < RX_BUF_NUM; i++) {
1011 #ifdef TC35815_USE_PACKEDBUFFER
1012                         lp->data_buf[i] =
1013                                 alloc_rxbuf_page(lp->pci_dev,
1014                                                  &lp->data_buf_dma[i]);
1015                         if (!lp->data_buf[i]) {
1016                                 while (--i >= 0) {
1017                                         free_rxbuf_page(lp->pci_dev,
1018                                                         lp->data_buf[i],
1019                                                         lp->data_buf_dma[i]);
1020                                         lp->data_buf[i] = NULL;
1021                                 }
1022                                 pci_free_consistent(lp->pci_dev,
1023                                                     PAGE_SIZE * FD_PAGE_NUM,
1024                                                     lp->fd_buf,
1025                                                     lp->fd_buf_dma);
1026                                 lp->fd_buf = NULL;
1027                                 return -ENOMEM;
1028                         }
1029 #else
1030                         lp->rx_skbs[i].skb =
1031                                 alloc_rxbuf_skb(dev, lp->pci_dev,
1032                                                 &lp->rx_skbs[i].skb_dma);
1033                         if (!lp->rx_skbs[i].skb) {
1034                                 while (--i >= 0) {
1035                                         free_rxbuf_skb(lp->pci_dev,
1036                                                        lp->rx_skbs[i].skb,
1037                                                        lp->rx_skbs[i].skb_dma);
1038                                         lp->rx_skbs[i].skb = NULL;
1039                                 }
1040                                 pci_free_consistent(lp->pci_dev,
1041                                                     PAGE_SIZE * FD_PAGE_NUM,
1042                                                     lp->fd_buf,
1043                                                     lp->fd_buf_dma);
1044                                 lp->fd_buf = NULL;
1045                                 return -ENOMEM;
1046                         }
1047 #endif
1048                 }
1049                 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
1050                        dev->name, lp->fd_buf);
1051 #ifdef TC35815_USE_PACKEDBUFFER
1052                 printk(" DataBuf");
1053                 for (i = 0; i < RX_BUF_NUM; i++)
1054                         printk(" %p", lp->data_buf[i]);
1055 #endif
1056                 printk("\n");
1057         } else {
1058                 for (i = 0; i < FD_PAGE_NUM; i++)
1059                         clear_page((void *)((unsigned long)lp->fd_buf +
1060                                             i * PAGE_SIZE));
1061         }
1062         fd_addr = (unsigned long)lp->fd_buf;
1063
1064         /* Free Descriptors (for Receive) */
1065         lp->rfd_base = (struct RxFD *)fd_addr;
1066         fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
1067         for (i = 0; i < RX_FD_NUM; i++)
1068                 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
1069         lp->rfd_cur = lp->rfd_base;
1070         lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
1071
1072         /* Transmit Descriptors */
1073         lp->tfd_base = (struct TxFD *)fd_addr;
1074         fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
1075         for (i = 0; i < TX_FD_NUM; i++) {
1076                 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
1077                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1078                 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
1079         }
1080         lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
1081         lp->tfd_start = 0;
1082         lp->tfd_end = 0;
1083
1084         /* Buffer List (for Receive) */
1085         lp->fbl_ptr = (struct FrFD *)fd_addr;
1086         lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
1087         lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
1088 #ifndef TC35815_USE_PACKEDBUFFER
1089         /*
1090          * move all allocated skbs to head of rx_skbs[] array.
1091          * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
1092          * tc35815_rx() had failed.
1093          */
1094         lp->fbl_count = 0;
1095         for (i = 0; i < RX_BUF_NUM; i++) {
1096                 if (lp->rx_skbs[i].skb) {
1097                         if (i != lp->fbl_count) {
1098                                 lp->rx_skbs[lp->fbl_count].skb =
1099                                         lp->rx_skbs[i].skb;
1100                                 lp->rx_skbs[lp->fbl_count].skb_dma =
1101                                         lp->rx_skbs[i].skb_dma;
1102                         }
1103                         lp->fbl_count++;
1104                 }
1105         }
1106 #endif
1107         for (i = 0; i < RX_BUF_NUM; i++) {
1108 #ifdef TC35815_USE_PACKEDBUFFER
1109                 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
1110 #else
1111                 if (i >= lp->fbl_count) {
1112                         lp->fbl_ptr->bd[i].BuffData = 0;
1113                         lp->fbl_ptr->bd[i].BDCtl = 0;
1114                         continue;
1115                 }
1116                 lp->fbl_ptr->bd[i].BuffData =
1117                         cpu_to_le32(lp->rx_skbs[i].skb_dma);
1118 #endif
1119                 /* BDID is index of FrFD.bd[] */
1120                 lp->fbl_ptr->bd[i].BDCtl =
1121                         cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
1122                                     RX_BUF_SIZE);
1123         }
1124 #ifdef TC35815_USE_PACKEDBUFFER
1125         lp->fbl_curid = 0;
1126 #endif
1127
1128         printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
1129                dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
1130         return 0;
1131 }
1132
1133 static void
1134 tc35815_clear_queues(struct net_device *dev)
1135 {
1136         struct tc35815_local *lp = netdev_priv(dev);
1137         int i;
1138
1139         for (i = 0; i < TX_FD_NUM; i++) {
1140                 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1141                 struct sk_buff *skb =
1142                         fdsystem != 0xffffffff ?
1143                         lp->tx_skbs[fdsystem].skb : NULL;
1144 #ifdef DEBUG
1145                 if (lp->tx_skbs[i].skb != skb) {
1146                         printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1147                         panic_queues(dev);
1148                 }
1149 #else
1150                 BUG_ON(lp->tx_skbs[i].skb != skb);
1151 #endif
1152                 if (skb) {
1153                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1154                         lp->tx_skbs[i].skb = NULL;
1155                         lp->tx_skbs[i].skb_dma = 0;
1156                         dev_kfree_skb_any(skb);
1157                 }
1158                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1159         }
1160
1161         tc35815_init_queues(dev);
1162 }
1163
1164 static void
1165 tc35815_free_queues(struct net_device *dev)
1166 {
1167         struct tc35815_local *lp = netdev_priv(dev);
1168         int i;
1169
1170         if (lp->tfd_base) {
1171                 for (i = 0; i < TX_FD_NUM; i++) {
1172                         u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1173                         struct sk_buff *skb =
1174                                 fdsystem != 0xffffffff ?
1175                                 lp->tx_skbs[fdsystem].skb : NULL;
1176 #ifdef DEBUG
1177                         if (lp->tx_skbs[i].skb != skb) {
1178                                 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1179                                 panic_queues(dev);
1180                         }
1181 #else
1182                         BUG_ON(lp->tx_skbs[i].skb != skb);
1183 #endif
1184                         if (skb) {
1185                                 dev_kfree_skb(skb);
1186                                 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1187                                 lp->tx_skbs[i].skb = NULL;
1188                                 lp->tx_skbs[i].skb_dma = 0;
1189                         }
1190                         lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1191                 }
1192         }
1193
1194         lp->rfd_base = NULL;
1195         lp->rfd_limit = NULL;
1196         lp->rfd_cur = NULL;
1197         lp->fbl_ptr = NULL;
1198
1199         for (i = 0; i < RX_BUF_NUM; i++) {
1200 #ifdef TC35815_USE_PACKEDBUFFER
1201                 if (lp->data_buf[i]) {
1202                         free_rxbuf_page(lp->pci_dev,
1203                                         lp->data_buf[i], lp->data_buf_dma[i]);
1204                         lp->data_buf[i] = NULL;
1205                 }
1206 #else
1207                 if (lp->rx_skbs[i].skb) {
1208                         free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1209                                        lp->rx_skbs[i].skb_dma);
1210                         lp->rx_skbs[i].skb = NULL;
1211                 }
1212 #endif
1213         }
1214         if (lp->fd_buf) {
1215                 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1216                                     lp->fd_buf, lp->fd_buf_dma);
1217                 lp->fd_buf = NULL;
1218         }
1219 }
1220
1221 static void
1222 dump_txfd(struct TxFD *fd)
1223 {
1224         printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1225                le32_to_cpu(fd->fd.FDNext),
1226                le32_to_cpu(fd->fd.FDSystem),
1227                le32_to_cpu(fd->fd.FDStat),
1228                le32_to_cpu(fd->fd.FDCtl));
1229         printk("BD: ");
1230         printk(" %08x %08x",
1231                le32_to_cpu(fd->bd.BuffData),
1232                le32_to_cpu(fd->bd.BDCtl));
1233         printk("\n");
1234 }
1235
1236 static int
1237 dump_rxfd(struct RxFD *fd)
1238 {
1239         int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1240         if (bd_count > 8)
1241                 bd_count = 8;
1242         printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1243                le32_to_cpu(fd->fd.FDNext),
1244                le32_to_cpu(fd->fd.FDSystem),
1245                le32_to_cpu(fd->fd.FDStat),
1246                le32_to_cpu(fd->fd.FDCtl));
1247         if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1248                 return 0;
1249         printk("BD: ");
1250         for (i = 0; i < bd_count; i++)
1251                 printk(" %08x %08x",
1252                        le32_to_cpu(fd->bd[i].BuffData),
1253                        le32_to_cpu(fd->bd[i].BDCtl));
1254         printk("\n");
1255         return bd_count;
1256 }
1257
1258 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1259 static void
1260 dump_frfd(struct FrFD *fd)
1261 {
1262         int i;
1263         printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1264                le32_to_cpu(fd->fd.FDNext),
1265                le32_to_cpu(fd->fd.FDSystem),
1266                le32_to_cpu(fd->fd.FDStat),
1267                le32_to_cpu(fd->fd.FDCtl));
1268         printk("BD: ");
1269         for (i = 0; i < RX_BUF_NUM; i++)
1270                 printk(" %08x %08x",
1271                        le32_to_cpu(fd->bd[i].BuffData),
1272                        le32_to_cpu(fd->bd[i].BDCtl));
1273         printk("\n");
1274 }
1275 #endif
1276
1277 #ifdef DEBUG
1278 static void
1279 panic_queues(struct net_device *dev)
1280 {
1281         struct tc35815_local *lp = netdev_priv(dev);
1282         int i;
1283
1284         printk("TxFD base %p, start %u, end %u\n",
1285                lp->tfd_base, lp->tfd_start, lp->tfd_end);
1286         printk("RxFD base %p limit %p cur %p\n",
1287                lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1288         printk("FrFD %p\n", lp->fbl_ptr);
1289         for (i = 0; i < TX_FD_NUM; i++)
1290                 dump_txfd(&lp->tfd_base[i]);
1291         for (i = 0; i < RX_FD_NUM; i++) {
1292                 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1293                 i += (bd_count + 1) / 2;        /* skip BDs */
1294         }
1295         dump_frfd(lp->fbl_ptr);
1296         panic("%s: Illegal queue state.", dev->name);
1297 }
1298 #endif
1299
1300 static void print_eth(const u8 *add)
1301 {
1302         printk(KERN_DEBUG "print_eth(%p)\n", add);
1303         printk(KERN_DEBUG " %pM => %pM : %02x%02x\n",
1304                 add + 6, add, add[12], add[13]);
1305 }
1306
1307 static int tc35815_tx_full(struct net_device *dev)
1308 {
1309         struct tc35815_local *lp = netdev_priv(dev);
1310         return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1311 }
1312
1313 static void tc35815_restart(struct net_device *dev)
1314 {
1315         struct tc35815_local *lp = netdev_priv(dev);
1316
1317         if (lp->phy_dev) {
1318                 int timeout;
1319
1320                 phy_write(lp->phy_dev, MII_BMCR, BMCR_RESET);
1321                 timeout = 100;
1322                 while (--timeout) {
1323                         if (!(phy_read(lp->phy_dev, MII_BMCR) & BMCR_RESET))
1324                                 break;
1325                         udelay(1);
1326                 }
1327                 if (!timeout)
1328                         printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1329         }
1330
1331         spin_lock_irq(&lp->lock);
1332         tc35815_chip_reset(dev);
1333         tc35815_clear_queues(dev);
1334         tc35815_chip_init(dev);
1335         /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1336         tc35815_set_multicast_list(dev);
1337         spin_unlock_irq(&lp->lock);
1338
1339         netif_wake_queue(dev);
1340 }
1341
1342 static void tc35815_restart_work(struct work_struct *work)
1343 {
1344         struct tc35815_local *lp =
1345                 container_of(work, struct tc35815_local, restart_work);
1346         struct net_device *dev = lp->dev;
1347
1348         tc35815_restart(dev);
1349 }
1350
1351 static void tc35815_schedule_restart(struct net_device *dev)
1352 {
1353         struct tc35815_local *lp = netdev_priv(dev);
1354         struct tc35815_regs __iomem *tr =
1355                 (struct tc35815_regs __iomem *)dev->base_addr;
1356
1357         /* disable interrupts */
1358         tc_writel(0, &tr->Int_En);
1359         tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl);
1360         schedule_work(&lp->restart_work);
1361 }
1362
1363 static void tc35815_tx_timeout(struct net_device *dev)
1364 {
1365         struct tc35815_regs __iomem *tr =
1366                 (struct tc35815_regs __iomem *)dev->base_addr;
1367
1368         printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1369                dev->name, tc_readl(&tr->Tx_Stat));
1370
1371         /* Try to restart the adaptor. */
1372         tc35815_schedule_restart(dev);
1373         dev->stats.tx_errors++;
1374 }
1375
1376 /*
1377  * Open/initialize the controller. This is called (in the current kernel)
1378  * sometime after booting when the 'ifconfig' program is run.
1379  *
1380  * This routine should set everything up anew at each open, even
1381  * registers that "should" only need to be set once at boot, so that
1382  * there is non-reboot way to recover if something goes wrong.
1383  */
1384 static int
1385 tc35815_open(struct net_device *dev)
1386 {
1387         struct tc35815_local *lp = netdev_priv(dev);
1388
1389         /*
1390          * This is used if the interrupt line can turned off (shared).
1391          * See 3c503.c for an example of selecting the IRQ at config-time.
1392          */
1393         if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED,
1394                         dev->name, dev))
1395                 return -EAGAIN;
1396
1397         tc35815_chip_reset(dev);
1398
1399         if (tc35815_init_queues(dev) != 0) {
1400                 free_irq(dev->irq, dev);
1401                 return -EAGAIN;
1402         }
1403
1404 #ifdef TC35815_NAPI
1405         napi_enable(&lp->napi);
1406 #endif
1407
1408         /* Reset the hardware here. Don't forget to set the station address. */
1409         spin_lock_irq(&lp->lock);
1410         tc35815_chip_init(dev);
1411         spin_unlock_irq(&lp->lock);
1412
1413         netif_carrier_off(dev);
1414         /* schedule a link state check */
1415         phy_start(lp->phy_dev);
1416
1417         /* We are now ready to accept transmit requeusts from
1418          * the queueing layer of the networking.
1419          */
1420         netif_start_queue(dev);
1421
1422         return 0;
1423 }
1424
1425 /* This will only be invoked if your driver is _not_ in XOFF state.
1426  * What this means is that you need not check it, and that this
1427  * invariant will hold if you make sure that the netif_*_queue()
1428  * calls are done at the proper times.
1429  */
1430 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1431 {
1432         struct tc35815_local *lp = netdev_priv(dev);
1433         struct TxFD *txfd;
1434         unsigned long flags;
1435
1436         /* If some error occurs while trying to transmit this
1437          * packet, you should return '1' from this function.
1438          * In such a case you _may not_ do anything to the
1439          * SKB, it is still owned by the network queueing
1440          * layer when an error is returned.  This means you
1441          * may not modify any SKB fields, you may not free
1442          * the SKB, etc.
1443          */
1444
1445         /* This is the most common case for modern hardware.
1446          * The spinlock protects this code from the TX complete
1447          * hardware interrupt handler.  Queue flow control is
1448          * thus managed under this lock as well.
1449          */
1450         spin_lock_irqsave(&lp->lock, flags);
1451
1452         /* failsafe... (handle txdone now if half of FDs are used) */
1453         if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1454             TX_FD_NUM / 2)
1455                 tc35815_txdone(dev);
1456
1457         if (netif_msg_pktdata(lp))
1458                 print_eth(skb->data);
1459 #ifdef DEBUG
1460         if (lp->tx_skbs[lp->tfd_start].skb) {
1461                 printk("%s: tx_skbs conflict.\n", dev->name);
1462                 panic_queues(dev);
1463         }
1464 #else
1465         BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1466 #endif
1467         lp->tx_skbs[lp->tfd_start].skb = skb;
1468         lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1469
1470         /*add to ring */
1471         txfd = &lp->tfd_base[lp->tfd_start];
1472         txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1473         txfd->bd.BDCtl = cpu_to_le32(skb->len);
1474         txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1475         txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1476
1477         if (lp->tfd_start == lp->tfd_end) {
1478                 struct tc35815_regs __iomem *tr =
1479                         (struct tc35815_regs __iomem *)dev->base_addr;
1480                 /* Start DMA Transmitter. */
1481                 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1482 #ifdef GATHER_TXINT
1483                 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1484 #endif
1485                 if (netif_msg_tx_queued(lp)) {
1486                         printk("%s: starting TxFD.\n", dev->name);
1487                         dump_txfd(txfd);
1488                 }
1489                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1490         } else {
1491                 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1492                 if (netif_msg_tx_queued(lp)) {
1493                         printk("%s: queueing TxFD.\n", dev->name);
1494                         dump_txfd(txfd);
1495                 }
1496         }
1497         lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1498
1499         dev->trans_start = jiffies;
1500
1501         /* If we just used up the very last entry in the
1502          * TX ring on this device, tell the queueing
1503          * layer to send no more.
1504          */
1505         if (tc35815_tx_full(dev)) {
1506                 if (netif_msg_tx_queued(lp))
1507                         printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1508                 netif_stop_queue(dev);
1509         }
1510
1511         /* When the TX completion hw interrupt arrives, this
1512          * is when the transmit statistics are updated.
1513          */
1514
1515         spin_unlock_irqrestore(&lp->lock, flags);
1516         return NETDEV_TX_OK;
1517 }
1518
1519 #define FATAL_ERROR_INT \
1520         (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1521 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1522 {
1523         static int count;
1524         printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1525                dev->name, status);
1526         if (status & Int_IntPCI)
1527                 printk(" IntPCI");
1528         if (status & Int_DmParErr)
1529                 printk(" DmParErr");
1530         if (status & Int_IntNRAbt)
1531                 printk(" IntNRAbt");
1532         printk("\n");
1533         if (count++ > 100)
1534                 panic("%s: Too many fatal errors.", dev->name);
1535         printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1536         /* Try to restart the adaptor. */
1537         tc35815_schedule_restart(dev);
1538 }
1539
1540 #ifdef TC35815_NAPI
1541 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1542 #else
1543 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1544 #endif
1545 {
1546         struct tc35815_local *lp = netdev_priv(dev);
1547         int ret = -1;
1548
1549         /* Fatal errors... */
1550         if (status & FATAL_ERROR_INT) {
1551                 tc35815_fatal_error_interrupt(dev, status);
1552                 return 0;
1553         }
1554         /* recoverable errors */
1555         if (status & Int_IntFDAEx) {
1556                 if (netif_msg_rx_err(lp))
1557                         dev_warn(&dev->dev,
1558                                  "Free Descriptor Area Exhausted (%#x).\n",
1559                                  status);
1560                 dev->stats.rx_dropped++;
1561                 ret = 0;
1562         }
1563         if (status & Int_IntBLEx) {
1564                 if (netif_msg_rx_err(lp))
1565                         dev_warn(&dev->dev,
1566                                  "Buffer List Exhausted (%#x).\n",
1567                                  status);
1568                 dev->stats.rx_dropped++;
1569                 ret = 0;
1570         }
1571         if (status & Int_IntExBD) {
1572                 if (netif_msg_rx_err(lp))
1573                         dev_warn(&dev->dev,
1574                                  "Excessive Buffer Descriptiors (%#x).\n",
1575                                  status);
1576                 dev->stats.rx_length_errors++;
1577                 ret = 0;
1578         }
1579
1580         /* normal notification */
1581         if (status & Int_IntMacRx) {
1582                 /* Got a packet(s). */
1583 #ifdef TC35815_NAPI
1584                 ret = tc35815_rx(dev, limit);
1585 #else
1586                 tc35815_rx(dev);
1587                 ret = 0;
1588 #endif
1589                 lp->lstats.rx_ints++;
1590         }
1591         if (status & Int_IntMacTx) {
1592                 /* Transmit complete. */
1593                 lp->lstats.tx_ints++;
1594                 tc35815_txdone(dev);
1595                 netif_wake_queue(dev);
1596 #ifdef TC35815_NAPI
1597                 if (ret < 0)
1598                         ret = 0;
1599 #else
1600                 ret = 0;
1601 #endif
1602         }
1603         return ret;
1604 }
1605
1606 /*
1607  * The typical workload of the driver:
1608  * Handle the network interface interrupts.
1609  */
1610 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1611 {
1612         struct net_device *dev = dev_id;
1613         struct tc35815_local *lp = netdev_priv(dev);
1614         struct tc35815_regs __iomem *tr =
1615                 (struct tc35815_regs __iomem *)dev->base_addr;
1616 #ifdef TC35815_NAPI
1617         u32 dmactl = tc_readl(&tr->DMA_Ctl);
1618
1619         if (!(dmactl & DMA_IntMask)) {
1620                 /* disable interrupts */
1621                 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1622                 if (napi_schedule_prep(&lp->napi))
1623                         __napi_schedule(&lp->napi);
1624                 else {
1625                         printk(KERN_ERR "%s: interrupt taken in poll\n",
1626                                dev->name);
1627                         BUG();
1628                 }
1629                 (void)tc_readl(&tr->Int_Src);   /* flush */
1630                 return IRQ_HANDLED;
1631         }
1632         return IRQ_NONE;
1633 #else
1634         int handled;
1635         u32 status;
1636
1637         spin_lock(&lp->lock);
1638         status = tc_readl(&tr->Int_Src);
1639         /* BLEx, FDAEx will be cleared later */
1640         tc_writel(status & ~(Int_BLEx | Int_FDAEx),
1641                   &tr->Int_Src);        /* write to clear */
1642         handled = tc35815_do_interrupt(dev, status);
1643         if (status & (Int_BLEx | Int_FDAEx))
1644                 tc_writel(status & (Int_BLEx | Int_FDAEx), &tr->Int_Src);
1645         (void)tc_readl(&tr->Int_Src);   /* flush */
1646         spin_unlock(&lp->lock);
1647         return IRQ_RETVAL(handled >= 0);
1648 #endif /* TC35815_NAPI */
1649 }
1650
1651 #ifdef CONFIG_NET_POLL_CONTROLLER
1652 static void tc35815_poll_controller(struct net_device *dev)
1653 {
1654         disable_irq(dev->irq);
1655         tc35815_interrupt(dev->irq, dev);
1656         enable_irq(dev->irq);
1657 }
1658 #endif
1659
1660 /* We have a good packet(s), get it/them out of the buffers. */
1661 #ifdef TC35815_NAPI
1662 static int
1663 tc35815_rx(struct net_device *dev, int limit)
1664 #else
1665 static void
1666 tc35815_rx(struct net_device *dev)
1667 #endif
1668 {
1669         struct tc35815_local *lp = netdev_priv(dev);
1670         unsigned int fdctl;
1671         int i;
1672 #ifdef TC35815_NAPI
1673         int received = 0;
1674 #endif
1675
1676         while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1677                 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1678                 int pkt_len = fdctl & FD_FDLength_MASK;
1679                 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1680 #ifdef DEBUG
1681                 struct RxFD *next_rfd;
1682 #endif
1683 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1684                 pkt_len -= ETH_FCS_LEN;
1685 #endif
1686
1687                 if (netif_msg_rx_status(lp))
1688                         dump_rxfd(lp->rfd_cur);
1689                 if (status & Rx_Good) {
1690                         struct sk_buff *skb;
1691                         unsigned char *data;
1692                         int cur_bd;
1693 #ifdef TC35815_USE_PACKEDBUFFER
1694                         int offset;
1695 #endif
1696
1697 #ifdef TC35815_NAPI
1698                         if (--limit < 0)
1699                                 break;
1700 #endif
1701 #ifdef TC35815_USE_PACKEDBUFFER
1702                         BUG_ON(bd_count > 2);
1703                         skb = dev_alloc_skb(pkt_len + NET_IP_ALIGN);
1704                         if (skb == NULL) {
1705                                 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1706                                        dev->name);
1707                                 dev->stats.rx_dropped++;
1708                                 break;
1709                         }
1710                         skb_reserve(skb, NET_IP_ALIGN);
1711
1712                         data = skb_put(skb, pkt_len);
1713
1714                         /* copy from receive buffer */
1715                         cur_bd = 0;
1716                         offset = 0;
1717                         while (offset < pkt_len && cur_bd < bd_count) {
1718                                 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1719                                         BD_BuffLength_MASK;
1720                                 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1721                                 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1722                                 if (offset + len > pkt_len)
1723                                         len = pkt_len - offset;
1724 #ifdef TC35815_DMA_SYNC_ONDEMAND
1725                                 pci_dma_sync_single_for_cpu(lp->pci_dev,
1726                                                             dma, len,
1727                                                             PCI_DMA_FROMDEVICE);
1728 #endif
1729                                 memcpy(data + offset, rxbuf, len);
1730 #ifdef TC35815_DMA_SYNC_ONDEMAND
1731                                 pci_dma_sync_single_for_device(lp->pci_dev,
1732                                                                dma, len,
1733                                                                PCI_DMA_FROMDEVICE);
1734 #endif
1735                                 offset += len;
1736                                 cur_bd++;
1737                         }
1738 #else /* TC35815_USE_PACKEDBUFFER */
1739                         BUG_ON(bd_count > 1);
1740                         cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1741                                   & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1742 #ifdef DEBUG
1743                         if (cur_bd >= RX_BUF_NUM) {
1744                                 printk("%s: invalid BDID.\n", dev->name);
1745                                 panic_queues(dev);
1746                         }
1747                         BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1748                                (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1749                         if (!lp->rx_skbs[cur_bd].skb) {
1750                                 printk("%s: NULL skb.\n", dev->name);
1751                                 panic_queues(dev);
1752                         }
1753 #else
1754                         BUG_ON(cur_bd >= RX_BUF_NUM);
1755 #endif
1756                         skb = lp->rx_skbs[cur_bd].skb;
1757                         prefetch(skb->data);
1758                         lp->rx_skbs[cur_bd].skb = NULL;
1759                         pci_unmap_single(lp->pci_dev,
1760                                          lp->rx_skbs[cur_bd].skb_dma,
1761                                          RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1762                         if (!HAVE_DMA_RXALIGN(lp) && NET_IP_ALIGN)
1763                                 memmove(skb->data, skb->data - NET_IP_ALIGN,
1764                                         pkt_len);
1765                         data = skb_put(skb, pkt_len);
1766 #endif /* TC35815_USE_PACKEDBUFFER */
1767                         if (netif_msg_pktdata(lp))
1768                                 print_eth(data);
1769                         skb->protocol = eth_type_trans(skb, dev);
1770 #ifdef TC35815_NAPI
1771                         netif_receive_skb(skb);
1772                         received++;
1773 #else
1774                         netif_rx(skb);
1775 #endif
1776                         dev->stats.rx_packets++;
1777                         dev->stats.rx_bytes += pkt_len;
1778                 } else {
1779                         dev->stats.rx_errors++;
1780                         if (netif_msg_rx_err(lp))
1781                                 dev_info(&dev->dev, "Rx error (status %x)\n",
1782                                          status & Rx_Stat_Mask);
1783                         /* WORKAROUND: LongErr and CRCErr means Overflow. */
1784                         if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1785                                 status &= ~(Rx_LongErr|Rx_CRCErr);
1786                                 status |= Rx_Over;
1787                         }
1788                         if (status & Rx_LongErr)
1789                                 dev->stats.rx_length_errors++;
1790                         if (status & Rx_Over)
1791                                 dev->stats.rx_fifo_errors++;
1792                         if (status & Rx_CRCErr)
1793                                 dev->stats.rx_crc_errors++;
1794                         if (status & Rx_Align)
1795                                 dev->stats.rx_frame_errors++;
1796                 }
1797
1798                 if (bd_count > 0) {
1799                         /* put Free Buffer back to controller */
1800                         int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1801                         unsigned char id =
1802                                 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1803 #ifdef DEBUG
1804                         if (id >= RX_BUF_NUM) {
1805                                 printk("%s: invalid BDID.\n", dev->name);
1806                                 panic_queues(dev);
1807                         }
1808 #else
1809                         BUG_ON(id >= RX_BUF_NUM);
1810 #endif
1811                         /* free old buffers */
1812 #ifdef TC35815_USE_PACKEDBUFFER
1813                         while (lp->fbl_curid != id)
1814 #else
1815                         lp->fbl_count--;
1816                         while (lp->fbl_count < RX_BUF_NUM)
1817 #endif
1818                         {
1819 #ifdef TC35815_USE_PACKEDBUFFER
1820                                 unsigned char curid = lp->fbl_curid;
1821 #else
1822                                 unsigned char curid =
1823                                         (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1824 #endif
1825                                 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1826 #ifdef DEBUG
1827                                 bdctl = le32_to_cpu(bd->BDCtl);
1828                                 if (bdctl & BD_CownsBD) {
1829                                         printk("%s: Freeing invalid BD.\n",
1830                                                dev->name);
1831                                         panic_queues(dev);
1832                                 }
1833 #endif
1834                                 /* pass BD to controller */
1835 #ifndef TC35815_USE_PACKEDBUFFER
1836                                 if (!lp->rx_skbs[curid].skb) {
1837                                         lp->rx_skbs[curid].skb =
1838                                                 alloc_rxbuf_skb(dev,
1839                                                                 lp->pci_dev,
1840                                                                 &lp->rx_skbs[curid].skb_dma);
1841                                         if (!lp->rx_skbs[curid].skb)
1842                                                 break; /* try on next reception */
1843                                         bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1844                                 }
1845 #endif /* TC35815_USE_PACKEDBUFFER */
1846                                 /* Note: BDLength was modified by chip. */
1847                                 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1848                                                         (curid << BD_RxBDID_SHIFT) |
1849                                                         RX_BUF_SIZE);
1850 #ifdef TC35815_USE_PACKEDBUFFER
1851                                 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1852                                 if (netif_msg_rx_status(lp)) {
1853                                         printk("%s: Entering new FBD %d\n",
1854                                                dev->name, lp->fbl_curid);
1855                                         dump_frfd(lp->fbl_ptr);
1856                                 }
1857 #else
1858                                 lp->fbl_count++;
1859 #endif
1860                         }
1861                 }
1862
1863                 /* put RxFD back to controller */
1864 #ifdef DEBUG
1865                 next_rfd = fd_bus_to_virt(lp,
1866                                           le32_to_cpu(lp->rfd_cur->fd.FDNext));
1867                 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1868                         printk("%s: RxFD FDNext invalid.\n", dev->name);
1869                         panic_queues(dev);
1870                 }
1871 #endif
1872                 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1873                         /* pass FD to controller */
1874 #ifdef DEBUG
1875                         lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1876 #else
1877                         lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1878 #endif
1879                         lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1880                         lp->rfd_cur++;
1881                 }
1882                 if (lp->rfd_cur > lp->rfd_limit)
1883                         lp->rfd_cur = lp->rfd_base;
1884 #ifdef DEBUG
1885                 if (lp->rfd_cur != next_rfd)
1886                         printk("rfd_cur = %p, next_rfd %p\n",
1887                                lp->rfd_cur, next_rfd);
1888 #endif
1889         }
1890
1891 #ifdef TC35815_NAPI
1892         return received;
1893 #endif
1894 }
1895
1896 #ifdef TC35815_NAPI
1897 static int tc35815_poll(struct napi_struct *napi, int budget)
1898 {
1899         struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
1900         struct net_device *dev = lp->dev;
1901         struct tc35815_regs __iomem *tr =
1902                 (struct tc35815_regs __iomem *)dev->base_addr;
1903         int received = 0, handled;
1904         u32 status;
1905
1906         spin_lock(&lp->lock);
1907         status = tc_readl(&tr->Int_Src);
1908         do {
1909                 /* BLEx, FDAEx will be cleared later */
1910                 tc_writel(status & ~(Int_BLEx | Int_FDAEx),
1911                           &tr->Int_Src);        /* write to clear */
1912
1913                 handled = tc35815_do_interrupt(dev, status, budget - received);
1914                 if (status & (Int_BLEx | Int_FDAEx))
1915                         tc_writel(status & (Int_BLEx | Int_FDAEx),
1916                                   &tr->Int_Src);
1917                 if (handled >= 0) {
1918                         received += handled;
1919                         if (received >= budget)
1920                                 break;
1921                 }
1922                 status = tc_readl(&tr->Int_Src);
1923         } while (status);
1924         spin_unlock(&lp->lock);
1925
1926         if (received < budget) {
1927                 napi_complete(napi);
1928                 /* enable interrupts */
1929                 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1930         }
1931         return received;
1932 }
1933 #endif
1934
1935 #ifdef NO_CHECK_CARRIER
1936 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1937 #else
1938 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1939 #endif
1940
1941 static void
1942 tc35815_check_tx_stat(struct net_device *dev, int status)
1943 {
1944         struct tc35815_local *lp = netdev_priv(dev);
1945         const char *msg = NULL;
1946
1947         /* count collisions */
1948         if (status & Tx_ExColl)
1949                 dev->stats.collisions += 16;
1950         if (status & Tx_TxColl_MASK)
1951                 dev->stats.collisions += status & Tx_TxColl_MASK;
1952
1953 #ifndef NO_CHECK_CARRIER
1954         /* TX4939 does not have NCarr */
1955         if (lp->chiptype == TC35815_TX4939)
1956                 status &= ~Tx_NCarr;
1957 #ifdef WORKAROUND_LOSTCAR
1958         /* WORKAROUND: ignore LostCrS in full duplex operation */
1959         if (!lp->link || lp->duplex == DUPLEX_FULL)
1960                 status &= ~Tx_NCarr;
1961 #endif
1962 #endif
1963
1964         if (!(status & TX_STA_ERR)) {
1965                 /* no error. */
1966                 dev->stats.tx_packets++;
1967                 return;
1968         }
1969
1970         dev->stats.tx_errors++;
1971         if (status & Tx_ExColl) {
1972                 dev->stats.tx_aborted_errors++;
1973                 msg = "Excessive Collision.";
1974         }
1975         if (status & Tx_Under) {
1976                 dev->stats.tx_fifo_errors++;
1977                 msg = "Tx FIFO Underrun.";
1978                 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1979                         lp->lstats.tx_underrun++;
1980                         if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1981                                 struct tc35815_regs __iomem *tr =
1982                                         (struct tc35815_regs __iomem *)dev->base_addr;
1983                                 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1984                                 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1985                         }
1986                 }
1987         }
1988         if (status & Tx_Defer) {
1989                 dev->stats.tx_fifo_errors++;
1990                 msg = "Excessive Deferral.";
1991         }
1992 #ifndef NO_CHECK_CARRIER
1993         if (status & Tx_NCarr) {
1994                 dev->stats.tx_carrier_errors++;
1995                 msg = "Lost Carrier Sense.";
1996         }
1997 #endif
1998         if (status & Tx_LateColl) {
1999                 dev->stats.tx_aborted_errors++;
2000                 msg = "Late Collision.";
2001         }
2002         if (status & Tx_TxPar) {
2003                 dev->stats.tx_fifo_errors++;
2004                 msg = "Transmit Parity Error.";
2005         }
2006         if (status & Tx_SQErr) {
2007                 dev->stats.tx_heartbeat_errors++;
2008                 msg = "Signal Quality Error.";
2009         }
2010         if (msg && netif_msg_tx_err(lp))
2011                 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
2012 }
2013
2014 /* This handles TX complete events posted by the device
2015  * via interrupts.
2016  */
2017 static void
2018 tc35815_txdone(struct net_device *dev)
2019 {
2020         struct tc35815_local *lp = netdev_priv(dev);
2021         struct TxFD *txfd;
2022         unsigned int fdctl;
2023
2024         txfd = &lp->tfd_base[lp->tfd_end];
2025         while (lp->tfd_start != lp->tfd_end &&
2026                !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
2027                 int status = le32_to_cpu(txfd->fd.FDStat);
2028                 struct sk_buff *skb;
2029                 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
2030                 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
2031
2032                 if (netif_msg_tx_done(lp)) {
2033                         printk("%s: complete TxFD.\n", dev->name);
2034                         dump_txfd(txfd);
2035                 }
2036                 tc35815_check_tx_stat(dev, status);
2037
2038                 skb = fdsystem != 0xffffffff ?
2039                         lp->tx_skbs[fdsystem].skb : NULL;
2040 #ifdef DEBUG
2041                 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
2042                         printk("%s: tx_skbs mismatch.\n", dev->name);
2043                         panic_queues(dev);
2044                 }
2045 #else
2046                 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
2047 #endif
2048                 if (skb) {
2049                         dev->stats.tx_bytes += skb->len;
2050                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
2051                         lp->tx_skbs[lp->tfd_end].skb = NULL;
2052                         lp->tx_skbs[lp->tfd_end].skb_dma = 0;
2053 #ifdef TC35815_NAPI
2054                         dev_kfree_skb_any(skb);
2055 #else
2056                         dev_kfree_skb_irq(skb);
2057 #endif
2058                 }
2059                 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
2060
2061                 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
2062                 txfd = &lp->tfd_base[lp->tfd_end];
2063 #ifdef DEBUG
2064                 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
2065                         printk("%s: TxFD FDNext invalid.\n", dev->name);
2066                         panic_queues(dev);
2067                 }
2068 #endif
2069                 if (fdnext & FD_Next_EOL) {
2070                         /* DMA Transmitter has been stopping... */
2071                         if (lp->tfd_end != lp->tfd_start) {
2072                                 struct tc35815_regs __iomem *tr =
2073                                         (struct tc35815_regs __iomem *)dev->base_addr;
2074                                 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
2075                                 struct TxFD *txhead = &lp->tfd_base[head];
2076                                 int qlen = (lp->tfd_start + TX_FD_NUM
2077                                             - lp->tfd_end) % TX_FD_NUM;
2078
2079 #ifdef DEBUG
2080                                 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
2081                                         printk("%s: TxFD FDCtl invalid.\n", dev->name);
2082                                         panic_queues(dev);
2083                                 }
2084 #endif
2085                                 /* log max queue length */
2086                                 if (lp->lstats.max_tx_qlen < qlen)
2087                                         lp->lstats.max_tx_qlen = qlen;
2088
2089
2090                                 /* start DMA Transmitter again */
2091                                 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
2092 #ifdef GATHER_TXINT
2093                                 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
2094 #endif
2095                                 if (netif_msg_tx_queued(lp)) {
2096                                         printk("%s: start TxFD on queue.\n",
2097                                                dev->name);
2098                                         dump_txfd(txfd);
2099                                 }
2100                                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
2101                         }
2102                         break;
2103                 }
2104         }
2105
2106         /* If we had stopped the queue due to a "tx full"
2107          * condition, and space has now been made available,
2108          * wake up the queue.
2109          */
2110         if (netif_queue_stopped(dev) && !tc35815_tx_full(dev))
2111                 netif_wake_queue(dev);
2112 }
2113
2114 /* The inverse routine to tc35815_open(). */
2115 static int
2116 tc35815_close(struct net_device *dev)
2117 {
2118         struct tc35815_local *lp = netdev_priv(dev);
2119
2120         netif_stop_queue(dev);
2121 #ifdef TC35815_NAPI
2122         napi_disable(&lp->napi);
2123 #endif
2124         if (lp->phy_dev)
2125                 phy_stop(lp->phy_dev);
2126         cancel_work_sync(&lp->restart_work);
2127
2128         /* Flush the Tx and disable Rx here. */
2129         tc35815_chip_reset(dev);
2130         free_irq(dev->irq, dev);
2131
2132         tc35815_free_queues(dev);
2133
2134         return 0;
2135
2136 }
2137
2138 /*
2139  * Get the current statistics.
2140  * This may be called with the card open or closed.
2141  */
2142 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
2143 {
2144         struct tc35815_regs __iomem *tr =
2145                 (struct tc35815_regs __iomem *)dev->base_addr;
2146         if (netif_running(dev))
2147                 /* Update the statistics from the device registers. */
2148                 dev->stats.rx_missed_errors += tc_readl(&tr->Miss_Cnt);
2149
2150         return &dev->stats;
2151 }
2152
2153 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
2154 {
2155         struct tc35815_local *lp = netdev_priv(dev);
2156         struct tc35815_regs __iomem *tr =
2157                 (struct tc35815_regs __iomem *)dev->base_addr;
2158         int cam_index = index * 6;
2159         u32 cam_data;
2160         u32 saved_addr;
2161
2162         saved_addr = tc_readl(&tr->CAM_Adr);
2163
2164         if (netif_msg_hw(lp))
2165                 printk(KERN_DEBUG "%s: CAM %d: %pM\n",
2166                         dev->name, index, addr);
2167         if (index & 1) {
2168                 /* read modify write */
2169                 tc_writel(cam_index - 2, &tr->CAM_Adr);
2170                 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
2171                 cam_data |= addr[0] << 8 | addr[1];
2172                 tc_writel(cam_data, &tr->CAM_Data);
2173                 /* write whole word */
2174                 tc_writel(cam_index + 2, &tr->CAM_Adr);
2175                 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2176                 tc_writel(cam_data, &tr->CAM_Data);
2177         } else {
2178                 /* write whole word */
2179                 tc_writel(cam_index, &tr->CAM_Adr);
2180                 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2181                 tc_writel(cam_data, &tr->CAM_Data);
2182                 /* read modify write */
2183                 tc_writel(cam_index + 4, &tr->CAM_Adr);
2184                 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2185                 cam_data |= addr[4] << 24 | (addr[5] << 16);
2186                 tc_writel(cam_data, &tr->CAM_Data);
2187         }
2188
2189         tc_writel(saved_addr, &tr->CAM_Adr);
2190 }
2191
2192
2193 /*
2194  * Set or clear the multicast filter for this adaptor.
2195  * num_addrs == -1      Promiscuous mode, receive all packets
2196  * num_addrs == 0       Normal mode, clear multicast list
2197  * num_addrs > 0        Multicast mode, receive normal and MC packets,
2198  *                      and do best-effort filtering.
2199  */
2200 static void
2201 tc35815_set_multicast_list(struct net_device *dev)
2202 {
2203         struct tc35815_regs __iomem *tr =
2204                 (struct tc35815_regs __iomem *)dev->base_addr;
2205
2206         if (dev->flags & IFF_PROMISC) {
2207 #ifdef WORKAROUND_100HALF_PROMISC
2208                 /* With some (all?) 100MHalf HUB, controller will hang
2209                  * if we enabled promiscuous mode before linkup... */
2210                 struct tc35815_local *lp = netdev_priv(dev);
2211
2212                 if (!lp->link)
2213                         return;
2214 #endif
2215                 /* Enable promiscuous mode */
2216                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2217         } else if ((dev->flags & IFF_ALLMULTI) ||
2218                   dev->mc_count > CAM_ENTRY_MAX - 3) {
2219                 /* CAM 0, 1, 20 are reserved. */
2220                 /* Disable promiscuous mode, use normal mode. */
2221                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2222         } else if (dev->mc_count) {
2223                 struct dev_mc_list *cur_addr = dev->mc_list;
2224                 int i;
2225                 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2226
2227                 tc_writel(0, &tr->CAM_Ctl);
2228                 /* Walk the address list, and load the filter */
2229                 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2230                         if (!cur_addr)
2231                                 break;
2232                         /* entry 0,1 is reserved. */
2233                         tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2234                         ena_bits |= CAM_Ena_Bit(i + 2);
2235                 }
2236                 tc_writel(ena_bits, &tr->CAM_Ena);
2237                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2238         } else {
2239                 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2240                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2241         }
2242 }
2243
2244 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2245 {
2246         struct tc35815_local *lp = netdev_priv(dev);
2247         strcpy(info->driver, MODNAME);
2248         strcpy(info->version, DRV_VERSION);
2249         strcpy(info->bus_info, pci_name(lp->pci_dev));
2250 }
2251
2252 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2253 {
2254         struct tc35815_local *lp = netdev_priv(dev);
2255
2256         if (!lp->phy_dev)
2257                 return -ENODEV;
2258         return phy_ethtool_gset(lp->phy_dev, cmd);
2259 }
2260
2261 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2262 {
2263         struct tc35815_local *lp = netdev_priv(dev);
2264
2265         if (!lp->phy_dev)
2266                 return -ENODEV;
2267         return phy_ethtool_sset(lp->phy_dev, cmd);
2268 }
2269
2270 static u32 tc35815_get_msglevel(struct net_device *dev)
2271 {
2272         struct tc35815_local *lp = netdev_priv(dev);
2273         return lp->msg_enable;
2274 }
2275
2276 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2277 {
2278         struct tc35815_local *lp = netdev_priv(dev);
2279         lp->msg_enable = datum;
2280 }
2281
2282 static int tc35815_get_sset_count(struct net_device *dev, int sset)
2283 {
2284         struct tc35815_local *lp = netdev_priv(dev);
2285
2286         switch (sset) {
2287         case ETH_SS_STATS:
2288                 return sizeof(lp->lstats) / sizeof(int);
2289         default:
2290                 return -EOPNOTSUPP;
2291         }
2292 }
2293
2294 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2295 {
2296         struct tc35815_local *lp = netdev_priv(dev);
2297         data[0] = lp->lstats.max_tx_qlen;
2298         data[1] = lp->lstats.tx_ints;
2299         data[2] = lp->lstats.rx_ints;
2300         data[3] = lp->lstats.tx_underrun;
2301 }
2302
2303 static struct {
2304         const char str[ETH_GSTRING_LEN];
2305 } ethtool_stats_keys[] = {
2306         { "max_tx_qlen" },
2307         { "tx_ints" },
2308         { "rx_ints" },
2309         { "tx_underrun" },
2310 };
2311
2312 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2313 {
2314         memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2315 }
2316
2317 static const struct ethtool_ops tc35815_ethtool_ops = {
2318         .get_drvinfo            = tc35815_get_drvinfo,
2319         .get_settings           = tc35815_get_settings,
2320         .set_settings           = tc35815_set_settings,
2321         .get_link               = ethtool_op_get_link,
2322         .get_msglevel           = tc35815_get_msglevel,
2323         .set_msglevel           = tc35815_set_msglevel,
2324         .get_strings            = tc35815_get_strings,
2325         .get_sset_count         = tc35815_get_sset_count,
2326         .get_ethtool_stats      = tc35815_get_ethtool_stats,
2327 };
2328
2329 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2330 {
2331         struct tc35815_local *lp = netdev_priv(dev);
2332
2333         if (!netif_running(dev))
2334                 return -EINVAL;
2335         if (!lp->phy_dev)
2336                 return -ENODEV;
2337         return phy_mii_ioctl(lp->phy_dev, if_mii(rq), cmd);
2338 }
2339
2340 static void tc35815_chip_reset(struct net_device *dev)
2341 {
2342         struct tc35815_regs __iomem *tr =
2343                 (struct tc35815_regs __iomem *)dev->base_addr;
2344         int i;
2345         /* reset the controller */
2346         tc_writel(MAC_Reset, &tr->MAC_Ctl);
2347         udelay(4); /* 3200ns */
2348         i = 0;
2349         while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2350                 if (i++ > 100) {
2351                         printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2352                         break;
2353                 }
2354                 mdelay(1);
2355         }
2356         tc_writel(0, &tr->MAC_Ctl);
2357
2358         /* initialize registers to default value */
2359         tc_writel(0, &tr->DMA_Ctl);
2360         tc_writel(0, &tr->TxThrsh);
2361         tc_writel(0, &tr->TxPollCtr);
2362         tc_writel(0, &tr->RxFragSize);
2363         tc_writel(0, &tr->Int_En);
2364         tc_writel(0, &tr->FDA_Bas);
2365         tc_writel(0, &tr->FDA_Lim);
2366         tc_writel(0xffffffff, &tr->Int_Src);    /* Write 1 to clear */
2367         tc_writel(0, &tr->CAM_Ctl);
2368         tc_writel(0, &tr->Tx_Ctl);
2369         tc_writel(0, &tr->Rx_Ctl);
2370         tc_writel(0, &tr->CAM_Ena);
2371         (void)tc_readl(&tr->Miss_Cnt);  /* Read to clear */
2372
2373         /* initialize internal SRAM */
2374         tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2375         for (i = 0; i < 0x1000; i += 4) {
2376                 tc_writel(i, &tr->CAM_Adr);
2377                 tc_writel(0, &tr->CAM_Data);
2378         }
2379         tc_writel(0, &tr->DMA_Ctl);
2380 }
2381
2382 static void tc35815_chip_init(struct net_device *dev)
2383 {
2384         struct tc35815_local *lp = netdev_priv(dev);
2385         struct tc35815_regs __iomem *tr =
2386                 (struct tc35815_regs __iomem *)dev->base_addr;
2387         unsigned long txctl = TX_CTL_CMD;
2388
2389         /* load station address to CAM */
2390         tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2391
2392         /* Enable CAM (broadcast and unicast) */
2393         tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2394         tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2395
2396         /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2397         if (HAVE_DMA_RXALIGN(lp))
2398                 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2399         else
2400                 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2401 #ifdef TC35815_USE_PACKEDBUFFER
2402         tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize);   /* Packing */
2403 #endif
2404         tc_writel(0, &tr->TxPollCtr);   /* Batch mode */
2405         tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2406         tc_writel(INT_EN_CMD, &tr->Int_En);
2407
2408         /* set queues */
2409         tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2410         tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2411                   &tr->FDA_Lim);
2412         /*
2413          * Activation method:
2414          * First, enable the MAC Transmitter and the DMA Receive circuits.
2415          * Then enable the DMA Transmitter and the MAC Receive circuits.
2416          */
2417         tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr);      /* start DMA receiver */
2418         tc_writel(RX_CTL_CMD, &tr->Rx_Ctl);     /* start MAC receiver */
2419
2420         /* start MAC transmitter */
2421 #ifndef NO_CHECK_CARRIER
2422         /* TX4939 does not have EnLCarr */
2423         if (lp->chiptype == TC35815_TX4939)
2424                 txctl &= ~Tx_EnLCarr;
2425 #ifdef WORKAROUND_LOSTCAR
2426         /* WORKAROUND: ignore LostCrS in full duplex operation */
2427         if (!lp->phy_dev || !lp->link || lp->duplex == DUPLEX_FULL)
2428                 txctl &= ~Tx_EnLCarr;
2429 #endif
2430 #endif /* !NO_CHECK_CARRIER */
2431 #ifdef GATHER_TXINT
2432         txctl &= ~Tx_EnComp;    /* disable global tx completion int. */
2433 #endif
2434         tc_writel(txctl, &tr->Tx_Ctl);
2435 }
2436
2437 #ifdef CONFIG_PM
2438 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2439 {
2440         struct net_device *dev = pci_get_drvdata(pdev);
2441         struct tc35815_local *lp = netdev_priv(dev);
2442         unsigned long flags;
2443
2444         pci_save_state(pdev);
2445         if (!netif_running(dev))
2446                 return 0;
2447         netif_device_detach(dev);
2448         if (lp->phy_dev)
2449                 phy_stop(lp->phy_dev);
2450         spin_lock_irqsave(&lp->lock, flags);
2451         tc35815_chip_reset(dev);
2452         spin_unlock_irqrestore(&lp->lock, flags);
2453         pci_set_power_state(pdev, PCI_D3hot);
2454         return 0;
2455 }
2456
2457 static int tc35815_resume(struct pci_dev *pdev)
2458 {
2459         struct net_device *dev = pci_get_drvdata(pdev);
2460         struct tc35815_local *lp = netdev_priv(dev);
2461
2462         pci_restore_state(pdev);
2463         if (!netif_running(dev))
2464                 return 0;
2465         pci_set_power_state(pdev, PCI_D0);
2466         tc35815_restart(dev);
2467         netif_carrier_off(dev);
2468         if (lp->phy_dev)
2469                 phy_start(lp->phy_dev);
2470         netif_device_attach(dev);
2471         return 0;
2472 }
2473 #endif /* CONFIG_PM */
2474
2475 static struct pci_driver tc35815_pci_driver = {
2476         .name           = MODNAME,
2477         .id_table       = tc35815_pci_tbl,
2478         .probe          = tc35815_init_one,
2479         .remove         = __devexit_p(tc35815_remove_one),
2480 #ifdef CONFIG_PM
2481         .suspend        = tc35815_suspend,
2482         .resume         = tc35815_resume,
2483 #endif
2484 };
2485
2486 module_param_named(speed, options.speed, int, 0);
2487 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2488 module_param_named(duplex, options.duplex, int, 0);
2489 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2490
2491 static int __init tc35815_init_module(void)
2492 {
2493         return pci_register_driver(&tc35815_pci_driver);
2494 }
2495
2496 static void __exit tc35815_cleanup_module(void)
2497 {
2498         pci_unregister_driver(&tc35815_pci_driver);
2499 }
2500
2501 module_init(tc35815_init_module);
2502 module_exit(tc35815_cleanup_module);
2503
2504 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2505 MODULE_LICENSE("GPL");