2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
4 * Written 2000 by Adam Fritzler
6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference.
9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 Ringnode MC16
11 * - Madge Smart 16/4 Ringnode MC32 (??)
16 * Modification History:
17 * 16-Jan-00 AF Created
20 static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
22 #include <linux/module.h>
23 #include <linux/mca.h>
24 #include <linux/slab.h>
25 #include <linux/kernel.h>
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/netdevice.h>
29 #include <linux/trdevice.h>
31 #include <asm/system.h>
36 #include "madgemc.h" /* Madge-specific constants */
38 #define MADGEMC_IO_EXTENT 32
39 #define MADGEMC_SIF_OFFSET 0x08
43 * These are read from the BIA ROM.
46 unsigned int cardtype;
51 * These are read from the MCA POS registers.
53 unsigned int burstmode:2;
54 unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */
55 unsigned int arblevel:4;
56 unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
57 unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */
60 static int madgemc_open(struct net_device *dev);
61 static int madgemc_close(struct net_device *dev);
62 static int madgemc_chipset_init(struct net_device *dev);
63 static void madgemc_read_rom(struct net_device *dev, struct card_info *card);
64 static unsigned short madgemc_setnselout_pins(struct net_device *dev);
65 static void madgemc_setcabletype(struct net_device *dev, int type);
67 static int madgemc_mcaproc(char *buf, int slot, void *d);
69 static void madgemc_setregpage(struct net_device *dev, int page);
70 static void madgemc_setsifsel(struct net_device *dev, int val);
71 static void madgemc_setint(struct net_device *dev, int val);
73 static irqreturn_t madgemc_interrupt(int irq, void *dev_id);
76 * These work around paging, however they don't guarentee you're on the
79 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
80 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
81 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
82 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
85 * Read a byte-length value from the register.
87 static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg)
93 madgemc_setregpage(dev, 1);
95 madgemc_setregpage(dev, 0);
101 * Write a byte-length value to a register.
103 static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
108 madgemc_setregpage(dev, 1);
110 madgemc_setregpage(dev, 0);
116 * Read a word-length value from a register
118 static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg)
124 madgemc_setregpage(dev, 1);
126 madgemc_setregpage(dev, 0);
132 * Write a word-length value to a register.
134 static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
139 madgemc_setregpage(dev, 1);
141 madgemc_setregpage(dev, 0);
146 static struct net_device_ops madgemc_netdev_ops __read_mostly;
148 static int __devinit madgemc_probe(struct device *device)
150 static int versionprinted;
151 struct net_device *dev;
152 struct net_local *tp;
153 struct card_info *card;
154 struct mca_device *mdev = to_mca_device(device);
157 if (versionprinted++ == 0)
158 printk("%s", version);
160 if(mca_device_claimed(mdev))
162 mca_device_set_claim(mdev, 1);
164 dev = alloc_trdev(sizeof(struct net_local));
166 printk("madgemc: unable to allocate dev space\n");
167 mca_device_set_claim(mdev, 0);
172 dev->netdev_ops = &madgemc_netdev_ops;
174 card = kmalloc(sizeof(struct card_info), GFP_KERNEL);
176 printk("madgemc: unable to allocate card struct\n");
182 * Parse configuration information. This all comes
183 * directly from the publicly available @002d.ADF.
184 * Get it from Madge or your local ADF library.
190 dev->base_addr = 0x0a20 +
191 ((mdev->pos[2] & MC16_POS2_ADDR2)?0x0400:0) +
192 ((mdev->pos[0] & MC16_POS0_ADDR1)?0x1000:0) +
193 ((mdev->pos[3] & MC16_POS3_ADDR3)?0x2000:0);
198 switch(mdev->pos[0] >> 6) { /* upper two bits */
199 case 0x1: dev->irq = 3; break;
200 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */
201 case 0x3: dev->irq = 10; break;
202 default: dev->irq = 0; break;
206 printk("%s: invalid IRQ\n", dev->name);
211 if (!request_region(dev->base_addr, MADGEMC_IO_EXTENT,
213 printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev->slot, dev->base_addr);
214 dev->base_addr += MADGEMC_SIF_OFFSET;
218 dev->base_addr += MADGEMC_SIF_OFFSET;
223 card->arblevel = ((mdev->pos[0] >> 1) & 0x7) + 8;
226 * Burst mode and Fairness
228 card->burstmode = ((mdev->pos[2] >> 6) & 0x3);
229 card->fairness = ((mdev->pos[2] >> 4) & 0x1);
234 if ((mdev->pos[1] >> 2)&0x1)
235 card->ringspeed = 2; /* not selected */
236 else if ((mdev->pos[2] >> 5) & 0x1)
237 card->ringspeed = 1; /* 16Mb */
239 card->ringspeed = 0; /* 4Mb */
244 if ((mdev->pos[1] >> 6)&0x1)
245 card->cabletype = 1; /* STP/DB9 */
247 card->cabletype = 0; /* UTP/RJ-45 */
251 * ROM Info. This requires us to actually twiddle
252 * bits on the card, so we must ensure above that
253 * the base address is free of conflict (request_region above).
255 madgemc_read_rom(dev, card);
257 if (card->manid != 0x4d) { /* something went wrong */
258 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid);
262 if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) {
263 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype);
268 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
269 if ((card->cardtype == 0x08) && (card->cardrev <= 0x01))
274 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
276 (card->cardtype == 0x08)?MADGEMC16_CARDNAME:
277 MADGEMC32_CARDNAME, card->cardrev,
278 dev->base_addr, dev->irq);
280 if (card->cardtype == 0x0d)
281 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev->name);
283 if (card->ringspeed==2) { /* Unknown */
284 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name);
285 card->ringspeed = 1; /* default to 16mb */
288 printk("%s: RAM Size: %dKB\n", dev->name, card->ramsize);
290 printk("%s: Ring Speed: %dMb/sec on %s\n", dev->name,
291 (card->ringspeed)?16:4,
292 card->cabletype?"STP/DB9":"UTP/RJ-45");
293 printk("%s: Arbitration Level: %d\n", dev->name,
296 printk("%s: Burst Mode: ", dev->name);
297 switch(card->burstmode) {
298 case 0: printk("Cycle steal"); break;
299 case 1: printk("Limited burst"); break;
300 case 2: printk("Delayed release"); break;
301 case 3: printk("Immediate release"); break;
303 printk(" (%s)\n", (card->fairness)?"Unfair":"Fair");
307 * Enable SIF before we assign the interrupt handler,
308 * just in case we get spurious interrupts that need
311 outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */
312 madgemc_setsifsel(dev, 1);
313 if (request_irq(dev->irq, madgemc_interrupt, IRQF_SHARED,
319 madgemc_chipset_init(dev); /* enables interrupts! */
320 madgemc_setcabletype(dev, card->cabletype);
322 /* Setup MCA structures */
323 mca_device_set_name(mdev, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME);
324 mca_set_adapter_procfn(mdev->slot, madgemc_mcaproc, dev);
326 printk("%s: Ring Station Address: %pM\n",
327 dev->name, dev->dev_addr);
329 if (tmsdev_init(dev, device)) {
330 printk("%s: unable to get memory for dev->priv.\n",
335 tp = netdev_priv(dev);
338 * The MC16 is physically a 32bit card. However, Madge
339 * insists on calling it 16bit, so I'll assume here that
340 * they know what they're talking about. Cut off DMA
343 tp->setnselout = madgemc_setnselout_pins;
344 tp->sifwriteb = madgemc_sifwriteb;
345 tp->sifreadb = madgemc_sifreadb;
346 tp->sifwritew = madgemc_sifwritew;
347 tp->sifreadw = madgemc_sifreadw;
348 tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4;
350 memcpy(tp->ProductID, "Madge MCA 16/4 ", PROD_ID_SIZE + 1);
353 dev_set_drvdata(device, dev);
355 if (register_netdev(dev) == 0)
358 dev_set_drvdata(device, NULL);
361 free_irq(dev->irq, dev);
363 release_region(dev->base_addr-MADGEMC_SIF_OFFSET,
370 mca_device_set_claim(mdev, 0);
375 * Handle interrupts generated by the card
377 * The MicroChannel Madge cards need slightly more handling
378 * after an interrupt than other TMS380 cards do.
380 * First we must make sure it was this card that generated the
381 * interrupt (since interrupt sharing is allowed). Then,
382 * because we're using level-triggered interrupts (as is
383 * standard on MCA), we must toggle the interrupt line
384 * on the card in order to claim and acknowledge the interrupt.
385 * Once that is done, the interrupt should be handlable in
386 * the normal tms380tr_interrupt() routine.
388 * There's two ways we can check to see if the interrupt is ours,
389 * both with their own disadvantages...
391 * 1) Read in the SIFSTS register from the TMS controller. This
392 * is guarenteed to be accurate, however, there's a fairly
393 * large performance penalty for doing so: the Madge chips
394 * must request the register from the Eagle, the Eagle must
395 * read them from its internal bus, and then take the route
396 * back out again, for a 16bit read.
398 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
399 * The major disadvantage here is that the accuracy of the
400 * bit is in question. However, it cuts out the extra read
401 * cycles it takes to read the Eagle's SIF, as its only an
402 * 8bit read, and theoretically the Madge bit is directly
403 * connected to the interrupt latch coming out of the Eagle
404 * hardware (that statement is not verified).
406 * I can't determine which of these methods has the best win. For now,
407 * we make a compromise. Use the Madge way for the first interrupt,
408 * which should be the fast-path, and then once we hit the first
409 * interrupt, keep on trying using the SIF method until we've
410 * exhausted all contiguous interrupts.
413 static irqreturn_t madgemc_interrupt(int irq, void *dev_id)
416 struct net_device *dev;
419 printk("madgemc_interrupt: was not passed a dev_id!\n");
423 dev = (struct net_device *)dev_id;
425 /* Make sure its really us. -- the Madge way */
426 pending = inb(dev->base_addr + MC_CONTROL_REG0);
427 if (!(pending & MC_CONTROL_REG0_SINTR))
428 return IRQ_NONE; /* not our interrupt */
431 * Since we're level-triggered, we may miss the rising edge
432 * of the next interrupt while we're off handling this one,
433 * so keep checking until the SIF verifies that it has nothing
436 pending = STS_SYSTEM_IRQ;
438 if (pending & STS_SYSTEM_IRQ) {
440 /* Toggle the interrupt to reset the latch on card */
441 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
442 outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
443 dev->base_addr + MC_CONTROL_REG1);
444 outb(reg1, dev->base_addr + MC_CONTROL_REG1);
446 /* Continue handling as normal */
447 tms380tr_interrupt(irq, dev_id);
449 pending = SIFREADW(SIFSTS); /* restart - the SIF way */
455 return IRQ_HANDLED; /* not reachable */
459 * Set the card to the prefered ring speed.
461 * Unlike newer cards, the MC16/32 have their speed selection
462 * circuit connected to the Madge ASICs and not to the TMS380
463 * NSELOUT pins. Set the ASIC bits correctly here, and return
464 * zero to leave the TMS NSELOUT bits unaffected.
467 static unsigned short madgemc_setnselout_pins(struct net_device *dev)
470 struct net_local *tp = netdev_priv(dev);
472 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
474 if(tp->DataRate == SPEED_16)
475 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */
476 else if (reg1 & MC_CONTROL_REG1_SPEED_SEL)
477 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */
478 outb(reg1, dev->base_addr + MC_CONTROL_REG1);
480 return 0; /* no change */
484 * Set the register page. This equates to the SRSX line
487 * Register selection is normally done via three contiguous
488 * bits. However, some boards (such as the MC16/32) use only
489 * two bits, plus a separate bit in the glue chip. This
490 * sets the SRSX bit (the top bit). See page 4-17 in the
491 * Yellow Book for which registers are affected.
494 static void madgemc_setregpage(struct net_device *dev, int page)
498 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
499 if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) {
500 outb(reg1 ^ MC_CONTROL_REG1_SRSX,
501 dev->base_addr + MC_CONTROL_REG1);
503 else if (page == 1) {
504 outb(reg1 | MC_CONTROL_REG1_SRSX,
505 dev->base_addr + MC_CONTROL_REG1);
507 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
513 * The SIF registers are not mapped into register space by default
514 * Set this to 1 to map them, 0 to map the BIA ROM.
517 static void madgemc_setsifsel(struct net_device *dev, int val)
521 reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
522 if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) {
523 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL,
524 dev->base_addr + MC_CONTROL_REG0);
525 } else if (val == 1) {
526 outb(reg0 | MC_CONTROL_REG0_SIFSEL,
527 dev->base_addr + MC_CONTROL_REG0);
529 reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
535 * Enable SIF interrupts
537 * This does not enable interrupts in the SIF, but rather
538 * enables SIF interrupts to be passed onto the host.
541 static void madgemc_setint(struct net_device *dev, int val)
545 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
546 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) {
547 outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
548 dev->base_addr + MC_CONTROL_REG1);
549 } else if (val == 1) {
550 outb(reg1 | MC_CONTROL_REG1_SINTEN,
551 dev->base_addr + MC_CONTROL_REG1);
558 * Cable type is set via control register 7. Bit zero high
559 * for UTP, low for STP.
561 static void madgemc_setcabletype(struct net_device *dev, int type)
563 outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP,
564 dev->base_addr + MC_CONTROL_REG7);
568 * Enable the functions of the Madge chipset needed for
569 * full working order.
571 static int madgemc_chipset_init(struct net_device *dev)
573 outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */
574 tms380tr_wait(100); /* wait for card to reset */
576 /* bring back into normal operating mode */
577 outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1);
579 /* map SIF registers */
580 madgemc_setsifsel(dev, 1);
582 /* enable SIF interrupts */
583 madgemc_setint(dev, 1);
589 * Disable the board, and put back into power-up state.
591 static void madgemc_chipset_close(struct net_device *dev)
593 /* disable interrupts */
594 madgemc_setint(dev, 0);
595 /* unmap SIF registers */
596 madgemc_setsifsel(dev, 0);
602 * Read the card type (MC16 or MC32) from the card.
604 * The configuration registers are stored in two separate
605 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
606 * for page zero, or setting bit 3 for page one.
608 * Page zero contains the following data:
609 * Byte 0: Manufacturer ID (0x4D -- ASCII "M")
613 * Byte 2: Card revision
614 * Byte 3: Mirror of POS config register 0
615 * Byte 4: Mirror of POS 1
616 * Byte 5: Mirror of POS 2
618 * Page one contains the following data:
620 * Byte 1-6: BIA, MSB to LSB.
622 * Note that to read the BIA, we must unmap the SIF registers
623 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
624 * will reside in the same logical location. For this reason,
625 * _never_ read the BIA while the Eagle processor is running!
626 * The SIF will be completely inaccessible until the BIA operation
630 static void madgemc_read_rom(struct net_device *dev, struct card_info *card)
632 unsigned long ioaddr;
633 unsigned char reg0, reg1, tmpreg0, i;
635 ioaddr = dev->base_addr;
637 reg0 = inb(ioaddr + MC_CONTROL_REG0);
638 reg1 = inb(ioaddr + MC_CONTROL_REG1);
640 /* Switch to page zero and unmap SIF */
641 tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL);
642 outb(tmpreg0, ioaddr + MC_CONTROL_REG0);
644 card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID);
645 card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID);
646 card->cardrev = inb(ioaddr + MC_ROM_REVISION);
648 /* Switch to rom page one */
649 outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0);
653 for (i = 0; i < 6; i++)
654 dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i);
656 /* Restore original register values */
657 outb(reg0, ioaddr + MC_CONTROL_REG0);
658 outb(reg1, ioaddr + MC_CONTROL_REG1);
663 static int madgemc_open(struct net_device *dev)
666 * Go ahead and reinitialize the chipset again, just to
667 * make sure we didn't get left in a bad state.
669 madgemc_chipset_init(dev);
674 static int madgemc_close(struct net_device *dev)
677 madgemc_chipset_close(dev);
682 * Give some details available from /proc/mca/slotX
684 static int madgemc_mcaproc(char *buf, int slot, void *d)
686 struct net_device *dev = (struct net_device *)d;
687 struct net_local *tp = netdev_priv(dev);
688 struct card_info *curcard = tp->tmspriv;
691 len += sprintf(buf+len, "-------\n");
693 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev);
694 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize);
695 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45");
696 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4);
697 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4);
698 len += sprintf(buf+len, "Device: %s\n", dev->name);
699 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr);
700 len += sprintf(buf+len, "IRQ: %d\n", dev->irq);
701 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel);
702 len += sprintf(buf+len, "Burst Mode: ");
703 switch(curcard->burstmode) {
704 case 0: len += sprintf(buf+len, "Cycle steal"); break;
705 case 1: len += sprintf(buf+len, "Limited burst"); break;
706 case 2: len += sprintf(buf+len, "Delayed release"); break;
707 case 3: len += sprintf(buf+len, "Immediate release"); break;
709 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair");
711 len += sprintf(buf+len, "Ring Station Address: %pM\n",
714 len += sprintf(buf+len, "Card not configured\n");
719 static int __devexit madgemc_remove(struct device *device)
721 struct net_device *dev = dev_get_drvdata(device);
722 struct net_local *tp;
723 struct card_info *card;
727 tp = netdev_priv(dev);
732 unregister_netdev(dev);
733 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT);
734 free_irq(dev->irq, dev);
737 dev_set_drvdata(device, NULL);
742 static short madgemc_adapter_ids[] __initdata = {
747 static struct mca_driver madgemc_driver = {
748 .id_table = madgemc_adapter_ids,
751 .bus = &mca_bus_type,
752 .probe = madgemc_probe,
753 .remove = __devexit_p(madgemc_remove),
757 static int __init madgemc_init (void)
759 madgemc_netdev_ops = tms380tr_netdev_ops;
760 madgemc_netdev_ops.ndo_open = madgemc_open;
761 madgemc_netdev_ops.ndo_stop = madgemc_close;
763 return mca_register_driver (&madgemc_driver);
766 static void __exit madgemc_exit (void)
768 mca_unregister_driver (&madgemc_driver);
771 module_init(madgemc_init);
772 module_exit(madgemc_exit);
774 MODULE_LICENSE("GPL");