1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux.
3 Copyright 2000,2001 The Linux Kernel Team
4 Written/copyright 1994-2001 by Donald Becker.
6 This software may be used and distributed according to the terms
7 of the GNU General Public License, incorporated herein by reference.
9 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
10 for more information on this driver.
12 Please submit bugs to http://bugzilla.kernel.org/ .
15 #define pr_fmt(fmt) "tulip: " fmt
17 #define DRV_NAME "tulip"
18 #ifdef CONFIG_TULIP_NAPI
19 #define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */
21 #define DRV_VERSION "1.1.15"
23 #define DRV_RELDATE "Feb 27, 2007"
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
30 #include <linux/init.h>
31 #include <linux/etherdevice.h>
32 #include <linux/delay.h>
33 #include <linux/mii.h>
34 #include <linux/crc32.h>
35 #include <asm/unaligned.h>
36 #include <asm/uaccess.h>
42 static char version[] __devinitdata =
43 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
45 /* A few user-configurable values. */
47 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
48 static unsigned int max_interrupt_work = 25;
51 /* Used to pass the full-duplex flag, etc. */
52 static int full_duplex[MAX_UNITS];
53 static int options[MAX_UNITS];
54 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
56 /* The possible media types that can be set in options[] are: */
57 const char * const medianame[32] = {
58 "10baseT", "10base2", "AUI", "100baseTx",
59 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
60 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
61 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
62 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
63 "","","","", "","","","", "","","","Transceiver reset",
66 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
67 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) || \
68 defined(CONFIG_SPARC) || defined(__ia64__) || \
69 defined(__sh__) || defined(__mips__)
70 static int rx_copybreak = 1518;
72 static int rx_copybreak = 100;
76 Set the bus performance register.
77 Typical: Set 16 longword cache alignment, no burst limit.
78 Cache alignment bits 15:14 Burst length 13:8
79 0000 No alignment 0x00000000 unlimited 0800 8 longwords
80 4000 8 longwords 0100 1 longword 1000 16 longwords
81 8000 16 longwords 0200 2 longwords 2000 32 longwords
82 C000 32 longwords 0400 4 longwords
83 Warning: many older 486 systems are broken and require setting 0x00A04800
84 8 longword cache alignment, 8 longword burst.
85 ToDo: Non-Intel setting could be better.
88 #if defined(__alpha__) || defined(__ia64__)
89 static int csr0 = 0x01A00000 | 0xE000;
90 #elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
91 static int csr0 = 0x01A00000 | 0x8000;
92 #elif defined(CONFIG_SPARC) || defined(__hppa__)
93 /* The UltraSparc PCI controllers will disconnect at every 64-byte
94 * crossing anyways so it makes no sense to tell Tulip to burst
97 static int csr0 = 0x01A00000 | 0x9000;
98 #elif defined(__arm__) || defined(__sh__)
99 static int csr0 = 0x01A00000 | 0x4800;
100 #elif defined(__mips__)
101 static int csr0 = 0x00200000 | 0x4000;
103 #warning Processor architecture undefined!
104 static int csr0 = 0x00A00000 | 0x4800;
107 /* Operational parameters that usually are not changed. */
108 /* Time in jiffies before concluding the transmitter is hung. */
109 #define TX_TIMEOUT (4*HZ)
112 MODULE_AUTHOR("The Linux Kernel Team");
113 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
114 MODULE_LICENSE("GPL");
115 MODULE_VERSION(DRV_VERSION);
116 module_param(tulip_debug, int, 0);
117 module_param(max_interrupt_work, int, 0);
118 module_param(rx_copybreak, int, 0);
119 module_param(csr0, int, 0);
120 module_param_array(options, int, NULL, 0);
121 module_param_array(full_duplex, int, NULL, 0);
124 int tulip_debug = TULIP_DEBUG;
129 static void tulip_timer(unsigned long data)
131 struct net_device *dev = (struct net_device *)data;
132 struct tulip_private *tp = netdev_priv(dev);
134 if (netif_running(dev))
135 schedule_work(&tp->media_work);
139 * This table use during operation for capabilities and media timer.
141 * It is indexed via the values in 'enum chips'
144 struct tulip_chip_table tulip_tbl[] = {
145 { }, /* placeholder for array, slot unused currently */
146 { }, /* placeholder for array, slot unused currently */
149 { "Digital DS21140 Tulip", 128, 0x0001ebef,
150 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer,
153 /* DC21142, DC21143 */
154 { "Digital DS21142/43 Tulip", 128, 0x0801fbff,
155 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
156 | HAS_INTR_MITIGATION | HAS_PCI_MWI, tulip_timer, t21142_media_task },
159 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
160 HAS_MII | HAS_PNICNWAY, pnic_timer, },
163 { "Macronix 98713 PMAC", 128, 0x0001ebef,
164 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
167 { "Macronix 98715 PMAC", 256, 0x0001ebef,
168 HAS_MEDIA_TABLE, mxic_timer, },
171 { "Macronix 98725 PMAC", 256, 0x0001ebef,
172 HAS_MEDIA_TABLE, mxic_timer, },
175 { "ASIX AX88140", 128, 0x0001fbff,
176 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
177 | IS_ASIX, tulip_timer, tulip_media_task },
180 { "Lite-On PNIC-II", 256, 0x0801fbff,
181 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer, },
184 { "ADMtek Comet", 256, 0x0001abef,
185 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer, },
188 { "Compex 9881 PMAC", 128, 0x0001ebef,
189 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
192 { "Intel DS21145 Tulip", 128, 0x0801fbff,
193 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
194 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
197 #ifdef CONFIG_TULIP_DM910X
198 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
199 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
200 tulip_timer, tulip_media_task },
206 { "Conexant LANfinity", 256, 0x0001ebef,
207 HAS_MII | HAS_ACPI, tulip_timer, tulip_media_task },
212 static DEFINE_PCI_DEVICE_TABLE(tulip_pci_tbl) = {
213 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
214 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
215 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
216 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
217 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
218 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
219 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
220 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
221 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
230 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
232 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
233 #ifdef CONFIG_TULIP_DM910X
234 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
235 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
237 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
238 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
239 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
240 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
241 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
242 { 0x1186, 0x1591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
243 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
244 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
245 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
246 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
247 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
248 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
249 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
250 { 0x1414, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Microsoft MN-120 */
251 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
252 { } /* terminate list */
254 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
257 /* A full-duplex map for media types. */
258 const char tulip_media_cap[32] =
259 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
261 static void tulip_tx_timeout(struct net_device *dev);
262 static void tulip_init_ring(struct net_device *dev);
263 static void tulip_free_ring(struct net_device *dev);
264 static netdev_tx_t tulip_start_xmit(struct sk_buff *skb,
265 struct net_device *dev);
266 static int tulip_open(struct net_device *dev);
267 static int tulip_close(struct net_device *dev);
268 static void tulip_up(struct net_device *dev);
269 static void tulip_down(struct net_device *dev);
270 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
271 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
272 static void set_rx_mode(struct net_device *dev);
273 static void tulip_set_wolopts(struct pci_dev *pdev, u32 wolopts);
274 #ifdef CONFIG_NET_POLL_CONTROLLER
275 static void poll_tulip(struct net_device *dev);
278 static void tulip_set_power_state (struct tulip_private *tp,
279 int sleep, int snooze)
281 if (tp->flags & HAS_ACPI) {
283 pci_read_config_dword (tp->pdev, CFDD, &tmp);
284 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
286 newtmp |= CFDD_Sleep;
288 newtmp |= CFDD_Snooze;
290 pci_write_config_dword (tp->pdev, CFDD, newtmp);
296 static void tulip_up(struct net_device *dev)
298 struct tulip_private *tp = netdev_priv(dev);
299 void __iomem *ioaddr = tp->base_addr;
300 int next_tick = 3*HZ;
304 #ifdef CONFIG_TULIP_NAPI
305 napi_enable(&tp->napi);
308 /* Wake the chip from sleep/snooze mode. */
309 tulip_set_power_state (tp, 0, 0);
311 /* Disable all WOL events */
312 pci_enable_wake(tp->pdev, PCI_D3hot, 0);
313 pci_enable_wake(tp->pdev, PCI_D3cold, 0);
314 tulip_set_wolopts(tp->pdev, 0);
316 /* On some chip revs we must set the MII/SYM port before the reset!? */
317 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
318 iowrite32(0x00040000, ioaddr + CSR6);
320 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
321 iowrite32(0x00000001, ioaddr + CSR0);
322 pci_read_config_dword(tp->pdev, PCI_COMMAND, ®); /* flush write */
326 Wait the specified 50 PCI cycles after a reset by initializing
327 Tx and Rx queues and the address filter list. */
328 iowrite32(tp->csr0, ioaddr + CSR0);
329 pci_read_config_dword(tp->pdev, PCI_COMMAND, ®); /* flush write */
333 printk(KERN_DEBUG "%s: tulip_up(), irq==%d\n",
334 dev->name, dev->irq);
336 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
337 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
338 tp->cur_rx = tp->cur_tx = 0;
339 tp->dirty_rx = tp->dirty_tx = 0;
341 if (tp->flags & MC_HASH_ONLY) {
342 u32 addr_low = get_unaligned_le32(dev->dev_addr);
343 u32 addr_high = get_unaligned_le16(dev->dev_addr + 4);
344 if (tp->chip_id == AX88140) {
345 iowrite32(0, ioaddr + CSR13);
346 iowrite32(addr_low, ioaddr + CSR14);
347 iowrite32(1, ioaddr + CSR13);
348 iowrite32(addr_high, ioaddr + CSR14);
349 } else if (tp->flags & COMET_MAC_ADDR) {
350 iowrite32(addr_low, ioaddr + 0xA4);
351 iowrite32(addr_high, ioaddr + 0xA8);
352 iowrite32(0, ioaddr + CSR27);
353 iowrite32(0, ioaddr + CSR28);
356 /* This is set_rx_mode(), but without starting the transmitter. */
357 u16 *eaddrs = (u16 *)dev->dev_addr;
358 u16 *setup_frm = &tp->setup_frame[15*6];
361 /* 21140 bug: you must add the broadcast address. */
362 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
363 /* Fill the final entry of the table with our physical address. */
364 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
365 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
366 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
368 mapping = pci_map_single(tp->pdev, tp->setup_frame,
369 sizeof(tp->setup_frame),
371 tp->tx_buffers[tp->cur_tx].skb = NULL;
372 tp->tx_buffers[tp->cur_tx].mapping = mapping;
374 /* Put the setup frame on the Tx list. */
375 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
376 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
377 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
382 tp->saved_if_port = dev->if_port;
383 if (dev->if_port == 0)
384 dev->if_port = tp->default_port;
386 /* Allow selecting a default media. */
388 if (tp->mtable == NULL)
391 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
392 (dev->if_port == 12 ? 0 : dev->if_port);
393 for (i = 0; i < tp->mtable->leafcount; i++)
394 if (tp->mtable->mleaf[i].media == looking_for) {
396 "Using user-specified media %s\n",
397 medianame[dev->if_port]);
401 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
402 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
403 for (i = 0; i < tp->mtable->leafcount; i++)
404 if (tp->mtable->mleaf[i].media == looking_for) {
406 "Using EEPROM-set media %s\n",
407 medianame[looking_for]);
411 /* Start sensing first non-full-duplex media. */
412 for (i = tp->mtable->leafcount - 1;
413 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
422 if (tp->chip_id == DC21143 &&
423 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
424 /* We must reset the media CSRs when we force-select MII mode. */
425 iowrite32(0x0000, ioaddr + CSR13);
426 iowrite32(0x0000, ioaddr + CSR14);
427 iowrite32(0x0008, ioaddr + CSR15);
429 tulip_select_media(dev, 1);
430 } else if (tp->chip_id == DC21142) {
432 tulip_select_media(dev, 1);
435 "Using MII transceiver %d, status %04x\n",
437 tulip_mdio_read(dev, tp->phys[0], 1));
438 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
439 tp->csr6 = csr6_mask_hdcap;
441 iowrite32(0x0000, ioaddr + CSR13);
442 iowrite32(0x0000, ioaddr + CSR14);
444 t21142_start_nway(dev);
445 } else if (tp->chip_id == PNIC2) {
446 /* for initial startup advertise 10/100 Full and Half */
447 tp->sym_advertise = 0x01E0;
448 /* enable autonegotiate end interrupt */
449 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
450 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
451 pnic2_start_nway(dev);
452 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
455 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
456 iowrite32(0x0001, ioaddr + CSR15);
457 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
460 /* Start with 10mbps to do autonegotiation. */
461 iowrite32(0x32, ioaddr + CSR12);
462 tp->csr6 = 0x00420000;
463 iowrite32(0x0001B078, ioaddr + 0xB8);
464 iowrite32(0x0201B078, ioaddr + 0xB8);
467 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881) &&
470 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
471 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
472 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
473 /* Provided by BOLO, Macronix - 12/10/1998. */
475 tp->csr6 = 0x01a80200;
476 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
477 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
478 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
479 /* Enable automatic Tx underrun recovery. */
480 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
481 dev->if_port = tp->mii_cnt ? 11 : 0;
482 tp->csr6 = 0x00040000;
483 } else if (tp->chip_id == AX88140) {
484 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
486 tulip_select_media(dev, 1);
488 /* Start the chip's Tx to process setup frame. */
492 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
494 /* Enable interrupts by setting the interrupt mask. */
495 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
496 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
497 tulip_start_rxtx(tp);
498 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
500 if (tulip_debug > 2) {
501 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %08x, CSR5 %08x CSR6 %08x\n",
502 dev->name, ioread32(ioaddr + CSR0),
503 ioread32(ioaddr + CSR5),
504 ioread32(ioaddr + CSR6));
507 /* Set the timer to switch to check for link beat and perhaps switch
508 to an alternate media type. */
509 tp->timer.expires = RUN_AT(next_tick);
510 add_timer(&tp->timer);
511 #ifdef CONFIG_TULIP_NAPI
512 init_timer(&tp->oom_timer);
513 tp->oom_timer.data = (unsigned long)dev;
514 tp->oom_timer.function = oom_timer;
519 tulip_open(struct net_device *dev)
523 tulip_init_ring (dev);
525 retval = request_irq(dev->irq, tulip_interrupt, IRQF_SHARED, dev->name, dev);
531 netif_start_queue (dev);
536 tulip_free_ring (dev);
541 static void tulip_tx_timeout(struct net_device *dev)
543 struct tulip_private *tp = netdev_priv(dev);
544 void __iomem *ioaddr = tp->base_addr;
547 spin_lock_irqsave (&tp->lock, flags);
549 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
550 /* Do nothing -- the media monitor should handle this. */
553 "Transmit timeout using MII device\n");
554 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142 ||
555 tp->chip_id == MX98713 || tp->chip_id == COMPEX9881 ||
556 tp->chip_id == DM910X) {
558 "21140 transmit timed out, status %08x, SIA %08x %08x %08x %08x, resetting...\n",
559 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
560 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14),
561 ioread32(ioaddr + CSR15));
562 tp->timeout_recovery = 1;
563 schedule_work(&tp->media_work);
565 } else if (tp->chip_id == PNIC2) {
567 "PNIC2 transmit timed out, status %08x, CSR6/7 %08x / %08x CSR12 %08x, resetting...\n",
568 (int)ioread32(ioaddr + CSR5),
569 (int)ioread32(ioaddr + CSR6),
570 (int)ioread32(ioaddr + CSR7),
571 (int)ioread32(ioaddr + CSR12));
574 "Transmit timed out, status %08x, CSR12 %08x, resetting...\n",
575 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
579 #if defined(way_too_many_messages)
580 if (tulip_debug > 3) {
582 for (i = 0; i < RX_RING_SIZE; i++) {
583 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
586 "%2d: %08x %08x %08x %08x %02x %02x %02x\n",
588 (unsigned int)tp->rx_ring[i].status,
589 (unsigned int)tp->rx_ring[i].length,
590 (unsigned int)tp->rx_ring[i].buffer1,
591 (unsigned int)tp->rx_ring[i].buffer2,
592 buf[0], buf[1], buf[2]);
593 for (j = 0; buf[j] != 0xee && j < 1600; j++)
595 pr_cont(" %02x", buf[j]);
596 pr_cont(" j=%d\n", j);
598 printk(KERN_DEBUG " Rx ring %p: ", tp->rx_ring);
599 for (i = 0; i < RX_RING_SIZE; i++)
600 pr_cont(" %08x", (unsigned int)tp->rx_ring[i].status);
601 printk(KERN_DEBUG " Tx ring %p: ", tp->tx_ring);
602 for (i = 0; i < TX_RING_SIZE; i++)
603 pr_cont(" %08x", (unsigned int)tp->tx_ring[i].status);
608 tulip_tx_timeout_complete(tp, ioaddr);
611 spin_unlock_irqrestore (&tp->lock, flags);
612 dev->trans_start = jiffies; /* prevent tx timeout */
613 netif_wake_queue (dev);
617 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
618 static void tulip_init_ring(struct net_device *dev)
620 struct tulip_private *tp = netdev_priv(dev);
627 for (i = 0; i < RX_RING_SIZE; i++) {
628 tp->rx_ring[i].status = 0x00000000;
629 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
630 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
631 tp->rx_buffers[i].skb = NULL;
632 tp->rx_buffers[i].mapping = 0;
634 /* Mark the last entry as wrapping the ring. */
635 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
636 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
638 for (i = 0; i < RX_RING_SIZE; i++) {
641 /* Note the receive buffer must be longword aligned.
642 dev_alloc_skb() provides 16 byte alignment. But do *not*
643 use skb_reserve() to align the IP header! */
644 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
645 tp->rx_buffers[i].skb = skb;
648 mapping = pci_map_single(tp->pdev, skb->data,
649 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
650 tp->rx_buffers[i].mapping = mapping;
651 skb->dev = dev; /* Mark as being used by this device. */
652 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
653 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
655 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
657 /* The Tx buffer descriptor is filled in as needed, but we
658 do need to clear the ownership bit. */
659 for (i = 0; i < TX_RING_SIZE; i++) {
660 tp->tx_buffers[i].skb = NULL;
661 tp->tx_buffers[i].mapping = 0;
662 tp->tx_ring[i].status = 0x00000000;
663 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
665 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
669 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
671 struct tulip_private *tp = netdev_priv(dev);
677 spin_lock_irqsave(&tp->lock, flags);
679 /* Calculate the next Tx descriptor entry. */
680 entry = tp->cur_tx % TX_RING_SIZE;
682 tp->tx_buffers[entry].skb = skb;
683 mapping = pci_map_single(tp->pdev, skb->data,
684 skb->len, PCI_DMA_TODEVICE);
685 tp->tx_buffers[entry].mapping = mapping;
686 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
688 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
689 flag = 0x60000000; /* No interrupt */
690 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
691 flag = 0xe0000000; /* Tx-done intr. */
692 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
693 flag = 0x60000000; /* No Tx-done intr. */
694 } else { /* Leave room for set_rx_mode() to fill entries. */
695 flag = 0xe0000000; /* Tx-done intr. */
696 netif_stop_queue(dev);
698 if (entry == TX_RING_SIZE-1)
699 flag = 0xe0000000 | DESC_RING_WRAP;
701 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
702 /* if we were using Transmit Automatic Polling, we would need a
704 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
709 /* Trigger an immediate transmit demand. */
710 iowrite32(0, tp->base_addr + CSR1);
712 spin_unlock_irqrestore(&tp->lock, flags);
717 static void tulip_clean_tx_ring(struct tulip_private *tp)
719 unsigned int dirty_tx;
721 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
723 int entry = dirty_tx % TX_RING_SIZE;
724 int status = le32_to_cpu(tp->tx_ring[entry].status);
727 tp->dev->stats.tx_errors++; /* It wasn't Txed */
728 tp->tx_ring[entry].status = 0;
731 /* Check for Tx filter setup frames. */
732 if (tp->tx_buffers[entry].skb == NULL) {
733 /* test because dummy frames not mapped */
734 if (tp->tx_buffers[entry].mapping)
735 pci_unmap_single(tp->pdev,
736 tp->tx_buffers[entry].mapping,
737 sizeof(tp->setup_frame),
742 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
743 tp->tx_buffers[entry].skb->len,
746 /* Free the original skb. */
747 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
748 tp->tx_buffers[entry].skb = NULL;
749 tp->tx_buffers[entry].mapping = 0;
753 static void tulip_down (struct net_device *dev)
755 struct tulip_private *tp = netdev_priv(dev);
756 void __iomem *ioaddr = tp->base_addr;
759 cancel_work_sync(&tp->media_work);
761 #ifdef CONFIG_TULIP_NAPI
762 napi_disable(&tp->napi);
765 del_timer_sync (&tp->timer);
766 #ifdef CONFIG_TULIP_NAPI
767 del_timer_sync (&tp->oom_timer);
769 spin_lock_irqsave (&tp->lock, flags);
771 /* Disable interrupts by clearing the interrupt mask. */
772 iowrite32 (0x00000000, ioaddr + CSR7);
774 /* Stop the Tx and Rx processes. */
777 /* prepare receive buffers */
778 tulip_refill_rx(dev);
780 /* release any unconsumed transmit buffers */
781 tulip_clean_tx_ring(tp);
783 if (ioread32(ioaddr + CSR6) != 0xffffffff)
784 dev->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
786 spin_unlock_irqrestore (&tp->lock, flags);
788 init_timer(&tp->timer);
789 tp->timer.data = (unsigned long)dev;
790 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
792 dev->if_port = tp->saved_if_port;
794 /* Leave the driver in snooze, not sleep, mode. */
795 tulip_set_power_state (tp, 0, 1);
798 static void tulip_free_ring (struct net_device *dev)
800 struct tulip_private *tp = netdev_priv(dev);
803 /* Free all the skbuffs in the Rx queue. */
804 for (i = 0; i < RX_RING_SIZE; i++) {
805 struct sk_buff *skb = tp->rx_buffers[i].skb;
806 dma_addr_t mapping = tp->rx_buffers[i].mapping;
808 tp->rx_buffers[i].skb = NULL;
809 tp->rx_buffers[i].mapping = 0;
811 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
812 tp->rx_ring[i].length = 0;
813 /* An invalid address. */
814 tp->rx_ring[i].buffer1 = cpu_to_le32(0xBADF00D0);
816 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
822 for (i = 0; i < TX_RING_SIZE; i++) {
823 struct sk_buff *skb = tp->tx_buffers[i].skb;
826 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
827 skb->len, PCI_DMA_TODEVICE);
830 tp->tx_buffers[i].skb = NULL;
831 tp->tx_buffers[i].mapping = 0;
835 static int tulip_close (struct net_device *dev)
837 struct tulip_private *tp = netdev_priv(dev);
838 void __iomem *ioaddr = tp->base_addr;
840 netif_stop_queue (dev);
845 dev_printk(KERN_DEBUG, &dev->dev,
846 "Shutting down ethercard, status was %02x\n",
847 ioread32 (ioaddr + CSR5));
849 free_irq (dev->irq, dev);
851 tulip_free_ring (dev);
856 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
858 struct tulip_private *tp = netdev_priv(dev);
859 void __iomem *ioaddr = tp->base_addr;
861 if (netif_running(dev)) {
864 spin_lock_irqsave (&tp->lock, flags);
866 dev->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
868 spin_unlock_irqrestore(&tp->lock, flags);
875 static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
877 struct tulip_private *np = netdev_priv(dev);
878 strcpy(info->driver, DRV_NAME);
879 strcpy(info->version, DRV_VERSION);
880 strcpy(info->bus_info, pci_name(np->pdev));
884 static int tulip_ethtool_set_wol(struct net_device *dev,
885 struct ethtool_wolinfo *wolinfo)
887 struct tulip_private *tp = netdev_priv(dev);
889 if (wolinfo->wolopts & (~tp->wolinfo.supported))
892 tp->wolinfo.wolopts = wolinfo->wolopts;
893 device_set_wakeup_enable(&tp->pdev->dev, tp->wolinfo.wolopts);
897 static void tulip_ethtool_get_wol(struct net_device *dev,
898 struct ethtool_wolinfo *wolinfo)
900 struct tulip_private *tp = netdev_priv(dev);
902 wolinfo->supported = tp->wolinfo.supported;
903 wolinfo->wolopts = tp->wolinfo.wolopts;
908 static const struct ethtool_ops ops = {
909 .get_drvinfo = tulip_get_drvinfo,
910 .set_wol = tulip_ethtool_set_wol,
911 .get_wol = tulip_ethtool_get_wol,
914 /* Provide ioctl() calls to examine the MII xcvr state. */
915 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
917 struct tulip_private *tp = netdev_priv(dev);
918 void __iomem *ioaddr = tp->base_addr;
919 struct mii_ioctl_data *data = if_mii(rq);
920 const unsigned int phy_idx = 0;
921 int phy = tp->phys[phy_idx] & 0x1f;
922 unsigned int regnum = data->reg_num;
925 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
928 else if (tp->flags & HAS_NWAY)
930 else if (tp->chip_id == COMET)
935 case SIOCGMIIREG: /* Read MII PHY register. */
936 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
937 int csr12 = ioread32 (ioaddr + CSR12);
938 int csr14 = ioread32 (ioaddr + CSR14);
941 if (((csr14<<5) & 0x1000) ||
942 (dev->if_port == 5 && tp->nwayset))
943 data->val_out = 0x1000;
945 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
946 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
951 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
952 ((csr12&0x06) == 6 ? 0 : 4);
953 data->val_out |= 0x6048;
956 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
958 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
959 ((csr14 >> 1) & 0x20) + 1;
960 data->val_out |= ((csr14 >> 9) & 0x03C0);
962 case 5: data->val_out = tp->lpar; break;
963 default: data->val_out = 0; break;
966 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
970 case SIOCSMIIREG: /* Write MII PHY register. */
973 if (data->phy_id == phy) {
974 u16 value = data->val_in;
976 case 0: /* Check for autonegotiation on or reset. */
977 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
978 if (tp->full_duplex_lock)
979 tp->full_duplex = (value & 0x0100) ? 1 : 0;
982 tp->advertising[phy_idx] =
983 tp->mii_advertise = data->val_in;
987 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
988 u16 value = data->val_in;
990 if ((value & 0x1200) == 0x1200) {
991 if (tp->chip_id == PNIC2) {
992 pnic2_start_nway (dev);
994 t21142_start_nway (dev);
997 } else if (regnum == 4)
998 tp->sym_advertise = value;
1000 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
1011 /* Set or clear the multicast filter for this adaptor.
1012 Note that we only use exclusion around actually queueing the
1013 new frame, not around filling tp->setup_frame. This is non-deterministic
1014 when re-entered but still correct. */
1017 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
1019 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
1021 struct tulip_private *tp = netdev_priv(dev);
1023 struct netdev_hw_addr *ha;
1027 memset(hash_table, 0, sizeof(hash_table));
1028 set_bit_le(255, hash_table); /* Broadcast entry */
1029 /* This should work on big-endian machines as well. */
1030 netdev_for_each_mc_addr(ha, dev) {
1031 int index = ether_crc_le(ETH_ALEN, ha->addr) & 0x1ff;
1033 set_bit_le(index, hash_table);
1035 for (i = 0; i < 32; i++) {
1036 *setup_frm++ = hash_table[i];
1037 *setup_frm++ = hash_table[i];
1039 setup_frm = &tp->setup_frame[13*6];
1041 /* Fill the final entry with our physical address. */
1042 eaddrs = (u16 *)dev->dev_addr;
1043 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1044 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1045 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1048 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
1050 struct tulip_private *tp = netdev_priv(dev);
1051 struct netdev_hw_addr *ha;
1054 /* We have <= 14 addresses so we can use the wonderful
1055 16 address perfect filtering of the Tulip. */
1056 netdev_for_each_mc_addr(ha, dev) {
1057 eaddrs = (u16 *) ha->addr;
1058 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1059 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1060 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1062 /* Fill the unused entries with the broadcast address. */
1063 memset(setup_frm, 0xff, (15 - netdev_mc_count(dev)) * 12);
1064 setup_frm = &tp->setup_frame[15*6];
1066 /* Fill the final entry with our physical address. */
1067 eaddrs = (u16 *)dev->dev_addr;
1068 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1069 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1070 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1074 static void set_rx_mode(struct net_device *dev)
1076 struct tulip_private *tp = netdev_priv(dev);
1077 void __iomem *ioaddr = tp->base_addr;
1080 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1082 tp->csr6 &= ~0x00D5;
1083 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1084 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1085 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1086 } else if ((netdev_mc_count(dev) > 1000) ||
1087 (dev->flags & IFF_ALLMULTI)) {
1088 /* Too many to filter well -- accept all multicasts. */
1089 tp->csr6 |= AcceptAllMulticast;
1090 csr6 |= AcceptAllMulticast;
1091 } else if (tp->flags & MC_HASH_ONLY) {
1092 /* Some work-alikes have only a 64-entry hash filter table. */
1093 /* Should verify correctness on big-endian/__powerpc__ */
1094 struct netdev_hw_addr *ha;
1095 if (netdev_mc_count(dev) > 64) {
1096 /* Arbitrary non-effective limit. */
1097 tp->csr6 |= AcceptAllMulticast;
1098 csr6 |= AcceptAllMulticast;
1100 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1102 netdev_for_each_mc_addr(ha, dev) {
1103 if (tp->flags & COMET_MAC_ADDR)
1104 filterbit = ether_crc_le(ETH_ALEN,
1107 filterbit = ether_crc(ETH_ALEN,
1110 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
1111 if (tulip_debug > 2)
1113 "Added filter for %pM %08x bit %d\n",
1115 ether_crc(ETH_ALEN, ha->addr),
1118 if (mc_filter[0] == tp->mc_filter[0] &&
1119 mc_filter[1] == tp->mc_filter[1])
1121 else if (tp->flags & IS_ASIX) {
1122 iowrite32(2, ioaddr + CSR13);
1123 iowrite32(mc_filter[0], ioaddr + CSR14);
1124 iowrite32(3, ioaddr + CSR13);
1125 iowrite32(mc_filter[1], ioaddr + CSR14);
1126 } else if (tp->flags & COMET_MAC_ADDR) {
1127 iowrite32(mc_filter[0], ioaddr + CSR27);
1128 iowrite32(mc_filter[1], ioaddr + CSR28);
1130 tp->mc_filter[0] = mc_filter[0];
1131 tp->mc_filter[1] = mc_filter[1];
1134 unsigned long flags;
1135 u32 tx_flags = 0x08000000 | 192;
1137 /* Note that only the low-address shortword of setup_frame is valid!
1138 The values are doubled for big-endian architectures. */
1139 if (netdev_mc_count(dev) > 14) {
1140 /* Must use a multicast hash table. */
1141 build_setup_frame_hash(tp->setup_frame, dev);
1142 tx_flags = 0x08400000 | 192;
1144 build_setup_frame_perfect(tp->setup_frame, dev);
1147 spin_lock_irqsave(&tp->lock, flags);
1149 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1150 /* Same setup recently queued, we need not add it. */
1155 /* Now add this frame to the Tx list. */
1157 entry = tp->cur_tx++ % TX_RING_SIZE;
1160 /* Avoid a chip errata by prefixing a dummy entry. */
1161 tp->tx_buffers[entry].skb = NULL;
1162 tp->tx_buffers[entry].mapping = 0;
1163 tp->tx_ring[entry].length =
1164 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1165 tp->tx_ring[entry].buffer1 = 0;
1166 /* Must set DescOwned later to avoid race with chip */
1168 entry = tp->cur_tx++ % TX_RING_SIZE;
1172 tp->tx_buffers[entry].skb = NULL;
1173 tp->tx_buffers[entry].mapping =
1174 pci_map_single(tp->pdev, tp->setup_frame,
1175 sizeof(tp->setup_frame),
1177 /* Put the setup frame on the Tx list. */
1178 if (entry == TX_RING_SIZE-1)
1179 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1180 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1181 tp->tx_ring[entry].buffer1 =
1182 cpu_to_le32(tp->tx_buffers[entry].mapping);
1183 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1185 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1186 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1187 netif_stop_queue(dev);
1189 /* Trigger an immediate transmit demand. */
1190 iowrite32(0, ioaddr + CSR1);
1193 spin_unlock_irqrestore(&tp->lock, flags);
1196 iowrite32(csr6, ioaddr + CSR6);
1199 #ifdef CONFIG_TULIP_MWI
1200 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1201 struct net_device *dev)
1203 struct tulip_private *tp = netdev_priv(dev);
1208 if (tulip_debug > 3)
1209 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1211 tp->csr0 = csr0 = 0;
1213 /* if we have any cache line size at all, we can do MRM and MWI */
1216 /* Enable MWI in the standard PCI command bit.
1217 * Check for the case where MWI is desired but not available
1219 pci_try_set_mwi(pdev);
1221 /* read result from hardware (in case bit refused to enable) */
1222 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1223 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1226 /* if cache line size hardwired to zero, no MWI */
1227 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1228 if ((csr0 & MWI) && (cache == 0)) {
1230 pci_clear_mwi(pdev);
1233 /* assign per-cacheline-size cache alignment and
1234 * burst length values
1238 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1241 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1244 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1251 /* if we have a good cache line size, we by now have a good
1252 * csr0, so save it and exit
1257 /* we don't have a good csr0 or cache line size, disable MWI */
1259 pci_clear_mwi(pdev);
1263 /* sane defaults for burst length and cache alignment
1264 * originally from de4x5 driver
1266 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1270 if (tulip_debug > 2)
1271 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1272 pci_name(pdev), cache, csr0);
1277 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1278 * is the DM910X and the on chip ULi devices
1281 static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1283 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1288 static const struct net_device_ops tulip_netdev_ops = {
1289 .ndo_open = tulip_open,
1290 .ndo_start_xmit = tulip_start_xmit,
1291 .ndo_tx_timeout = tulip_tx_timeout,
1292 .ndo_stop = tulip_close,
1293 .ndo_get_stats = tulip_get_stats,
1294 .ndo_do_ioctl = private_ioctl,
1295 .ndo_set_multicast_list = set_rx_mode,
1296 .ndo_change_mtu = eth_change_mtu,
1297 .ndo_set_mac_address = eth_mac_addr,
1298 .ndo_validate_addr = eth_validate_addr,
1299 #ifdef CONFIG_NET_POLL_CONTROLLER
1300 .ndo_poll_controller = poll_tulip,
1304 DEFINE_PCI_DEVICE_TABLE(early_486_chipsets) = {
1305 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1306 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1310 static int __devinit tulip_init_one (struct pci_dev *pdev,
1311 const struct pci_device_id *ent)
1313 struct tulip_private *tp;
1314 /* See note below on the multiport cards. */
1315 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1316 static int last_irq;
1317 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1320 unsigned char *ee_data;
1321 struct net_device *dev;
1322 void __iomem *ioaddr;
1323 static int board_idx = -1;
1324 int chip_idx = ent->driver_data;
1325 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1326 unsigned int eeprom_missing = 0;
1327 unsigned int force_csr0 = 0;
1330 if (tulip_debug > 0)
1331 printk_once(KERN_INFO "%s", version);
1337 * Lan media wire a tulip chip to a wan interface. Needs a very
1338 * different driver (lmc driver)
1341 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1342 pr_err("skipping LMC card\n");
1344 } else if (pdev->subsystem_vendor == PCI_VENDOR_ID_SBE &&
1345 (pdev->subsystem_device == PCI_SUBDEVICE_ID_SBE_T3E3 ||
1346 pdev->subsystem_device == PCI_SUBDEVICE_ID_SBE_2T3E3_P0 ||
1347 pdev->subsystem_device == PCI_SUBDEVICE_ID_SBE_2T3E3_P1)) {
1348 pr_err("skipping SBE T3E3 port\n");
1353 * DM910x chips should be handled by the dmfe driver, except
1354 * on-board chips on SPARC systems. Also, early DM9100s need
1355 * software CRC which only the dmfe driver supports.
1358 #ifdef CONFIG_TULIP_DM910X
1359 if (chip_idx == DM910X) {
1360 struct device_node *dp;
1362 if (pdev->vendor == 0x1282 && pdev->device == 0x9100 &&
1363 pdev->revision < 0x30) {
1364 pr_info("skipping early DM9100 with Crc bug (use dmfe)\n");
1368 dp = pci_device_to_OF_node(pdev);
1369 if (!(dp && of_get_property(dp, "local-mac-address", NULL))) {
1370 pr_info("skipping DM910x expansion card (use dmfe)\n");
1377 * Looks for early PCI chipsets where people report hangs
1378 * without the workarounds being on.
1381 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1382 aligned. Aries might need this too. The Saturn errata are not
1383 pretty reading but thankfully it's an old 486 chipset.
1385 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1389 if (pci_dev_present(early_486_chipsets)) {
1390 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1394 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1395 if (chip_idx == AX88140) {
1396 if ((csr0 & 0x3f00) == 0)
1400 /* PNIC doesn't have MWI/MRL/MRM... */
1401 if (chip_idx == LC82C168)
1402 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1404 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1405 if (tulip_uli_dm_quirk(pdev)) {
1406 csr0 &= ~0x01f100ff;
1407 #if defined(CONFIG_SPARC)
1408 csr0 = (csr0 & ~0xff00) | 0xe000;
1412 * And back to business
1415 i = pci_enable_device(pdev);
1417 pr_err("Cannot enable tulip board #%d, aborting\n", board_idx);
1421 /* The chip will fail to enter a low-power state later unless
1422 * first explicitly commanded into D0 */
1423 if (pci_set_power_state(pdev, PCI_D0)) {
1424 pr_notice("Failed to set power state to D0\n");
1429 /* alloc_etherdev ensures aligned and zeroed private structures */
1430 dev = alloc_etherdev (sizeof (*tp));
1432 pr_err("ether device alloc failed, aborting\n");
1436 SET_NETDEV_DEV(dev, &pdev->dev);
1437 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1438 pr_err("%s: I/O region (0x%llx@0x%llx) too small, aborting\n",
1440 (unsigned long long)pci_resource_len (pdev, 0),
1441 (unsigned long long)pci_resource_start (pdev, 0));
1442 goto err_out_free_netdev;
1445 /* grab all resources from both PIO and MMIO regions, as we
1446 * don't want anyone else messing around with our hardware */
1447 if (pci_request_regions (pdev, DRV_NAME))
1448 goto err_out_free_netdev;
1450 ioaddr = pci_iomap(pdev, TULIP_BAR, tulip_tbl[chip_idx].io_size);
1453 goto err_out_free_res;
1456 * initialize private data structure 'tp'
1457 * it is zeroed and aligned in alloc_etherdev
1459 tp = netdev_priv(dev);
1462 tp->rx_ring = pci_alloc_consistent(pdev,
1463 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1464 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1467 goto err_out_mtable;
1468 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1469 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1471 tp->chip_id = chip_idx;
1472 tp->flags = tulip_tbl[chip_idx].flags;
1474 tp->wolinfo.supported = 0;
1475 tp->wolinfo.wolopts = 0;
1476 /* COMET: Enable power management only for AN983B */
1477 if (chip_idx == COMET ) {
1479 pci_read_config_dword (pdev, 0x80, &sig);
1480 if (sig == 0x09811317) {
1481 tp->flags |= COMET_PM;
1482 tp->wolinfo.supported = WAKE_PHY | WAKE_MAGIC;
1483 printk(KERN_INFO "tulip_init_one: Enabled WOL support for AN983B\n");
1487 tp->base_addr = ioaddr;
1488 tp->revision = pdev->revision;
1490 spin_lock_init(&tp->lock);
1491 spin_lock_init(&tp->mii_lock);
1492 init_timer(&tp->timer);
1493 tp->timer.data = (unsigned long)dev;
1494 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1496 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
1498 dev->base_addr = (unsigned long)ioaddr;
1500 #ifdef CONFIG_TULIP_MWI
1501 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1502 tulip_mwi_config (pdev, dev);
1505 /* Stop the chip's Tx and Rx processes. */
1506 tulip_stop_rxtx(tp);
1508 pci_set_master(pdev);
1511 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1512 switch (pdev->subsystem_device) {
1521 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1522 chip_name = "GSC DS21140 Tulip";
1527 /* Clear the missed-packet counter. */
1528 ioread32(ioaddr + CSR8);
1530 /* The station address ROM is read byte serially. The register must
1531 be polled, waiting for the value to be read bit serially from the
1534 ee_data = tp->eeprom;
1535 memset(ee_data, 0, sizeof(tp->eeprom));
1537 if (chip_idx == LC82C168) {
1538 for (i = 0; i < 3; i++) {
1539 int value, boguscnt = 100000;
1540 iowrite32(0x600 | i, ioaddr + 0x98);
1542 value = ioread32(ioaddr + CSR9);
1543 } while (value < 0 && --boguscnt > 0);
1544 put_unaligned_le16(value, ((__le16 *)dev->dev_addr) + i);
1545 sum += value & 0xffff;
1547 } else if (chip_idx == COMET) {
1548 /* No need to read the EEPROM. */
1549 put_unaligned_le32(ioread32(ioaddr + 0xA4), dev->dev_addr);
1550 put_unaligned_le16(ioread32(ioaddr + 0xA8), dev->dev_addr + 4);
1551 for (i = 0; i < 6; i ++)
1552 sum += dev->dev_addr[i];
1554 /* A serial EEPROM interface, we read now and sort it out later. */
1556 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1557 int ee_max_addr = ((1 << ee_addr_size) - 1) * sizeof(u16);
1559 if (ee_max_addr > sizeof(tp->eeprom))
1560 ee_max_addr = sizeof(tp->eeprom);
1562 for (i = 0; i < ee_max_addr ; i += sizeof(u16)) {
1563 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1564 ee_data[i] = data & 0xff;
1565 ee_data[i + 1] = data >> 8;
1568 /* DEC now has a specification (see Notes) but early board makers
1569 just put the address in the first EEPROM locations. */
1570 /* This does memcmp(ee_data, ee_data+16, 8) */
1571 for (i = 0; i < 8; i ++)
1572 if (ee_data[i] != ee_data[16+i])
1574 if (chip_idx == CONEXANT) {
1575 /* Check that the tuple type and length is correct. */
1576 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1578 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1580 sa_offset = 2; /* Grrr, damn Matrox boards. */
1583 #ifdef CONFIG_MIPS_COBALT
1584 if ((pdev->bus->number == 0) &&
1585 ((PCI_SLOT(pdev->devfn) == 7) ||
1586 (PCI_SLOT(pdev->devfn) == 12))) {
1587 /* Cobalt MAC address in first EEPROM locations. */
1589 /* Ensure our media table fixup get's applied */
1590 memcpy(ee_data + 16, ee_data, 8);
1594 /* Check to see if we have a broken srom */
1595 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1596 /* pci_vendor_id and subsystem_id are swapped */
1597 ee_data[0] = ee_data[2];
1598 ee_data[1] = ee_data[3];
1602 /* HSC-PCI boards need to be byte-swaped and shifted
1603 * up 1 word. This shift needs to happen at the end
1604 * of the MAC first because of the 2 byte overlap.
1606 for (i = 4; i >= 0; i -= 2) {
1607 ee_data[17 + i + 3] = ee_data[17 + i];
1608 ee_data[16 + i + 5] = ee_data[16 + i];
1613 for (i = 0; i < 6; i ++) {
1614 dev->dev_addr[i] = ee_data[i + sa_offset];
1615 sum += ee_data[i + sa_offset];
1618 /* Lite-On boards have the address byte-swapped. */
1619 if ((dev->dev_addr[0] == 0xA0 ||
1620 dev->dev_addr[0] == 0xC0 ||
1621 dev->dev_addr[0] == 0x02) &&
1622 dev->dev_addr[1] == 0x00)
1623 for (i = 0; i < 6; i+=2) {
1624 char tmp = dev->dev_addr[i];
1625 dev->dev_addr[i] = dev->dev_addr[i+1];
1626 dev->dev_addr[i+1] = tmp;
1628 /* On the Zynx 315 Etherarray and other multiport boards only the
1629 first Tulip has an EEPROM.
1630 On Sparc systems the mac address is held in the OBP property
1631 "local-mac-address".
1632 The addresses of the subsequent ports are derived from the first.
1633 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1634 that here as well. */
1635 if (sum == 0 || sum == 6*0xff) {
1636 #if defined(CONFIG_SPARC)
1637 struct device_node *dp = pci_device_to_OF_node(pdev);
1638 const unsigned char *addr;
1642 for (i = 0; i < 5; i++)
1643 dev->dev_addr[i] = last_phys_addr[i];
1644 dev->dev_addr[i] = last_phys_addr[i] + 1;
1645 #if defined(CONFIG_SPARC)
1646 addr = of_get_property(dp, "local-mac-address", &len);
1647 if (addr && len == 6)
1648 memcpy(dev->dev_addr, addr, 6);
1650 #if defined(__i386__) || defined(__x86_64__) /* Patch up x86 BIOS bug. */
1656 for (i = 0; i < 6; i++)
1657 last_phys_addr[i] = dev->dev_addr[i];
1661 /* The lower four bits are the media type. */
1662 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1663 if (options[board_idx] & MEDIA_MASK)
1664 tp->default_port = options[board_idx] & MEDIA_MASK;
1665 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1666 tp->full_duplex = 1;
1667 if (mtu[board_idx] > 0)
1668 dev->mtu = mtu[board_idx];
1670 if (dev->mem_start & MEDIA_MASK)
1671 tp->default_port = dev->mem_start & MEDIA_MASK;
1672 if (tp->default_port) {
1673 pr_info(DRV_NAME "%d: Transceiver selection forced to %s\n",
1674 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1676 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1677 tp->full_duplex = 1;
1679 if (tp->full_duplex)
1680 tp->full_duplex_lock = 1;
1682 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1683 static const u16 media2advert[] = {
1684 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200
1686 tp->mii_advertise = media2advert[tp->default_port - 9];
1687 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1690 if (tp->flags & HAS_MEDIA_TABLE) {
1691 sprintf(dev->name, DRV_NAME "%d", board_idx); /* hack */
1692 tulip_parse_eeprom(dev);
1693 strcpy(dev->name, "eth%d"); /* un-hack */
1696 if ((tp->flags & ALWAYS_CHECK_MII) ||
1697 (tp->mtable && tp->mtable->has_mii) ||
1698 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1699 if (tp->mtable && tp->mtable->has_mii) {
1700 for (i = 0; i < tp->mtable->leafcount; i++)
1701 if (tp->mtable->mleaf[i].media == 11) {
1703 tp->saved_if_port = dev->if_port;
1704 tulip_select_media(dev, 2);
1705 dev->if_port = tp->saved_if_port;
1710 /* Find the connected MII xcvrs.
1711 Doing this in open() would allow detecting external xcvrs
1712 later, but takes much time. */
1713 tulip_find_mii (dev, board_idx);
1716 /* The Tulip-specific entries in the device structure. */
1717 dev->netdev_ops = &tulip_netdev_ops;
1718 dev->watchdog_timeo = TX_TIMEOUT;
1719 #ifdef CONFIG_TULIP_NAPI
1720 netif_napi_add(dev, &tp->napi, tulip_poll, 16);
1722 SET_ETHTOOL_OPS(dev, &ops);
1724 if (register_netdev(dev))
1725 goto err_out_free_ring;
1727 pci_set_drvdata(pdev, dev);
1730 #ifdef CONFIG_TULIP_MMIO
1731 "%s rev %d at MMIO %#llx,%s %pM, IRQ %d\n",
1733 "%s rev %d at Port %#llx,%s %pM, IRQ %d\n",
1735 chip_name, pdev->revision,
1736 (unsigned long long)pci_resource_start(pdev, TULIP_BAR),
1737 eeprom_missing ? " EEPROM not present," : "",
1738 dev->dev_addr, irq);
1740 if (tp->chip_id == PNIC2)
1741 tp->link_change = pnic2_lnk_change;
1742 else if (tp->flags & HAS_NWAY)
1743 tp->link_change = t21142_lnk_change;
1744 else if (tp->flags & HAS_PNICNWAY)
1745 tp->link_change = pnic_lnk_change;
1747 /* Reset the xcvr interface and turn on heartbeat. */
1753 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1756 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1757 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1758 iowrite32(0x0000, ioaddr + CSR13);
1759 iowrite32(0x0000, ioaddr + CSR14);
1760 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1762 t21142_start_nway(dev);
1765 /* just do a reset for sanity sake */
1766 iowrite32(0x0000, ioaddr + CSR13);
1767 iowrite32(0x0000, ioaddr + CSR14);
1770 if ( ! tp->mii_cnt) {
1773 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1774 iowrite32(0x30, ioaddr + CSR12);
1775 iowrite32(0x0001F078, ioaddr + CSR6);
1776 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1781 iowrite32(0x00000000, ioaddr + CSR6);
1782 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1783 iowrite32(0x00000001, ioaddr + CSR13);
1787 iowrite32(0x01a80000, ioaddr + CSR6);
1788 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1789 iowrite32(0x00001000, ioaddr + CSR12);
1792 /* No initialization necessary. */
1796 /* put the chip in snooze mode until opened */
1797 tulip_set_power_state (tp, 0, 1);
1802 pci_free_consistent (pdev,
1803 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1804 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1805 tp->rx_ring, tp->rx_ring_dma);
1809 pci_iounmap(pdev, ioaddr);
1812 pci_release_regions (pdev);
1814 err_out_free_netdev:
1820 /* set the registers according to the given wolopts */
1821 static void tulip_set_wolopts (struct pci_dev *pdev, u32 wolopts)
1823 struct net_device *dev = pci_get_drvdata(pdev);
1824 struct tulip_private *tp = netdev_priv(dev);
1825 void __iomem *ioaddr = tp->base_addr;
1827 if (tp->flags & COMET_PM) {
1831 tmp = ioread32(ioaddr + CSR18);
1832 tmp &= ~(comet_csr18_pmes_sticky | comet_csr18_apm_mode | comet_csr18_d3a);
1833 tmp |= comet_csr18_pm_mode;
1834 iowrite32(tmp, ioaddr + CSR18);
1836 /* Set the Wake-up Control/Status Register to the given WOL options*/
1837 tmp = ioread32(ioaddr + CSR13);
1838 tmp &= ~(comet_csr13_linkoffe | comet_csr13_linkone | comet_csr13_wfre | comet_csr13_lsce | comet_csr13_mpre);
1839 if (wolopts & WAKE_MAGIC)
1840 tmp |= comet_csr13_mpre;
1841 if (wolopts & WAKE_PHY)
1842 tmp |= comet_csr13_linkoffe | comet_csr13_linkone | comet_csr13_lsce;
1843 /* Clear the event flags */
1844 tmp |= comet_csr13_wfr | comet_csr13_mpr | comet_csr13_lsc;
1845 iowrite32(tmp, ioaddr + CSR13);
1852 static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)
1855 struct net_device *dev = pci_get_drvdata(pdev);
1856 struct tulip_private *tp = netdev_priv(dev);
1861 if (!netif_running(dev))
1866 netif_device_detach(dev);
1867 free_irq(dev->irq, dev);
1870 pci_save_state(pdev);
1871 pci_disable_device(pdev);
1872 pstate = pci_choose_state(pdev, state);
1873 if (state.event == PM_EVENT_SUSPEND && pstate != PCI_D0) {
1876 tulip_set_wolopts(pdev, tp->wolinfo.wolopts);
1877 rc = pci_enable_wake(pdev, pstate, tp->wolinfo.wolopts);
1879 printk("tulip: pci_enable_wake failed (%d)\n", rc);
1881 pci_set_power_state(pdev, pstate);
1887 static int tulip_resume(struct pci_dev *pdev)
1889 struct net_device *dev = pci_get_drvdata(pdev);
1890 struct tulip_private *tp = netdev_priv(dev);
1891 void __iomem *ioaddr = tp->base_addr;
1898 pci_set_power_state(pdev, PCI_D0);
1899 pci_restore_state(pdev);
1901 if (!netif_running(dev))
1904 if ((retval = pci_enable_device(pdev))) {
1905 pr_err("pci_enable_device failed in resume\n");
1909 if ((retval = request_irq(dev->irq, tulip_interrupt, IRQF_SHARED, dev->name, dev))) {
1910 pr_err("request_irq failed in resume\n");
1914 if (tp->flags & COMET_PM) {
1915 pci_enable_wake(pdev, PCI_D3hot, 0);
1916 pci_enable_wake(pdev, PCI_D3cold, 0);
1918 /* Clear the PMES flag */
1919 tmp = ioread32(ioaddr + CSR20);
1920 tmp |= comet_csr20_pmes;
1921 iowrite32(tmp, ioaddr + CSR20);
1923 /* Disable all wake-up events */
1924 tulip_set_wolopts(pdev, 0);
1926 netif_device_attach(dev);
1928 if (netif_running(dev))
1934 #endif /* CONFIG_PM */
1937 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1939 struct net_device *dev = pci_get_drvdata (pdev);
1940 struct tulip_private *tp;
1945 tp = netdev_priv(dev);
1946 unregister_netdev(dev);
1947 pci_free_consistent (pdev,
1948 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1949 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1950 tp->rx_ring, tp->rx_ring_dma);
1952 pci_iounmap(pdev, tp->base_addr);
1954 pci_release_regions (pdev);
1955 pci_set_drvdata (pdev, NULL);
1957 /* pci_power_off (pdev, -1); */
1960 #ifdef CONFIG_NET_POLL_CONTROLLER
1962 * Polling 'interrupt' - used by things like netconsole to send skbs
1963 * without having to re-enable interrupts. It's not called while
1964 * the interrupt routine is executing.
1967 static void poll_tulip (struct net_device *dev)
1969 /* disable_irq here is not very nice, but with the lockless
1970 interrupt handler we have no other choice. */
1971 disable_irq(dev->irq);
1972 tulip_interrupt (dev->irq, dev);
1973 enable_irq(dev->irq);
1977 static struct pci_driver tulip_driver = {
1979 .id_table = tulip_pci_tbl,
1980 .probe = tulip_init_one,
1981 .remove = __devexit_p(tulip_remove_one),
1983 .suspend = tulip_suspend,
1984 .resume = tulip_resume,
1985 #endif /* CONFIG_PM */
1989 static int __init tulip_init (void)
1992 pr_info("%s", version);
1995 /* copy module parms into globals */
1996 tulip_rx_copybreak = rx_copybreak;
1997 tulip_max_interrupt_work = max_interrupt_work;
1999 /* probe for and init boards */
2000 return pci_register_driver(&tulip_driver);
2004 static void __exit tulip_cleanup (void)
2006 pci_unregister_driver (&tulip_driver);
2010 module_init(tulip_init);
2011 module_exit(tulip_cleanup);