2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
38 #include <linux/if_vlan.h>
40 #define DRIVER_VERSION "22-Dec-2011"
41 #define DRIVER_NAME "asix"
43 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
45 #define AX_CMD_SET_SW_MII 0x06
46 #define AX_CMD_READ_MII_REG 0x07
47 #define AX_CMD_WRITE_MII_REG 0x08
48 #define AX_CMD_SET_HW_MII 0x0a
49 #define AX_CMD_READ_EEPROM 0x0b
50 #define AX_CMD_WRITE_EEPROM 0x0c
51 #define AX_CMD_WRITE_ENABLE 0x0d
52 #define AX_CMD_WRITE_DISABLE 0x0e
53 #define AX_CMD_READ_RX_CTL 0x0f
54 #define AX_CMD_WRITE_RX_CTL 0x10
55 #define AX_CMD_READ_IPG012 0x11
56 #define AX_CMD_WRITE_IPG0 0x12
57 #define AX_CMD_WRITE_IPG1 0x13
58 #define AX_CMD_READ_NODE_ID 0x13
59 #define AX_CMD_WRITE_NODE_ID 0x14
60 #define AX_CMD_WRITE_IPG2 0x14
61 #define AX_CMD_WRITE_MULTI_FILTER 0x16
62 #define AX88172_CMD_READ_NODE_ID 0x17
63 #define AX_CMD_READ_PHY_ID 0x19
64 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
65 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
66 #define AX_CMD_READ_MONITOR_MODE 0x1c
67 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
68 #define AX_CMD_READ_GPIOS 0x1e
69 #define AX_CMD_WRITE_GPIOS 0x1f
70 #define AX_CMD_SW_RESET 0x20
71 #define AX_CMD_SW_PHY_STATUS 0x21
72 #define AX_CMD_SW_PHY_SELECT 0x22
74 #define AX_MONITOR_MODE 0x01
75 #define AX_MONITOR_LINK 0x02
76 #define AX_MONITOR_MAGIC 0x04
77 #define AX_MONITOR_HSFS 0x10
79 /* AX88172 Medium Status Register values */
80 #define AX88172_MEDIUM_FD 0x02
81 #define AX88172_MEDIUM_TX 0x04
82 #define AX88172_MEDIUM_FC 0x10
83 #define AX88172_MEDIUM_DEFAULT \
84 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
86 #define AX_MCAST_FILTER_SIZE 8
87 #define AX_MAX_MCAST 64
89 #define AX_SWRESET_CLEAR 0x00
90 #define AX_SWRESET_RR 0x01
91 #define AX_SWRESET_RT 0x02
92 #define AX_SWRESET_PRTE 0x04
93 #define AX_SWRESET_PRL 0x08
94 #define AX_SWRESET_BZ 0x10
95 #define AX_SWRESET_IPRL 0x20
96 #define AX_SWRESET_IPPD 0x40
98 #define AX88772_IPG0_DEFAULT 0x15
99 #define AX88772_IPG1_DEFAULT 0x0c
100 #define AX88772_IPG2_DEFAULT 0x12
102 /* AX88772 & AX88178 Medium Mode Register */
103 #define AX_MEDIUM_PF 0x0080
104 #define AX_MEDIUM_JFE 0x0040
105 #define AX_MEDIUM_TFC 0x0020
106 #define AX_MEDIUM_RFC 0x0010
107 #define AX_MEDIUM_ENCK 0x0008
108 #define AX_MEDIUM_AC 0x0004
109 #define AX_MEDIUM_FD 0x0002
110 #define AX_MEDIUM_GM 0x0001
111 #define AX_MEDIUM_SM 0x1000
112 #define AX_MEDIUM_SBP 0x0800
113 #define AX_MEDIUM_PS 0x0200
114 #define AX_MEDIUM_RE 0x0100
116 #define AX88178_MEDIUM_DEFAULT \
117 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
118 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
121 #define AX88772_MEDIUM_DEFAULT \
122 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
123 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
124 AX_MEDIUM_AC | AX_MEDIUM_RE)
126 /* AX88772 & AX88178 RX_CTL values */
127 #define AX_RX_CTL_SO 0x0080
128 #define AX_RX_CTL_AP 0x0020
129 #define AX_RX_CTL_AM 0x0010
130 #define AX_RX_CTL_AB 0x0008
131 #define AX_RX_CTL_SEP 0x0004
132 #define AX_RX_CTL_AMALL 0x0002
133 #define AX_RX_CTL_PRO 0x0001
134 #define AX_RX_CTL_MFB_2048 0x0000
135 #define AX_RX_CTL_MFB_4096 0x0100
136 #define AX_RX_CTL_MFB_8192 0x0200
137 #define AX_RX_CTL_MFB_16384 0x0300
139 #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB)
141 /* GPIO 0 .. 2 toggles */
142 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148 #define AX_GPIO_RESERVED 0x40 /* Reserved */
149 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
151 #define AX_EEPROM_MAGIC 0xdeadbeef
152 #define AX88172_EEPROM_LEN 0x40
153 #define AX88772_EEPROM_LEN 0xff
155 #define PHY_MODE_MARVELL 0x0000
156 #define MII_MARVELL_LED_CTRL 0x0018
157 #define MII_MARVELL_STATUS 0x001b
158 #define MII_MARVELL_CTRL 0x0014
160 #define MARVELL_LED_MANUAL 0x0019
162 #define MARVELL_STATUS_HWCFG 0x0004
164 #define MARVELL_CTRL_TXDELAY 0x0002
165 #define MARVELL_CTRL_RXDELAY 0x0080
167 #define PHY_MODE_RTL8211CL 0x000C
169 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
171 u8 multi_filter[AX_MCAST_FILTER_SIZE];
172 u8 mac_addr[ETH_ALEN];
178 struct ax88172_int_data {
186 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
187 u16 size, void *data)
192 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
193 cmd, value, index, size);
195 buf = kmalloc(size, GFP_KERNEL);
199 err = usb_control_msg(
201 usb_rcvctrlpipe(dev->udev, 0),
203 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
208 USB_CTRL_GET_TIMEOUT);
210 memcpy(data, buf, size);
219 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
220 u16 size, void *data)
225 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
226 cmd, value, index, size);
229 buf = kmemdup(data, size, GFP_KERNEL);
234 err = usb_control_msg(
236 usb_sndctrlpipe(dev->udev, 0),
238 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
243 USB_CTRL_SET_TIMEOUT);
250 static void asix_async_cmd_callback(struct urb *urb)
252 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
253 int status = urb->status;
256 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
264 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
265 u16 size, void *data)
267 struct usb_ctrlrequest *req;
271 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
272 cmd, value, index, size);
274 urb = usb_alloc_urb(0, GFP_ATOMIC);
276 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
280 req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC);
282 netdev_err(dev->net, "Failed to allocate memory for control request\n");
287 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
289 req->wValue = cpu_to_le16(value);
290 req->wIndex = cpu_to_le16(index);
291 req->wLength = cpu_to_le16(size);
293 usb_fill_control_urb(urb, dev->udev,
294 usb_sndctrlpipe(dev->udev, 0),
295 (void *)req, data, size,
296 asix_async_cmd_callback, req);
298 status = usb_submit_urb(urb, GFP_ATOMIC);
300 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
307 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
311 while (offset + sizeof(u32) < skb->len) {
312 struct sk_buff *ax_skb;
314 u32 header = get_unaligned_le32(skb->data + offset);
316 offset += sizeof(u32);
318 /* get the packet length */
319 size = (u16) (header & 0x7ff);
320 if (size != ((~header >> 16) & 0x07ff)) {
321 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
325 if ((size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) ||
326 (size + offset > skb->len)) {
327 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
331 ax_skb = netdev_alloc_skb_ip_align(dev->net, size);
335 skb_put(ax_skb, size);
336 memcpy(ax_skb->data, skb->data + offset, size);
337 usbnet_skb_return(dev, ax_skb);
339 offset += (size + 1) & 0xfffe;
342 if (skb->len != offset) {
343 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
350 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
354 int headroom = skb_headroom(skb);
355 int tailroom = skb_tailroom(skb);
357 u32 padbytes = 0xffff0000;
359 padlen = ((skb->len + 4) & (dev->maxpacket - 1)) ? 0 : 4;
361 if ((!skb_cloned(skb)) &&
362 ((headroom + tailroom) >= (4 + padlen))) {
363 if ((headroom < 4) || (tailroom < padlen)) {
364 skb->data = memmove(skb->head + 4, skb->data, skb->len);
365 skb_set_tail_pointer(skb, skb->len);
368 struct sk_buff *skb2;
369 skb2 = skb_copy_expand(skb, 4, padlen, flags);
370 dev_kfree_skb_any(skb);
377 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
378 cpu_to_le32s(&packet_len);
379 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
382 cpu_to_le32s(&padbytes);
383 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
384 skb_put(skb, sizeof(padbytes));
389 static void asix_status(struct usbnet *dev, struct urb *urb)
391 struct ax88172_int_data *event;
394 if (urb->actual_length < 8)
397 event = urb->transfer_buffer;
398 link = event->link & 0x01;
399 if (netif_carrier_ok(dev->net) != link) {
401 netif_carrier_on(dev->net);
402 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
404 netif_carrier_off(dev->net);
405 netdev_dbg(dev->net, "Link Status is: %d\n", link);
409 static inline int asix_set_sw_mii(struct usbnet *dev)
412 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
414 netdev_err(dev->net, "Failed to enable software MII access\n");
418 static inline int asix_set_hw_mii(struct usbnet *dev)
421 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
423 netdev_err(dev->net, "Failed to enable hardware MII access\n");
427 static inline int asix_get_phy_addr(struct usbnet *dev)
430 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
432 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
435 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
438 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
446 static int asix_sw_reset(struct usbnet *dev, u8 flags)
450 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
452 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
457 static u16 asix_read_rx_ctl(struct usbnet *dev)
460 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
463 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
466 ret = le16_to_cpu(v);
471 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
475 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
476 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
478 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
484 static u16 asix_read_medium_status(struct usbnet *dev)
487 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
490 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
492 return ret; /* TODO: callers not checking for error ret */
495 return le16_to_cpu(v);
499 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
503 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
504 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
506 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
512 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
516 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
517 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
519 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
529 * AX88772 & AX88178 have a 16-bit RX_CTL value
531 static void asix_set_multicast(struct net_device *net)
533 struct usbnet *dev = netdev_priv(net);
534 struct asix_data *data = (struct asix_data *)&dev->data;
535 u16 rx_ctl = AX_DEFAULT_RX_CTL;
537 if (net->flags & IFF_PROMISC) {
538 rx_ctl |= AX_RX_CTL_PRO;
539 } else if (net->flags & IFF_ALLMULTI ||
540 netdev_mc_count(net) > AX_MAX_MCAST) {
541 rx_ctl |= AX_RX_CTL_AMALL;
542 } else if (netdev_mc_empty(net)) {
543 /* just broadcast and directed */
545 /* We use the 20 byte dev->data
546 * for our 8 byte filter buffer
547 * to avoid allocating memory that
548 * is tricky to free later */
549 struct netdev_hw_addr *ha;
552 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
554 /* Build the multicast hash filter. */
555 netdev_for_each_mc_addr(ha, net) {
556 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
557 data->multi_filter[crc_bits >> 3] |=
561 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
562 AX_MCAST_FILTER_SIZE, data->multi_filter);
564 rx_ctl |= AX_RX_CTL_AM;
567 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
570 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
572 struct usbnet *dev = netdev_priv(netdev);
575 mutex_lock(&dev->phy_mutex);
576 asix_set_sw_mii(dev);
577 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
578 (__u16)loc, 2, &res);
579 asix_set_hw_mii(dev);
580 mutex_unlock(&dev->phy_mutex);
582 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
583 phy_id, loc, le16_to_cpu(res));
585 return le16_to_cpu(res);
589 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
591 struct usbnet *dev = netdev_priv(netdev);
592 __le16 res = cpu_to_le16(val);
594 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
596 mutex_lock(&dev->phy_mutex);
597 asix_set_sw_mii(dev);
598 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
599 asix_set_hw_mii(dev);
600 mutex_unlock(&dev->phy_mutex);
603 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
604 static u32 asix_get_phyid(struct usbnet *dev)
610 /* Poll for the rare case the FW or phy isn't ready yet. */
611 for (i = 0; i < 100; i++) {
612 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
613 if (phy_reg != 0 && phy_reg != 0xFFFF)
618 if (phy_reg <= 0 || phy_reg == 0xFFFF)
621 phy_id = (phy_reg & 0xffff) << 16;
623 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
627 phy_id |= (phy_reg & 0xffff);
633 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
635 struct usbnet *dev = netdev_priv(net);
638 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
639 wolinfo->supported = 0;
640 wolinfo->wolopts = 0;
643 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
644 wolinfo->wolopts = 0;
645 if (opt & AX_MONITOR_LINK)
646 wolinfo->wolopts |= WAKE_PHY;
647 if (opt & AX_MONITOR_MAGIC)
648 wolinfo->wolopts |= WAKE_MAGIC;
652 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
654 struct usbnet *dev = netdev_priv(net);
657 if (wolinfo->wolopts & WAKE_PHY)
658 opt |= AX_MONITOR_LINK;
659 if (wolinfo->wolopts & WAKE_MAGIC)
660 opt |= AX_MONITOR_MAGIC;
662 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
663 opt, 0, 0, NULL) < 0)
669 static int asix_get_eeprom_len(struct net_device *net)
671 struct usbnet *dev = netdev_priv(net);
672 struct asix_data *data = (struct asix_data *)&dev->data;
674 return data->eeprom_len;
677 static int asix_get_eeprom(struct net_device *net,
678 struct ethtool_eeprom *eeprom, u8 *data)
680 struct usbnet *dev = netdev_priv(net);
681 __le16 *ebuf = (__le16 *)data;
684 /* Crude hack to ensure that we don't overwrite memory
685 * if an odd length is supplied
690 eeprom->magic = AX_EEPROM_MAGIC;
692 /* ax8817x returns 2 bytes from eeprom on read */
693 for (i=0; i < eeprom->len / 2; i++) {
694 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
695 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
701 static void asix_get_drvinfo (struct net_device *net,
702 struct ethtool_drvinfo *info)
704 struct usbnet *dev = netdev_priv(net);
705 struct asix_data *data = (struct asix_data *)&dev->data;
707 /* Inherit standard device info */
708 usbnet_get_drvinfo(net, info);
709 strncpy (info->driver, DRIVER_NAME, sizeof info->driver);
710 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
711 info->eedump_len = data->eeprom_len;
714 static u32 asix_get_link(struct net_device *net)
716 struct usbnet *dev = netdev_priv(net);
718 return mii_link_ok(&dev->mii);
721 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
723 struct usbnet *dev = netdev_priv(net);
725 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
728 static int asix_set_mac_address(struct net_device *net, void *p)
730 struct usbnet *dev = netdev_priv(net);
731 struct asix_data *data = (struct asix_data *)&dev->data;
732 struct sockaddr *addr = p;
734 if (netif_running(net))
736 if (!is_valid_ether_addr(addr->sa_data))
737 return -EADDRNOTAVAIL;
739 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
741 /* We use the 20 byte dev->data
742 * for our 6 byte mac buffer
743 * to avoid allocating memory that
744 * is tricky to free later */
745 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
746 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
752 /* We need to override some ethtool_ops so we require our
753 own structure so we don't interfere with other usbnet
754 devices that may be connected at the same time. */
755 static const struct ethtool_ops ax88172_ethtool_ops = {
756 .get_drvinfo = asix_get_drvinfo,
757 .get_link = asix_get_link,
758 .get_msglevel = usbnet_get_msglevel,
759 .set_msglevel = usbnet_set_msglevel,
760 .get_wol = asix_get_wol,
761 .set_wol = asix_set_wol,
762 .get_eeprom_len = asix_get_eeprom_len,
763 .get_eeprom = asix_get_eeprom,
764 .get_settings = usbnet_get_settings,
765 .set_settings = usbnet_set_settings,
766 .nway_reset = usbnet_nway_reset,
769 static void ax88172_set_multicast(struct net_device *net)
771 struct usbnet *dev = netdev_priv(net);
772 struct asix_data *data = (struct asix_data *)&dev->data;
775 if (net->flags & IFF_PROMISC) {
777 } else if (net->flags & IFF_ALLMULTI ||
778 netdev_mc_count(net) > AX_MAX_MCAST) {
780 } else if (netdev_mc_empty(net)) {
781 /* just broadcast and directed */
783 /* We use the 20 byte dev->data
784 * for our 8 byte filter buffer
785 * to avoid allocating memory that
786 * is tricky to free later */
787 struct netdev_hw_addr *ha;
790 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
792 /* Build the multicast hash filter. */
793 netdev_for_each_mc_addr(ha, net) {
794 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
795 data->multi_filter[crc_bits >> 3] |=
799 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
800 AX_MCAST_FILTER_SIZE, data->multi_filter);
805 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
808 static int ax88172_link_reset(struct usbnet *dev)
811 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
813 mii_check_media(&dev->mii, 1, 1);
814 mii_ethtool_gset(&dev->mii, &ecmd);
815 mode = AX88172_MEDIUM_DEFAULT;
817 if (ecmd.duplex != DUPLEX_FULL)
818 mode |= ~AX88172_MEDIUM_FD;
820 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
821 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
823 asix_write_medium_mode(dev, mode);
828 static const struct net_device_ops ax88172_netdev_ops = {
829 .ndo_open = usbnet_open,
830 .ndo_stop = usbnet_stop,
831 .ndo_start_xmit = usbnet_start_xmit,
832 .ndo_tx_timeout = usbnet_tx_timeout,
833 .ndo_change_mtu = usbnet_change_mtu,
834 .ndo_set_mac_address = eth_mac_addr,
835 .ndo_validate_addr = eth_validate_addr,
836 .ndo_do_ioctl = asix_ioctl,
837 .ndo_set_rx_mode = ax88172_set_multicast,
840 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
845 unsigned long gpio_bits = dev->driver_info->data;
846 struct asix_data *data = (struct asix_data *)&dev->data;
848 data->eeprom_len = AX88172_EEPROM_LEN;
850 usbnet_get_endpoints(dev,intf);
852 /* Toggle the GPIOs in a manufacturer/model specific way */
853 for (i = 2; i >= 0; i--) {
854 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
855 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
861 ret = asix_write_rx_ctl(dev, 0x80);
865 /* Get the MAC address */
866 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
868 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
871 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
873 /* Initialize MII structure */
874 dev->mii.dev = dev->net;
875 dev->mii.mdio_read = asix_mdio_read;
876 dev->mii.mdio_write = asix_mdio_write;
877 dev->mii.phy_id_mask = 0x3f;
878 dev->mii.reg_num_mask = 0x1f;
879 dev->mii.phy_id = asix_get_phy_addr(dev);
881 dev->net->netdev_ops = &ax88172_netdev_ops;
882 dev->net->ethtool_ops = &ax88172_ethtool_ops;
884 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
885 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
886 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
887 mii_nway_restart(&dev->mii);
895 static const struct ethtool_ops ax88772_ethtool_ops = {
896 .get_drvinfo = asix_get_drvinfo,
897 .get_link = asix_get_link,
898 .get_msglevel = usbnet_get_msglevel,
899 .set_msglevel = usbnet_set_msglevel,
900 .get_wol = asix_get_wol,
901 .set_wol = asix_set_wol,
902 .get_eeprom_len = asix_get_eeprom_len,
903 .get_eeprom = asix_get_eeprom,
904 .get_settings = usbnet_get_settings,
905 .set_settings = usbnet_set_settings,
906 .nway_reset = usbnet_nway_reset,
909 static int ax88772_link_reset(struct usbnet *dev)
912 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
914 mii_check_media(&dev->mii, 1, 1);
915 mii_ethtool_gset(&dev->mii, &ecmd);
916 mode = AX88772_MEDIUM_DEFAULT;
918 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
919 mode &= ~AX_MEDIUM_PS;
921 if (ecmd.duplex != DUPLEX_FULL)
922 mode &= ~AX_MEDIUM_FD;
924 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
925 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
927 asix_write_medium_mode(dev, mode);
932 static int ax88772_reset(struct usbnet *dev)
934 struct asix_data *data = (struct asix_data *)&dev->data;
938 ret = asix_write_gpio(dev,
939 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
943 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
945 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
947 dbg("Select PHY #1 failed: %d", ret);
951 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
957 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
964 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
968 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
974 rx_ctl = asix_read_rx_ctl(dev);
975 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
976 ret = asix_write_rx_ctl(dev, 0x0000);
980 rx_ctl = asix_read_rx_ctl(dev);
981 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
983 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
989 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
995 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
996 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
997 ADVERTISE_ALL | ADVERTISE_CSMA);
998 mii_nway_restart(&dev->mii);
1000 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
1004 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1005 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1006 AX88772_IPG2_DEFAULT, 0, NULL);
1008 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1012 /* Rewrite MAC address */
1013 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1014 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1019 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1020 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1024 rx_ctl = asix_read_rx_ctl(dev);
1025 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1027 rx_ctl = asix_read_medium_status(dev);
1028 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1037 static const struct net_device_ops ax88772_netdev_ops = {
1038 .ndo_open = usbnet_open,
1039 .ndo_stop = usbnet_stop,
1040 .ndo_start_xmit = usbnet_start_xmit,
1041 .ndo_tx_timeout = usbnet_tx_timeout,
1042 .ndo_change_mtu = usbnet_change_mtu,
1043 .ndo_set_mac_address = asix_set_mac_address,
1044 .ndo_validate_addr = eth_validate_addr,
1045 .ndo_do_ioctl = asix_ioctl,
1046 .ndo_set_rx_mode = asix_set_multicast,
1049 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1052 struct asix_data *data = (struct asix_data *)&dev->data;
1056 data->eeprom_len = AX88772_EEPROM_LEN;
1058 usbnet_get_endpoints(dev,intf);
1060 /* Get the MAC address */
1061 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1063 dbg("Failed to read MAC address: %d", ret);
1066 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1068 /* Initialize MII structure */
1069 dev->mii.dev = dev->net;
1070 dev->mii.mdio_read = asix_mdio_read;
1071 dev->mii.mdio_write = asix_mdio_write;
1072 dev->mii.phy_id_mask = 0x1f;
1073 dev->mii.reg_num_mask = 0x1f;
1074 dev->mii.phy_id = asix_get_phy_addr(dev);
1076 dev->net->netdev_ops = &ax88772_netdev_ops;
1077 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1079 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
1081 /* Reset the PHY to normal operation mode */
1082 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
1084 dbg("Select PHY #1 failed: %d", ret);
1088 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1094 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1100 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
1102 /* Read PHYID register *AFTER* the PHY was reset properly */
1103 phyid = asix_get_phyid(dev);
1104 dbg("PHYID=0x%08x", phyid);
1106 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1107 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1108 /* hard_mtu is still the default - the device does not support
1110 dev->rx_urb_size = 2048;
1116 static const struct ethtool_ops ax88178_ethtool_ops = {
1117 .get_drvinfo = asix_get_drvinfo,
1118 .get_link = asix_get_link,
1119 .get_msglevel = usbnet_get_msglevel,
1120 .set_msglevel = usbnet_set_msglevel,
1121 .get_wol = asix_get_wol,
1122 .set_wol = asix_set_wol,
1123 .get_eeprom_len = asix_get_eeprom_len,
1124 .get_eeprom = asix_get_eeprom,
1125 .get_settings = usbnet_get_settings,
1126 .set_settings = usbnet_set_settings,
1127 .nway_reset = usbnet_nway_reset,
1130 static int marvell_phy_init(struct usbnet *dev)
1132 struct asix_data *data = (struct asix_data *)&dev->data;
1135 netdev_dbg(dev->net, "marvell_phy_init()\n");
1137 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1138 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1140 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1141 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1143 if (data->ledmode) {
1144 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1145 MII_MARVELL_LED_CTRL);
1146 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1149 reg |= (1 + 0x0100);
1150 asix_mdio_write(dev->net, dev->mii.phy_id,
1151 MII_MARVELL_LED_CTRL, reg);
1153 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1154 MII_MARVELL_LED_CTRL);
1155 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1162 static int rtl8211cl_phy_init(struct usbnet *dev)
1164 struct asix_data *data = (struct asix_data *)&dev->data;
1166 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1168 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1169 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1170 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1171 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1172 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1174 if (data->ledmode == 12) {
1175 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1176 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1177 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1183 static int marvell_led_status(struct usbnet *dev, u16 speed)
1185 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1187 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1189 /* Clear out the center LED bits - 0x03F0 */
1203 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1204 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1209 static int ax88178_reset(struct usbnet *dev)
1211 struct asix_data *data = (struct asix_data *)&dev->data;
1218 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1219 dbg("GPIO Status: 0x%04x", status);
1221 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1222 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1223 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1225 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1227 if (eeprom == cpu_to_le16(0xffff)) {
1228 data->phymode = PHY_MODE_MARVELL;
1232 data->phymode = le16_to_cpu(eeprom) & 0x7F;
1233 data->ledmode = le16_to_cpu(eeprom) >> 8;
1234 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1236 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1238 /* Power up external GigaPHY through AX88178 GPIO pin */
1239 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1240 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1241 asix_write_gpio(dev, 0x003c, 30);
1242 asix_write_gpio(dev, 0x001c, 300);
1243 asix_write_gpio(dev, 0x003c, 30);
1245 dbg("gpio phymode == 1 path");
1246 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1247 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1250 /* Read PHYID register *AFTER* powering up PHY */
1251 phyid = asix_get_phyid(dev);
1252 dbg("PHYID=0x%08x", phyid);
1254 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
1255 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
1257 asix_sw_reset(dev, 0);
1260 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1263 asix_write_rx_ctl(dev, 0);
1265 if (data->phymode == PHY_MODE_MARVELL) {
1266 marvell_phy_init(dev);
1268 } else if (data->phymode == PHY_MODE_RTL8211CL)
1269 rtl8211cl_phy_init(dev);
1271 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1272 BMCR_RESET | BMCR_ANENABLE);
1273 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1274 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1275 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1276 ADVERTISE_1000FULL);
1278 mii_nway_restart(&dev->mii);
1280 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
1284 /* Rewrite MAC address */
1285 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1286 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1291 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1298 static int ax88178_link_reset(struct usbnet *dev)
1301 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1302 struct asix_data *data = (struct asix_data *)&dev->data;
1305 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1307 mii_check_media(&dev->mii, 1, 1);
1308 mii_ethtool_gset(&dev->mii, &ecmd);
1309 mode = AX88178_MEDIUM_DEFAULT;
1310 speed = ethtool_cmd_speed(&ecmd);
1312 if (speed == SPEED_1000)
1313 mode |= AX_MEDIUM_GM;
1314 else if (speed == SPEED_100)
1315 mode |= AX_MEDIUM_PS;
1317 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1319 mode |= AX_MEDIUM_ENCK;
1321 if (ecmd.duplex == DUPLEX_FULL)
1322 mode |= AX_MEDIUM_FD;
1324 mode &= ~AX_MEDIUM_FD;
1326 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1327 speed, ecmd.duplex, mode);
1329 asix_write_medium_mode(dev, mode);
1331 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1332 marvell_led_status(dev, speed);
1337 static void ax88178_set_mfb(struct usbnet *dev)
1339 u16 mfb = AX_RX_CTL_MFB_16384;
1342 int old_rx_urb_size = dev->rx_urb_size;
1344 if (dev->hard_mtu < 2048) {
1345 dev->rx_urb_size = 2048;
1346 mfb = AX_RX_CTL_MFB_2048;
1347 } else if (dev->hard_mtu < 4096) {
1348 dev->rx_urb_size = 4096;
1349 mfb = AX_RX_CTL_MFB_4096;
1350 } else if (dev->hard_mtu < 8192) {
1351 dev->rx_urb_size = 8192;
1352 mfb = AX_RX_CTL_MFB_8192;
1353 } else if (dev->hard_mtu < 16384) {
1354 dev->rx_urb_size = 16384;
1355 mfb = AX_RX_CTL_MFB_16384;
1358 rxctl = asix_read_rx_ctl(dev);
1359 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1361 medium = asix_read_medium_status(dev);
1362 if (dev->net->mtu > 1500)
1363 medium |= AX_MEDIUM_JFE;
1365 medium &= ~AX_MEDIUM_JFE;
1366 asix_write_medium_mode(dev, medium);
1368 if (dev->rx_urb_size > old_rx_urb_size)
1369 usbnet_unlink_rx_urbs(dev);
1372 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1374 struct usbnet *dev = netdev_priv(net);
1375 int ll_mtu = new_mtu + net->hard_header_len + 4;
1377 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1379 if (new_mtu <= 0 || ll_mtu > 16384)
1382 if ((ll_mtu % dev->maxpacket) == 0)
1386 dev->hard_mtu = net->mtu + net->hard_header_len;
1387 ax88178_set_mfb(dev);
1392 static const struct net_device_ops ax88178_netdev_ops = {
1393 .ndo_open = usbnet_open,
1394 .ndo_stop = usbnet_stop,
1395 .ndo_start_xmit = usbnet_start_xmit,
1396 .ndo_tx_timeout = usbnet_tx_timeout,
1397 .ndo_set_mac_address = asix_set_mac_address,
1398 .ndo_validate_addr = eth_validate_addr,
1399 .ndo_set_rx_mode = asix_set_multicast,
1400 .ndo_do_ioctl = asix_ioctl,
1401 .ndo_change_mtu = ax88178_change_mtu,
1404 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1408 struct asix_data *data = (struct asix_data *)&dev->data;
1410 data->eeprom_len = AX88772_EEPROM_LEN;
1412 usbnet_get_endpoints(dev,intf);
1414 /* Get the MAC address */
1415 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1417 dbg("Failed to read MAC address: %d", ret);
1420 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1422 /* Initialize MII structure */
1423 dev->mii.dev = dev->net;
1424 dev->mii.mdio_read = asix_mdio_read;
1425 dev->mii.mdio_write = asix_mdio_write;
1426 dev->mii.phy_id_mask = 0x1f;
1427 dev->mii.reg_num_mask = 0xff;
1428 dev->mii.supports_gmii = 1;
1429 dev->mii.phy_id = asix_get_phy_addr(dev);
1431 dev->net->netdev_ops = &ax88178_netdev_ops;
1432 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1434 /* Blink LEDS so users know driver saw dongle */
1435 asix_sw_reset(dev, 0);
1438 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1441 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1442 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1443 /* hard_mtu is still the default - the device does not support
1445 dev->rx_urb_size = 2048;
1451 static const struct driver_info ax8817x_info = {
1452 .description = "ASIX AX8817x USB 2.0 Ethernet",
1453 .bind = ax88172_bind,
1454 .status = asix_status,
1455 .link_reset = ax88172_link_reset,
1456 .reset = ax88172_link_reset,
1457 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1461 static const struct driver_info dlink_dub_e100_info = {
1462 .description = "DLink DUB-E100 USB Ethernet",
1463 .bind = ax88172_bind,
1464 .status = asix_status,
1465 .link_reset = ax88172_link_reset,
1466 .reset = ax88172_link_reset,
1467 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1471 static const struct driver_info netgear_fa120_info = {
1472 .description = "Netgear FA-120 USB Ethernet",
1473 .bind = ax88172_bind,
1474 .status = asix_status,
1475 .link_reset = ax88172_link_reset,
1476 .reset = ax88172_link_reset,
1477 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1481 static const struct driver_info hawking_uf200_info = {
1482 .description = "Hawking UF200 USB Ethernet",
1483 .bind = ax88172_bind,
1484 .status = asix_status,
1485 .link_reset = ax88172_link_reset,
1486 .reset = ax88172_link_reset,
1487 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1491 static const struct driver_info ax88772_info = {
1492 .description = "ASIX AX88772 USB 2.0 Ethernet",
1493 .bind = ax88772_bind,
1494 .status = asix_status,
1495 .link_reset = ax88772_link_reset,
1496 .reset = ax88772_reset,
1497 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1498 .rx_fixup = asix_rx_fixup,
1499 .tx_fixup = asix_tx_fixup,
1502 static const struct driver_info ax88178_info = {
1503 .description = "ASIX AX88178 USB 2.0 Ethernet",
1504 .bind = ax88178_bind,
1505 .status = asix_status,
1506 .link_reset = ax88178_link_reset,
1507 .reset = ax88178_reset,
1508 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1509 .rx_fixup = asix_rx_fixup,
1510 .tx_fixup = asix_tx_fixup,
1513 static const struct usb_device_id products [] = {
1516 USB_DEVICE (0x077b, 0x2226),
1517 .driver_info = (unsigned long) &ax8817x_info,
1520 USB_DEVICE (0x0846, 0x1040),
1521 .driver_info = (unsigned long) &netgear_fa120_info,
1524 USB_DEVICE (0x2001, 0x1a00),
1525 .driver_info = (unsigned long) &dlink_dub_e100_info,
1527 // Intellinet, ST Lab USB Ethernet
1528 USB_DEVICE (0x0b95, 0x1720),
1529 .driver_info = (unsigned long) &ax8817x_info,
1531 // Hawking UF200, TrendNet TU2-ET100
1532 USB_DEVICE (0x07b8, 0x420a),
1533 .driver_info = (unsigned long) &hawking_uf200_info,
1535 // Billionton Systems, USB2AR
1536 USB_DEVICE (0x08dd, 0x90ff),
1537 .driver_info = (unsigned long) &ax8817x_info,
1540 USB_DEVICE (0x0557, 0x2009),
1541 .driver_info = (unsigned long) &ax8817x_info,
1543 // Buffalo LUA-U2-KTX
1544 USB_DEVICE (0x0411, 0x003d),
1545 .driver_info = (unsigned long) &ax8817x_info,
1547 // Buffalo LUA-U2-GT 10/100/1000
1548 USB_DEVICE (0x0411, 0x006e),
1549 .driver_info = (unsigned long) &ax88178_info,
1551 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1552 USB_DEVICE (0x6189, 0x182d),
1553 .driver_info = (unsigned long) &ax8817x_info,
1555 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1556 USB_DEVICE (0x0df6, 0x0056),
1557 .driver_info = (unsigned long) &ax88178_info,
1559 // corega FEther USB2-TX
1560 USB_DEVICE (0x07aa, 0x0017),
1561 .driver_info = (unsigned long) &ax8817x_info,
1563 // Surecom EP-1427X-2
1564 USB_DEVICE (0x1189, 0x0893),
1565 .driver_info = (unsigned long) &ax8817x_info,
1567 // goodway corp usb gwusb2e
1568 USB_DEVICE (0x1631, 0x6200),
1569 .driver_info = (unsigned long) &ax8817x_info,
1571 // JVC MP-PRX1 Port Replicator
1572 USB_DEVICE (0x04f1, 0x3008),
1573 .driver_info = (unsigned long) &ax8817x_info,
1575 // ASIX AX88772B 10/100
1576 USB_DEVICE (0x0b95, 0x772b),
1577 .driver_info = (unsigned long) &ax88772_info,
1579 // ASIX AX88772 10/100
1580 USB_DEVICE (0x0b95, 0x7720),
1581 .driver_info = (unsigned long) &ax88772_info,
1583 // ASIX AX88178 10/100/1000
1584 USB_DEVICE (0x0b95, 0x1780),
1585 .driver_info = (unsigned long) &ax88178_info,
1587 // Logitec LAN-GTJ/U2A
1588 USB_DEVICE (0x0789, 0x0160),
1589 .driver_info = (unsigned long) &ax88178_info,
1591 // Linksys USB200M Rev 2
1592 USB_DEVICE (0x13b1, 0x0018),
1593 .driver_info = (unsigned long) &ax88772_info,
1595 // 0Q0 cable ethernet
1596 USB_DEVICE (0x1557, 0x7720),
1597 .driver_info = (unsigned long) &ax88772_info,
1599 // DLink DUB-E100 H/W Ver B1
1600 USB_DEVICE (0x07d1, 0x3c05),
1601 .driver_info = (unsigned long) &ax88772_info,
1603 // DLink DUB-E100 H/W Ver B1 Alternate
1604 USB_DEVICE (0x2001, 0x3c05),
1605 .driver_info = (unsigned long) &ax88772_info,
1608 USB_DEVICE (0x1737, 0x0039),
1609 .driver_info = (unsigned long) &ax88178_info,
1612 USB_DEVICE (0x04bb, 0x0930),
1613 .driver_info = (unsigned long) &ax88178_info,
1616 USB_DEVICE(0x050d, 0x5055),
1617 .driver_info = (unsigned long) &ax88178_info,
1619 // Apple USB Ethernet Adapter
1620 USB_DEVICE(0x05ac, 0x1402),
1621 .driver_info = (unsigned long) &ax88772_info,
1623 // Cables-to-Go USB Ethernet Adapter
1624 USB_DEVICE(0x0b95, 0x772a),
1625 .driver_info = (unsigned long) &ax88772_info,
1628 USB_DEVICE(0x14ea, 0xab11),
1629 .driver_info = (unsigned long) &ax88178_info,
1632 USB_DEVICE(0x0db0, 0xa877),
1633 .driver_info = (unsigned long) &ax88772_info,
1635 // Asus USB Ethernet Adapter
1636 USB_DEVICE (0x0b95, 0x7e2b),
1637 .driver_info = (unsigned long) &ax88772_info,
1641 MODULE_DEVICE_TABLE(usb, products);
1643 static struct usb_driver asix_driver = {
1644 .name = DRIVER_NAME,
1645 .id_table = products,
1646 .probe = usbnet_probe,
1647 .suspend = usbnet_suspend,
1648 .resume = usbnet_resume,
1649 .disconnect = usbnet_disconnect,
1650 .supports_autosuspend = 1,
1651 .disable_hub_initiated_lpm = 1,
1654 module_usb_driver(asix_driver);
1656 MODULE_AUTHOR("David Hollis");
1657 MODULE_VERSION(DRIVER_VERSION);
1658 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1659 MODULE_LICENSE("GPL");