2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
39 #define DRIVER_VERSION "22-Dec-2011"
40 #define DRIVER_NAME "asix"
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_NODE_ID 0x14
59 #define AX_CMD_WRITE_IPG2 0x14
60 #define AX_CMD_WRITE_MULTI_FILTER 0x16
61 #define AX88172_CMD_READ_NODE_ID 0x17
62 #define AX_CMD_READ_PHY_ID 0x19
63 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
64 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
65 #define AX_CMD_READ_MONITOR_MODE 0x1c
66 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
67 #define AX_CMD_READ_GPIOS 0x1e
68 #define AX_CMD_WRITE_GPIOS 0x1f
69 #define AX_CMD_SW_RESET 0x20
70 #define AX_CMD_SW_PHY_STATUS 0x21
71 #define AX_CMD_SW_PHY_SELECT 0x22
73 #define AX_MONITOR_MODE 0x01
74 #define AX_MONITOR_LINK 0x02
75 #define AX_MONITOR_MAGIC 0x04
76 #define AX_MONITOR_HSFS 0x10
78 /* AX88172 Medium Status Register values */
79 #define AX88172_MEDIUM_FD 0x02
80 #define AX88172_MEDIUM_TX 0x04
81 #define AX88172_MEDIUM_FC 0x10
82 #define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
85 #define AX_MCAST_FILTER_SIZE 8
86 #define AX_MAX_MCAST 64
88 #define AX_SWRESET_CLEAR 0x00
89 #define AX_SWRESET_RR 0x01
90 #define AX_SWRESET_RT 0x02
91 #define AX_SWRESET_PRTE 0x04
92 #define AX_SWRESET_PRL 0x08
93 #define AX_SWRESET_BZ 0x10
94 #define AX_SWRESET_IPRL 0x20
95 #define AX_SWRESET_IPPD 0x40
97 #define AX88772_IPG0_DEFAULT 0x15
98 #define AX88772_IPG1_DEFAULT 0x0c
99 #define AX88772_IPG2_DEFAULT 0x12
101 /* AX88772 & AX88178 Medium Mode Register */
102 #define AX_MEDIUM_PF 0x0080
103 #define AX_MEDIUM_JFE 0x0040
104 #define AX_MEDIUM_TFC 0x0020
105 #define AX_MEDIUM_RFC 0x0010
106 #define AX_MEDIUM_ENCK 0x0008
107 #define AX_MEDIUM_AC 0x0004
108 #define AX_MEDIUM_FD 0x0002
109 #define AX_MEDIUM_GM 0x0001
110 #define AX_MEDIUM_SM 0x1000
111 #define AX_MEDIUM_SBP 0x0800
112 #define AX_MEDIUM_PS 0x0200
113 #define AX_MEDIUM_RE 0x0100
115 #define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
120 #define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE)
125 /* AX88772 & AX88178 RX_CTL values */
126 #define AX_RX_CTL_SO 0x0080
127 #define AX_RX_CTL_AP 0x0020
128 #define AX_RX_CTL_AM 0x0010
129 #define AX_RX_CTL_AB 0x0008
130 #define AX_RX_CTL_SEP 0x0004
131 #define AX_RX_CTL_AMALL 0x0002
132 #define AX_RX_CTL_PRO 0x0001
133 #define AX_RX_CTL_MFB_2048 0x0000
134 #define AX_RX_CTL_MFB_4096 0x0100
135 #define AX_RX_CTL_MFB_8192 0x0200
136 #define AX_RX_CTL_MFB_16384 0x0300
138 #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB)
140 /* GPIO 0 .. 2 toggles */
141 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
142 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
143 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
144 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
145 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
146 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
147 #define AX_GPIO_RESERVED 0x40 /* Reserved */
148 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150 #define AX_EEPROM_MAGIC 0xdeadbeef
151 #define AX88172_EEPROM_LEN 0x40
152 #define AX88772_EEPROM_LEN 0xff
154 #define PHY_MODE_MARVELL 0x0000
155 #define MII_MARVELL_LED_CTRL 0x0018
156 #define MII_MARVELL_STATUS 0x001b
157 #define MII_MARVELL_CTRL 0x0014
159 #define MARVELL_LED_MANUAL 0x0019
161 #define MARVELL_STATUS_HWCFG 0x0004
163 #define MARVELL_CTRL_TXDELAY 0x0002
164 #define MARVELL_CTRL_RXDELAY 0x0080
166 #define PHY_MODE_RTL8211CL 0x000C
168 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
170 u8 multi_filter[AX_MCAST_FILTER_SIZE];
171 u8 mac_addr[ETH_ALEN];
177 struct ax88172_int_data {
185 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
186 u16 size, void *data)
191 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
192 cmd, value, index, size);
194 buf = kmalloc(size, GFP_KERNEL);
198 err = usb_control_msg(
200 usb_rcvctrlpipe(dev->udev, 0),
202 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
207 USB_CTRL_GET_TIMEOUT);
209 memcpy(data, buf, size);
218 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
219 u16 size, void *data)
224 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
225 cmd, value, index, size);
228 buf = kmemdup(data, size, GFP_KERNEL);
233 err = usb_control_msg(
235 usb_sndctrlpipe(dev->udev, 0),
237 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
242 USB_CTRL_SET_TIMEOUT);
249 static void asix_async_cmd_callback(struct urb *urb)
251 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
252 int status = urb->status;
255 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
263 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
264 u16 size, void *data)
266 struct usb_ctrlrequest *req;
270 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
271 cmd, value, index, size);
273 urb = usb_alloc_urb(0, GFP_ATOMIC);
275 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
279 req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC);
281 netdev_err(dev->net, "Failed to allocate memory for control request\n");
286 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
288 req->wValue = cpu_to_le16(value);
289 req->wIndex = cpu_to_le16(index);
290 req->wLength = cpu_to_le16(size);
292 usb_fill_control_urb(urb, dev->udev,
293 usb_sndctrlpipe(dev->udev, 0),
294 (void *)req, data, size,
295 asix_async_cmd_callback, req);
297 status = usb_submit_urb(urb, GFP_ATOMIC);
299 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
306 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
311 struct sk_buff *ax_skb;
314 head = (u8 *) skb->data;
315 memcpy(&header, head, sizeof(header));
316 le32_to_cpus(&header);
317 packet = head + sizeof(header);
321 while (skb->len > 0) {
322 if ((header & 0x07ff) != ((~header >> 16) & 0x07ff))
323 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
325 /* get the packet length */
326 size = (u16) (header & 0x000007ff);
328 if ((skb->len) - ((size + 1) & 0xfffe) == 0) {
329 u8 alignment = (unsigned long)skb->data & 0x3;
330 if (alignment != 0x2) {
332 * not 16bit aligned so use the room provided by
333 * the 32 bit header to align the data
335 * note we want 16bit alignment as MAC header is
336 * 14bytes thus ip header will be aligned on
337 * 32bit boundary so accessing ipheader elements
338 * using a cast to struct ip header wont cause
339 * an unaligned accesses.
341 u8 realignment = (alignment + 2) & 0x3;
342 memmove(skb->data - realignment,
345 skb->data -= realignment;
346 skb_set_tail_pointer(skb, size);
351 if (size > dev->net->mtu + ETH_HLEN) {
352 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
356 ax_skb = skb_clone(skb, GFP_ATOMIC);
358 u8 alignment = (unsigned long)packet & 0x3;
361 if (alignment != 0x2) {
363 * not 16bit aligned use the room provided by
364 * the 32 bit header to align the data
366 u8 realignment = (alignment + 2) & 0x3;
367 memmove(packet - realignment, packet, size);
368 packet -= realignment;
370 ax_skb->data = packet;
371 skb_set_tail_pointer(ax_skb, size);
372 usbnet_skb_return(dev, ax_skb);
377 skb_pull(skb, (size + 1) & 0xfffe);
382 head = (u8 *) skb->data;
383 memcpy(&header, head, sizeof(header));
384 le32_to_cpus(&header);
385 packet = head + sizeof(header);
390 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
397 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
401 int headroom = skb_headroom(skb);
402 int tailroom = skb_tailroom(skb);
404 u32 padbytes = 0xffff0000;
406 padlen = ((skb->len + 4) % 512) ? 0 : 4;
408 if ((!skb_cloned(skb)) &&
409 ((headroom + tailroom) >= (4 + padlen))) {
410 if ((headroom < 4) || (tailroom < padlen)) {
411 skb->data = memmove(skb->head + 4, skb->data, skb->len);
412 skb_set_tail_pointer(skb, skb->len);
415 struct sk_buff *skb2;
416 skb2 = skb_copy_expand(skb, 4, padlen, flags);
417 dev_kfree_skb_any(skb);
424 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
425 cpu_to_le32s(&packet_len);
426 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
428 if ((skb->len % 512) == 0) {
429 cpu_to_le32s(&padbytes);
430 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
431 skb_put(skb, sizeof(padbytes));
436 static void asix_status(struct usbnet *dev, struct urb *urb)
438 struct ax88172_int_data *event;
441 if (urb->actual_length < 8)
444 event = urb->transfer_buffer;
445 link = event->link & 0x01;
446 if (netif_carrier_ok(dev->net) != link) {
448 netif_carrier_on(dev->net);
449 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
451 netif_carrier_off(dev->net);
452 netdev_dbg(dev->net, "Link Status is: %d\n", link);
456 static inline int asix_set_sw_mii(struct usbnet *dev)
459 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
461 netdev_err(dev->net, "Failed to enable software MII access\n");
465 static inline int asix_set_hw_mii(struct usbnet *dev)
468 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
470 netdev_err(dev->net, "Failed to enable hardware MII access\n");
474 static inline int asix_get_phy_addr(struct usbnet *dev)
477 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
479 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
482 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
485 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
493 static int asix_sw_reset(struct usbnet *dev, u8 flags)
497 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
499 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
504 static u16 asix_read_rx_ctl(struct usbnet *dev)
507 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
510 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
513 ret = le16_to_cpu(v);
518 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
522 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
523 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
525 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
531 static u16 asix_read_medium_status(struct usbnet *dev)
534 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
537 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
539 return ret; /* TODO: callers not checking for error ret */
542 return le16_to_cpu(v);
546 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
550 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
551 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
553 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
559 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
563 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
564 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
566 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
576 * AX88772 & AX88178 have a 16-bit RX_CTL value
578 static void asix_set_multicast(struct net_device *net)
580 struct usbnet *dev = netdev_priv(net);
581 struct asix_data *data = (struct asix_data *)&dev->data;
582 u16 rx_ctl = AX_DEFAULT_RX_CTL;
584 if (net->flags & IFF_PROMISC) {
585 rx_ctl |= AX_RX_CTL_PRO;
586 } else if (net->flags & IFF_ALLMULTI ||
587 netdev_mc_count(net) > AX_MAX_MCAST) {
588 rx_ctl |= AX_RX_CTL_AMALL;
589 } else if (netdev_mc_empty(net)) {
590 /* just broadcast and directed */
592 /* We use the 20 byte dev->data
593 * for our 8 byte filter buffer
594 * to avoid allocating memory that
595 * is tricky to free later */
596 struct netdev_hw_addr *ha;
599 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
601 /* Build the multicast hash filter. */
602 netdev_for_each_mc_addr(ha, net) {
603 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
604 data->multi_filter[crc_bits >> 3] |=
608 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
609 AX_MCAST_FILTER_SIZE, data->multi_filter);
611 rx_ctl |= AX_RX_CTL_AM;
614 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
617 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
619 struct usbnet *dev = netdev_priv(netdev);
622 mutex_lock(&dev->phy_mutex);
623 asix_set_sw_mii(dev);
624 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
625 (__u16)loc, 2, &res);
626 asix_set_hw_mii(dev);
627 mutex_unlock(&dev->phy_mutex);
629 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
630 phy_id, loc, le16_to_cpu(res));
632 return le16_to_cpu(res);
636 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
638 struct usbnet *dev = netdev_priv(netdev);
639 __le16 res = cpu_to_le16(val);
641 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
643 mutex_lock(&dev->phy_mutex);
644 asix_set_sw_mii(dev);
645 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
646 asix_set_hw_mii(dev);
647 mutex_unlock(&dev->phy_mutex);
650 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
651 static u32 asix_get_phyid(struct usbnet *dev)
657 /* Poll for the rare case the FW or phy isn't ready yet. */
658 for (i = 0; i < 100; i++) {
659 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
660 if (phy_reg != 0 && phy_reg != 0xFFFF)
665 if (phy_reg <= 0 || phy_reg == 0xFFFF)
668 phy_id = (phy_reg & 0xffff) << 16;
670 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
674 phy_id |= (phy_reg & 0xffff);
680 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
682 struct usbnet *dev = netdev_priv(net);
685 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
686 wolinfo->supported = 0;
687 wolinfo->wolopts = 0;
690 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
691 wolinfo->wolopts = 0;
692 if (opt & AX_MONITOR_LINK)
693 wolinfo->wolopts |= WAKE_PHY;
694 if (opt & AX_MONITOR_MAGIC)
695 wolinfo->wolopts |= WAKE_MAGIC;
699 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
701 struct usbnet *dev = netdev_priv(net);
704 if (wolinfo->wolopts & WAKE_PHY)
705 opt |= AX_MONITOR_LINK;
706 if (wolinfo->wolopts & WAKE_MAGIC)
707 opt |= AX_MONITOR_MAGIC;
709 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
710 opt, 0, 0, NULL) < 0)
716 static int asix_get_eeprom_len(struct net_device *net)
718 struct usbnet *dev = netdev_priv(net);
719 struct asix_data *data = (struct asix_data *)&dev->data;
721 return data->eeprom_len;
724 static int asix_get_eeprom(struct net_device *net,
725 struct ethtool_eeprom *eeprom, u8 *data)
727 struct usbnet *dev = netdev_priv(net);
728 __le16 *ebuf = (__le16 *)data;
731 /* Crude hack to ensure that we don't overwrite memory
732 * if an odd length is supplied
737 eeprom->magic = AX_EEPROM_MAGIC;
739 /* ax8817x returns 2 bytes from eeprom on read */
740 for (i=0; i < eeprom->len / 2; i++) {
741 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
742 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
748 static void asix_get_drvinfo (struct net_device *net,
749 struct ethtool_drvinfo *info)
751 struct usbnet *dev = netdev_priv(net);
752 struct asix_data *data = (struct asix_data *)&dev->data;
754 /* Inherit standard device info */
755 usbnet_get_drvinfo(net, info);
756 strncpy (info->driver, DRIVER_NAME, sizeof info->driver);
757 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
758 info->eedump_len = data->eeprom_len;
761 static u32 asix_get_link(struct net_device *net)
763 struct usbnet *dev = netdev_priv(net);
765 return mii_link_ok(&dev->mii);
768 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
770 struct usbnet *dev = netdev_priv(net);
772 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
775 static int asix_set_mac_address(struct net_device *net, void *p)
777 struct usbnet *dev = netdev_priv(net);
778 struct asix_data *data = (struct asix_data *)&dev->data;
779 struct sockaddr *addr = p;
781 if (netif_running(net))
783 if (!is_valid_ether_addr(addr->sa_data))
784 return -EADDRNOTAVAIL;
786 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
788 /* We use the 20 byte dev->data
789 * for our 6 byte mac buffer
790 * to avoid allocating memory that
791 * is tricky to free later */
792 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
793 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
799 /* We need to override some ethtool_ops so we require our
800 own structure so we don't interfere with other usbnet
801 devices that may be connected at the same time. */
802 static const struct ethtool_ops ax88172_ethtool_ops = {
803 .get_drvinfo = asix_get_drvinfo,
804 .get_link = asix_get_link,
805 .get_msglevel = usbnet_get_msglevel,
806 .set_msglevel = usbnet_set_msglevel,
807 .get_wol = asix_get_wol,
808 .set_wol = asix_set_wol,
809 .get_eeprom_len = asix_get_eeprom_len,
810 .get_eeprom = asix_get_eeprom,
811 .get_settings = usbnet_get_settings,
812 .set_settings = usbnet_set_settings,
813 .nway_reset = usbnet_nway_reset,
816 static void ax88172_set_multicast(struct net_device *net)
818 struct usbnet *dev = netdev_priv(net);
819 struct asix_data *data = (struct asix_data *)&dev->data;
822 if (net->flags & IFF_PROMISC) {
824 } else if (net->flags & IFF_ALLMULTI ||
825 netdev_mc_count(net) > AX_MAX_MCAST) {
827 } else if (netdev_mc_empty(net)) {
828 /* just broadcast and directed */
830 /* We use the 20 byte dev->data
831 * for our 8 byte filter buffer
832 * to avoid allocating memory that
833 * is tricky to free later */
834 struct netdev_hw_addr *ha;
837 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
839 /* Build the multicast hash filter. */
840 netdev_for_each_mc_addr(ha, net) {
841 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
842 data->multi_filter[crc_bits >> 3] |=
846 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
847 AX_MCAST_FILTER_SIZE, data->multi_filter);
852 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
855 static int ax88172_link_reset(struct usbnet *dev)
858 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
860 mii_check_media(&dev->mii, 1, 1);
861 mii_ethtool_gset(&dev->mii, &ecmd);
862 mode = AX88172_MEDIUM_DEFAULT;
864 if (ecmd.duplex != DUPLEX_FULL)
865 mode |= ~AX88172_MEDIUM_FD;
867 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
868 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
870 asix_write_medium_mode(dev, mode);
875 static const struct net_device_ops ax88172_netdev_ops = {
876 .ndo_open = usbnet_open,
877 .ndo_stop = usbnet_stop,
878 .ndo_start_xmit = usbnet_start_xmit,
879 .ndo_tx_timeout = usbnet_tx_timeout,
880 .ndo_change_mtu = usbnet_change_mtu,
881 .ndo_set_mac_address = eth_mac_addr,
882 .ndo_validate_addr = eth_validate_addr,
883 .ndo_do_ioctl = asix_ioctl,
884 .ndo_set_rx_mode = ax88172_set_multicast,
887 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
892 unsigned long gpio_bits = dev->driver_info->data;
893 struct asix_data *data = (struct asix_data *)&dev->data;
895 data->eeprom_len = AX88172_EEPROM_LEN;
897 usbnet_get_endpoints(dev,intf);
899 /* Toggle the GPIOs in a manufacturer/model specific way */
900 for (i = 2; i >= 0; i--) {
901 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
902 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
908 ret = asix_write_rx_ctl(dev, 0x80);
912 /* Get the MAC address */
913 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
915 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
918 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
920 /* Initialize MII structure */
921 dev->mii.dev = dev->net;
922 dev->mii.mdio_read = asix_mdio_read;
923 dev->mii.mdio_write = asix_mdio_write;
924 dev->mii.phy_id_mask = 0x3f;
925 dev->mii.reg_num_mask = 0x1f;
926 dev->mii.phy_id = asix_get_phy_addr(dev);
928 dev->net->netdev_ops = &ax88172_netdev_ops;
929 dev->net->ethtool_ops = &ax88172_ethtool_ops;
931 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
932 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
933 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
934 mii_nway_restart(&dev->mii);
942 static const struct ethtool_ops ax88772_ethtool_ops = {
943 .get_drvinfo = asix_get_drvinfo,
944 .get_link = asix_get_link,
945 .get_msglevel = usbnet_get_msglevel,
946 .set_msglevel = usbnet_set_msglevel,
947 .get_wol = asix_get_wol,
948 .set_wol = asix_set_wol,
949 .get_eeprom_len = asix_get_eeprom_len,
950 .get_eeprom = asix_get_eeprom,
951 .get_settings = usbnet_get_settings,
952 .set_settings = usbnet_set_settings,
953 .nway_reset = usbnet_nway_reset,
956 static int ax88772_link_reset(struct usbnet *dev)
959 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
961 mii_check_media(&dev->mii, 1, 1);
962 mii_ethtool_gset(&dev->mii, &ecmd);
963 mode = AX88772_MEDIUM_DEFAULT;
965 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
966 mode &= ~AX_MEDIUM_PS;
968 if (ecmd.duplex != DUPLEX_FULL)
969 mode &= ~AX_MEDIUM_FD;
971 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
972 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
974 asix_write_medium_mode(dev, mode);
979 static int ax88772_reset(struct usbnet *dev)
984 ret = asix_write_gpio(dev,
985 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
989 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
991 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
993 dbg("Select PHY #1 failed: %d", ret);
997 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1003 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1010 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
1014 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
1020 rx_ctl = asix_read_rx_ctl(dev);
1021 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
1022 ret = asix_write_rx_ctl(dev, 0x0000);
1026 rx_ctl = asix_read_rx_ctl(dev);
1027 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1029 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
1035 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
1041 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1042 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1043 ADVERTISE_ALL | ADVERTISE_CSMA);
1044 mii_nway_restart(&dev->mii);
1046 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
1050 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1051 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1052 AX88772_IPG2_DEFAULT, 0, NULL);
1054 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1058 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1059 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1063 rx_ctl = asix_read_rx_ctl(dev);
1064 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1066 rx_ctl = asix_read_medium_status(dev);
1067 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1076 static const struct net_device_ops ax88772_netdev_ops = {
1077 .ndo_open = usbnet_open,
1078 .ndo_stop = usbnet_stop,
1079 .ndo_start_xmit = usbnet_start_xmit,
1080 .ndo_tx_timeout = usbnet_tx_timeout,
1081 .ndo_change_mtu = usbnet_change_mtu,
1082 .ndo_set_mac_address = asix_set_mac_address,
1083 .ndo_validate_addr = eth_validate_addr,
1084 .ndo_do_ioctl = asix_ioctl,
1085 .ndo_set_rx_mode = asix_set_multicast,
1088 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1091 struct asix_data *data = (struct asix_data *)&dev->data;
1095 data->eeprom_len = AX88772_EEPROM_LEN;
1097 usbnet_get_endpoints(dev,intf);
1099 /* Get the MAC address */
1100 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1102 dbg("Failed to read MAC address: %d", ret);
1105 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1107 /* Initialize MII structure */
1108 dev->mii.dev = dev->net;
1109 dev->mii.mdio_read = asix_mdio_read;
1110 dev->mii.mdio_write = asix_mdio_write;
1111 dev->mii.phy_id_mask = 0x1f;
1112 dev->mii.reg_num_mask = 0x1f;
1113 dev->mii.phy_id = asix_get_phy_addr(dev);
1115 dev->net->netdev_ops = &ax88772_netdev_ops;
1116 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1118 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
1120 /* Reset the PHY to normal operation mode */
1121 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
1123 dbg("Select PHY #1 failed: %d", ret);
1127 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1133 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1139 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
1141 /* Read PHYID register *AFTER* the PHY was reset properly */
1142 phyid = asix_get_phyid(dev);
1143 dbg("PHYID=0x%08x", phyid);
1145 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1146 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1147 /* hard_mtu is still the default - the device does not support
1149 dev->rx_urb_size = 2048;
1155 static struct ethtool_ops ax88178_ethtool_ops = {
1156 .get_drvinfo = asix_get_drvinfo,
1157 .get_link = asix_get_link,
1158 .get_msglevel = usbnet_get_msglevel,
1159 .set_msglevel = usbnet_set_msglevel,
1160 .get_wol = asix_get_wol,
1161 .set_wol = asix_set_wol,
1162 .get_eeprom_len = asix_get_eeprom_len,
1163 .get_eeprom = asix_get_eeprom,
1164 .get_settings = usbnet_get_settings,
1165 .set_settings = usbnet_set_settings,
1166 .nway_reset = usbnet_nway_reset,
1169 static int marvell_phy_init(struct usbnet *dev)
1171 struct asix_data *data = (struct asix_data *)&dev->data;
1174 netdev_dbg(dev->net, "marvell_phy_init()\n");
1176 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1177 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1179 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1180 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1182 if (data->ledmode) {
1183 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1184 MII_MARVELL_LED_CTRL);
1185 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1188 reg |= (1 + 0x0100);
1189 asix_mdio_write(dev->net, dev->mii.phy_id,
1190 MII_MARVELL_LED_CTRL, reg);
1192 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1193 MII_MARVELL_LED_CTRL);
1194 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1201 static int rtl8211cl_phy_init(struct usbnet *dev)
1203 struct asix_data *data = (struct asix_data *)&dev->data;
1205 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1207 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1208 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1209 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1210 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1211 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1213 if (data->ledmode == 12) {
1214 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1215 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1216 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1222 static int marvell_led_status(struct usbnet *dev, u16 speed)
1224 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1226 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1228 /* Clear out the center LED bits - 0x03F0 */
1242 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1243 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1248 static int ax88178_reset(struct usbnet *dev)
1250 struct asix_data *data = (struct asix_data *)&dev->data;
1257 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1258 dbg("GPIO Status: 0x%04x", status);
1260 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1261 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1262 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1264 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1266 if (eeprom == cpu_to_le16(0xffff)) {
1267 data->phymode = PHY_MODE_MARVELL;
1271 data->phymode = le16_to_cpu(eeprom) & 0x7F;
1272 data->ledmode = le16_to_cpu(eeprom) >> 8;
1273 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1275 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1277 /* Power up external GigaPHY through AX88178 GPIO pin */
1278 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1279 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1280 asix_write_gpio(dev, 0x003c, 30);
1281 asix_write_gpio(dev, 0x001c, 300);
1282 asix_write_gpio(dev, 0x003c, 30);
1284 dbg("gpio phymode == 1 path");
1285 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1286 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1289 /* Read PHYID register *AFTER* powering up PHY */
1290 phyid = asix_get_phyid(dev);
1291 dbg("PHYID=0x%08x", phyid);
1293 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
1294 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
1296 asix_sw_reset(dev, 0);
1299 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1302 asix_write_rx_ctl(dev, 0);
1304 if (data->phymode == PHY_MODE_MARVELL) {
1305 marvell_phy_init(dev);
1307 } else if (data->phymode == PHY_MODE_RTL8211CL)
1308 rtl8211cl_phy_init(dev);
1310 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1311 BMCR_RESET | BMCR_ANENABLE);
1312 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1313 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1314 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1315 ADVERTISE_1000FULL);
1317 mii_nway_restart(&dev->mii);
1319 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
1323 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1330 static int ax88178_link_reset(struct usbnet *dev)
1333 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1334 struct asix_data *data = (struct asix_data *)&dev->data;
1337 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1339 mii_check_media(&dev->mii, 1, 1);
1340 mii_ethtool_gset(&dev->mii, &ecmd);
1341 mode = AX88178_MEDIUM_DEFAULT;
1342 speed = ethtool_cmd_speed(&ecmd);
1344 if (speed == SPEED_1000)
1345 mode |= AX_MEDIUM_GM;
1346 else if (speed == SPEED_100)
1347 mode |= AX_MEDIUM_PS;
1349 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1351 mode |= AX_MEDIUM_ENCK;
1353 if (ecmd.duplex == DUPLEX_FULL)
1354 mode |= AX_MEDIUM_FD;
1356 mode &= ~AX_MEDIUM_FD;
1358 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1359 speed, ecmd.duplex, mode);
1361 asix_write_medium_mode(dev, mode);
1363 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1364 marvell_led_status(dev, speed);
1369 static void ax88178_set_mfb(struct usbnet *dev)
1371 u16 mfb = AX_RX_CTL_MFB_16384;
1374 int old_rx_urb_size = dev->rx_urb_size;
1376 if (dev->hard_mtu < 2048) {
1377 dev->rx_urb_size = 2048;
1378 mfb = AX_RX_CTL_MFB_2048;
1379 } else if (dev->hard_mtu < 4096) {
1380 dev->rx_urb_size = 4096;
1381 mfb = AX_RX_CTL_MFB_4096;
1382 } else if (dev->hard_mtu < 8192) {
1383 dev->rx_urb_size = 8192;
1384 mfb = AX_RX_CTL_MFB_8192;
1385 } else if (dev->hard_mtu < 16384) {
1386 dev->rx_urb_size = 16384;
1387 mfb = AX_RX_CTL_MFB_16384;
1390 rxctl = asix_read_rx_ctl(dev);
1391 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1393 medium = asix_read_medium_status(dev);
1394 if (dev->net->mtu > 1500)
1395 medium |= AX_MEDIUM_JFE;
1397 medium &= ~AX_MEDIUM_JFE;
1398 asix_write_medium_mode(dev, medium);
1400 if (dev->rx_urb_size > old_rx_urb_size)
1401 usbnet_unlink_rx_urbs(dev);
1404 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1406 struct usbnet *dev = netdev_priv(net);
1407 int ll_mtu = new_mtu + net->hard_header_len + 4;
1409 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1411 if (new_mtu <= 0 || ll_mtu > 16384)
1414 if ((ll_mtu % dev->maxpacket) == 0)
1418 dev->hard_mtu = net->mtu + net->hard_header_len;
1419 ax88178_set_mfb(dev);
1424 static const struct net_device_ops ax88178_netdev_ops = {
1425 .ndo_open = usbnet_open,
1426 .ndo_stop = usbnet_stop,
1427 .ndo_start_xmit = usbnet_start_xmit,
1428 .ndo_tx_timeout = usbnet_tx_timeout,
1429 .ndo_set_mac_address = asix_set_mac_address,
1430 .ndo_validate_addr = eth_validate_addr,
1431 .ndo_set_rx_mode = asix_set_multicast,
1432 .ndo_do_ioctl = asix_ioctl,
1433 .ndo_change_mtu = ax88178_change_mtu,
1436 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1440 struct asix_data *data = (struct asix_data *)&dev->data;
1442 data->eeprom_len = AX88772_EEPROM_LEN;
1444 usbnet_get_endpoints(dev,intf);
1446 /* Get the MAC address */
1447 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1449 dbg("Failed to read MAC address: %d", ret);
1452 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1454 /* Initialize MII structure */
1455 dev->mii.dev = dev->net;
1456 dev->mii.mdio_read = asix_mdio_read;
1457 dev->mii.mdio_write = asix_mdio_write;
1458 dev->mii.phy_id_mask = 0x1f;
1459 dev->mii.reg_num_mask = 0xff;
1460 dev->mii.supports_gmii = 1;
1461 dev->mii.phy_id = asix_get_phy_addr(dev);
1463 dev->net->netdev_ops = &ax88178_netdev_ops;
1464 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1466 /* Blink LEDS so users know driver saw dongle */
1467 asix_sw_reset(dev, 0);
1470 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1473 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1474 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1475 /* hard_mtu is still the default - the device does not support
1477 dev->rx_urb_size = 2048;
1483 static const struct driver_info ax8817x_info = {
1484 .description = "ASIX AX8817x USB 2.0 Ethernet",
1485 .bind = ax88172_bind,
1486 .status = asix_status,
1487 .link_reset = ax88172_link_reset,
1488 .reset = ax88172_link_reset,
1489 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1493 static const struct driver_info dlink_dub_e100_info = {
1494 .description = "DLink DUB-E100 USB Ethernet",
1495 .bind = ax88172_bind,
1496 .status = asix_status,
1497 .link_reset = ax88172_link_reset,
1498 .reset = ax88172_link_reset,
1499 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1503 static const struct driver_info netgear_fa120_info = {
1504 .description = "Netgear FA-120 USB Ethernet",
1505 .bind = ax88172_bind,
1506 .status = asix_status,
1507 .link_reset = ax88172_link_reset,
1508 .reset = ax88172_link_reset,
1509 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1513 static const struct driver_info hawking_uf200_info = {
1514 .description = "Hawking UF200 USB Ethernet",
1515 .bind = ax88172_bind,
1516 .status = asix_status,
1517 .link_reset = ax88172_link_reset,
1518 .reset = ax88172_link_reset,
1519 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1523 static const struct driver_info ax88772_info = {
1524 .description = "ASIX AX88772 USB 2.0 Ethernet",
1525 .bind = ax88772_bind,
1526 .status = asix_status,
1527 .link_reset = ax88772_link_reset,
1528 .reset = ax88772_reset,
1529 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1530 .rx_fixup = asix_rx_fixup,
1531 .tx_fixup = asix_tx_fixup,
1534 static const struct driver_info ax88178_info = {
1535 .description = "ASIX AX88178 USB 2.0 Ethernet",
1536 .bind = ax88178_bind,
1537 .status = asix_status,
1538 .link_reset = ax88178_link_reset,
1539 .reset = ax88178_reset,
1540 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1541 .rx_fixup = asix_rx_fixup,
1542 .tx_fixup = asix_tx_fixup,
1545 static const struct usb_device_id products [] = {
1548 USB_DEVICE (0x077b, 0x2226),
1549 .driver_info = (unsigned long) &ax8817x_info,
1552 USB_DEVICE (0x0846, 0x1040),
1553 .driver_info = (unsigned long) &netgear_fa120_info,
1556 USB_DEVICE (0x2001, 0x1a00),
1557 .driver_info = (unsigned long) &dlink_dub_e100_info,
1559 // Intellinet, ST Lab USB Ethernet
1560 USB_DEVICE (0x0b95, 0x1720),
1561 .driver_info = (unsigned long) &ax8817x_info,
1563 // Hawking UF200, TrendNet TU2-ET100
1564 USB_DEVICE (0x07b8, 0x420a),
1565 .driver_info = (unsigned long) &hawking_uf200_info,
1567 // Billionton Systems, USB2AR
1568 USB_DEVICE (0x08dd, 0x90ff),
1569 .driver_info = (unsigned long) &ax8817x_info,
1572 USB_DEVICE (0x0557, 0x2009),
1573 .driver_info = (unsigned long) &ax8817x_info,
1575 // Buffalo LUA-U2-KTX
1576 USB_DEVICE (0x0411, 0x003d),
1577 .driver_info = (unsigned long) &ax8817x_info,
1579 // Buffalo LUA-U2-GT 10/100/1000
1580 USB_DEVICE (0x0411, 0x006e),
1581 .driver_info = (unsigned long) &ax88178_info,
1583 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1584 USB_DEVICE (0x6189, 0x182d),
1585 .driver_info = (unsigned long) &ax8817x_info,
1587 // corega FEther USB2-TX
1588 USB_DEVICE (0x07aa, 0x0017),
1589 .driver_info = (unsigned long) &ax8817x_info,
1591 // Surecom EP-1427X-2
1592 USB_DEVICE (0x1189, 0x0893),
1593 .driver_info = (unsigned long) &ax8817x_info,
1595 // goodway corp usb gwusb2e
1596 USB_DEVICE (0x1631, 0x6200),
1597 .driver_info = (unsigned long) &ax8817x_info,
1599 // JVC MP-PRX1 Port Replicator
1600 USB_DEVICE (0x04f1, 0x3008),
1601 .driver_info = (unsigned long) &ax8817x_info,
1603 // ASIX AX88772B 10/100
1604 USB_DEVICE (0x0b95, 0x772b),
1605 .driver_info = (unsigned long) &ax88772_info,
1607 // ASIX AX88772 10/100
1608 USB_DEVICE (0x0b95, 0x7720),
1609 .driver_info = (unsigned long) &ax88772_info,
1611 // ASIX AX88178 10/100/1000
1612 USB_DEVICE (0x0b95, 0x1780),
1613 .driver_info = (unsigned long) &ax88178_info,
1615 // Logitec LAN-GTJ/U2A
1616 USB_DEVICE (0x0789, 0x0160),
1617 .driver_info = (unsigned long) &ax88178_info,
1619 // Linksys USB200M Rev 2
1620 USB_DEVICE (0x13b1, 0x0018),
1621 .driver_info = (unsigned long) &ax88772_info,
1623 // 0Q0 cable ethernet
1624 USB_DEVICE (0x1557, 0x7720),
1625 .driver_info = (unsigned long) &ax88772_info,
1627 // DLink DUB-E100 H/W Ver B1
1628 USB_DEVICE (0x07d1, 0x3c05),
1629 .driver_info = (unsigned long) &ax88772_info,
1631 // DLink DUB-E100 H/W Ver B1 Alternate
1632 USB_DEVICE (0x2001, 0x3c05),
1633 .driver_info = (unsigned long) &ax88772_info,
1636 USB_DEVICE (0x1737, 0x0039),
1637 .driver_info = (unsigned long) &ax88178_info,
1640 USB_DEVICE (0x04bb, 0x0930),
1641 .driver_info = (unsigned long) &ax88178_info,
1644 USB_DEVICE(0x050d, 0x5055),
1645 .driver_info = (unsigned long) &ax88178_info,
1647 // Apple USB Ethernet Adapter
1648 USB_DEVICE(0x05ac, 0x1402),
1649 .driver_info = (unsigned long) &ax88772_info,
1651 // Cables-to-Go USB Ethernet Adapter
1652 USB_DEVICE(0x0b95, 0x772a),
1653 .driver_info = (unsigned long) &ax88772_info,
1656 USB_DEVICE(0x14ea, 0xab11),
1657 .driver_info = (unsigned long) &ax88178_info,
1660 USB_DEVICE(0x0db0, 0xa877),
1661 .driver_info = (unsigned long) &ax88772_info,
1663 // Asus USB Ethernet Adapter
1664 USB_DEVICE (0x0b95, 0x7e2b),
1665 .driver_info = (unsigned long) &ax88772_info,
1669 MODULE_DEVICE_TABLE(usb, products);
1671 static struct usb_driver asix_driver = {
1672 .name = DRIVER_NAME,
1673 .id_table = products,
1674 .probe = usbnet_probe,
1675 .suspend = usbnet_suspend,
1676 .resume = usbnet_resume,
1677 .disconnect = usbnet_disconnect,
1678 .supports_autosuspend = 1,
1681 static int __init asix_init(void)
1683 return usb_register(&asix_driver);
1685 module_init(asix_init);
1687 static void __exit asix_exit(void)
1689 usb_deregister(&asix_driver);
1691 module_exit(asix_exit);
1693 MODULE_AUTHOR("David Hollis");
1694 MODULE_VERSION(DRIVER_VERSION);
1695 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1696 MODULE_LICENSE("GPL");