2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
30 /* Information for net-next */
31 #define NETNEXT_VERSION "08"
33 /* Information for net */
34 #define NET_VERSION "3"
36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
41 #define R8152_PHY_ID 32
43 #define PLA_IDR 0xc000
44 #define PLA_RCR 0xc010
45 #define PLA_RMS 0xc016
46 #define PLA_RXFIFO_CTRL0 0xc0a0
47 #define PLA_RXFIFO_CTRL1 0xc0a4
48 #define PLA_RXFIFO_CTRL2 0xc0a8
49 #define PLA_DMY_REG0 0xc0b0
50 #define PLA_FMC 0xc0b4
51 #define PLA_CFG_WOL 0xc0b6
52 #define PLA_TEREDO_CFG 0xc0bc
53 #define PLA_MAR 0xcd00
54 #define PLA_BACKUP 0xd000
55 #define PAL_BDC_CR 0xd1a0
56 #define PLA_TEREDO_TIMER 0xd2cc
57 #define PLA_REALWOW_TIMER 0xd2e8
58 #define PLA_LEDSEL 0xdd90
59 #define PLA_LED_FEATURE 0xdd92
60 #define PLA_PHYAR 0xde00
61 #define PLA_BOOT_CTRL 0xe004
62 #define PLA_GPHY_INTR_IMR 0xe022
63 #define PLA_EEE_CR 0xe040
64 #define PLA_EEEP_CR 0xe080
65 #define PLA_MAC_PWR_CTRL 0xe0c0
66 #define PLA_MAC_PWR_CTRL2 0xe0ca
67 #define PLA_MAC_PWR_CTRL3 0xe0cc
68 #define PLA_MAC_PWR_CTRL4 0xe0ce
69 #define PLA_WDT6_CTRL 0xe428
70 #define PLA_TCR0 0xe610
71 #define PLA_TCR1 0xe612
72 #define PLA_MTPS 0xe615
73 #define PLA_TXFIFO_CTRL 0xe618
74 #define PLA_RSTTALLY 0xe800
76 #define PLA_CRWECR 0xe81c
77 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5 0xe822
80 #define PLA_PHY_PWR 0xe84c
81 #define PLA_OOB_CTRL 0xe84f
82 #define PLA_CPCR 0xe854
83 #define PLA_MISC_0 0xe858
84 #define PLA_MISC_1 0xe85a
85 #define PLA_OCP_GPHY_BASE 0xe86c
86 #define PLA_TALLYCNT 0xe890
87 #define PLA_SFF_STS_7 0xe8de
88 #define PLA_PHYSTATUS 0xe908
89 #define PLA_BP_BA 0xfc26
90 #define PLA_BP_0 0xfc28
91 #define PLA_BP_1 0xfc2a
92 #define PLA_BP_2 0xfc2c
93 #define PLA_BP_3 0xfc2e
94 #define PLA_BP_4 0xfc30
95 #define PLA_BP_5 0xfc32
96 #define PLA_BP_6 0xfc34
97 #define PLA_BP_7 0xfc36
98 #define PLA_BP_EN 0xfc38
100 #define USB_USB2PHY 0xb41e
101 #define USB_SSPHYLINK2 0xb428
102 #define USB_U2P3_CTRL 0xb460
103 #define USB_CSR_DUMMY1 0xb464
104 #define USB_CSR_DUMMY2 0xb466
105 #define USB_DEV_STAT 0xb808
106 #define USB_CONNECT_TIMER 0xcbf8
107 #define USB_BURST_SIZE 0xcfc0
108 #define USB_USB_CTRL 0xd406
109 #define USB_PHY_CTRL 0xd408
110 #define USB_TX_AGG 0xd40a
111 #define USB_RX_BUF_TH 0xd40c
112 #define USB_USB_TIMER 0xd428
113 #define USB_RX_EARLY_TIMEOUT 0xd42c
114 #define USB_RX_EARLY_SIZE 0xd42e
115 #define USB_PM_CTRL_STATUS 0xd432
116 #define USB_TX_DMA 0xd434
117 #define USB_TOLERANCE 0xd490
118 #define USB_LPM_CTRL 0xd41a
119 #define USB_UPS_CTRL 0xd800
120 #define USB_MISC_0 0xd81a
121 #define USB_POWER_CUT 0xd80a
122 #define USB_AFE_CTRL2 0xd824
123 #define USB_WDT11_CTRL 0xe43c
124 #define USB_BP_BA 0xfc26
125 #define USB_BP_0 0xfc28
126 #define USB_BP_1 0xfc2a
127 #define USB_BP_2 0xfc2c
128 #define USB_BP_3 0xfc2e
129 #define USB_BP_4 0xfc30
130 #define USB_BP_5 0xfc32
131 #define USB_BP_6 0xfc34
132 #define USB_BP_7 0xfc36
133 #define USB_BP_EN 0xfc38
136 #define OCP_ALDPS_CONFIG 0x2010
137 #define OCP_EEE_CONFIG1 0x2080
138 #define OCP_EEE_CONFIG2 0x2092
139 #define OCP_EEE_CONFIG3 0x2094
140 #define OCP_BASE_MII 0xa400
141 #define OCP_EEE_AR 0xa41a
142 #define OCP_EEE_DATA 0xa41c
143 #define OCP_PHY_STATUS 0xa420
144 #define OCP_POWER_CFG 0xa430
145 #define OCP_EEE_CFG 0xa432
146 #define OCP_SRAM_ADDR 0xa436
147 #define OCP_SRAM_DATA 0xa438
148 #define OCP_DOWN_SPEED 0xa442
149 #define OCP_EEE_ABLE 0xa5c4
150 #define OCP_EEE_ADV 0xa5d0
151 #define OCP_EEE_LPABLE 0xa5d2
152 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
153 #define OCP_ADC_CFG 0xbc06
156 #define SRAM_LPF_CFG 0x8012
157 #define SRAM_10M_AMP1 0x8080
158 #define SRAM_10M_AMP2 0x8082
159 #define SRAM_IMPEDANCE 0x8084
162 #define RCR_AAP 0x00000001
163 #define RCR_APM 0x00000002
164 #define RCR_AM 0x00000004
165 #define RCR_AB 0x00000008
166 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL 0x00080002
170 #define RXFIFO_THR1_OOB 0x01800003
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL 0x00000060
174 #define RXFIFO_THR2_HIGH 0x00000038
175 #define RXFIFO_THR2_OOB 0x0000004a
176 #define RXFIFO_THR2_NORMAL 0x00a0
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL 0x00000078
180 #define RXFIFO_THR3_HIGH 0x00000048
181 #define RXFIFO_THR3_OOB 0x0000005a
182 #define RXFIFO_THR3_NORMAL 0x0110
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL 0x00400008
186 #define TXFIFO_THR_NORMAL2 0x01000008
189 #define ECM_ALDPS 0x0002
192 #define FMC_FCR_MCU_EN 0x0001
195 #define EEEP_CR_EEEP_TX 0x0002
198 #define WDT6_SET_MODE 0x0010
201 #define TCR0_TX_EMPTY 0x0800
202 #define TCR0_AUTO_FIFO 0x0080
205 #define VERSION_MASK 0x7cf0
208 #define MTPS_JUMBO (12 * 1024 / 64)
209 #define MTPS_DEFAULT (6 * 1024 / 64)
212 #define TALLY_RESET 0x0001
220 #define CRWECR_NORAML 0x00
221 #define CRWECR_CONFIG 0xc0
224 #define NOW_IS_OOB 0x80
225 #define TXFIFO_EMPTY 0x20
226 #define RXFIFO_EMPTY 0x10
227 #define LINK_LIST_READY 0x02
228 #define DIS_MCU_CLROOB 0x01
229 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
232 #define RXDY_GATED_EN 0x0008
235 #define RE_INIT_LL 0x8000
236 #define MCU_BORW_EN 0x4000
239 #define CPCR_RX_VLAN 0x0040
242 #define MAGIC_EN 0x0001
245 #define TEREDO_SEL 0x8000
246 #define TEREDO_WAKE_MASK 0x7f00
247 #define TEREDO_RS_EVENT_MASK 0x00fe
248 #define OOB_TEREDO_EN 0x0001
251 #define ALDPS_PROXY_MODE 0x0001
254 #define LINK_ON_WAKE_EN 0x0010
255 #define LINK_OFF_WAKE_EN 0x0008
258 #define BWF_EN 0x0040
259 #define MWF_EN 0x0020
260 #define UWF_EN 0x0010
261 #define LAN_WAKE_EN 0x0002
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK 0x0700
267 #define TX_10M_IDLE_EN 0x0080
268 #define PFM_PWM_SWITCH 0x0040
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN 0x00004000
272 #define MCU_CLK_RATIO 0x07010f07
273 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO 0x0f87
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO 0x8007
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN 0x0100
281 #define SUSPEND_SPDWN_EN 0x0004
282 #define U1U2_SPDWN_EN 0x0002
283 #define L1_SPDWN_EN 0x0001
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN 0x1000
287 #define RXDV_SPDWN_EN 0x0800
288 #define TX10MIDLE_EN 0x0100
289 #define TP100_SPDWN_EN 0x0020
290 #define TP500_SPDWN_EN 0x0010
291 #define TP1000_SPDWN_EN 0x0008
292 #define EEE_SPDWN_EN 0x0001
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK 0x0001
296 #define SPEED_DOWN_MSK 0x0002
297 #define SPDWN_RXDV_MSK 0x0004
298 #define SPDWN_LINKCHG_MSK 0x0008
301 #define PHYAR_FLAG 0x80000000
304 #define EEE_RX_EN 0x0001
305 #define EEE_TX_EN 0x0002
308 #define AUTOLOAD_DONE 0x0002
311 #define USB2PHY_SUSPEND 0x0001
312 #define USB2PHY_L1 0x0002
315 #define pwd_dn_scale_mask 0x3ffe
316 #define pwd_dn_scale(x) ((x) << 1)
319 #define DYNAMIC_BURST 0x0001
322 #define EP4_FULL_FC 0x0001
325 #define STAT_SPEED_MASK 0x0006
326 #define STAT_SPEED_HIGH 0x0000
327 #define STAT_SPEED_FULL 0x0002
330 #define TX_AGG_MAX_THRESHOLD 0x03
333 #define RX_THR_SUPPER 0x0c350180
334 #define RX_THR_HIGH 0x7a120180
335 #define RX_THR_SLOW 0xffff0180
338 #define TEST_MODE_DISABLE 0x00000001
339 #define TX_SIZE_ADJUST1 0x00000100
342 #define POWER_CUT 0x0100
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE 0x0001
348 #define RX_AGG_DISABLE 0x0010
349 #define RX_ZERO_EN 0x0080
352 #define U2P3_ENABLE 0x0001
355 #define PWR_EN 0x0001
356 #define PHASE2_EN 0x0008
359 #define PCUT_STATUS 0x0001
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER 85000U
363 #define COALESCE_HIGH 250000U
364 #define COALESCE_SLOW 524280U
367 #define TIMER11_EN 0x0001
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK 0x0c
374 #define LPM_TIMER_500MS 0x04 /* 500 ms */
375 #define LPM_TIMER_500US 0x0c /* 500 us */
376 #define ROK_EXIT_LPM 0x02
379 #define SEN_VAL_MASK 0xf800
380 #define SEN_VAL_NORMAL 0xa000
381 #define SEL_RXIDLE 0x0100
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE 0x8000
385 #define ENPDNPS 0x0200
386 #define LINKENA 0x0100
387 #define DIS_SDSAVE 0x0010
390 #define PHY_STAT_MASK 0x0007
391 #define PHY_STAT_LAN_ON 3
392 #define PHY_STAT_PWRDN 5
395 #define EEE_CLKDIV_EN 0x8000
396 #define EN_ALDPS 0x0004
397 #define EN_10M_PLLOFF 0x0001
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP 0x8000
401 #define RG_MATCLR_EN 0x4000
402 #define EEE_10_CAP 0x2000
403 #define EEE_NWAY_EN 0x1000
404 #define TX_QUIET_EN 0x0200
405 #define RX_QUIET_EN 0x0100
406 #define sd_rise_time_mask 0x0070
407 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP 0x0008
409 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN 0x0400
414 #define RG_LDVQUIET_EN 0x0200
415 #define RG_CKRSEL 0x0020
416 #define RG_EEEPRG_EN 0x0010
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask 0xff80
420 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
421 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
422 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
425 /* bit[15:14] function */
426 #define FUN_ADDR 0x0000
427 #define FUN_DATA 0x4000
428 /* bit[4:0] device addr */
431 #define CTAP_SHORT_EN 0x0040
432 #define EEE10_EN 0x0010
435 #define EN_10M_BGOFF 0x0080
438 #define TXDIS_STATE 0x01
439 #define ABD_STATE 0x02
442 #define CKADSEL_L 0x0100
443 #define ADC_EN 0x0080
444 #define EN_EMI_L 0x0040
447 #define LPF_AUTO_TUNE 0x8000
450 #define GDAC_IB_UPALL 0x0008
453 #define AMP_DN 0x0200
456 #define RX_DRIVING_MASK 0x6000
458 enum rtl_register_content {
466 #define RTL8152_MAX_TX 4
467 #define RTL8152_MAX_RX 10
473 #define INTR_LINK 0x0004
475 #define RTL8152_REQT_READ 0xc0
476 #define RTL8152_REQT_WRITE 0x40
477 #define RTL8152_REQ_GET_REGS 0x05
478 #define RTL8152_REQ_SET_REGS 0x05
480 #define BYTE_EN_DWORD 0xff
481 #define BYTE_EN_WORD 0x33
482 #define BYTE_EN_BYTE 0x11
483 #define BYTE_EN_SIX_BYTES 0x3f
484 #define BYTE_EN_START_MASK 0x0f
485 #define BYTE_EN_END_MASK 0xf0
487 #define RTL8153_MAX_PACKET 9216 /* 9K */
488 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT 64
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK 0x0bda
507 #define VENDOR_ID_SAMSUNG 0x04e8
508 #define VENDOR_ID_LENOVO 0x17ef
509 #define VENDOR_ID_NVIDIA 0x0955
511 #define MCU_TYPE_PLA 0x0100
512 #define MCU_TYPE_USB 0x0000
514 struct tally_counter {
521 __le32 tx_one_collision;
522 __le32 tx_multi_collision;
532 #define RX_LEN_MASK 0x7fff
535 #define RD_UDP_CS BIT(23)
536 #define RD_TCP_CS BIT(22)
537 #define RD_IPV6_CS BIT(20)
538 #define RD_IPV4_CS BIT(19)
541 #define IPF BIT(23) /* IP checksum fail */
542 #define UDPF BIT(22) /* UDP checksum fail */
543 #define TCPF BIT(21) /* TCP checksum fail */
544 #define RX_VLAN_TAG BIT(16)
553 #define TX_FS BIT(31) /* First segment of a packet */
554 #define TX_LS BIT(30) /* Final segment of a packet */
555 #define GTSENDV4 BIT(28)
556 #define GTSENDV6 BIT(27)
557 #define GTTCPHO_SHIFT 18
558 #define GTTCPHO_MAX 0x7fU
559 #define TX_LEN_MAX 0x3ffffU
562 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
563 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
564 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
565 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
567 #define MSS_MAX 0x7ffU
568 #define TCPHO_SHIFT 17
569 #define TCPHO_MAX 0x7ffU
570 #define TX_VLAN_TAG BIT(16)
576 struct list_head list;
578 struct r8152 *context;
584 struct list_head list;
586 struct r8152 *context;
595 struct usb_device *udev;
596 struct napi_struct napi;
597 struct usb_interface *intf;
598 struct net_device *netdev;
599 struct urb *intr_urb;
600 struct tx_agg tx_info[RTL8152_MAX_TX];
601 struct rx_agg rx_info[RTL8152_MAX_RX];
602 struct list_head rx_done, tx_free;
603 struct sk_buff_head tx_queue, rx_queue;
604 spinlock_t rx_lock, tx_lock;
605 struct delayed_work schedule;
606 struct mii_if_info mii;
607 struct mutex control; /* use for hw setting */
608 #ifdef CONFIG_PM_SLEEP
609 struct notifier_block pm_notifier;
613 void (*init)(struct r8152 *);
614 int (*enable)(struct r8152 *);
615 void (*disable)(struct r8152 *);
616 void (*up)(struct r8152 *);
617 void (*down)(struct r8152 *);
618 void (*unload)(struct r8152 *);
619 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
620 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
621 bool (*in_nway)(struct r8152 *);
651 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
652 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
654 static const int multicast_filter_limit = 32;
655 static unsigned int agg_buf_sz = 16384;
657 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
658 VLAN_ETH_HLEN - VLAN_HLEN)
661 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
666 tmp = kmalloc(size, GFP_KERNEL);
670 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
671 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
672 value, index, tmp, size, 500);
674 memcpy(data, tmp, size);
681 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
686 tmp = kmemdup(data, size, GFP_KERNEL);
690 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
691 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
692 value, index, tmp, size, 500);
699 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
700 void *data, u16 type)
705 if (test_bit(RTL8152_UNPLUG, &tp->flags))
708 /* both size and indix must be 4 bytes align */
709 if ((size & 3) || !size || (index & 3) || !data)
712 if ((u32)index + (u32)size > 0xffff)
717 ret = get_registers(tp, index, type, limit, data);
725 ret = get_registers(tp, index, type, size, data);
737 set_bit(RTL8152_UNPLUG, &tp->flags);
742 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
743 u16 size, void *data, u16 type)
746 u16 byteen_start, byteen_end, byen;
749 if (test_bit(RTL8152_UNPLUG, &tp->flags))
752 /* both size and indix must be 4 bytes align */
753 if ((size & 3) || !size || (index & 3) || !data)
756 if ((u32)index + (u32)size > 0xffff)
759 byteen_start = byteen & BYTE_EN_START_MASK;
760 byteen_end = byteen & BYTE_EN_END_MASK;
762 byen = byteen_start | (byteen_start << 4);
763 ret = set_registers(tp, index, type | byen, 4, data);
776 ret = set_registers(tp, index,
777 type | BYTE_EN_DWORD,
786 ret = set_registers(tp, index,
787 type | BYTE_EN_DWORD,
799 byen = byteen_end | (byteen_end >> 4);
800 ret = set_registers(tp, index, type | byen, 4, data);
807 set_bit(RTL8152_UNPLUG, &tp->flags);
813 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
815 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
819 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
821 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
825 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
827 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
831 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
833 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
836 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
840 generic_ocp_read(tp, index, sizeof(data), &data, type);
842 return __le32_to_cpu(data);
845 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
847 __le32 tmp = __cpu_to_le32(data);
849 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
852 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
856 u8 shift = index & 2;
860 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
862 data = __le32_to_cpu(tmp);
863 data >>= (shift * 8);
869 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
873 u16 byen = BYTE_EN_WORD;
874 u8 shift = index & 2;
880 mask <<= (shift * 8);
881 data <<= (shift * 8);
885 tmp = __cpu_to_le32(data);
887 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
890 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
894 u8 shift = index & 3;
898 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
900 data = __le32_to_cpu(tmp);
901 data >>= (shift * 8);
907 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
911 u16 byen = BYTE_EN_BYTE;
912 u8 shift = index & 3;
918 mask <<= (shift * 8);
919 data <<= (shift * 8);
923 tmp = __cpu_to_le32(data);
925 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
928 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
930 u16 ocp_base, ocp_index;
932 ocp_base = addr & 0xf000;
933 if (ocp_base != tp->ocp_base) {
934 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
935 tp->ocp_base = ocp_base;
938 ocp_index = (addr & 0x0fff) | 0xb000;
939 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
942 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
944 u16 ocp_base, ocp_index;
946 ocp_base = addr & 0xf000;
947 if (ocp_base != tp->ocp_base) {
948 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
949 tp->ocp_base = ocp_base;
952 ocp_index = (addr & 0x0fff) | 0xb000;
953 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
956 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
958 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
961 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
963 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
966 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
968 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
969 ocp_reg_write(tp, OCP_SRAM_DATA, data);
972 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
974 struct r8152 *tp = netdev_priv(netdev);
977 if (test_bit(RTL8152_UNPLUG, &tp->flags))
980 if (phy_id != R8152_PHY_ID)
983 ret = r8152_mdio_read(tp, reg);
989 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
991 struct r8152 *tp = netdev_priv(netdev);
993 if (test_bit(RTL8152_UNPLUG, &tp->flags))
996 if (phy_id != R8152_PHY_ID)
999 r8152_mdio_write(tp, reg, val);
1003 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1005 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1007 struct r8152 *tp = netdev_priv(netdev);
1008 struct sockaddr *addr = p;
1009 int ret = -EADDRNOTAVAIL;
1011 if (!is_valid_ether_addr(addr->sa_data))
1014 ret = usb_autopm_get_interface(tp->intf);
1018 mutex_lock(&tp->control);
1020 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1022 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1023 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1024 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1026 mutex_unlock(&tp->control);
1028 usb_autopm_put_interface(tp->intf);
1033 static int set_ethernet_addr(struct r8152 *tp)
1035 struct net_device *dev = tp->netdev;
1039 if (tp->version == RTL_VER_01)
1040 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1042 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1045 netif_err(tp, probe, dev, "Get ether addr fail\n");
1046 } else if (!is_valid_ether_addr(sa.sa_data)) {
1047 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1049 eth_hw_addr_random(dev);
1050 ether_addr_copy(sa.sa_data, dev->dev_addr);
1051 ret = rtl8152_set_mac_address(dev, &sa);
1052 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1055 if (tp->version == RTL_VER_01)
1056 ether_addr_copy(dev->dev_addr, sa.sa_data);
1058 ret = rtl8152_set_mac_address(dev, &sa);
1064 static void read_bulk_callback(struct urb *urb)
1066 struct net_device *netdev;
1067 int status = urb->status;
1079 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1082 if (!test_bit(WORK_ENABLE, &tp->flags))
1085 netdev = tp->netdev;
1087 /* When link down, the driver would cancel all bulks. */
1088 /* This avoid the re-submitting bulk */
1089 if (!netif_carrier_ok(netdev))
1092 usb_mark_last_busy(tp->udev);
1096 if (urb->actual_length < ETH_ZLEN)
1099 spin_lock(&tp->rx_lock);
1100 list_add_tail(&agg->list, &tp->rx_done);
1101 spin_unlock(&tp->rx_lock);
1102 napi_schedule(&tp->napi);
1105 set_bit(RTL8152_UNPLUG, &tp->flags);
1106 netif_device_detach(tp->netdev);
1109 return; /* the urb is in unlink state */
1111 if (net_ratelimit())
1112 netdev_warn(netdev, "maybe reset is needed?\n");
1115 if (net_ratelimit())
1116 netdev_warn(netdev, "Rx status %d\n", status);
1120 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1123 static void write_bulk_callback(struct urb *urb)
1125 struct net_device_stats *stats;
1126 struct net_device *netdev;
1129 int status = urb->status;
1139 netdev = tp->netdev;
1140 stats = &netdev->stats;
1142 if (net_ratelimit())
1143 netdev_warn(netdev, "Tx status %d\n", status);
1144 stats->tx_errors += agg->skb_num;
1146 stats->tx_packets += agg->skb_num;
1147 stats->tx_bytes += agg->skb_len;
1150 spin_lock(&tp->tx_lock);
1151 list_add_tail(&agg->list, &tp->tx_free);
1152 spin_unlock(&tp->tx_lock);
1154 usb_autopm_put_interface_async(tp->intf);
1156 if (!netif_carrier_ok(netdev))
1159 if (!test_bit(WORK_ENABLE, &tp->flags))
1162 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1165 if (!skb_queue_empty(&tp->tx_queue))
1166 napi_schedule(&tp->napi);
1169 static void intr_callback(struct urb *urb)
1173 int status = urb->status;
1180 if (!test_bit(WORK_ENABLE, &tp->flags))
1183 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1187 case 0: /* success */
1189 case -ECONNRESET: /* unlink */
1191 netif_device_detach(tp->netdev);
1194 netif_info(tp, intr, tp->netdev,
1195 "Stop submitting intr, status %d\n", status);
1198 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1200 /* -EPIPE: should clear the halt */
1202 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1206 d = urb->transfer_buffer;
1207 if (INTR_LINK & __le16_to_cpu(d[0])) {
1208 if (!netif_carrier_ok(tp->netdev)) {
1209 set_bit(RTL8152_LINK_CHG, &tp->flags);
1210 schedule_delayed_work(&tp->schedule, 0);
1213 if (netif_carrier_ok(tp->netdev)) {
1214 set_bit(RTL8152_LINK_CHG, &tp->flags);
1215 schedule_delayed_work(&tp->schedule, 0);
1220 res = usb_submit_urb(urb, GFP_ATOMIC);
1221 if (res == -ENODEV) {
1222 set_bit(RTL8152_UNPLUG, &tp->flags);
1223 netif_device_detach(tp->netdev);
1225 netif_err(tp, intr, tp->netdev,
1226 "can't resubmit intr, status %d\n", res);
1230 static inline void *rx_agg_align(void *data)
1232 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1235 static inline void *tx_agg_align(void *data)
1237 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1240 static void free_all_mem(struct r8152 *tp)
1244 for (i = 0; i < RTL8152_MAX_RX; i++) {
1245 usb_free_urb(tp->rx_info[i].urb);
1246 tp->rx_info[i].urb = NULL;
1248 kfree(tp->rx_info[i].buffer);
1249 tp->rx_info[i].buffer = NULL;
1250 tp->rx_info[i].head = NULL;
1253 for (i = 0; i < RTL8152_MAX_TX; i++) {
1254 usb_free_urb(tp->tx_info[i].urb);
1255 tp->tx_info[i].urb = NULL;
1257 kfree(tp->tx_info[i].buffer);
1258 tp->tx_info[i].buffer = NULL;
1259 tp->tx_info[i].head = NULL;
1262 usb_free_urb(tp->intr_urb);
1263 tp->intr_urb = NULL;
1265 kfree(tp->intr_buff);
1266 tp->intr_buff = NULL;
1269 static int alloc_all_mem(struct r8152 *tp)
1271 struct net_device *netdev = tp->netdev;
1272 struct usb_interface *intf = tp->intf;
1273 struct usb_host_interface *alt = intf->cur_altsetting;
1274 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1279 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1281 spin_lock_init(&tp->rx_lock);
1282 spin_lock_init(&tp->tx_lock);
1283 INIT_LIST_HEAD(&tp->tx_free);
1284 skb_queue_head_init(&tp->tx_queue);
1285 skb_queue_head_init(&tp->rx_queue);
1287 for (i = 0; i < RTL8152_MAX_RX; i++) {
1288 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1292 if (buf != rx_agg_align(buf)) {
1294 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1300 urb = usb_alloc_urb(0, GFP_KERNEL);
1306 INIT_LIST_HEAD(&tp->rx_info[i].list);
1307 tp->rx_info[i].context = tp;
1308 tp->rx_info[i].urb = urb;
1309 tp->rx_info[i].buffer = buf;
1310 tp->rx_info[i].head = rx_agg_align(buf);
1313 for (i = 0; i < RTL8152_MAX_TX; i++) {
1314 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1318 if (buf != tx_agg_align(buf)) {
1320 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1326 urb = usb_alloc_urb(0, GFP_KERNEL);
1332 INIT_LIST_HEAD(&tp->tx_info[i].list);
1333 tp->tx_info[i].context = tp;
1334 tp->tx_info[i].urb = urb;
1335 tp->tx_info[i].buffer = buf;
1336 tp->tx_info[i].head = tx_agg_align(buf);
1338 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1341 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1345 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1349 tp->intr_interval = (int)ep_intr->desc.bInterval;
1350 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1351 tp->intr_buff, INTBUFSIZE, intr_callback,
1352 tp, tp->intr_interval);
1361 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1363 struct tx_agg *agg = NULL;
1364 unsigned long flags;
1366 if (list_empty(&tp->tx_free))
1369 spin_lock_irqsave(&tp->tx_lock, flags);
1370 if (!list_empty(&tp->tx_free)) {
1371 struct list_head *cursor;
1373 cursor = tp->tx_free.next;
1374 list_del_init(cursor);
1375 agg = list_entry(cursor, struct tx_agg, list);
1377 spin_unlock_irqrestore(&tp->tx_lock, flags);
1382 /* r8152_csum_workaround()
1383 * The hw limites the value the transport offset. When the offset is out of the
1384 * range, calculate the checksum by sw.
1386 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1387 struct sk_buff_head *list)
1389 if (skb_shinfo(skb)->gso_size) {
1390 netdev_features_t features = tp->netdev->features;
1391 struct sk_buff_head seg_list;
1392 struct sk_buff *segs, *nskb;
1394 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1395 segs = skb_gso_segment(skb, features);
1396 if (IS_ERR(segs) || !segs)
1399 __skb_queue_head_init(&seg_list);
1405 __skb_queue_tail(&seg_list, nskb);
1408 skb_queue_splice(&seg_list, list);
1410 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1411 if (skb_checksum_help(skb) < 0)
1414 __skb_queue_head(list, skb);
1416 struct net_device_stats *stats;
1419 stats = &tp->netdev->stats;
1420 stats->tx_dropped++;
1425 /* msdn_giant_send_check()
1426 * According to the document of microsoft, the TCP Pseudo Header excludes the
1427 * packet length for IPv6 TCP large packets.
1429 static int msdn_giant_send_check(struct sk_buff *skb)
1431 const struct ipv6hdr *ipv6h;
1435 ret = skb_cow_head(skb, 0);
1439 ipv6h = ipv6_hdr(skb);
1443 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1448 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1450 if (skb_vlan_tag_present(skb)) {
1453 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1454 desc->opts2 |= cpu_to_le32(opts2);
1458 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1460 u32 opts2 = le32_to_cpu(desc->opts2);
1462 if (opts2 & RX_VLAN_TAG)
1463 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1464 swab16(opts2 & 0xffff));
1467 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1468 struct sk_buff *skb, u32 len, u32 transport_offset)
1470 u32 mss = skb_shinfo(skb)->gso_size;
1471 u32 opts1, opts2 = 0;
1472 int ret = TX_CSUM_SUCCESS;
1474 WARN_ON_ONCE(len > TX_LEN_MAX);
1476 opts1 = len | TX_FS | TX_LS;
1479 if (transport_offset > GTTCPHO_MAX) {
1480 netif_warn(tp, tx_err, tp->netdev,
1481 "Invalid transport offset 0x%x for TSO\n",
1487 switch (vlan_get_protocol(skb)) {
1488 case htons(ETH_P_IP):
1492 case htons(ETH_P_IPV6):
1493 if (msdn_giant_send_check(skb)) {
1505 opts1 |= transport_offset << GTTCPHO_SHIFT;
1506 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1507 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1510 if (transport_offset > TCPHO_MAX) {
1511 netif_warn(tp, tx_err, tp->netdev,
1512 "Invalid transport offset 0x%x\n",
1518 switch (vlan_get_protocol(skb)) {
1519 case htons(ETH_P_IP):
1521 ip_protocol = ip_hdr(skb)->protocol;
1524 case htons(ETH_P_IPV6):
1526 ip_protocol = ipv6_hdr(skb)->nexthdr;
1530 ip_protocol = IPPROTO_RAW;
1534 if (ip_protocol == IPPROTO_TCP)
1536 else if (ip_protocol == IPPROTO_UDP)
1541 opts2 |= transport_offset << TCPHO_SHIFT;
1544 desc->opts2 = cpu_to_le32(opts2);
1545 desc->opts1 = cpu_to_le32(opts1);
1551 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1553 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1557 __skb_queue_head_init(&skb_head);
1558 spin_lock(&tx_queue->lock);
1559 skb_queue_splice_init(tx_queue, &skb_head);
1560 spin_unlock(&tx_queue->lock);
1562 tx_data = agg->head;
1565 remain = agg_buf_sz;
1567 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1568 struct tx_desc *tx_desc;
1569 struct sk_buff *skb;
1573 skb = __skb_dequeue(&skb_head);
1577 len = skb->len + sizeof(*tx_desc);
1580 __skb_queue_head(&skb_head, skb);
1584 tx_data = tx_agg_align(tx_data);
1585 tx_desc = (struct tx_desc *)tx_data;
1587 offset = (u32)skb_transport_offset(skb);
1589 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1590 r8152_csum_workaround(tp, skb, &skb_head);
1594 rtl_tx_vlan_tag(tx_desc, skb);
1596 tx_data += sizeof(*tx_desc);
1599 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1600 struct net_device_stats *stats = &tp->netdev->stats;
1602 stats->tx_dropped++;
1603 dev_kfree_skb_any(skb);
1604 tx_data -= sizeof(*tx_desc);
1609 agg->skb_len += len;
1612 dev_kfree_skb_any(skb);
1614 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1617 if (!skb_queue_empty(&skb_head)) {
1618 spin_lock(&tx_queue->lock);
1619 skb_queue_splice(&skb_head, tx_queue);
1620 spin_unlock(&tx_queue->lock);
1623 netif_tx_lock(tp->netdev);
1625 if (netif_queue_stopped(tp->netdev) &&
1626 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1627 netif_wake_queue(tp->netdev);
1629 netif_tx_unlock(tp->netdev);
1631 ret = usb_autopm_get_interface_async(tp->intf);
1635 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1636 agg->head, (int)(tx_data - (u8 *)agg->head),
1637 (usb_complete_t)write_bulk_callback, agg);
1639 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1641 usb_autopm_put_interface_async(tp->intf);
1647 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1649 u8 checksum = CHECKSUM_NONE;
1652 if (tp->version == RTL_VER_01)
1655 opts2 = le32_to_cpu(rx_desc->opts2);
1656 opts3 = le32_to_cpu(rx_desc->opts3);
1658 if (opts2 & RD_IPV4_CS) {
1660 checksum = CHECKSUM_NONE;
1661 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1662 checksum = CHECKSUM_NONE;
1663 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1664 checksum = CHECKSUM_NONE;
1666 checksum = CHECKSUM_UNNECESSARY;
1667 } else if (RD_IPV6_CS) {
1668 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1669 checksum = CHECKSUM_UNNECESSARY;
1670 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1671 checksum = CHECKSUM_UNNECESSARY;
1678 static int rx_bottom(struct r8152 *tp, int budget)
1680 unsigned long flags;
1681 struct list_head *cursor, *next, rx_queue;
1682 int ret = 0, work_done = 0;
1684 if (!skb_queue_empty(&tp->rx_queue)) {
1685 while (work_done < budget) {
1686 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1687 struct net_device *netdev = tp->netdev;
1688 struct net_device_stats *stats = &netdev->stats;
1689 unsigned int pkt_len;
1695 napi_gro_receive(&tp->napi, skb);
1697 stats->rx_packets++;
1698 stats->rx_bytes += pkt_len;
1702 if (list_empty(&tp->rx_done))
1705 INIT_LIST_HEAD(&rx_queue);
1706 spin_lock_irqsave(&tp->rx_lock, flags);
1707 list_splice_init(&tp->rx_done, &rx_queue);
1708 spin_unlock_irqrestore(&tp->rx_lock, flags);
1710 list_for_each_safe(cursor, next, &rx_queue) {
1711 struct rx_desc *rx_desc;
1717 list_del_init(cursor);
1719 agg = list_entry(cursor, struct rx_agg, list);
1721 if (urb->actual_length < ETH_ZLEN)
1724 rx_desc = agg->head;
1725 rx_data = agg->head;
1726 len_used += sizeof(struct rx_desc);
1728 while (urb->actual_length > len_used) {
1729 struct net_device *netdev = tp->netdev;
1730 struct net_device_stats *stats = &netdev->stats;
1731 unsigned int pkt_len;
1732 struct sk_buff *skb;
1734 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1735 if (pkt_len < ETH_ZLEN)
1738 len_used += pkt_len;
1739 if (urb->actual_length < len_used)
1742 pkt_len -= CRC_SIZE;
1743 rx_data += sizeof(struct rx_desc);
1745 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1747 stats->rx_dropped++;
1751 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1752 memcpy(skb->data, rx_data, pkt_len);
1753 skb_put(skb, pkt_len);
1754 skb->protocol = eth_type_trans(skb, netdev);
1755 rtl_rx_vlan_tag(rx_desc, skb);
1756 if (work_done < budget) {
1757 napi_gro_receive(&tp->napi, skb);
1759 stats->rx_packets++;
1760 stats->rx_bytes += pkt_len;
1762 __skb_queue_tail(&tp->rx_queue, skb);
1766 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1767 rx_desc = (struct rx_desc *)rx_data;
1768 len_used = (int)(rx_data - (u8 *)agg->head);
1769 len_used += sizeof(struct rx_desc);
1774 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1776 urb->actual_length = 0;
1777 list_add_tail(&agg->list, next);
1781 if (!list_empty(&rx_queue)) {
1782 spin_lock_irqsave(&tp->rx_lock, flags);
1783 list_splice_tail(&rx_queue, &tp->rx_done);
1784 spin_unlock_irqrestore(&tp->rx_lock, flags);
1791 static void tx_bottom(struct r8152 *tp)
1798 if (skb_queue_empty(&tp->tx_queue))
1801 agg = r8152_get_tx_agg(tp);
1805 res = r8152_tx_agg_fill(tp, agg);
1807 struct net_device *netdev = tp->netdev;
1809 if (res == -ENODEV) {
1810 set_bit(RTL8152_UNPLUG, &tp->flags);
1811 netif_device_detach(netdev);
1813 struct net_device_stats *stats = &netdev->stats;
1814 unsigned long flags;
1816 netif_warn(tp, tx_err, netdev,
1817 "failed tx_urb %d\n", res);
1818 stats->tx_dropped += agg->skb_num;
1820 spin_lock_irqsave(&tp->tx_lock, flags);
1821 list_add_tail(&agg->list, &tp->tx_free);
1822 spin_unlock_irqrestore(&tp->tx_lock, flags);
1828 static void bottom_half(struct r8152 *tp)
1830 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1833 if (!test_bit(WORK_ENABLE, &tp->flags))
1836 /* When link down, the driver would cancel all bulks. */
1837 /* This avoid the re-submitting bulk */
1838 if (!netif_carrier_ok(tp->netdev))
1841 clear_bit(SCHEDULE_NAPI, &tp->flags);
1846 static int r8152_poll(struct napi_struct *napi, int budget)
1848 struct r8152 *tp = container_of(napi, struct r8152, napi);
1851 work_done = rx_bottom(tp, budget);
1854 if (work_done < budget) {
1855 napi_complete(napi);
1856 if (!list_empty(&tp->rx_done))
1857 napi_schedule(napi);
1864 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1868 /* The rx would be stopped, so skip submitting */
1869 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1870 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1873 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1874 agg->head, agg_buf_sz,
1875 (usb_complete_t)read_bulk_callback, agg);
1877 ret = usb_submit_urb(agg->urb, mem_flags);
1878 if (ret == -ENODEV) {
1879 set_bit(RTL8152_UNPLUG, &tp->flags);
1880 netif_device_detach(tp->netdev);
1882 struct urb *urb = agg->urb;
1883 unsigned long flags;
1885 urb->actual_length = 0;
1886 spin_lock_irqsave(&tp->rx_lock, flags);
1887 list_add_tail(&agg->list, &tp->rx_done);
1888 spin_unlock_irqrestore(&tp->rx_lock, flags);
1890 netif_err(tp, rx_err, tp->netdev,
1891 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1893 napi_schedule(&tp->napi);
1899 static void rtl_drop_queued_tx(struct r8152 *tp)
1901 struct net_device_stats *stats = &tp->netdev->stats;
1902 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1903 struct sk_buff *skb;
1905 if (skb_queue_empty(tx_queue))
1908 __skb_queue_head_init(&skb_head);
1909 spin_lock_bh(&tx_queue->lock);
1910 skb_queue_splice_init(tx_queue, &skb_head);
1911 spin_unlock_bh(&tx_queue->lock);
1913 while ((skb = __skb_dequeue(&skb_head))) {
1915 stats->tx_dropped++;
1919 static void rtl8152_tx_timeout(struct net_device *netdev)
1921 struct r8152 *tp = netdev_priv(netdev);
1923 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1925 usb_queue_reset_device(tp->intf);
1928 static void rtl8152_set_rx_mode(struct net_device *netdev)
1930 struct r8152 *tp = netdev_priv(netdev);
1932 if (netif_carrier_ok(netdev)) {
1933 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1934 schedule_delayed_work(&tp->schedule, 0);
1938 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1940 struct r8152 *tp = netdev_priv(netdev);
1941 u32 mc_filter[2]; /* Multicast hash filter */
1945 netif_stop_queue(netdev);
1946 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1947 ocp_data &= ~RCR_ACPT_ALL;
1948 ocp_data |= RCR_AB | RCR_APM;
1950 if (netdev->flags & IFF_PROMISC) {
1951 /* Unconditionally log net taps. */
1952 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1953 ocp_data |= RCR_AM | RCR_AAP;
1954 mc_filter[1] = 0xffffffff;
1955 mc_filter[0] = 0xffffffff;
1956 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1957 (netdev->flags & IFF_ALLMULTI)) {
1958 /* Too many to filter perfectly -- accept all multicasts. */
1960 mc_filter[1] = 0xffffffff;
1961 mc_filter[0] = 0xffffffff;
1963 struct netdev_hw_addr *ha;
1967 netdev_for_each_mc_addr(ha, netdev) {
1968 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1970 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1975 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1976 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1978 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1979 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1980 netif_wake_queue(netdev);
1983 static netdev_features_t
1984 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1985 netdev_features_t features)
1987 u32 mss = skb_shinfo(skb)->gso_size;
1988 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1989 int offset = skb_transport_offset(skb);
1991 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1992 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1993 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1994 features &= ~NETIF_F_GSO_MASK;
1999 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2000 struct net_device *netdev)
2002 struct r8152 *tp = netdev_priv(netdev);
2004 skb_tx_timestamp(skb);
2006 skb_queue_tail(&tp->tx_queue, skb);
2008 if (!list_empty(&tp->tx_free)) {
2009 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2010 set_bit(SCHEDULE_NAPI, &tp->flags);
2011 schedule_delayed_work(&tp->schedule, 0);
2013 usb_mark_last_busy(tp->udev);
2014 napi_schedule(&tp->napi);
2016 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2017 netif_stop_queue(netdev);
2020 return NETDEV_TX_OK;
2023 static void r8152b_reset_packet_filter(struct r8152 *tp)
2027 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2028 ocp_data &= ~FMC_FCR_MCU_EN;
2029 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2030 ocp_data |= FMC_FCR_MCU_EN;
2031 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2034 static void rtl8152_nic_reset(struct r8152 *tp)
2038 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2040 for (i = 0; i < 1000; i++) {
2041 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2043 usleep_range(100, 400);
2047 static void set_tx_qlen(struct r8152 *tp)
2049 struct net_device *netdev = tp->netdev;
2051 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2052 sizeof(struct tx_desc));
2055 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2057 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2060 static void rtl_set_eee_plus(struct r8152 *tp)
2065 speed = rtl8152_get_speed(tp);
2066 if (speed & _10bps) {
2067 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2068 ocp_data |= EEEP_CR_EEEP_TX;
2069 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2071 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2072 ocp_data &= ~EEEP_CR_EEEP_TX;
2073 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2077 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2081 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2083 ocp_data |= RXDY_GATED_EN;
2085 ocp_data &= ~RXDY_GATED_EN;
2086 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2089 static int rtl_start_rx(struct r8152 *tp)
2093 INIT_LIST_HEAD(&tp->rx_done);
2094 for (i = 0; i < RTL8152_MAX_RX; i++) {
2095 INIT_LIST_HEAD(&tp->rx_info[i].list);
2096 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2101 if (ret && ++i < RTL8152_MAX_RX) {
2102 struct list_head rx_queue;
2103 unsigned long flags;
2105 INIT_LIST_HEAD(&rx_queue);
2108 struct rx_agg *agg = &tp->rx_info[i++];
2109 struct urb *urb = agg->urb;
2111 urb->actual_length = 0;
2112 list_add_tail(&agg->list, &rx_queue);
2113 } while (i < RTL8152_MAX_RX);
2115 spin_lock_irqsave(&tp->rx_lock, flags);
2116 list_splice_tail(&rx_queue, &tp->rx_done);
2117 spin_unlock_irqrestore(&tp->rx_lock, flags);
2123 static int rtl_stop_rx(struct r8152 *tp)
2127 for (i = 0; i < RTL8152_MAX_RX; i++)
2128 usb_kill_urb(tp->rx_info[i].urb);
2130 while (!skb_queue_empty(&tp->rx_queue))
2131 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2136 static int rtl_enable(struct r8152 *tp)
2140 r8152b_reset_packet_filter(tp);
2142 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2143 ocp_data |= CR_RE | CR_TE;
2144 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2146 rxdy_gated_en(tp, false);
2151 static int rtl8152_enable(struct r8152 *tp)
2153 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2157 rtl_set_eee_plus(tp);
2159 return rtl_enable(tp);
2162 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2164 u32 ocp_data = tp->coalesce / 8;
2166 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2169 static void r8153_set_rx_early_size(struct r8152 *tp)
2171 u32 mtu = tp->netdev->mtu;
2172 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2174 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2177 static int rtl8153_enable(struct r8152 *tp)
2179 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2182 usb_disable_lpm(tp->udev);
2184 rtl_set_eee_plus(tp);
2185 r8153_set_rx_early_timeout(tp);
2186 r8153_set_rx_early_size(tp);
2188 return rtl_enable(tp);
2191 static void rtl_disable(struct r8152 *tp)
2196 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2197 rtl_drop_queued_tx(tp);
2201 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2202 ocp_data &= ~RCR_ACPT_ALL;
2203 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2205 rtl_drop_queued_tx(tp);
2207 for (i = 0; i < RTL8152_MAX_TX; i++)
2208 usb_kill_urb(tp->tx_info[i].urb);
2210 rxdy_gated_en(tp, true);
2212 for (i = 0; i < 1000; i++) {
2213 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2214 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2216 usleep_range(1000, 2000);
2219 for (i = 0; i < 1000; i++) {
2220 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2222 usleep_range(1000, 2000);
2227 rtl8152_nic_reset(tp);
2230 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2234 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2236 ocp_data |= POWER_CUT;
2238 ocp_data &= ~POWER_CUT;
2239 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2241 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2242 ocp_data &= ~RESUME_INDICATE;
2243 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2246 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2250 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2252 ocp_data |= CPCR_RX_VLAN;
2254 ocp_data &= ~CPCR_RX_VLAN;
2255 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2258 static int rtl8152_set_features(struct net_device *dev,
2259 netdev_features_t features)
2261 netdev_features_t changed = features ^ dev->features;
2262 struct r8152 *tp = netdev_priv(dev);
2265 ret = usb_autopm_get_interface(tp->intf);
2269 mutex_lock(&tp->control);
2271 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2272 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2273 rtl_rx_vlan_en(tp, true);
2275 rtl_rx_vlan_en(tp, false);
2278 mutex_unlock(&tp->control);
2280 usb_autopm_put_interface(tp->intf);
2286 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2288 static u32 __rtl_get_wol(struct r8152 *tp)
2293 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2294 if (!(ocp_data & LAN_WAKE_EN))
2297 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2298 if (ocp_data & LINK_ON_WAKE_EN)
2299 wolopts |= WAKE_PHY;
2301 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2302 if (ocp_data & UWF_EN)
2303 wolopts |= WAKE_UCAST;
2304 if (ocp_data & BWF_EN)
2305 wolopts |= WAKE_BCAST;
2306 if (ocp_data & MWF_EN)
2307 wolopts |= WAKE_MCAST;
2309 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2310 if (ocp_data & MAGIC_EN)
2311 wolopts |= WAKE_MAGIC;
2316 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2320 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2322 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2323 ocp_data &= ~LINK_ON_WAKE_EN;
2324 if (wolopts & WAKE_PHY)
2325 ocp_data |= LINK_ON_WAKE_EN;
2326 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2328 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2329 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2330 if (wolopts & WAKE_UCAST)
2332 if (wolopts & WAKE_BCAST)
2334 if (wolopts & WAKE_MCAST)
2336 if (wolopts & WAKE_ANY)
2337 ocp_data |= LAN_WAKE_EN;
2338 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2340 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2342 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2343 ocp_data &= ~MAGIC_EN;
2344 if (wolopts & WAKE_MAGIC)
2345 ocp_data |= MAGIC_EN;
2346 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2348 if (wolopts & WAKE_ANY)
2349 device_set_wakeup_enable(&tp->udev->dev, true);
2351 device_set_wakeup_enable(&tp->udev->dev, false);
2354 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2359 memset(u1u2, 0xff, sizeof(u1u2));
2361 memset(u1u2, 0x00, sizeof(u1u2));
2363 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2366 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2370 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2371 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2372 ocp_data |= U2P3_ENABLE;
2374 ocp_data &= ~U2P3_ENABLE;
2375 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2378 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2382 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2384 ocp_data |= PWR_EN | PHASE2_EN;
2386 ocp_data &= ~(PWR_EN | PHASE2_EN);
2387 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2389 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2390 ocp_data &= ~PCUT_STATUS;
2391 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2394 static bool rtl_can_wakeup(struct r8152 *tp)
2396 struct usb_device *udev = tp->udev;
2398 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2401 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2406 r8153_u1u2en(tp, false);
2407 r8153_u2p3en(tp, false);
2409 __rtl_set_wol(tp, WAKE_ANY);
2411 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2413 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2414 ocp_data |= LINK_OFF_WAKE_EN;
2415 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2417 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2419 __rtl_set_wol(tp, tp->saved_wolopts);
2420 r8153_u2p3en(tp, true);
2421 r8153_u1u2en(tp, true);
2425 static void rtl_phy_reset(struct r8152 *tp)
2430 data = r8152_mdio_read(tp, MII_BMCR);
2432 /* don't reset again before the previous one complete */
2433 if (data & BMCR_RESET)
2437 r8152_mdio_write(tp, MII_BMCR, data);
2439 for (i = 0; i < 50; i++) {
2441 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2446 static void r8153_teredo_off(struct r8152 *tp)
2450 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2451 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2452 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2454 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2455 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2456 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2459 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2462 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2463 LINKENA | DIS_SDSAVE);
2465 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2471 static void rtl8152_disable(struct r8152 *tp)
2473 r8152_aldps_en(tp, false);
2475 r8152_aldps_en(tp, true);
2478 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2482 data = r8152_mdio_read(tp, MII_BMCR);
2483 if (data & BMCR_PDOWN) {
2484 data &= ~BMCR_PDOWN;
2485 r8152_mdio_write(tp, MII_BMCR, data);
2488 set_bit(PHY_RESET, &tp->flags);
2491 static void r8152b_exit_oob(struct r8152 *tp)
2496 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2497 ocp_data &= ~RCR_ACPT_ALL;
2498 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2500 rxdy_gated_en(tp, true);
2501 r8153_teredo_off(tp);
2502 r8152b_hw_phy_cfg(tp);
2504 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2505 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2507 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2508 ocp_data &= ~NOW_IS_OOB;
2509 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2511 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2512 ocp_data &= ~MCU_BORW_EN;
2513 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2515 for (i = 0; i < 1000; i++) {
2516 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2517 if (ocp_data & LINK_LIST_READY)
2519 usleep_range(1000, 2000);
2522 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2523 ocp_data |= RE_INIT_LL;
2524 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2526 for (i = 0; i < 1000; i++) {
2527 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2528 if (ocp_data & LINK_LIST_READY)
2530 usleep_range(1000, 2000);
2533 rtl8152_nic_reset(tp);
2535 /* rx share fifo credit full threshold */
2536 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2538 if (tp->udev->speed == USB_SPEED_FULL ||
2539 tp->udev->speed == USB_SPEED_LOW) {
2540 /* rx share fifo credit near full threshold */
2541 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2543 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2546 /* rx share fifo credit near full threshold */
2547 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2549 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2553 /* TX share fifo free credit full threshold */
2554 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2556 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2557 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2558 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2559 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2561 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2563 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2565 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2566 ocp_data |= TCR0_AUTO_FIFO;
2567 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2570 static void r8152b_enter_oob(struct r8152 *tp)
2575 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2576 ocp_data &= ~NOW_IS_OOB;
2577 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2579 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2580 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2581 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2585 for (i = 0; i < 1000; i++) {
2586 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2587 if (ocp_data & LINK_LIST_READY)
2589 usleep_range(1000, 2000);
2592 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2593 ocp_data |= RE_INIT_LL;
2594 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2596 for (i = 0; i < 1000; i++) {
2597 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2598 if (ocp_data & LINK_LIST_READY)
2600 usleep_range(1000, 2000);
2603 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2605 rtl_rx_vlan_en(tp, true);
2607 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2608 ocp_data |= ALDPS_PROXY_MODE;
2609 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2611 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2612 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2613 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2615 rxdy_gated_en(tp, false);
2617 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2618 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2619 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2622 static void r8153_hw_phy_cfg(struct r8152 *tp)
2627 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2628 tp->version == RTL_VER_05)
2629 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2631 data = r8152_mdio_read(tp, MII_BMCR);
2632 if (data & BMCR_PDOWN) {
2633 data &= ~BMCR_PDOWN;
2634 r8152_mdio_write(tp, MII_BMCR, data);
2637 if (tp->version == RTL_VER_03) {
2638 data = ocp_reg_read(tp, OCP_EEE_CFG);
2639 data &= ~CTAP_SHORT_EN;
2640 ocp_reg_write(tp, OCP_EEE_CFG, data);
2643 data = ocp_reg_read(tp, OCP_POWER_CFG);
2644 data |= EEE_CLKDIV_EN;
2645 ocp_reg_write(tp, OCP_POWER_CFG, data);
2647 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2648 data |= EN_10M_BGOFF;
2649 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2650 data = ocp_reg_read(tp, OCP_POWER_CFG);
2651 data |= EN_10M_PLLOFF;
2652 ocp_reg_write(tp, OCP_POWER_CFG, data);
2653 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2655 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2656 ocp_data |= PFM_PWM_SWITCH;
2657 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2659 /* Enable LPF corner auto tune */
2660 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2662 /* Adjust 10M Amplitude */
2663 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2664 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2666 set_bit(PHY_RESET, &tp->flags);
2669 static void r8153_first_init(struct r8152 *tp)
2674 rxdy_gated_en(tp, true);
2675 r8153_teredo_off(tp);
2677 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2678 ocp_data &= ~RCR_ACPT_ALL;
2679 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2681 r8153_hw_phy_cfg(tp);
2683 rtl8152_nic_reset(tp);
2685 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2686 ocp_data &= ~NOW_IS_OOB;
2687 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2689 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2690 ocp_data &= ~MCU_BORW_EN;
2691 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2693 for (i = 0; i < 1000; i++) {
2694 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2695 if (ocp_data & LINK_LIST_READY)
2697 usleep_range(1000, 2000);
2700 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2701 ocp_data |= RE_INIT_LL;
2702 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2704 for (i = 0; i < 1000; i++) {
2705 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2706 if (ocp_data & LINK_LIST_READY)
2708 usleep_range(1000, 2000);
2711 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2713 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2714 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2716 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2717 ocp_data |= TCR0_AUTO_FIFO;
2718 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2720 rtl8152_nic_reset(tp);
2722 /* rx share fifo credit full threshold */
2723 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2724 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2725 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2726 /* TX share fifo free credit full threshold */
2727 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2729 /* rx aggregation */
2730 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2731 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2732 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2735 static void r8153_enter_oob(struct r8152 *tp)
2740 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2741 ocp_data &= ~NOW_IS_OOB;
2742 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2746 for (i = 0; i < 1000; i++) {
2747 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2748 if (ocp_data & LINK_LIST_READY)
2750 usleep_range(1000, 2000);
2753 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2754 ocp_data |= RE_INIT_LL;
2755 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2757 for (i = 0; i < 1000; i++) {
2758 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2759 if (ocp_data & LINK_LIST_READY)
2761 usleep_range(1000, 2000);
2764 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2766 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2767 ocp_data &= ~TEREDO_WAKE_MASK;
2768 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2770 rtl_rx_vlan_en(tp, true);
2772 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2773 ocp_data |= ALDPS_PROXY_MODE;
2774 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2776 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2777 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2778 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2780 rxdy_gated_en(tp, false);
2782 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2783 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2784 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2787 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2791 data = ocp_reg_read(tp, OCP_POWER_CFG);
2794 ocp_reg_write(tp, OCP_POWER_CFG, data);
2797 ocp_reg_write(tp, OCP_POWER_CFG, data);
2802 static void rtl8153_disable(struct r8152 *tp)
2804 r8153_aldps_en(tp, false);
2806 r8153_aldps_en(tp, true);
2807 usb_enable_lpm(tp->udev);
2810 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2812 u16 bmcr, anar, gbcr;
2815 cancel_delayed_work_sync(&tp->schedule);
2816 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2817 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2818 ADVERTISE_100HALF | ADVERTISE_100FULL);
2819 if (tp->mii.supports_gmii) {
2820 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2821 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2826 if (autoneg == AUTONEG_DISABLE) {
2827 if (speed == SPEED_10) {
2829 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2830 } else if (speed == SPEED_100) {
2831 bmcr = BMCR_SPEED100;
2832 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2833 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2834 bmcr = BMCR_SPEED1000;
2835 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2841 if (duplex == DUPLEX_FULL)
2842 bmcr |= BMCR_FULLDPLX;
2844 if (speed == SPEED_10) {
2845 if (duplex == DUPLEX_FULL)
2846 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2848 anar |= ADVERTISE_10HALF;
2849 } else if (speed == SPEED_100) {
2850 if (duplex == DUPLEX_FULL) {
2851 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2852 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2854 anar |= ADVERTISE_10HALF;
2855 anar |= ADVERTISE_100HALF;
2857 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2858 if (duplex == DUPLEX_FULL) {
2859 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2860 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2861 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2863 anar |= ADVERTISE_10HALF;
2864 anar |= ADVERTISE_100HALF;
2865 gbcr |= ADVERTISE_1000HALF;
2872 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2875 if (test_bit(PHY_RESET, &tp->flags))
2878 if (tp->mii.supports_gmii)
2879 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2881 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2882 r8152_mdio_write(tp, MII_BMCR, bmcr);
2884 if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2887 for (i = 0; i < 50; i++) {
2889 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2898 static void rtl8152_up(struct r8152 *tp)
2900 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2903 r8152_aldps_en(tp, false);
2904 r8152b_exit_oob(tp);
2905 r8152_aldps_en(tp, true);
2908 static void rtl8152_down(struct r8152 *tp)
2910 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2911 rtl_drop_queued_tx(tp);
2915 r8152_power_cut_en(tp, false);
2916 r8152_aldps_en(tp, false);
2917 r8152b_enter_oob(tp);
2918 r8152_aldps_en(tp, true);
2921 static void rtl8153_up(struct r8152 *tp)
2923 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2926 r8153_u1u2en(tp, false);
2927 r8153_aldps_en(tp, false);
2928 r8153_first_init(tp);
2929 r8153_aldps_en(tp, true);
2930 r8153_u2p3en(tp, true);
2931 r8153_u1u2en(tp, true);
2932 usb_enable_lpm(tp->udev);
2935 static void rtl8153_down(struct r8152 *tp)
2937 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2938 rtl_drop_queued_tx(tp);
2942 r8153_u1u2en(tp, false);
2943 r8153_u2p3en(tp, false);
2944 r8153_power_cut_en(tp, false);
2945 r8153_aldps_en(tp, false);
2946 r8153_enter_oob(tp);
2947 r8153_aldps_en(tp, true);
2950 static bool rtl8152_in_nway(struct r8152 *tp)
2954 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2955 tp->ocp_base = 0x2000;
2956 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
2957 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2959 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2960 if (nway_state & 0xc000)
2966 static bool rtl8153_in_nway(struct r8152 *tp)
2968 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2970 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2976 static void set_carrier(struct r8152 *tp)
2978 struct net_device *netdev = tp->netdev;
2981 speed = rtl8152_get_speed(tp);
2983 if (speed & LINK_STATUS) {
2984 if (!netif_carrier_ok(netdev)) {
2985 tp->rtl_ops.enable(tp);
2986 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2987 napi_disable(&tp->napi);
2988 netif_carrier_on(netdev);
2990 napi_enable(&tp->napi);
2993 if (netif_carrier_ok(netdev)) {
2994 netif_carrier_off(netdev);
2995 napi_disable(&tp->napi);
2996 tp->rtl_ops.disable(tp);
2997 napi_enable(&tp->napi);
3002 static void rtl_work_func_t(struct work_struct *work)
3004 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3006 /* If the device is unplugged or !netif_running(), the workqueue
3007 * doesn't need to wake the device, and could return directly.
3009 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3012 if (usb_autopm_get_interface(tp->intf) < 0)
3015 if (!test_bit(WORK_ENABLE, &tp->flags))
3018 if (!mutex_trylock(&tp->control)) {
3019 schedule_delayed_work(&tp->schedule, 0);
3023 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3026 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3027 _rtl8152_set_rx_mode(tp->netdev);
3029 /* don't schedule napi before linking */
3030 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3031 netif_carrier_ok(tp->netdev))
3032 napi_schedule(&tp->napi);
3034 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3037 mutex_unlock(&tp->control);
3040 usb_autopm_put_interface(tp->intf);
3043 #ifdef CONFIG_PM_SLEEP
3044 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3047 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3050 case PM_HIBERNATION_PREPARE:
3051 case PM_SUSPEND_PREPARE:
3052 usb_autopm_get_interface(tp->intf);
3055 case PM_POST_HIBERNATION:
3056 case PM_POST_SUSPEND:
3057 usb_autopm_put_interface(tp->intf);
3060 case PM_POST_RESTORE:
3061 case PM_RESTORE_PREPARE:
3070 static int rtl8152_open(struct net_device *netdev)
3072 struct r8152 *tp = netdev_priv(netdev);
3075 res = alloc_all_mem(tp);
3079 netif_carrier_off(netdev);
3081 res = usb_autopm_get_interface(tp->intf);
3087 mutex_lock(&tp->control);
3091 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3092 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3094 netif_carrier_off(netdev);
3095 netif_start_queue(netdev);
3096 set_bit(WORK_ENABLE, &tp->flags);
3098 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3101 netif_device_detach(tp->netdev);
3102 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3106 napi_enable(&tp->napi);
3109 mutex_unlock(&tp->control);
3111 usb_autopm_put_interface(tp->intf);
3112 #ifdef CONFIG_PM_SLEEP
3113 tp->pm_notifier.notifier_call = rtl_notifier;
3114 register_pm_notifier(&tp->pm_notifier);
3121 static int rtl8152_close(struct net_device *netdev)
3123 struct r8152 *tp = netdev_priv(netdev);
3126 #ifdef CONFIG_PM_SLEEP
3127 unregister_pm_notifier(&tp->pm_notifier);
3129 napi_disable(&tp->napi);
3130 clear_bit(WORK_ENABLE, &tp->flags);
3131 usb_kill_urb(tp->intr_urb);
3132 cancel_delayed_work_sync(&tp->schedule);
3133 netif_stop_queue(netdev);
3135 res = usb_autopm_get_interface(tp->intf);
3136 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3137 rtl_drop_queued_tx(tp);
3140 mutex_lock(&tp->control);
3142 tp->rtl_ops.down(tp);
3144 mutex_unlock(&tp->control);
3146 usb_autopm_put_interface(tp->intf);
3154 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3156 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3157 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3158 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3161 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3165 r8152_mmd_indirect(tp, dev, reg);
3166 data = ocp_reg_read(tp, OCP_EEE_DATA);
3167 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3172 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3174 r8152_mmd_indirect(tp, dev, reg);
3175 ocp_reg_write(tp, OCP_EEE_DATA, data);
3176 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3179 static void r8152_eee_en(struct r8152 *tp, bool enable)
3181 u16 config1, config2, config3;
3184 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3185 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3186 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3187 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3190 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3191 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3192 config1 |= sd_rise_time(1);
3193 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3194 config3 |= fast_snr(42);
3196 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3197 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3199 config1 |= sd_rise_time(7);
3200 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3201 config3 |= fast_snr(511);
3204 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3205 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3206 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3207 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3210 static void r8152b_enable_eee(struct r8152 *tp)
3212 r8152_eee_en(tp, true);
3213 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3216 static void r8153_eee_en(struct r8152 *tp, bool enable)
3221 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3222 config = ocp_reg_read(tp, OCP_EEE_CFG);
3225 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3228 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3229 config &= ~EEE10_EN;
3232 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3233 ocp_reg_write(tp, OCP_EEE_CFG, config);
3236 static void r8153_enable_eee(struct r8152 *tp)
3238 r8153_eee_en(tp, true);
3239 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3242 static void r8152b_enable_fc(struct r8152 *tp)
3246 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3247 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3248 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3251 static void rtl_tally_reset(struct r8152 *tp)
3255 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3256 ocp_data |= TALLY_RESET;
3257 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3260 static void r8152b_init(struct r8152 *tp)
3264 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3267 r8152_aldps_en(tp, false);
3269 if (tp->version == RTL_VER_01) {
3270 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3271 ocp_data &= ~LED_MODE_MASK;
3272 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3275 r8152_power_cut_en(tp, false);
3277 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3278 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3279 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3280 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3281 ocp_data &= ~MCU_CLK_RATIO_MASK;
3282 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3283 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3284 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3285 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3286 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3288 r8152b_enable_eee(tp);
3289 r8152_aldps_en(tp, true);
3290 r8152b_enable_fc(tp);
3291 rtl_tally_reset(tp);
3293 /* enable rx aggregation */
3294 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3295 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3296 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3299 static void r8153_init(struct r8152 *tp)
3304 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3307 r8153_aldps_en(tp, false);
3308 r8153_u1u2en(tp, false);
3310 for (i = 0; i < 500; i++) {
3311 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3317 for (i = 0; i < 500; i++) {
3318 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3319 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3324 usb_disable_lpm(tp->udev);
3325 r8153_u2p3en(tp, false);
3327 if (tp->version == RTL_VER_04) {
3328 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3329 ocp_data &= ~pwd_dn_scale_mask;
3330 ocp_data |= pwd_dn_scale(96);
3331 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3333 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3334 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3335 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3336 } else if (tp->version == RTL_VER_05) {
3337 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3338 ocp_data &= ~ECM_ALDPS;
3339 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3341 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3342 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3343 ocp_data &= ~DYNAMIC_BURST;
3345 ocp_data |= DYNAMIC_BURST;
3346 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3347 } else if (tp->version == RTL_VER_06) {
3348 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3349 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3350 ocp_data &= ~DYNAMIC_BURST;
3352 ocp_data |= DYNAMIC_BURST;
3353 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3356 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3357 ocp_data |= EP4_FULL_FC;
3358 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3360 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3361 ocp_data &= ~TIMER11_EN;
3362 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3364 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3365 ocp_data &= ~LED_MODE_MASK;
3366 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3368 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3369 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3370 ocp_data |= LPM_TIMER_500MS;
3372 ocp_data |= LPM_TIMER_500US;
3373 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3375 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3376 ocp_data &= ~SEN_VAL_MASK;
3377 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3378 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3380 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3382 r8153_power_cut_en(tp, false);
3383 r8153_u1u2en(tp, true);
3385 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3386 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3387 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3388 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3389 U1U2_SPDWN_EN | L1_SPDWN_EN);
3390 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3391 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3392 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3395 r8153_enable_eee(tp);
3396 r8153_aldps_en(tp, true);
3397 r8152b_enable_fc(tp);
3398 rtl_tally_reset(tp);
3399 r8153_u2p3en(tp, true);
3402 static int rtl8152_pre_reset(struct usb_interface *intf)
3404 struct r8152 *tp = usb_get_intfdata(intf);
3405 struct net_device *netdev;
3410 netdev = tp->netdev;
3411 if (!netif_running(netdev))
3414 napi_disable(&tp->napi);
3415 clear_bit(WORK_ENABLE, &tp->flags);
3416 usb_kill_urb(tp->intr_urb);
3417 cancel_delayed_work_sync(&tp->schedule);
3418 if (netif_carrier_ok(netdev)) {
3419 netif_stop_queue(netdev);
3420 mutex_lock(&tp->control);
3421 tp->rtl_ops.disable(tp);
3422 mutex_unlock(&tp->control);
3428 static int rtl8152_post_reset(struct usb_interface *intf)
3430 struct r8152 *tp = usb_get_intfdata(intf);
3431 struct net_device *netdev;
3436 netdev = tp->netdev;
3437 if (!netif_running(netdev))
3440 set_bit(WORK_ENABLE, &tp->flags);
3441 if (netif_carrier_ok(netdev)) {
3442 mutex_lock(&tp->control);
3443 tp->rtl_ops.enable(tp);
3444 rtl8152_set_rx_mode(netdev);
3445 mutex_unlock(&tp->control);
3446 netif_wake_queue(netdev);
3449 napi_enable(&tp->napi);
3454 static bool delay_autosuspend(struct r8152 *tp)
3456 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3457 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3459 /* This means a linking change occurs and the driver doesn't detect it,
3460 * yet. If the driver has disabled tx/rx and hw is linking on, the
3461 * device wouldn't wake up by receiving any packet.
3463 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3466 /* If the linking down is occurred by nway, the device may miss the
3467 * linking change event. And it wouldn't wake when linking on.
3469 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3475 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3477 struct r8152 *tp = usb_get_intfdata(intf);
3478 struct net_device *netdev = tp->netdev;
3481 mutex_lock(&tp->control);
3483 if (PMSG_IS_AUTO(message)) {
3484 if (netif_running(netdev) && delay_autosuspend(tp)) {
3489 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3491 netif_device_detach(netdev);
3494 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3495 clear_bit(WORK_ENABLE, &tp->flags);
3496 usb_kill_urb(tp->intr_urb);
3497 napi_disable(&tp->napi);
3498 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3500 rtl_runtime_suspend_enable(tp, true);
3502 cancel_delayed_work_sync(&tp->schedule);
3503 tp->rtl_ops.down(tp);
3505 napi_enable(&tp->napi);
3508 mutex_unlock(&tp->control);
3513 static int rtl8152_resume(struct usb_interface *intf)
3515 struct r8152 *tp = usb_get_intfdata(intf);
3517 mutex_lock(&tp->control);
3519 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3520 tp->rtl_ops.init(tp);
3521 netif_device_attach(tp->netdev);
3524 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3525 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3526 rtl_runtime_suspend_enable(tp, false);
3527 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3528 napi_disable(&tp->napi);
3529 set_bit(WORK_ENABLE, &tp->flags);
3530 if (netif_carrier_ok(tp->netdev))
3532 napi_enable(&tp->napi);
3535 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3536 tp->mii.supports_gmii ?
3537 SPEED_1000 : SPEED_100,
3539 netif_carrier_off(tp->netdev);
3540 set_bit(WORK_ENABLE, &tp->flags);
3542 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3543 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3544 if (tp->netdev->flags & IFF_UP)
3545 rtl_runtime_suspend_enable(tp, false);
3546 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3549 mutex_unlock(&tp->control);
3554 static int rtl8152_reset_resume(struct usb_interface *intf)
3556 struct r8152 *tp = usb_get_intfdata(intf);
3558 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3559 return rtl8152_resume(intf);
3562 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3564 struct r8152 *tp = netdev_priv(dev);
3566 if (usb_autopm_get_interface(tp->intf) < 0)
3569 if (!rtl_can_wakeup(tp)) {
3573 mutex_lock(&tp->control);
3574 wol->supported = WAKE_ANY;
3575 wol->wolopts = __rtl_get_wol(tp);
3576 mutex_unlock(&tp->control);
3579 usb_autopm_put_interface(tp->intf);
3582 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3584 struct r8152 *tp = netdev_priv(dev);
3587 if (!rtl_can_wakeup(tp))
3590 ret = usb_autopm_get_interface(tp->intf);
3594 mutex_lock(&tp->control);
3596 __rtl_set_wol(tp, wol->wolopts);
3597 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3599 mutex_unlock(&tp->control);
3601 usb_autopm_put_interface(tp->intf);
3607 static u32 rtl8152_get_msglevel(struct net_device *dev)
3609 struct r8152 *tp = netdev_priv(dev);
3611 return tp->msg_enable;
3614 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3616 struct r8152 *tp = netdev_priv(dev);
3618 tp->msg_enable = value;
3621 static void rtl8152_get_drvinfo(struct net_device *netdev,
3622 struct ethtool_drvinfo *info)
3624 struct r8152 *tp = netdev_priv(netdev);
3626 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3627 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3628 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3632 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3634 struct r8152 *tp = netdev_priv(netdev);
3637 if (!tp->mii.mdio_read)
3640 ret = usb_autopm_get_interface(tp->intf);
3644 mutex_lock(&tp->control);
3646 ret = mii_ethtool_gset(&tp->mii, cmd);
3648 mutex_unlock(&tp->control);
3650 usb_autopm_put_interface(tp->intf);
3656 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3658 struct r8152 *tp = netdev_priv(dev);
3661 ret = usb_autopm_get_interface(tp->intf);
3665 mutex_lock(&tp->control);
3667 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3669 mutex_unlock(&tp->control);
3671 usb_autopm_put_interface(tp->intf);
3677 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3684 "tx_single_collisions",
3685 "tx_multi_collisions",
3693 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3697 return ARRAY_SIZE(rtl8152_gstrings);
3703 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3704 struct ethtool_stats *stats, u64 *data)
3706 struct r8152 *tp = netdev_priv(dev);
3707 struct tally_counter tally;
3709 if (usb_autopm_get_interface(tp->intf) < 0)
3712 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3714 usb_autopm_put_interface(tp->intf);
3716 data[0] = le64_to_cpu(tally.tx_packets);
3717 data[1] = le64_to_cpu(tally.rx_packets);
3718 data[2] = le64_to_cpu(tally.tx_errors);
3719 data[3] = le32_to_cpu(tally.rx_errors);
3720 data[4] = le16_to_cpu(tally.rx_missed);
3721 data[5] = le16_to_cpu(tally.align_errors);
3722 data[6] = le32_to_cpu(tally.tx_one_collision);
3723 data[7] = le32_to_cpu(tally.tx_multi_collision);
3724 data[8] = le64_to_cpu(tally.rx_unicast);
3725 data[9] = le64_to_cpu(tally.rx_broadcast);
3726 data[10] = le32_to_cpu(tally.rx_multicast);
3727 data[11] = le16_to_cpu(tally.tx_aborted);
3728 data[12] = le16_to_cpu(tally.tx_underrun);
3731 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3733 switch (stringset) {
3735 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3740 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3742 u32 ocp_data, lp, adv, supported = 0;
3745 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3746 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3748 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3749 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3751 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3752 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3754 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3755 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3757 eee->eee_enabled = !!ocp_data;
3758 eee->eee_active = !!(supported & adv & lp);
3759 eee->supported = supported;
3760 eee->advertised = adv;
3761 eee->lp_advertised = lp;
3766 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3768 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3770 r8152_eee_en(tp, eee->eee_enabled);
3772 if (!eee->eee_enabled)
3775 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3780 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3782 u32 ocp_data, lp, adv, supported = 0;
3785 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3786 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3788 val = ocp_reg_read(tp, OCP_EEE_ADV);
3789 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3791 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3792 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3794 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3795 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3797 eee->eee_enabled = !!ocp_data;
3798 eee->eee_active = !!(supported & adv & lp);
3799 eee->supported = supported;
3800 eee->advertised = adv;
3801 eee->lp_advertised = lp;
3806 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3808 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3810 r8153_eee_en(tp, eee->eee_enabled);
3812 if (!eee->eee_enabled)
3815 ocp_reg_write(tp, OCP_EEE_ADV, val);
3821 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3823 struct r8152 *tp = netdev_priv(net);
3826 ret = usb_autopm_get_interface(tp->intf);
3830 mutex_lock(&tp->control);
3832 ret = tp->rtl_ops.eee_get(tp, edata);
3834 mutex_unlock(&tp->control);
3836 usb_autopm_put_interface(tp->intf);
3843 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3845 struct r8152 *tp = netdev_priv(net);
3848 ret = usb_autopm_get_interface(tp->intf);
3852 mutex_lock(&tp->control);
3854 ret = tp->rtl_ops.eee_set(tp, edata);
3856 ret = mii_nway_restart(&tp->mii);
3858 mutex_unlock(&tp->control);
3860 usb_autopm_put_interface(tp->intf);
3866 static int rtl8152_nway_reset(struct net_device *dev)
3868 struct r8152 *tp = netdev_priv(dev);
3871 ret = usb_autopm_get_interface(tp->intf);
3875 mutex_lock(&tp->control);
3877 ret = mii_nway_restart(&tp->mii);
3879 mutex_unlock(&tp->control);
3881 usb_autopm_put_interface(tp->intf);
3887 static int rtl8152_get_coalesce(struct net_device *netdev,
3888 struct ethtool_coalesce *coalesce)
3890 struct r8152 *tp = netdev_priv(netdev);
3892 switch (tp->version) {
3900 coalesce->rx_coalesce_usecs = tp->coalesce;
3905 static int rtl8152_set_coalesce(struct net_device *netdev,
3906 struct ethtool_coalesce *coalesce)
3908 struct r8152 *tp = netdev_priv(netdev);
3911 switch (tp->version) {
3919 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3922 ret = usb_autopm_get_interface(tp->intf);
3926 mutex_lock(&tp->control);
3928 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3929 tp->coalesce = coalesce->rx_coalesce_usecs;
3931 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3932 r8153_set_rx_early_timeout(tp);
3935 mutex_unlock(&tp->control);
3937 usb_autopm_put_interface(tp->intf);
3942 static struct ethtool_ops ops = {
3943 .get_drvinfo = rtl8152_get_drvinfo,
3944 .get_settings = rtl8152_get_settings,
3945 .set_settings = rtl8152_set_settings,
3946 .get_link = ethtool_op_get_link,
3947 .nway_reset = rtl8152_nway_reset,
3948 .get_msglevel = rtl8152_get_msglevel,
3949 .set_msglevel = rtl8152_set_msglevel,
3950 .get_wol = rtl8152_get_wol,
3951 .set_wol = rtl8152_set_wol,
3952 .get_strings = rtl8152_get_strings,
3953 .get_sset_count = rtl8152_get_sset_count,
3954 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3955 .get_coalesce = rtl8152_get_coalesce,
3956 .set_coalesce = rtl8152_set_coalesce,
3957 .get_eee = rtl_ethtool_get_eee,
3958 .set_eee = rtl_ethtool_set_eee,
3961 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3963 struct r8152 *tp = netdev_priv(netdev);
3964 struct mii_ioctl_data *data = if_mii(rq);
3967 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3970 res = usb_autopm_get_interface(tp->intf);
3976 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3980 mutex_lock(&tp->control);
3981 data->val_out = r8152_mdio_read(tp, data->reg_num);
3982 mutex_unlock(&tp->control);
3986 if (!capable(CAP_NET_ADMIN)) {
3990 mutex_lock(&tp->control);
3991 r8152_mdio_write(tp, data->reg_num, data->val_in);
3992 mutex_unlock(&tp->control);
3999 usb_autopm_put_interface(tp->intf);
4005 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4007 struct r8152 *tp = netdev_priv(dev);
4010 switch (tp->version) {
4013 return eth_change_mtu(dev, new_mtu);
4018 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4021 ret = usb_autopm_get_interface(tp->intf);
4025 mutex_lock(&tp->control);
4029 if (netif_running(dev) && netif_carrier_ok(dev))
4030 r8153_set_rx_early_size(tp);
4032 mutex_unlock(&tp->control);
4034 usb_autopm_put_interface(tp->intf);
4039 static const struct net_device_ops rtl8152_netdev_ops = {
4040 .ndo_open = rtl8152_open,
4041 .ndo_stop = rtl8152_close,
4042 .ndo_do_ioctl = rtl8152_ioctl,
4043 .ndo_start_xmit = rtl8152_start_xmit,
4044 .ndo_tx_timeout = rtl8152_tx_timeout,
4045 .ndo_set_features = rtl8152_set_features,
4046 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4047 .ndo_set_mac_address = rtl8152_set_mac_address,
4048 .ndo_change_mtu = rtl8152_change_mtu,
4049 .ndo_validate_addr = eth_validate_addr,
4050 .ndo_features_check = rtl8152_features_check,
4053 static void r8152b_get_version(struct r8152 *tp)
4058 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4059 version = (u16)(ocp_data & VERSION_MASK);
4063 tp->version = RTL_VER_01;
4066 tp->version = RTL_VER_02;
4069 tp->version = RTL_VER_03;
4070 tp->mii.supports_gmii = 1;
4073 tp->version = RTL_VER_04;
4074 tp->mii.supports_gmii = 1;
4077 tp->version = RTL_VER_05;
4078 tp->mii.supports_gmii = 1;
4081 tp->version = RTL_VER_06;
4082 tp->mii.supports_gmii = 1;
4085 netif_info(tp, probe, tp->netdev,
4086 "Unknown version 0x%04x\n", version);
4091 static void rtl8152_unload(struct r8152 *tp)
4093 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4096 if (tp->version != RTL_VER_01)
4097 r8152_power_cut_en(tp, true);
4100 static void rtl8153_unload(struct r8152 *tp)
4102 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4105 r8153_power_cut_en(tp, false);
4108 static int rtl_ops_init(struct r8152 *tp)
4110 struct rtl_ops *ops = &tp->rtl_ops;
4113 switch (tp->version) {
4116 ops->init = r8152b_init;
4117 ops->enable = rtl8152_enable;
4118 ops->disable = rtl8152_disable;
4119 ops->up = rtl8152_up;
4120 ops->down = rtl8152_down;
4121 ops->unload = rtl8152_unload;
4122 ops->eee_get = r8152_get_eee;
4123 ops->eee_set = r8152_set_eee;
4124 ops->in_nway = rtl8152_in_nway;
4131 ops->init = r8153_init;
4132 ops->enable = rtl8153_enable;
4133 ops->disable = rtl8153_disable;
4134 ops->up = rtl8153_up;
4135 ops->down = rtl8153_down;
4136 ops->unload = rtl8153_unload;
4137 ops->eee_get = r8153_get_eee;
4138 ops->eee_set = r8153_set_eee;
4139 ops->in_nway = rtl8153_in_nway;
4144 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4151 static int rtl8152_probe(struct usb_interface *intf,
4152 const struct usb_device_id *id)
4154 struct usb_device *udev = interface_to_usbdev(intf);
4156 struct net_device *netdev;
4159 if (udev->actconfig->desc.bConfigurationValue != 1) {
4160 usb_driver_set_configuration(udev, 1);
4164 usb_reset_device(udev);
4165 netdev = alloc_etherdev(sizeof(struct r8152));
4167 dev_err(&intf->dev, "Out of memory\n");
4171 SET_NETDEV_DEV(netdev, &intf->dev);
4172 tp = netdev_priv(netdev);
4173 tp->msg_enable = 0x7FFF;
4176 tp->netdev = netdev;
4179 r8152b_get_version(tp);
4180 ret = rtl_ops_init(tp);
4184 mutex_init(&tp->control);
4185 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4187 netdev->netdev_ops = &rtl8152_netdev_ops;
4188 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4190 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4191 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4192 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4193 NETIF_F_HW_VLAN_CTAG_TX;
4194 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4195 NETIF_F_TSO | NETIF_F_FRAGLIST |
4196 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4197 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4198 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4199 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4200 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4202 netdev->ethtool_ops = &ops;
4203 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4205 tp->mii.dev = netdev;
4206 tp->mii.mdio_read = read_mii_word;
4207 tp->mii.mdio_write = write_mii_word;
4208 tp->mii.phy_id_mask = 0x3f;
4209 tp->mii.reg_num_mask = 0x1f;
4210 tp->mii.phy_id = R8152_PHY_ID;
4212 switch (udev->speed) {
4213 case USB_SPEED_SUPER:
4214 case USB_SPEED_SUPER_PLUS:
4215 tp->coalesce = COALESCE_SUPER;
4217 case USB_SPEED_HIGH:
4218 tp->coalesce = COALESCE_HIGH;
4221 tp->coalesce = COALESCE_SLOW;
4225 intf->needs_remote_wakeup = 1;
4227 tp->rtl_ops.init(tp);
4228 set_ethernet_addr(tp);
4230 usb_set_intfdata(intf, tp);
4231 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4233 ret = register_netdev(netdev);
4235 netif_err(tp, probe, netdev, "couldn't register the device\n");
4239 if (!rtl_can_wakeup(tp))
4240 __rtl_set_wol(tp, 0);
4242 tp->saved_wolopts = __rtl_get_wol(tp);
4243 if (tp->saved_wolopts)
4244 device_set_wakeup_enable(&udev->dev, true);
4246 device_set_wakeup_enable(&udev->dev, false);
4248 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4253 netif_napi_del(&tp->napi);
4254 usb_set_intfdata(intf, NULL);
4256 free_netdev(netdev);
4260 static void rtl8152_disconnect(struct usb_interface *intf)
4262 struct r8152 *tp = usb_get_intfdata(intf);
4264 usb_set_intfdata(intf, NULL);
4266 struct usb_device *udev = tp->udev;
4268 if (udev->state == USB_STATE_NOTATTACHED)
4269 set_bit(RTL8152_UNPLUG, &tp->flags);
4271 netif_napi_del(&tp->napi);
4272 unregister_netdev(tp->netdev);
4273 tp->rtl_ops.unload(tp);
4274 free_netdev(tp->netdev);
4278 #define REALTEK_USB_DEVICE(vend, prod) \
4279 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4280 USB_DEVICE_ID_MATCH_INT_CLASS, \
4281 .idVendor = (vend), \
4282 .idProduct = (prod), \
4283 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4286 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4287 USB_DEVICE_ID_MATCH_DEVICE, \
4288 .idVendor = (vend), \
4289 .idProduct = (prod), \
4290 .bInterfaceClass = USB_CLASS_COMM, \
4291 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4292 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4294 /* table of devices that work with this driver */
4295 static struct usb_device_id rtl8152_table[] = {
4296 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4297 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4298 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4299 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4300 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4301 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4305 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4307 static struct usb_driver rtl8152_driver = {
4309 .id_table = rtl8152_table,
4310 .probe = rtl8152_probe,
4311 .disconnect = rtl8152_disconnect,
4312 .suspend = rtl8152_suspend,
4313 .resume = rtl8152_resume,
4314 .reset_resume = rtl8152_reset_resume,
4315 .pre_reset = rtl8152_pre_reset,
4316 .post_reset = rtl8152_post_reset,
4317 .supports_autosuspend = 1,
4318 .disable_hub_initiated_lpm = 1,
4321 module_usb_driver(rtl8152_driver);
4323 MODULE_AUTHOR(DRIVER_AUTHOR);
4324 MODULE_DESCRIPTION(DRIVER_DESC);
4325 MODULE_LICENSE("GPL");