]> git.karo-electronics.de Git - karo-tx-linux.git/blob - drivers/net/usb/r8152.c
objtool: Add fortify_panic as __noreturn function
[karo-tx-linux.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
30
31 /* Information for net-next */
32 #define NETNEXT_VERSION         "08"
33
34 /* Information for net */
35 #define NET_VERSION             "9"
36
37 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
41
42 #define R8152_PHY_ID            32
43
44 #define PLA_IDR                 0xc000
45 #define PLA_RCR                 0xc010
46 #define PLA_RMS                 0xc016
47 #define PLA_RXFIFO_CTRL0        0xc0a0
48 #define PLA_RXFIFO_CTRL1        0xc0a4
49 #define PLA_RXFIFO_CTRL2        0xc0a8
50 #define PLA_DMY_REG0            0xc0b0
51 #define PLA_FMC                 0xc0b4
52 #define PLA_CFG_WOL             0xc0b6
53 #define PLA_TEREDO_CFG          0xc0bc
54 #define PLA_MAR                 0xcd00
55 #define PLA_BACKUP              0xd000
56 #define PAL_BDC_CR              0xd1a0
57 #define PLA_TEREDO_TIMER        0xd2cc
58 #define PLA_REALWOW_TIMER       0xd2e8
59 #define PLA_LEDSEL              0xdd90
60 #define PLA_LED_FEATURE         0xdd92
61 #define PLA_PHYAR               0xde00
62 #define PLA_BOOT_CTRL           0xe004
63 #define PLA_GPHY_INTR_IMR       0xe022
64 #define PLA_EEE_CR              0xe040
65 #define PLA_EEEP_CR             0xe080
66 #define PLA_MAC_PWR_CTRL        0xe0c0
67 #define PLA_MAC_PWR_CTRL2       0xe0ca
68 #define PLA_MAC_PWR_CTRL3       0xe0cc
69 #define PLA_MAC_PWR_CTRL4       0xe0ce
70 #define PLA_WDT6_CTRL           0xe428
71 #define PLA_TCR0                0xe610
72 #define PLA_TCR1                0xe612
73 #define PLA_MTPS                0xe615
74 #define PLA_TXFIFO_CTRL         0xe618
75 #define PLA_RSTTALLY            0xe800
76 #define PLA_CR                  0xe813
77 #define PLA_CRWECR              0xe81c
78 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5             0xe822
81 #define PLA_PHY_PWR             0xe84c
82 #define PLA_OOB_CTRL            0xe84f
83 #define PLA_CPCR                0xe854
84 #define PLA_MISC_0              0xe858
85 #define PLA_MISC_1              0xe85a
86 #define PLA_OCP_GPHY_BASE       0xe86c
87 #define PLA_TALLYCNT            0xe890
88 #define PLA_SFF_STS_7           0xe8de
89 #define PLA_PHYSTATUS           0xe908
90 #define PLA_BP_BA               0xfc26
91 #define PLA_BP_0                0xfc28
92 #define PLA_BP_1                0xfc2a
93 #define PLA_BP_2                0xfc2c
94 #define PLA_BP_3                0xfc2e
95 #define PLA_BP_4                0xfc30
96 #define PLA_BP_5                0xfc32
97 #define PLA_BP_6                0xfc34
98 #define PLA_BP_7                0xfc36
99 #define PLA_BP_EN               0xfc38
100
101 #define USB_USB2PHY             0xb41e
102 #define USB_SSPHYLINK2          0xb428
103 #define USB_U2P3_CTRL           0xb460
104 #define USB_CSR_DUMMY1          0xb464
105 #define USB_CSR_DUMMY2          0xb466
106 #define USB_DEV_STAT            0xb808
107 #define USB_CONNECT_TIMER       0xcbf8
108 #define USB_BURST_SIZE          0xcfc0
109 #define USB_USB_CTRL            0xd406
110 #define USB_PHY_CTRL            0xd408
111 #define USB_TX_AGG              0xd40a
112 #define USB_RX_BUF_TH           0xd40c
113 #define USB_USB_TIMER           0xd428
114 #define USB_RX_EARLY_TIMEOUT    0xd42c
115 #define USB_RX_EARLY_SIZE       0xd42e
116 #define USB_PM_CTRL_STATUS      0xd432
117 #define USB_TX_DMA              0xd434
118 #define USB_TOLERANCE           0xd490
119 #define USB_LPM_CTRL            0xd41a
120 #define USB_BMU_RESET           0xd4b0
121 #define USB_UPS_CTRL            0xd800
122 #define USB_MISC_0              0xd81a
123 #define USB_POWER_CUT           0xd80a
124 #define USB_AFE_CTRL2           0xd824
125 #define USB_WDT11_CTRL          0xe43c
126 #define USB_BP_BA               0xfc26
127 #define USB_BP_0                0xfc28
128 #define USB_BP_1                0xfc2a
129 #define USB_BP_2                0xfc2c
130 #define USB_BP_3                0xfc2e
131 #define USB_BP_4                0xfc30
132 #define USB_BP_5                0xfc32
133 #define USB_BP_6                0xfc34
134 #define USB_BP_7                0xfc36
135 #define USB_BP_EN               0xfc38
136
137 /* OCP Registers */
138 #define OCP_ALDPS_CONFIG        0x2010
139 #define OCP_EEE_CONFIG1         0x2080
140 #define OCP_EEE_CONFIG2         0x2092
141 #define OCP_EEE_CONFIG3         0x2094
142 #define OCP_BASE_MII            0xa400
143 #define OCP_EEE_AR              0xa41a
144 #define OCP_EEE_DATA            0xa41c
145 #define OCP_PHY_STATUS          0xa420
146 #define OCP_POWER_CFG           0xa430
147 #define OCP_EEE_CFG             0xa432
148 #define OCP_SRAM_ADDR           0xa436
149 #define OCP_SRAM_DATA           0xa438
150 #define OCP_DOWN_SPEED          0xa442
151 #define OCP_EEE_ABLE            0xa5c4
152 #define OCP_EEE_ADV             0xa5d0
153 #define OCP_EEE_LPABLE          0xa5d2
154 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
155 #define OCP_ADC_CFG             0xbc06
156
157 /* SRAM Register */
158 #define SRAM_LPF_CFG            0x8012
159 #define SRAM_10M_AMP1           0x8080
160 #define SRAM_10M_AMP2           0x8082
161 #define SRAM_IMPEDANCE          0x8084
162
163 /* PLA_RCR */
164 #define RCR_AAP                 0x00000001
165 #define RCR_APM                 0x00000002
166 #define RCR_AM                  0x00000004
167 #define RCR_AB                  0x00000008
168 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL      0x00080002
172 #define RXFIFO_THR1_OOB         0x01800003
173
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL        0x00000060
176 #define RXFIFO_THR2_HIGH        0x00000038
177 #define RXFIFO_THR2_OOB         0x0000004a
178 #define RXFIFO_THR2_NORMAL      0x00a0
179
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL        0x00000078
182 #define RXFIFO_THR3_HIGH        0x00000048
183 #define RXFIFO_THR3_OOB         0x0000005a
184 #define RXFIFO_THR3_NORMAL      0x0110
185
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL       0x00400008
188 #define TXFIFO_THR_NORMAL2      0x01000008
189
190 /* PLA_DMY_REG0 */
191 #define ECM_ALDPS               0x0002
192
193 /* PLA_FMC */
194 #define FMC_FCR_MCU_EN          0x0001
195
196 /* PLA_EEEP_CR */
197 #define EEEP_CR_EEEP_TX         0x0002
198
199 /* PLA_WDT6_CTRL */
200 #define WDT6_SET_MODE           0x0010
201
202 /* PLA_TCR0 */
203 #define TCR0_TX_EMPTY           0x0800
204 #define TCR0_AUTO_FIFO          0x0080
205
206 /* PLA_TCR1 */
207 #define VERSION_MASK            0x7cf0
208
209 /* PLA_MTPS */
210 #define MTPS_JUMBO              (12 * 1024 / 64)
211 #define MTPS_DEFAULT            (6 * 1024 / 64)
212
213 /* PLA_RSTTALLY */
214 #define TALLY_RESET             0x0001
215
216 /* PLA_CR */
217 #define CR_RST                  0x10
218 #define CR_RE                   0x08
219 #define CR_TE                   0x04
220
221 /* PLA_CRWECR */
222 #define CRWECR_NORAML           0x00
223 #define CRWECR_CONFIG           0xc0
224
225 /* PLA_OOB_CTRL */
226 #define NOW_IS_OOB              0x80
227 #define TXFIFO_EMPTY            0x20
228 #define RXFIFO_EMPTY            0x10
229 #define LINK_LIST_READY         0x02
230 #define DIS_MCU_CLROOB          0x01
231 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
232
233 /* PLA_MISC_1 */
234 #define RXDY_GATED_EN           0x0008
235
236 /* PLA_SFF_STS_7 */
237 #define RE_INIT_LL              0x8000
238 #define MCU_BORW_EN             0x4000
239
240 /* PLA_CPCR */
241 #define CPCR_RX_VLAN            0x0040
242
243 /* PLA_CFG_WOL */
244 #define MAGIC_EN                0x0001
245
246 /* PLA_TEREDO_CFG */
247 #define TEREDO_SEL              0x8000
248 #define TEREDO_WAKE_MASK        0x7f00
249 #define TEREDO_RS_EVENT_MASK    0x00fe
250 #define OOB_TEREDO_EN           0x0001
251
252 /* PAL_BDC_CR */
253 #define ALDPS_PROXY_MODE        0x0001
254
255 /* PLA_CONFIG34 */
256 #define LINK_ON_WAKE_EN         0x0010
257 #define LINK_OFF_WAKE_EN        0x0008
258
259 /* PLA_CONFIG5 */
260 #define BWF_EN                  0x0040
261 #define MWF_EN                  0x0020
262 #define UWF_EN                  0x0010
263 #define LAN_WAKE_EN             0x0002
264
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK           0x0700
267
268 /* PLA_PHY_PWR */
269 #define TX_10M_IDLE_EN          0x0080
270 #define PFM_PWM_SWITCH          0x0040
271
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN         0x00004000
274 #define MCU_CLK_RATIO           0x07010f07
275 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO       0x0f87
277
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO         0x8007
280
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN      0x0100
283 #define SUSPEND_SPDWN_EN        0x0004
284 #define U1U2_SPDWN_EN           0x0002
285 #define L1_SPDWN_EN             0x0001
286
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN        0x1000
289 #define RXDV_SPDWN_EN           0x0800
290 #define TX10MIDLE_EN            0x0100
291 #define TP100_SPDWN_EN          0x0020
292 #define TP500_SPDWN_EN          0x0010
293 #define TP1000_SPDWN_EN         0x0008
294 #define EEE_SPDWN_EN            0x0001
295
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK            0x0001
298 #define SPEED_DOWN_MSK          0x0002
299 #define SPDWN_RXDV_MSK          0x0004
300 #define SPDWN_LINKCHG_MSK       0x0008
301
302 /* PLA_PHYAR */
303 #define PHYAR_FLAG              0x80000000
304
305 /* PLA_EEE_CR */
306 #define EEE_RX_EN               0x0001
307 #define EEE_TX_EN               0x0002
308
309 /* PLA_BOOT_CTRL */
310 #define AUTOLOAD_DONE           0x0002
311
312 /* USB_USB2PHY */
313 #define USB2PHY_SUSPEND         0x0001
314 #define USB2PHY_L1              0x0002
315
316 /* USB_SSPHYLINK2 */
317 #define pwd_dn_scale_mask       0x3ffe
318 #define pwd_dn_scale(x)         ((x) << 1)
319
320 /* USB_CSR_DUMMY1 */
321 #define DYNAMIC_BURST           0x0001
322
323 /* USB_CSR_DUMMY2 */
324 #define EP4_FULL_FC             0x0001
325
326 /* USB_DEV_STAT */
327 #define STAT_SPEED_MASK         0x0006
328 #define STAT_SPEED_HIGH         0x0000
329 #define STAT_SPEED_FULL         0x0002
330
331 /* USB_TX_AGG */
332 #define TX_AGG_MAX_THRESHOLD    0x03
333
334 /* USB_RX_BUF_TH */
335 #define RX_THR_SUPPER           0x0c350180
336 #define RX_THR_HIGH             0x7a120180
337 #define RX_THR_SLOW             0xffff0180
338
339 /* USB_TX_DMA */
340 #define TEST_MODE_DISABLE       0x00000001
341 #define TX_SIZE_ADJUST1         0x00000100
342
343 /* USB_BMU_RESET */
344 #define BMU_RESET_EP_IN         0x01
345 #define BMU_RESET_EP_OUT        0x02
346
347 /* USB_UPS_CTRL */
348 #define POWER_CUT               0x0100
349
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE         0x0001
352
353 /* USB_USB_CTRL */
354 #define RX_AGG_DISABLE          0x0010
355 #define RX_ZERO_EN              0x0080
356
357 /* USB_U2P3_CTRL */
358 #define U2P3_ENABLE             0x0001
359
360 /* USB_POWER_CUT */
361 #define PWR_EN                  0x0001
362 #define PHASE2_EN               0x0008
363
364 /* USB_MISC_0 */
365 #define PCUT_STATUS             0x0001
366
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER           85000U
369 #define COALESCE_HIGH           250000U
370 #define COALESCE_SLOW           524280U
371
372 /* USB_WDT11_CTRL */
373 #define TIMER11_EN              0x0001
374
375 /* USB_LPM_CTRL */
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK          0x0c
380 #define LPM_TIMER_500MS         0x04    /* 500 ms */
381 #define LPM_TIMER_500US         0x0c    /* 500 us */
382 #define ROK_EXIT_LPM            0x02
383
384 /* USB_AFE_CTRL2 */
385 #define SEN_VAL_MASK            0xf800
386 #define SEN_VAL_NORMAL          0xa000
387 #define SEL_RXIDLE              0x0100
388
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE               0x8000
391 #define ENPDNPS                 0x0200
392 #define LINKENA                 0x0100
393 #define DIS_SDSAVE              0x0010
394
395 /* OCP_PHY_STATUS */
396 #define PHY_STAT_MASK           0x0007
397 #define PHY_STAT_LAN_ON         3
398 #define PHY_STAT_PWRDN          5
399
400 /* OCP_POWER_CFG */
401 #define EEE_CLKDIV_EN           0x8000
402 #define EN_ALDPS                0x0004
403 #define EN_10M_PLLOFF           0x0001
404
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP      0x8000
407 #define RG_MATCLR_EN            0x4000
408 #define EEE_10_CAP              0x2000
409 #define EEE_NWAY_EN             0x1000
410 #define TX_QUIET_EN             0x0200
411 #define RX_QUIET_EN             0x0100
412 #define sd_rise_time_mask       0x0070
413 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP      0x0008
415 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
416
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN          0x0400
420 #define RG_LDVQUIET_EN          0x0200
421 #define RG_CKRSEL               0x0020
422 #define RG_EEEPRG_EN            0x0010
423
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask           0xff80
426 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
427 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
428 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
429
430 /* OCP_EEE_AR */
431 /* bit[15:14] function */
432 #define FUN_ADDR                0x0000
433 #define FUN_DATA                0x4000
434 /* bit[4:0] device addr */
435
436 /* OCP_EEE_CFG */
437 #define CTAP_SHORT_EN           0x0040
438 #define EEE10_EN                0x0010
439
440 /* OCP_DOWN_SPEED */
441 #define EN_10M_BGOFF            0x0080
442
443 /* OCP_PHY_STATE */
444 #define TXDIS_STATE             0x01
445 #define ABD_STATE               0x02
446
447 /* OCP_ADC_CFG */
448 #define CKADSEL_L               0x0100
449 #define ADC_EN                  0x0080
450 #define EN_EMI_L                0x0040
451
452 /* SRAM_LPF_CFG */
453 #define LPF_AUTO_TUNE           0x8000
454
455 /* SRAM_10M_AMP1 */
456 #define GDAC_IB_UPALL           0x0008
457
458 /* SRAM_10M_AMP2 */
459 #define AMP_DN                  0x0200
460
461 /* SRAM_IMPEDANCE */
462 #define RX_DRIVING_MASK         0x6000
463
464 /* MAC PASSTHRU */
465 #define AD_MASK                 0xfee0
466 #define EFUSE                   0xcfdb
467 #define PASS_THRU_MASK          0x1
468
469 enum rtl_register_content {
470         _1000bps        = 0x10,
471         _100bps         = 0x08,
472         _10bps          = 0x04,
473         LINK_STATUS     = 0x02,
474         FULL_DUP        = 0x01,
475 };
476
477 #define RTL8152_MAX_TX          4
478 #define RTL8152_MAX_RX          10
479 #define INTBUFSIZE              2
480 #define CRC_SIZE                4
481 #define TX_ALIGN                4
482 #define RX_ALIGN                8
483
484 #define INTR_LINK               0x0004
485
486 #define RTL8152_REQT_READ       0xc0
487 #define RTL8152_REQT_WRITE      0x40
488 #define RTL8152_REQ_GET_REGS    0x05
489 #define RTL8152_REQ_SET_REGS    0x05
490
491 #define BYTE_EN_DWORD           0xff
492 #define BYTE_EN_WORD            0x33
493 #define BYTE_EN_BYTE            0x11
494 #define BYTE_EN_SIX_BYTES       0x3f
495 #define BYTE_EN_START_MASK      0x0f
496 #define BYTE_EN_END_MASK        0xf0
497
498 #define RTL8153_MAX_PACKET      9216 /* 9K */
499 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS             RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT      (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT     64
504 #define rx_reserved_size(x)     ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
505                                  sizeof(struct rx_desc) + RX_ALIGN)
506
507 /* rtl8152 flags */
508 enum rtl8152_flags {
509         RTL8152_UNPLUG = 0,
510         RTL8152_SET_RX_MODE,
511         WORK_ENABLE,
512         RTL8152_LINK_CHG,
513         SELECTIVE_SUSPEND,
514         PHY_RESET,
515         SCHEDULE_NAPI,
516 };
517
518 /* Define these values to match your device */
519 #define VENDOR_ID_REALTEK               0x0bda
520 #define VENDOR_ID_MICROSOFT             0x045e
521 #define VENDOR_ID_SAMSUNG               0x04e8
522 #define VENDOR_ID_LENOVO                0x17ef
523 #define VENDOR_ID_NVIDIA                0x0955
524
525 #define MCU_TYPE_PLA                    0x0100
526 #define MCU_TYPE_USB                    0x0000
527
528 struct tally_counter {
529         __le64  tx_packets;
530         __le64  rx_packets;
531         __le64  tx_errors;
532         __le32  rx_errors;
533         __le16  rx_missed;
534         __le16  align_errors;
535         __le32  tx_one_collision;
536         __le32  tx_multi_collision;
537         __le64  rx_unicast;
538         __le64  rx_broadcast;
539         __le32  rx_multicast;
540         __le16  tx_aborted;
541         __le16  tx_underrun;
542 };
543
544 struct rx_desc {
545         __le32 opts1;
546 #define RX_LEN_MASK                     0x7fff
547
548         __le32 opts2;
549 #define RD_UDP_CS                       BIT(23)
550 #define RD_TCP_CS                       BIT(22)
551 #define RD_IPV6_CS                      BIT(20)
552 #define RD_IPV4_CS                      BIT(19)
553
554         __le32 opts3;
555 #define IPF                             BIT(23) /* IP checksum fail */
556 #define UDPF                            BIT(22) /* UDP checksum fail */
557 #define TCPF                            BIT(21) /* TCP checksum fail */
558 #define RX_VLAN_TAG                     BIT(16)
559
560         __le32 opts4;
561         __le32 opts5;
562         __le32 opts6;
563 };
564
565 struct tx_desc {
566         __le32 opts1;
567 #define TX_FS                   BIT(31) /* First segment of a packet */
568 #define TX_LS                   BIT(30) /* Final segment of a packet */
569 #define GTSENDV4                BIT(28)
570 #define GTSENDV6                BIT(27)
571 #define GTTCPHO_SHIFT           18
572 #define GTTCPHO_MAX             0x7fU
573 #define TX_LEN_MAX              0x3ffffU
574
575         __le32 opts2;
576 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
577 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
578 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
579 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
580 #define MSS_SHIFT               17
581 #define MSS_MAX                 0x7ffU
582 #define TCPHO_SHIFT             17
583 #define TCPHO_MAX               0x7ffU
584 #define TX_VLAN_TAG             BIT(16)
585 };
586
587 struct r8152;
588
589 struct rx_agg {
590         struct list_head list;
591         struct urb *urb;
592         struct r8152 *context;
593         void *buffer;
594         void *head;
595 };
596
597 struct tx_agg {
598         struct list_head list;
599         struct urb *urb;
600         struct r8152 *context;
601         void *buffer;
602         void *head;
603         u32 skb_num;
604         u32 skb_len;
605 };
606
607 struct r8152 {
608         unsigned long flags;
609         struct usb_device *udev;
610         struct napi_struct napi;
611         struct usb_interface *intf;
612         struct net_device *netdev;
613         struct urb *intr_urb;
614         struct tx_agg tx_info[RTL8152_MAX_TX];
615         struct rx_agg rx_info[RTL8152_MAX_RX];
616         struct list_head rx_done, tx_free;
617         struct sk_buff_head tx_queue, rx_queue;
618         spinlock_t rx_lock, tx_lock;
619         struct delayed_work schedule, hw_phy_work;
620         struct mii_if_info mii;
621         struct mutex control;   /* use for hw setting */
622 #ifdef CONFIG_PM_SLEEP
623         struct notifier_block pm_notifier;
624 #endif
625
626         struct rtl_ops {
627                 void (*init)(struct r8152 *);
628                 int (*enable)(struct r8152 *);
629                 void (*disable)(struct r8152 *);
630                 void (*up)(struct r8152 *);
631                 void (*down)(struct r8152 *);
632                 void (*unload)(struct r8152 *);
633                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
634                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
635                 bool (*in_nway)(struct r8152 *);
636                 void (*hw_phy_cfg)(struct r8152 *);
637                 void (*autosuspend_en)(struct r8152 *tp, bool enable);
638         } rtl_ops;
639
640         int intr_interval;
641         u32 saved_wolopts;
642         u32 msg_enable;
643         u32 tx_qlen;
644         u32 coalesce;
645         u16 ocp_base;
646         u16 speed;
647         u8 *intr_buff;
648         u8 version;
649         u8 duplex;
650         u8 autoneg;
651 };
652
653 enum rtl_version {
654         RTL_VER_UNKNOWN = 0,
655         RTL_VER_01,
656         RTL_VER_02,
657         RTL_VER_03,
658         RTL_VER_04,
659         RTL_VER_05,
660         RTL_VER_06,
661         RTL_VER_MAX
662 };
663
664 enum tx_csum_stat {
665         TX_CSUM_SUCCESS = 0,
666         TX_CSUM_TSO,
667         TX_CSUM_NONE
668 };
669
670 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
671  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
672  */
673 static const int multicast_filter_limit = 32;
674 static unsigned int agg_buf_sz = 16384;
675
676 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
677                                  VLAN_ETH_HLEN - VLAN_HLEN)
678
679 static
680 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
681 {
682         int ret;
683         void *tmp;
684
685         tmp = kmalloc(size, GFP_KERNEL);
686         if (!tmp)
687                 return -ENOMEM;
688
689         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
690                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
691                               value, index, tmp, size, 500);
692
693         memcpy(data, tmp, size);
694         kfree(tmp);
695
696         return ret;
697 }
698
699 static
700 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
701 {
702         int ret;
703         void *tmp;
704
705         tmp = kmemdup(data, size, GFP_KERNEL);
706         if (!tmp)
707                 return -ENOMEM;
708
709         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
710                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
711                               value, index, tmp, size, 500);
712
713         kfree(tmp);
714
715         return ret;
716 }
717
718 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
719                             void *data, u16 type)
720 {
721         u16 limit = 64;
722         int ret = 0;
723
724         if (test_bit(RTL8152_UNPLUG, &tp->flags))
725                 return -ENODEV;
726
727         /* both size and indix must be 4 bytes align */
728         if ((size & 3) || !size || (index & 3) || !data)
729                 return -EPERM;
730
731         if ((u32)index + (u32)size > 0xffff)
732                 return -EPERM;
733
734         while (size) {
735                 if (size > limit) {
736                         ret = get_registers(tp, index, type, limit, data);
737                         if (ret < 0)
738                                 break;
739
740                         index += limit;
741                         data += limit;
742                         size -= limit;
743                 } else {
744                         ret = get_registers(tp, index, type, size, data);
745                         if (ret < 0)
746                                 break;
747
748                         index += size;
749                         data += size;
750                         size = 0;
751                         break;
752                 }
753         }
754
755         if (ret == -ENODEV)
756                 set_bit(RTL8152_UNPLUG, &tp->flags);
757
758         return ret;
759 }
760
761 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
762                              u16 size, void *data, u16 type)
763 {
764         int ret;
765         u16 byteen_start, byteen_end, byen;
766         u16 limit = 512;
767
768         if (test_bit(RTL8152_UNPLUG, &tp->flags))
769                 return -ENODEV;
770
771         /* both size and indix must be 4 bytes align */
772         if ((size & 3) || !size || (index & 3) || !data)
773                 return -EPERM;
774
775         if ((u32)index + (u32)size > 0xffff)
776                 return -EPERM;
777
778         byteen_start = byteen & BYTE_EN_START_MASK;
779         byteen_end = byteen & BYTE_EN_END_MASK;
780
781         byen = byteen_start | (byteen_start << 4);
782         ret = set_registers(tp, index, type | byen, 4, data);
783         if (ret < 0)
784                 goto error1;
785
786         index += 4;
787         data += 4;
788         size -= 4;
789
790         if (size) {
791                 size -= 4;
792
793                 while (size) {
794                         if (size > limit) {
795                                 ret = set_registers(tp, index,
796                                                     type | BYTE_EN_DWORD,
797                                                     limit, data);
798                                 if (ret < 0)
799                                         goto error1;
800
801                                 index += limit;
802                                 data += limit;
803                                 size -= limit;
804                         } else {
805                                 ret = set_registers(tp, index,
806                                                     type | BYTE_EN_DWORD,
807                                                     size, data);
808                                 if (ret < 0)
809                                         goto error1;
810
811                                 index += size;
812                                 data += size;
813                                 size = 0;
814                                 break;
815                         }
816                 }
817
818                 byen = byteen_end | (byteen_end >> 4);
819                 ret = set_registers(tp, index, type | byen, 4, data);
820                 if (ret < 0)
821                         goto error1;
822         }
823
824 error1:
825         if (ret == -ENODEV)
826                 set_bit(RTL8152_UNPLUG, &tp->flags);
827
828         return ret;
829 }
830
831 static inline
832 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
833 {
834         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
835 }
836
837 static inline
838 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
839 {
840         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
841 }
842
843 static inline
844 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
845 {
846         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
847 }
848
849 static inline
850 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
851 {
852         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
853 }
854
855 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
856 {
857         __le32 data;
858
859         generic_ocp_read(tp, index, sizeof(data), &data, type);
860
861         return __le32_to_cpu(data);
862 }
863
864 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
865 {
866         __le32 tmp = __cpu_to_le32(data);
867
868         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
869 }
870
871 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
872 {
873         u32 data;
874         __le32 tmp;
875         u8 shift = index & 2;
876
877         index &= ~3;
878
879         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
880
881         data = __le32_to_cpu(tmp);
882         data >>= (shift * 8);
883         data &= 0xffff;
884
885         return (u16)data;
886 }
887
888 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
889 {
890         u32 mask = 0xffff;
891         __le32 tmp;
892         u16 byen = BYTE_EN_WORD;
893         u8 shift = index & 2;
894
895         data &= mask;
896
897         if (index & 2) {
898                 byen <<= shift;
899                 mask <<= (shift * 8);
900                 data <<= (shift * 8);
901                 index &= ~3;
902         }
903
904         tmp = __cpu_to_le32(data);
905
906         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
907 }
908
909 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
910 {
911         u32 data;
912         __le32 tmp;
913         u8 shift = index & 3;
914
915         index &= ~3;
916
917         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
918
919         data = __le32_to_cpu(tmp);
920         data >>= (shift * 8);
921         data &= 0xff;
922
923         return (u8)data;
924 }
925
926 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
927 {
928         u32 mask = 0xff;
929         __le32 tmp;
930         u16 byen = BYTE_EN_BYTE;
931         u8 shift = index & 3;
932
933         data &= mask;
934
935         if (index & 3) {
936                 byen <<= shift;
937                 mask <<= (shift * 8);
938                 data <<= (shift * 8);
939                 index &= ~3;
940         }
941
942         tmp = __cpu_to_le32(data);
943
944         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
945 }
946
947 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
948 {
949         u16 ocp_base, ocp_index;
950
951         ocp_base = addr & 0xf000;
952         if (ocp_base != tp->ocp_base) {
953                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
954                 tp->ocp_base = ocp_base;
955         }
956
957         ocp_index = (addr & 0x0fff) | 0xb000;
958         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
959 }
960
961 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
962 {
963         u16 ocp_base, ocp_index;
964
965         ocp_base = addr & 0xf000;
966         if (ocp_base != tp->ocp_base) {
967                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
968                 tp->ocp_base = ocp_base;
969         }
970
971         ocp_index = (addr & 0x0fff) | 0xb000;
972         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
973 }
974
975 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
976 {
977         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
978 }
979
980 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
981 {
982         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
983 }
984
985 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
986 {
987         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
988         ocp_reg_write(tp, OCP_SRAM_DATA, data);
989 }
990
991 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
992 {
993         struct r8152 *tp = netdev_priv(netdev);
994         int ret;
995
996         if (test_bit(RTL8152_UNPLUG, &tp->flags))
997                 return -ENODEV;
998
999         if (phy_id != R8152_PHY_ID)
1000                 return -EINVAL;
1001
1002         ret = r8152_mdio_read(tp, reg);
1003
1004         return ret;
1005 }
1006
1007 static
1008 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1009 {
1010         struct r8152 *tp = netdev_priv(netdev);
1011
1012         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1013                 return;
1014
1015         if (phy_id != R8152_PHY_ID)
1016                 return;
1017
1018         r8152_mdio_write(tp, reg, val);
1019 }
1020
1021 static int
1022 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1023
1024 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1025 {
1026         struct r8152 *tp = netdev_priv(netdev);
1027         struct sockaddr *addr = p;
1028         int ret = -EADDRNOTAVAIL;
1029
1030         if (!is_valid_ether_addr(addr->sa_data))
1031                 goto out1;
1032
1033         ret = usb_autopm_get_interface(tp->intf);
1034         if (ret < 0)
1035                 goto out1;
1036
1037         mutex_lock(&tp->control);
1038
1039         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1040
1041         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1042         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1043         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1044
1045         mutex_unlock(&tp->control);
1046
1047         usb_autopm_put_interface(tp->intf);
1048 out1:
1049         return ret;
1050 }
1051
1052 /* Devices containing RTL8153-AD can support a persistent
1053  * host system provided MAC address.
1054  * Examples of this are Dell TB15 and Dell WD15 docks
1055  */
1056 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1057 {
1058         acpi_status status;
1059         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1060         union acpi_object *obj;
1061         int ret = -EINVAL;
1062         u32 ocp_data;
1063         unsigned char buf[6];
1064
1065         /* test for -AD variant of RTL8153 */
1066         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1067         if ((ocp_data & AD_MASK) != 0x1000)
1068                 return -ENODEV;
1069
1070         /* test for MAC address pass-through bit */
1071         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1072         if ((ocp_data & PASS_THRU_MASK) != 1)
1073                 return -ENODEV;
1074
1075         /* returns _AUXMAC_#AABBCCDDEEFF# */
1076         status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1077         obj = (union acpi_object *)buffer.pointer;
1078         if (!ACPI_SUCCESS(status))
1079                 return -ENODEV;
1080         if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1081                 netif_warn(tp, probe, tp->netdev,
1082                            "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1083                            obj->type, obj->string.length);
1084                 goto amacout;
1085         }
1086         if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1087             strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1088                 netif_warn(tp, probe, tp->netdev,
1089                            "Invalid header when reading pass-thru MAC addr\n");
1090                 goto amacout;
1091         }
1092         ret = hex2bin(buf, obj->string.pointer + 9, 6);
1093         if (!(ret == 0 && is_valid_ether_addr(buf))) {
1094                 netif_warn(tp, probe, tp->netdev,
1095                            "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1096                            ret, buf);
1097                 ret = -EINVAL;
1098                 goto amacout;
1099         }
1100         memcpy(sa->sa_data, buf, 6);
1101         ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1102         netif_info(tp, probe, tp->netdev,
1103                    "Using pass-thru MAC addr %pM\n", sa->sa_data);
1104
1105 amacout:
1106         kfree(obj);
1107         return ret;
1108 }
1109
1110 static int set_ethernet_addr(struct r8152 *tp)
1111 {
1112         struct net_device *dev = tp->netdev;
1113         struct sockaddr sa;
1114         int ret;
1115
1116         if (tp->version == RTL_VER_01) {
1117                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1118         } else {
1119                 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1120                  * or system doesn't provide valid _SB.AMAC this will be
1121                  * be expected to non-zero
1122                  */
1123                 ret = vendor_mac_passthru_addr_read(tp, &sa);
1124                 if (ret < 0)
1125                         ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1126         }
1127
1128         if (ret < 0) {
1129                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1130         } else if (!is_valid_ether_addr(sa.sa_data)) {
1131                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1132                           sa.sa_data);
1133                 eth_hw_addr_random(dev);
1134                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1135                 ret = rtl8152_set_mac_address(dev, &sa);
1136                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1137                            sa.sa_data);
1138         } else {
1139                 if (tp->version == RTL_VER_01)
1140                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1141                 else
1142                         ret = rtl8152_set_mac_address(dev, &sa);
1143         }
1144
1145         return ret;
1146 }
1147
1148 static void read_bulk_callback(struct urb *urb)
1149 {
1150         struct net_device *netdev;
1151         int status = urb->status;
1152         struct rx_agg *agg;
1153         struct r8152 *tp;
1154
1155         agg = urb->context;
1156         if (!agg)
1157                 return;
1158
1159         tp = agg->context;
1160         if (!tp)
1161                 return;
1162
1163         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1164                 return;
1165
1166         if (!test_bit(WORK_ENABLE, &tp->flags))
1167                 return;
1168
1169         netdev = tp->netdev;
1170
1171         /* When link down, the driver would cancel all bulks. */
1172         /* This avoid the re-submitting bulk */
1173         if (!netif_carrier_ok(netdev))
1174                 return;
1175
1176         usb_mark_last_busy(tp->udev);
1177
1178         switch (status) {
1179         case 0:
1180                 if (urb->actual_length < ETH_ZLEN)
1181                         break;
1182
1183                 spin_lock(&tp->rx_lock);
1184                 list_add_tail(&agg->list, &tp->rx_done);
1185                 spin_unlock(&tp->rx_lock);
1186                 napi_schedule(&tp->napi);
1187                 return;
1188         case -ESHUTDOWN:
1189                 set_bit(RTL8152_UNPLUG, &tp->flags);
1190                 netif_device_detach(tp->netdev);
1191                 return;
1192         case -ENOENT:
1193                 return; /* the urb is in unlink state */
1194         case -ETIME:
1195                 if (net_ratelimit())
1196                         netdev_warn(netdev, "maybe reset is needed?\n");
1197                 break;
1198         default:
1199                 if (net_ratelimit())
1200                         netdev_warn(netdev, "Rx status %d\n", status);
1201                 break;
1202         }
1203
1204         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1205 }
1206
1207 static void write_bulk_callback(struct urb *urb)
1208 {
1209         struct net_device_stats *stats;
1210         struct net_device *netdev;
1211         struct tx_agg *agg;
1212         struct r8152 *tp;
1213         int status = urb->status;
1214
1215         agg = urb->context;
1216         if (!agg)
1217                 return;
1218
1219         tp = agg->context;
1220         if (!tp)
1221                 return;
1222
1223         netdev = tp->netdev;
1224         stats = &netdev->stats;
1225         if (status) {
1226                 if (net_ratelimit())
1227                         netdev_warn(netdev, "Tx status %d\n", status);
1228                 stats->tx_errors += agg->skb_num;
1229         } else {
1230                 stats->tx_packets += agg->skb_num;
1231                 stats->tx_bytes += agg->skb_len;
1232         }
1233
1234         spin_lock(&tp->tx_lock);
1235         list_add_tail(&agg->list, &tp->tx_free);
1236         spin_unlock(&tp->tx_lock);
1237
1238         usb_autopm_put_interface_async(tp->intf);
1239
1240         if (!netif_carrier_ok(netdev))
1241                 return;
1242
1243         if (!test_bit(WORK_ENABLE, &tp->flags))
1244                 return;
1245
1246         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1247                 return;
1248
1249         if (!skb_queue_empty(&tp->tx_queue))
1250                 napi_schedule(&tp->napi);
1251 }
1252
1253 static void intr_callback(struct urb *urb)
1254 {
1255         struct r8152 *tp;
1256         __le16 *d;
1257         int status = urb->status;
1258         int res;
1259
1260         tp = urb->context;
1261         if (!tp)
1262                 return;
1263
1264         if (!test_bit(WORK_ENABLE, &tp->flags))
1265                 return;
1266
1267         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1268                 return;
1269
1270         switch (status) {
1271         case 0:                 /* success */
1272                 break;
1273         case -ECONNRESET:       /* unlink */
1274         case -ESHUTDOWN:
1275                 netif_device_detach(tp->netdev);
1276         case -ENOENT:
1277         case -EPROTO:
1278                 netif_info(tp, intr, tp->netdev,
1279                            "Stop submitting intr, status %d\n", status);
1280                 return;
1281         case -EOVERFLOW:
1282                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1283                 goto resubmit;
1284         /* -EPIPE:  should clear the halt */
1285         default:
1286                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1287                 goto resubmit;
1288         }
1289
1290         d = urb->transfer_buffer;
1291         if (INTR_LINK & __le16_to_cpu(d[0])) {
1292                 if (!netif_carrier_ok(tp->netdev)) {
1293                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1294                         schedule_delayed_work(&tp->schedule, 0);
1295                 }
1296         } else {
1297                 if (netif_carrier_ok(tp->netdev)) {
1298                         netif_stop_queue(tp->netdev);
1299                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1300                         schedule_delayed_work(&tp->schedule, 0);
1301                 }
1302         }
1303
1304 resubmit:
1305         res = usb_submit_urb(urb, GFP_ATOMIC);
1306         if (res == -ENODEV) {
1307                 set_bit(RTL8152_UNPLUG, &tp->flags);
1308                 netif_device_detach(tp->netdev);
1309         } else if (res) {
1310                 netif_err(tp, intr, tp->netdev,
1311                           "can't resubmit intr, status %d\n", res);
1312         }
1313 }
1314
1315 static inline void *rx_agg_align(void *data)
1316 {
1317         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1318 }
1319
1320 static inline void *tx_agg_align(void *data)
1321 {
1322         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1323 }
1324
1325 static void free_all_mem(struct r8152 *tp)
1326 {
1327         int i;
1328
1329         for (i = 0; i < RTL8152_MAX_RX; i++) {
1330                 usb_free_urb(tp->rx_info[i].urb);
1331                 tp->rx_info[i].urb = NULL;
1332
1333                 kfree(tp->rx_info[i].buffer);
1334                 tp->rx_info[i].buffer = NULL;
1335                 tp->rx_info[i].head = NULL;
1336         }
1337
1338         for (i = 0; i < RTL8152_MAX_TX; i++) {
1339                 usb_free_urb(tp->tx_info[i].urb);
1340                 tp->tx_info[i].urb = NULL;
1341
1342                 kfree(tp->tx_info[i].buffer);
1343                 tp->tx_info[i].buffer = NULL;
1344                 tp->tx_info[i].head = NULL;
1345         }
1346
1347         usb_free_urb(tp->intr_urb);
1348         tp->intr_urb = NULL;
1349
1350         kfree(tp->intr_buff);
1351         tp->intr_buff = NULL;
1352 }
1353
1354 static int alloc_all_mem(struct r8152 *tp)
1355 {
1356         struct net_device *netdev = tp->netdev;
1357         struct usb_interface *intf = tp->intf;
1358         struct usb_host_interface *alt = intf->cur_altsetting;
1359         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1360         struct urb *urb;
1361         int node, i;
1362         u8 *buf;
1363
1364         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1365
1366         spin_lock_init(&tp->rx_lock);
1367         spin_lock_init(&tp->tx_lock);
1368         INIT_LIST_HEAD(&tp->tx_free);
1369         INIT_LIST_HEAD(&tp->rx_done);
1370         skb_queue_head_init(&tp->tx_queue);
1371         skb_queue_head_init(&tp->rx_queue);
1372
1373         for (i = 0; i < RTL8152_MAX_RX; i++) {
1374                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1375                 if (!buf)
1376                         goto err1;
1377
1378                 if (buf != rx_agg_align(buf)) {
1379                         kfree(buf);
1380                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1381                                            node);
1382                         if (!buf)
1383                                 goto err1;
1384                 }
1385
1386                 urb = usb_alloc_urb(0, GFP_KERNEL);
1387                 if (!urb) {
1388                         kfree(buf);
1389                         goto err1;
1390                 }
1391
1392                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1393                 tp->rx_info[i].context = tp;
1394                 tp->rx_info[i].urb = urb;
1395                 tp->rx_info[i].buffer = buf;
1396                 tp->rx_info[i].head = rx_agg_align(buf);
1397         }
1398
1399         for (i = 0; i < RTL8152_MAX_TX; i++) {
1400                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1401                 if (!buf)
1402                         goto err1;
1403
1404                 if (buf != tx_agg_align(buf)) {
1405                         kfree(buf);
1406                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1407                                            node);
1408                         if (!buf)
1409                                 goto err1;
1410                 }
1411
1412                 urb = usb_alloc_urb(0, GFP_KERNEL);
1413                 if (!urb) {
1414                         kfree(buf);
1415                         goto err1;
1416                 }
1417
1418                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1419                 tp->tx_info[i].context = tp;
1420                 tp->tx_info[i].urb = urb;
1421                 tp->tx_info[i].buffer = buf;
1422                 tp->tx_info[i].head = tx_agg_align(buf);
1423
1424                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1425         }
1426
1427         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1428         if (!tp->intr_urb)
1429                 goto err1;
1430
1431         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1432         if (!tp->intr_buff)
1433                 goto err1;
1434
1435         tp->intr_interval = (int)ep_intr->desc.bInterval;
1436         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1437                          tp->intr_buff, INTBUFSIZE, intr_callback,
1438                          tp, tp->intr_interval);
1439
1440         return 0;
1441
1442 err1:
1443         free_all_mem(tp);
1444         return -ENOMEM;
1445 }
1446
1447 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1448 {
1449         struct tx_agg *agg = NULL;
1450         unsigned long flags;
1451
1452         if (list_empty(&tp->tx_free))
1453                 return NULL;
1454
1455         spin_lock_irqsave(&tp->tx_lock, flags);
1456         if (!list_empty(&tp->tx_free)) {
1457                 struct list_head *cursor;
1458
1459                 cursor = tp->tx_free.next;
1460                 list_del_init(cursor);
1461                 agg = list_entry(cursor, struct tx_agg, list);
1462         }
1463         spin_unlock_irqrestore(&tp->tx_lock, flags);
1464
1465         return agg;
1466 }
1467
1468 /* r8152_csum_workaround()
1469  * The hw limites the value the transport offset. When the offset is out of the
1470  * range, calculate the checksum by sw.
1471  */
1472 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1473                                   struct sk_buff_head *list)
1474 {
1475         if (skb_shinfo(skb)->gso_size) {
1476                 netdev_features_t features = tp->netdev->features;
1477                 struct sk_buff_head seg_list;
1478                 struct sk_buff *segs, *nskb;
1479
1480                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1481                 segs = skb_gso_segment(skb, features);
1482                 if (IS_ERR(segs) || !segs)
1483                         goto drop;
1484
1485                 __skb_queue_head_init(&seg_list);
1486
1487                 do {
1488                         nskb = segs;
1489                         segs = segs->next;
1490                         nskb->next = NULL;
1491                         __skb_queue_tail(&seg_list, nskb);
1492                 } while (segs);
1493
1494                 skb_queue_splice(&seg_list, list);
1495                 dev_kfree_skb(skb);
1496         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1497                 if (skb_checksum_help(skb) < 0)
1498                         goto drop;
1499
1500                 __skb_queue_head(list, skb);
1501         } else {
1502                 struct net_device_stats *stats;
1503
1504 drop:
1505                 stats = &tp->netdev->stats;
1506                 stats->tx_dropped++;
1507                 dev_kfree_skb(skb);
1508         }
1509 }
1510
1511 /* msdn_giant_send_check()
1512  * According to the document of microsoft, the TCP Pseudo Header excludes the
1513  * packet length for IPv6 TCP large packets.
1514  */
1515 static int msdn_giant_send_check(struct sk_buff *skb)
1516 {
1517         const struct ipv6hdr *ipv6h;
1518         struct tcphdr *th;
1519         int ret;
1520
1521         ret = skb_cow_head(skb, 0);
1522         if (ret)
1523                 return ret;
1524
1525         ipv6h = ipv6_hdr(skb);
1526         th = tcp_hdr(skb);
1527
1528         th->check = 0;
1529         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1530
1531         return ret;
1532 }
1533
1534 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1535 {
1536         if (skb_vlan_tag_present(skb)) {
1537                 u32 opts2;
1538
1539                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1540                 desc->opts2 |= cpu_to_le32(opts2);
1541         }
1542 }
1543
1544 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1545 {
1546         u32 opts2 = le32_to_cpu(desc->opts2);
1547
1548         if (opts2 & RX_VLAN_TAG)
1549                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1550                                        swab16(opts2 & 0xffff));
1551 }
1552
1553 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1554                          struct sk_buff *skb, u32 len, u32 transport_offset)
1555 {
1556         u32 mss = skb_shinfo(skb)->gso_size;
1557         u32 opts1, opts2 = 0;
1558         int ret = TX_CSUM_SUCCESS;
1559
1560         WARN_ON_ONCE(len > TX_LEN_MAX);
1561
1562         opts1 = len | TX_FS | TX_LS;
1563
1564         if (mss) {
1565                 if (transport_offset > GTTCPHO_MAX) {
1566                         netif_warn(tp, tx_err, tp->netdev,
1567                                    "Invalid transport offset 0x%x for TSO\n",
1568                                    transport_offset);
1569                         ret = TX_CSUM_TSO;
1570                         goto unavailable;
1571                 }
1572
1573                 switch (vlan_get_protocol(skb)) {
1574                 case htons(ETH_P_IP):
1575                         opts1 |= GTSENDV4;
1576                         break;
1577
1578                 case htons(ETH_P_IPV6):
1579                         if (msdn_giant_send_check(skb)) {
1580                                 ret = TX_CSUM_TSO;
1581                                 goto unavailable;
1582                         }
1583                         opts1 |= GTSENDV6;
1584                         break;
1585
1586                 default:
1587                         WARN_ON_ONCE(1);
1588                         break;
1589                 }
1590
1591                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1592                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1593         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1594                 u8 ip_protocol;
1595
1596                 if (transport_offset > TCPHO_MAX) {
1597                         netif_warn(tp, tx_err, tp->netdev,
1598                                    "Invalid transport offset 0x%x\n",
1599                                    transport_offset);
1600                         ret = TX_CSUM_NONE;
1601                         goto unavailable;
1602                 }
1603
1604                 switch (vlan_get_protocol(skb)) {
1605                 case htons(ETH_P_IP):
1606                         opts2 |= IPV4_CS;
1607                         ip_protocol = ip_hdr(skb)->protocol;
1608                         break;
1609
1610                 case htons(ETH_P_IPV6):
1611                         opts2 |= IPV6_CS;
1612                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1613                         break;
1614
1615                 default:
1616                         ip_protocol = IPPROTO_RAW;
1617                         break;
1618                 }
1619
1620                 if (ip_protocol == IPPROTO_TCP)
1621                         opts2 |= TCP_CS;
1622                 else if (ip_protocol == IPPROTO_UDP)
1623                         opts2 |= UDP_CS;
1624                 else
1625                         WARN_ON_ONCE(1);
1626
1627                 opts2 |= transport_offset << TCPHO_SHIFT;
1628         }
1629
1630         desc->opts2 = cpu_to_le32(opts2);
1631         desc->opts1 = cpu_to_le32(opts1);
1632
1633 unavailable:
1634         return ret;
1635 }
1636
1637 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1638 {
1639         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1640         int remain, ret;
1641         u8 *tx_data;
1642
1643         __skb_queue_head_init(&skb_head);
1644         spin_lock(&tx_queue->lock);
1645         skb_queue_splice_init(tx_queue, &skb_head);
1646         spin_unlock(&tx_queue->lock);
1647
1648         tx_data = agg->head;
1649         agg->skb_num = 0;
1650         agg->skb_len = 0;
1651         remain = agg_buf_sz;
1652
1653         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1654                 struct tx_desc *tx_desc;
1655                 struct sk_buff *skb;
1656                 unsigned int len;
1657                 u32 offset;
1658
1659                 skb = __skb_dequeue(&skb_head);
1660                 if (!skb)
1661                         break;
1662
1663                 len = skb->len + sizeof(*tx_desc);
1664
1665                 if (len > remain) {
1666                         __skb_queue_head(&skb_head, skb);
1667                         break;
1668                 }
1669
1670                 tx_data = tx_agg_align(tx_data);
1671                 tx_desc = (struct tx_desc *)tx_data;
1672
1673                 offset = (u32)skb_transport_offset(skb);
1674
1675                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1676                         r8152_csum_workaround(tp, skb, &skb_head);
1677                         continue;
1678                 }
1679
1680                 rtl_tx_vlan_tag(tx_desc, skb);
1681
1682                 tx_data += sizeof(*tx_desc);
1683
1684                 len = skb->len;
1685                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1686                         struct net_device_stats *stats = &tp->netdev->stats;
1687
1688                         stats->tx_dropped++;
1689                         dev_kfree_skb_any(skb);
1690                         tx_data -= sizeof(*tx_desc);
1691                         continue;
1692                 }
1693
1694                 tx_data += len;
1695                 agg->skb_len += len;
1696                 agg->skb_num++;
1697
1698                 dev_kfree_skb_any(skb);
1699
1700                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1701         }
1702
1703         if (!skb_queue_empty(&skb_head)) {
1704                 spin_lock(&tx_queue->lock);
1705                 skb_queue_splice(&skb_head, tx_queue);
1706                 spin_unlock(&tx_queue->lock);
1707         }
1708
1709         netif_tx_lock(tp->netdev);
1710
1711         if (netif_queue_stopped(tp->netdev) &&
1712             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1713                 netif_wake_queue(tp->netdev);
1714
1715         netif_tx_unlock(tp->netdev);
1716
1717         ret = usb_autopm_get_interface_async(tp->intf);
1718         if (ret < 0)
1719                 goto out_tx_fill;
1720
1721         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1722                           agg->head, (int)(tx_data - (u8 *)agg->head),
1723                           (usb_complete_t)write_bulk_callback, agg);
1724
1725         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1726         if (ret < 0)
1727                 usb_autopm_put_interface_async(tp->intf);
1728
1729 out_tx_fill:
1730         return ret;
1731 }
1732
1733 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1734 {
1735         u8 checksum = CHECKSUM_NONE;
1736         u32 opts2, opts3;
1737
1738         if (!(tp->netdev->features & NETIF_F_RXCSUM))
1739                 goto return_result;
1740
1741         opts2 = le32_to_cpu(rx_desc->opts2);
1742         opts3 = le32_to_cpu(rx_desc->opts3);
1743
1744         if (opts2 & RD_IPV4_CS) {
1745                 if (opts3 & IPF)
1746                         checksum = CHECKSUM_NONE;
1747                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1748                         checksum = CHECKSUM_NONE;
1749                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1750                         checksum = CHECKSUM_NONE;
1751                 else
1752                         checksum = CHECKSUM_UNNECESSARY;
1753         } else if (opts2 & RD_IPV6_CS) {
1754                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1755                         checksum = CHECKSUM_UNNECESSARY;
1756                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1757                         checksum = CHECKSUM_UNNECESSARY;
1758         }
1759
1760 return_result:
1761         return checksum;
1762 }
1763
1764 static int rx_bottom(struct r8152 *tp, int budget)
1765 {
1766         unsigned long flags;
1767         struct list_head *cursor, *next, rx_queue;
1768         int ret = 0, work_done = 0;
1769         struct napi_struct *napi = &tp->napi;
1770
1771         if (!skb_queue_empty(&tp->rx_queue)) {
1772                 while (work_done < budget) {
1773                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1774                         struct net_device *netdev = tp->netdev;
1775                         struct net_device_stats *stats = &netdev->stats;
1776                         unsigned int pkt_len;
1777
1778                         if (!skb)
1779                                 break;
1780
1781                         pkt_len = skb->len;
1782                         napi_gro_receive(napi, skb);
1783                         work_done++;
1784                         stats->rx_packets++;
1785                         stats->rx_bytes += pkt_len;
1786                 }
1787         }
1788
1789         if (list_empty(&tp->rx_done))
1790                 goto out1;
1791
1792         INIT_LIST_HEAD(&rx_queue);
1793         spin_lock_irqsave(&tp->rx_lock, flags);
1794         list_splice_init(&tp->rx_done, &rx_queue);
1795         spin_unlock_irqrestore(&tp->rx_lock, flags);
1796
1797         list_for_each_safe(cursor, next, &rx_queue) {
1798                 struct rx_desc *rx_desc;
1799                 struct rx_agg *agg;
1800                 int len_used = 0;
1801                 struct urb *urb;
1802                 u8 *rx_data;
1803
1804                 list_del_init(cursor);
1805
1806                 agg = list_entry(cursor, struct rx_agg, list);
1807                 urb = agg->urb;
1808                 if (urb->actual_length < ETH_ZLEN)
1809                         goto submit;
1810
1811                 rx_desc = agg->head;
1812                 rx_data = agg->head;
1813                 len_used += sizeof(struct rx_desc);
1814
1815                 while (urb->actual_length > len_used) {
1816                         struct net_device *netdev = tp->netdev;
1817                         struct net_device_stats *stats = &netdev->stats;
1818                         unsigned int pkt_len;
1819                         struct sk_buff *skb;
1820
1821                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1822                         if (pkt_len < ETH_ZLEN)
1823                                 break;
1824
1825                         len_used += pkt_len;
1826                         if (urb->actual_length < len_used)
1827                                 break;
1828
1829                         pkt_len -= CRC_SIZE;
1830                         rx_data += sizeof(struct rx_desc);
1831
1832                         skb = napi_alloc_skb(napi, pkt_len);
1833                         if (!skb) {
1834                                 stats->rx_dropped++;
1835                                 goto find_next_rx;
1836                         }
1837
1838                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1839                         memcpy(skb->data, rx_data, pkt_len);
1840                         skb_put(skb, pkt_len);
1841                         skb->protocol = eth_type_trans(skb, netdev);
1842                         rtl_rx_vlan_tag(rx_desc, skb);
1843                         if (work_done < budget) {
1844                                 napi_gro_receive(napi, skb);
1845                                 work_done++;
1846                                 stats->rx_packets++;
1847                                 stats->rx_bytes += pkt_len;
1848                         } else {
1849                                 __skb_queue_tail(&tp->rx_queue, skb);
1850                         }
1851
1852 find_next_rx:
1853                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1854                         rx_desc = (struct rx_desc *)rx_data;
1855                         len_used = (int)(rx_data - (u8 *)agg->head);
1856                         len_used += sizeof(struct rx_desc);
1857                 }
1858
1859 submit:
1860                 if (!ret) {
1861                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1862                 } else {
1863                         urb->actual_length = 0;
1864                         list_add_tail(&agg->list, next);
1865                 }
1866         }
1867
1868         if (!list_empty(&rx_queue)) {
1869                 spin_lock_irqsave(&tp->rx_lock, flags);
1870                 list_splice_tail(&rx_queue, &tp->rx_done);
1871                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1872         }
1873
1874 out1:
1875         return work_done;
1876 }
1877
1878 static void tx_bottom(struct r8152 *tp)
1879 {
1880         int res;
1881
1882         do {
1883                 struct tx_agg *agg;
1884
1885                 if (skb_queue_empty(&tp->tx_queue))
1886                         break;
1887
1888                 agg = r8152_get_tx_agg(tp);
1889                 if (!agg)
1890                         break;
1891
1892                 res = r8152_tx_agg_fill(tp, agg);
1893                 if (res) {
1894                         struct net_device *netdev = tp->netdev;
1895
1896                         if (res == -ENODEV) {
1897                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1898                                 netif_device_detach(netdev);
1899                         } else {
1900                                 struct net_device_stats *stats = &netdev->stats;
1901                                 unsigned long flags;
1902
1903                                 netif_warn(tp, tx_err, netdev,
1904                                            "failed tx_urb %d\n", res);
1905                                 stats->tx_dropped += agg->skb_num;
1906
1907                                 spin_lock_irqsave(&tp->tx_lock, flags);
1908                                 list_add_tail(&agg->list, &tp->tx_free);
1909                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1910                         }
1911                 }
1912         } while (res == 0);
1913 }
1914
1915 static void bottom_half(struct r8152 *tp)
1916 {
1917         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1918                 return;
1919
1920         if (!test_bit(WORK_ENABLE, &tp->flags))
1921                 return;
1922
1923         /* When link down, the driver would cancel all bulks. */
1924         /* This avoid the re-submitting bulk */
1925         if (!netif_carrier_ok(tp->netdev))
1926                 return;
1927
1928         clear_bit(SCHEDULE_NAPI, &tp->flags);
1929
1930         tx_bottom(tp);
1931 }
1932
1933 static int r8152_poll(struct napi_struct *napi, int budget)
1934 {
1935         struct r8152 *tp = container_of(napi, struct r8152, napi);
1936         int work_done;
1937
1938         work_done = rx_bottom(tp, budget);
1939         bottom_half(tp);
1940
1941         if (work_done < budget) {
1942                 napi_complete(napi);
1943                 if (!list_empty(&tp->rx_done))
1944                         napi_schedule(napi);
1945                 else if (!skb_queue_empty(&tp->tx_queue) &&
1946                          !list_empty(&tp->tx_free))
1947                         napi_schedule(napi);
1948         }
1949
1950         return work_done;
1951 }
1952
1953 static
1954 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1955 {
1956         int ret;
1957
1958         /* The rx would be stopped, so skip submitting */
1959         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1960             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1961                 return 0;
1962
1963         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1964                           agg->head, agg_buf_sz,
1965                           (usb_complete_t)read_bulk_callback, agg);
1966
1967         ret = usb_submit_urb(agg->urb, mem_flags);
1968         if (ret == -ENODEV) {
1969                 set_bit(RTL8152_UNPLUG, &tp->flags);
1970                 netif_device_detach(tp->netdev);
1971         } else if (ret) {
1972                 struct urb *urb = agg->urb;
1973                 unsigned long flags;
1974
1975                 urb->actual_length = 0;
1976                 spin_lock_irqsave(&tp->rx_lock, flags);
1977                 list_add_tail(&agg->list, &tp->rx_done);
1978                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1979
1980                 netif_err(tp, rx_err, tp->netdev,
1981                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1982
1983                 napi_schedule(&tp->napi);
1984         }
1985
1986         return ret;
1987 }
1988
1989 static void rtl_drop_queued_tx(struct r8152 *tp)
1990 {
1991         struct net_device_stats *stats = &tp->netdev->stats;
1992         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1993         struct sk_buff *skb;
1994
1995         if (skb_queue_empty(tx_queue))
1996                 return;
1997
1998         __skb_queue_head_init(&skb_head);
1999         spin_lock_bh(&tx_queue->lock);
2000         skb_queue_splice_init(tx_queue, &skb_head);
2001         spin_unlock_bh(&tx_queue->lock);
2002
2003         while ((skb = __skb_dequeue(&skb_head))) {
2004                 dev_kfree_skb(skb);
2005                 stats->tx_dropped++;
2006         }
2007 }
2008
2009 static void rtl8152_tx_timeout(struct net_device *netdev)
2010 {
2011         struct r8152 *tp = netdev_priv(netdev);
2012
2013         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2014
2015         usb_queue_reset_device(tp->intf);
2016 }
2017
2018 static void rtl8152_set_rx_mode(struct net_device *netdev)
2019 {
2020         struct r8152 *tp = netdev_priv(netdev);
2021
2022         if (netif_carrier_ok(netdev)) {
2023                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2024                 schedule_delayed_work(&tp->schedule, 0);
2025         }
2026 }
2027
2028 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2029 {
2030         struct r8152 *tp = netdev_priv(netdev);
2031         u32 mc_filter[2];       /* Multicast hash filter */
2032         __le32 tmp[2];
2033         u32 ocp_data;
2034
2035         netif_stop_queue(netdev);
2036         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2037         ocp_data &= ~RCR_ACPT_ALL;
2038         ocp_data |= RCR_AB | RCR_APM;
2039
2040         if (netdev->flags & IFF_PROMISC) {
2041                 /* Unconditionally log net taps. */
2042                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2043                 ocp_data |= RCR_AM | RCR_AAP;
2044                 mc_filter[1] = 0xffffffff;
2045                 mc_filter[0] = 0xffffffff;
2046         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2047                    (netdev->flags & IFF_ALLMULTI)) {
2048                 /* Too many to filter perfectly -- accept all multicasts. */
2049                 ocp_data |= RCR_AM;
2050                 mc_filter[1] = 0xffffffff;
2051                 mc_filter[0] = 0xffffffff;
2052         } else {
2053                 struct netdev_hw_addr *ha;
2054
2055                 mc_filter[1] = 0;
2056                 mc_filter[0] = 0;
2057                 netdev_for_each_mc_addr(ha, netdev) {
2058                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2059
2060                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2061                         ocp_data |= RCR_AM;
2062                 }
2063         }
2064
2065         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2066         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2067
2068         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2069         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2070         netif_wake_queue(netdev);
2071 }
2072
2073 static netdev_features_t
2074 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2075                        netdev_features_t features)
2076 {
2077         u32 mss = skb_shinfo(skb)->gso_size;
2078         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2079         int offset = skb_transport_offset(skb);
2080
2081         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2082                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2083         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2084                 features &= ~NETIF_F_GSO_MASK;
2085
2086         return features;
2087 }
2088
2089 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2090                                       struct net_device *netdev)
2091 {
2092         struct r8152 *tp = netdev_priv(netdev);
2093
2094         skb_tx_timestamp(skb);
2095
2096         skb_queue_tail(&tp->tx_queue, skb);
2097
2098         if (!list_empty(&tp->tx_free)) {
2099                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2100                         set_bit(SCHEDULE_NAPI, &tp->flags);
2101                         schedule_delayed_work(&tp->schedule, 0);
2102                 } else {
2103                         usb_mark_last_busy(tp->udev);
2104                         napi_schedule(&tp->napi);
2105                 }
2106         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2107                 netif_stop_queue(netdev);
2108         }
2109
2110         return NETDEV_TX_OK;
2111 }
2112
2113 static void r8152b_reset_packet_filter(struct r8152 *tp)
2114 {
2115         u32     ocp_data;
2116
2117         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2118         ocp_data &= ~FMC_FCR_MCU_EN;
2119         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2120         ocp_data |= FMC_FCR_MCU_EN;
2121         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2122 }
2123
2124 static void rtl8152_nic_reset(struct r8152 *tp)
2125 {
2126         int     i;
2127
2128         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2129
2130         for (i = 0; i < 1000; i++) {
2131                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2132                         break;
2133                 usleep_range(100, 400);
2134         }
2135 }
2136
2137 static void set_tx_qlen(struct r8152 *tp)
2138 {
2139         struct net_device *netdev = tp->netdev;
2140
2141         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2142                                     sizeof(struct tx_desc));
2143 }
2144
2145 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2146 {
2147         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2148 }
2149
2150 static void rtl_set_eee_plus(struct r8152 *tp)
2151 {
2152         u32 ocp_data;
2153         u8 speed;
2154
2155         speed = rtl8152_get_speed(tp);
2156         if (speed & _10bps) {
2157                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2158                 ocp_data |= EEEP_CR_EEEP_TX;
2159                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2160         } else {
2161                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2162                 ocp_data &= ~EEEP_CR_EEEP_TX;
2163                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2164         }
2165 }
2166
2167 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2168 {
2169         u32 ocp_data;
2170
2171         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2172         if (enable)
2173                 ocp_data |= RXDY_GATED_EN;
2174         else
2175                 ocp_data &= ~RXDY_GATED_EN;
2176         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2177 }
2178
2179 static int rtl_start_rx(struct r8152 *tp)
2180 {
2181         int i, ret = 0;
2182
2183         INIT_LIST_HEAD(&tp->rx_done);
2184         for (i = 0; i < RTL8152_MAX_RX; i++) {
2185                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2186                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2187                 if (ret)
2188                         break;
2189         }
2190
2191         if (ret && ++i < RTL8152_MAX_RX) {
2192                 struct list_head rx_queue;
2193                 unsigned long flags;
2194
2195                 INIT_LIST_HEAD(&rx_queue);
2196
2197                 do {
2198                         struct rx_agg *agg = &tp->rx_info[i++];
2199                         struct urb *urb = agg->urb;
2200
2201                         urb->actual_length = 0;
2202                         list_add_tail(&agg->list, &rx_queue);
2203                 } while (i < RTL8152_MAX_RX);
2204
2205                 spin_lock_irqsave(&tp->rx_lock, flags);
2206                 list_splice_tail(&rx_queue, &tp->rx_done);
2207                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2208         }
2209
2210         return ret;
2211 }
2212
2213 static int rtl_stop_rx(struct r8152 *tp)
2214 {
2215         int i;
2216
2217         for (i = 0; i < RTL8152_MAX_RX; i++)
2218                 usb_kill_urb(tp->rx_info[i].urb);
2219
2220         while (!skb_queue_empty(&tp->rx_queue))
2221                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2222
2223         return 0;
2224 }
2225
2226 static int rtl_enable(struct r8152 *tp)
2227 {
2228         u32 ocp_data;
2229
2230         r8152b_reset_packet_filter(tp);
2231
2232         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2233         ocp_data |= CR_RE | CR_TE;
2234         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2235
2236         rxdy_gated_en(tp, false);
2237
2238         return 0;
2239 }
2240
2241 static int rtl8152_enable(struct r8152 *tp)
2242 {
2243         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2244                 return -ENODEV;
2245
2246         set_tx_qlen(tp);
2247         rtl_set_eee_plus(tp);
2248
2249         return rtl_enable(tp);
2250 }
2251
2252 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2253 {
2254         u32 ocp_data = tp->coalesce / 8;
2255
2256         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2257 }
2258
2259 static void r8153_set_rx_early_size(struct r8152 *tp)
2260 {
2261         u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2262
2263         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2264 }
2265
2266 static int rtl8153_enable(struct r8152 *tp)
2267 {
2268         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2269                 return -ENODEV;
2270
2271         usb_disable_lpm(tp->udev);
2272         set_tx_qlen(tp);
2273         rtl_set_eee_plus(tp);
2274         r8153_set_rx_early_timeout(tp);
2275         r8153_set_rx_early_size(tp);
2276
2277         return rtl_enable(tp);
2278 }
2279
2280 static void rtl_disable(struct r8152 *tp)
2281 {
2282         u32 ocp_data;
2283         int i;
2284
2285         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2286                 rtl_drop_queued_tx(tp);
2287                 return;
2288         }
2289
2290         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2291         ocp_data &= ~RCR_ACPT_ALL;
2292         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2293
2294         rtl_drop_queued_tx(tp);
2295
2296         for (i = 0; i < RTL8152_MAX_TX; i++)
2297                 usb_kill_urb(tp->tx_info[i].urb);
2298
2299         rxdy_gated_en(tp, true);
2300
2301         for (i = 0; i < 1000; i++) {
2302                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2303                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2304                         break;
2305                 usleep_range(1000, 2000);
2306         }
2307
2308         for (i = 0; i < 1000; i++) {
2309                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2310                         break;
2311                 usleep_range(1000, 2000);
2312         }
2313
2314         rtl_stop_rx(tp);
2315
2316         rtl8152_nic_reset(tp);
2317 }
2318
2319 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2320 {
2321         u32 ocp_data;
2322
2323         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2324         if (enable)
2325                 ocp_data |= POWER_CUT;
2326         else
2327                 ocp_data &= ~POWER_CUT;
2328         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2329
2330         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2331         ocp_data &= ~RESUME_INDICATE;
2332         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2333 }
2334
2335 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2336 {
2337         u32 ocp_data;
2338
2339         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2340         if (enable)
2341                 ocp_data |= CPCR_RX_VLAN;
2342         else
2343                 ocp_data &= ~CPCR_RX_VLAN;
2344         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2345 }
2346
2347 static int rtl8152_set_features(struct net_device *dev,
2348                                 netdev_features_t features)
2349 {
2350         netdev_features_t changed = features ^ dev->features;
2351         struct r8152 *tp = netdev_priv(dev);
2352         int ret;
2353
2354         ret = usb_autopm_get_interface(tp->intf);
2355         if (ret < 0)
2356                 goto out;
2357
2358         mutex_lock(&tp->control);
2359
2360         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2361                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2362                         rtl_rx_vlan_en(tp, true);
2363                 else
2364                         rtl_rx_vlan_en(tp, false);
2365         }
2366
2367         mutex_unlock(&tp->control);
2368
2369         usb_autopm_put_interface(tp->intf);
2370
2371 out:
2372         return ret;
2373 }
2374
2375 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2376
2377 static u32 __rtl_get_wol(struct r8152 *tp)
2378 {
2379         u32 ocp_data;
2380         u32 wolopts = 0;
2381
2382         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2383         if (ocp_data & LINK_ON_WAKE_EN)
2384                 wolopts |= WAKE_PHY;
2385
2386         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2387         if (ocp_data & UWF_EN)
2388                 wolopts |= WAKE_UCAST;
2389         if (ocp_data & BWF_EN)
2390                 wolopts |= WAKE_BCAST;
2391         if (ocp_data & MWF_EN)
2392                 wolopts |= WAKE_MCAST;
2393
2394         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2395         if (ocp_data & MAGIC_EN)
2396                 wolopts |= WAKE_MAGIC;
2397
2398         return wolopts;
2399 }
2400
2401 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2402 {
2403         u32 ocp_data;
2404
2405         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2406
2407         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2408         ocp_data &= ~LINK_ON_WAKE_EN;
2409         if (wolopts & WAKE_PHY)
2410                 ocp_data |= LINK_ON_WAKE_EN;
2411         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2412
2413         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2414         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2415         if (wolopts & WAKE_UCAST)
2416                 ocp_data |= UWF_EN;
2417         if (wolopts & WAKE_BCAST)
2418                 ocp_data |= BWF_EN;
2419         if (wolopts & WAKE_MCAST)
2420                 ocp_data |= MWF_EN;
2421         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2422
2423         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2424
2425         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2426         ocp_data &= ~MAGIC_EN;
2427         if (wolopts & WAKE_MAGIC)
2428                 ocp_data |= MAGIC_EN;
2429         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2430
2431         if (wolopts & WAKE_ANY)
2432                 device_set_wakeup_enable(&tp->udev->dev, true);
2433         else
2434                 device_set_wakeup_enable(&tp->udev->dev, false);
2435 }
2436
2437 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2438 {
2439         u8 u1u2[8];
2440
2441         if (enable)
2442                 memset(u1u2, 0xff, sizeof(u1u2));
2443         else
2444                 memset(u1u2, 0x00, sizeof(u1u2));
2445
2446         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2447 }
2448
2449 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2450 {
2451         u32 ocp_data;
2452
2453         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2454         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2455                 ocp_data |= U2P3_ENABLE;
2456         else
2457                 ocp_data &= ~U2P3_ENABLE;
2458         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2459 }
2460
2461 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2462 {
2463         u32 ocp_data;
2464
2465         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2466         if (enable)
2467                 ocp_data |= PWR_EN | PHASE2_EN;
2468         else
2469                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2470         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2471
2472         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2473         ocp_data &= ~PCUT_STATUS;
2474         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2475 }
2476
2477 static bool rtl_can_wakeup(struct r8152 *tp)
2478 {
2479         struct usb_device *udev = tp->udev;
2480
2481         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2482 }
2483
2484 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2485 {
2486         if (enable) {
2487                 u32 ocp_data;
2488
2489                 __rtl_set_wol(tp, WAKE_ANY);
2490
2491                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2492
2493                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2494                 ocp_data |= LINK_OFF_WAKE_EN;
2495                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2496
2497                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2498         } else {
2499                 u32 ocp_data;
2500
2501                 __rtl_set_wol(tp, tp->saved_wolopts);
2502
2503                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2504
2505                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2506                 ocp_data &= ~LINK_OFF_WAKE_EN;
2507                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2508
2509                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2510         }
2511 }
2512
2513 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2514 {
2515         rtl_runtime_suspend_enable(tp, enable);
2516
2517         if (enable) {
2518                 r8153_u1u2en(tp, false);
2519                 r8153_u2p3en(tp, false);
2520         } else {
2521                 r8153_u2p3en(tp, true);
2522                 r8153_u1u2en(tp, true);
2523         }
2524 }
2525
2526 static void r8153_teredo_off(struct r8152 *tp)
2527 {
2528         u32 ocp_data;
2529
2530         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2531         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2532         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2533
2534         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2535         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2536         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2537 }
2538
2539 static void rtl_reset_bmu(struct r8152 *tp)
2540 {
2541         u32 ocp_data;
2542
2543         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2544         ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2545         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2546         ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2547         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2548 }
2549
2550 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2551 {
2552         if (enable) {
2553                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2554                                                     LINKENA | DIS_SDSAVE);
2555         } else {
2556                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2557                                                     DIS_SDSAVE);
2558                 msleep(20);
2559         }
2560 }
2561
2562 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2563 {
2564         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2565         ocp_reg_write(tp, OCP_EEE_DATA, reg);
2566         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2567 }
2568
2569 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2570 {
2571         u16 data;
2572
2573         r8152_mmd_indirect(tp, dev, reg);
2574         data = ocp_reg_read(tp, OCP_EEE_DATA);
2575         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2576
2577         return data;
2578 }
2579
2580 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2581 {
2582         r8152_mmd_indirect(tp, dev, reg);
2583         ocp_reg_write(tp, OCP_EEE_DATA, data);
2584         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2585 }
2586
2587 static void r8152_eee_en(struct r8152 *tp, bool enable)
2588 {
2589         u16 config1, config2, config3;
2590         u32 ocp_data;
2591
2592         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2593         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2594         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2595         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2596
2597         if (enable) {
2598                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2599                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2600                 config1 |= sd_rise_time(1);
2601                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2602                 config3 |= fast_snr(42);
2603         } else {
2604                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2605                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2606                              RX_QUIET_EN);
2607                 config1 |= sd_rise_time(7);
2608                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2609                 config3 |= fast_snr(511);
2610         }
2611
2612         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2613         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2614         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2615         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2616 }
2617
2618 static void r8152b_enable_eee(struct r8152 *tp)
2619 {
2620         r8152_eee_en(tp, true);
2621         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2622 }
2623
2624 static void r8152b_enable_fc(struct r8152 *tp)
2625 {
2626         u16 anar;
2627
2628         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2629         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2630         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2631 }
2632
2633 static void rtl8152_disable(struct r8152 *tp)
2634 {
2635         r8152_aldps_en(tp, false);
2636         rtl_disable(tp);
2637         r8152_aldps_en(tp, true);
2638 }
2639
2640 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2641 {
2642         r8152b_enable_eee(tp);
2643         r8152_aldps_en(tp, true);
2644         r8152b_enable_fc(tp);
2645
2646         set_bit(PHY_RESET, &tp->flags);
2647 }
2648
2649 static void r8152b_exit_oob(struct r8152 *tp)
2650 {
2651         u32 ocp_data;
2652         int i;
2653
2654         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2655         ocp_data &= ~RCR_ACPT_ALL;
2656         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2657
2658         rxdy_gated_en(tp, true);
2659         r8153_teredo_off(tp);
2660         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2661         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2662
2663         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2664         ocp_data &= ~NOW_IS_OOB;
2665         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2666
2667         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2668         ocp_data &= ~MCU_BORW_EN;
2669         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2670
2671         for (i = 0; i < 1000; i++) {
2672                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2673                 if (ocp_data & LINK_LIST_READY)
2674                         break;
2675                 usleep_range(1000, 2000);
2676         }
2677
2678         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2679         ocp_data |= RE_INIT_LL;
2680         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2681
2682         for (i = 0; i < 1000; i++) {
2683                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2684                 if (ocp_data & LINK_LIST_READY)
2685                         break;
2686                 usleep_range(1000, 2000);
2687         }
2688
2689         rtl8152_nic_reset(tp);
2690
2691         /* rx share fifo credit full threshold */
2692         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2693
2694         if (tp->udev->speed == USB_SPEED_FULL ||
2695             tp->udev->speed == USB_SPEED_LOW) {
2696                 /* rx share fifo credit near full threshold */
2697                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2698                                 RXFIFO_THR2_FULL);
2699                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2700                                 RXFIFO_THR3_FULL);
2701         } else {
2702                 /* rx share fifo credit near full threshold */
2703                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2704                                 RXFIFO_THR2_HIGH);
2705                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2706                                 RXFIFO_THR3_HIGH);
2707         }
2708
2709         /* TX share fifo free credit full threshold */
2710         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2711
2712         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2713         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2714         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2715                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2716
2717         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2718
2719         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2720
2721         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2722         ocp_data |= TCR0_AUTO_FIFO;
2723         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2724 }
2725
2726 static void r8152b_enter_oob(struct r8152 *tp)
2727 {
2728         u32 ocp_data;
2729         int i;
2730
2731         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2732         ocp_data &= ~NOW_IS_OOB;
2733         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2734
2735         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2736         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2737         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2738
2739         rtl_disable(tp);
2740
2741         for (i = 0; i < 1000; i++) {
2742                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2743                 if (ocp_data & LINK_LIST_READY)
2744                         break;
2745                 usleep_range(1000, 2000);
2746         }
2747
2748         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2749         ocp_data |= RE_INIT_LL;
2750         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2751
2752         for (i = 0; i < 1000; i++) {
2753                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2754                 if (ocp_data & LINK_LIST_READY)
2755                         break;
2756                 usleep_range(1000, 2000);
2757         }
2758
2759         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2760
2761         rtl_rx_vlan_en(tp, true);
2762
2763         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2764         ocp_data |= ALDPS_PROXY_MODE;
2765         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2766
2767         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2768         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2769         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2770
2771         rxdy_gated_en(tp, false);
2772
2773         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2774         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2775         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2776 }
2777
2778 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2779 {
2780         u16 data;
2781
2782         data = ocp_reg_read(tp, OCP_POWER_CFG);
2783         if (enable) {
2784                 data |= EN_ALDPS;
2785                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2786         } else {
2787                 data &= ~EN_ALDPS;
2788                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2789                 msleep(20);
2790         }
2791 }
2792
2793 static void r8153_eee_en(struct r8152 *tp, bool enable)
2794 {
2795         u32 ocp_data;
2796         u16 config;
2797
2798         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2799         config = ocp_reg_read(tp, OCP_EEE_CFG);
2800
2801         if (enable) {
2802                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2803                 config |= EEE10_EN;
2804         } else {
2805                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2806                 config &= ~EEE10_EN;
2807         }
2808
2809         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2810         ocp_reg_write(tp, OCP_EEE_CFG, config);
2811 }
2812
2813 static void r8153_hw_phy_cfg(struct r8152 *tp)
2814 {
2815         u32 ocp_data;
2816         u16 data;
2817
2818         /* disable ALDPS before updating the PHY parameters */
2819         r8153_aldps_en(tp, false);
2820
2821         /* disable EEE before updating the PHY parameters */
2822         r8153_eee_en(tp, false);
2823         ocp_reg_write(tp, OCP_EEE_ADV, 0);
2824
2825         if (tp->version == RTL_VER_03) {
2826                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2827                 data &= ~CTAP_SHORT_EN;
2828                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2829         }
2830
2831         data = ocp_reg_read(tp, OCP_POWER_CFG);
2832         data |= EEE_CLKDIV_EN;
2833         ocp_reg_write(tp, OCP_POWER_CFG, data);
2834
2835         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2836         data |= EN_10M_BGOFF;
2837         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2838         data = ocp_reg_read(tp, OCP_POWER_CFG);
2839         data |= EN_10M_PLLOFF;
2840         ocp_reg_write(tp, OCP_POWER_CFG, data);
2841         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2842
2843         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2844         ocp_data |= PFM_PWM_SWITCH;
2845         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2846
2847         /* Enable LPF corner auto tune */
2848         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2849
2850         /* Adjust 10M Amplitude */
2851         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2852         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2853
2854         r8153_eee_en(tp, true);
2855         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2856
2857         r8153_aldps_en(tp, true);
2858         r8152b_enable_fc(tp);
2859
2860         set_bit(PHY_RESET, &tp->flags);
2861 }
2862
2863 static void r8153_first_init(struct r8152 *tp)
2864 {
2865         u32 ocp_data;
2866         int i;
2867
2868         rxdy_gated_en(tp, true);
2869         r8153_teredo_off(tp);
2870
2871         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2872         ocp_data &= ~RCR_ACPT_ALL;
2873         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2874
2875         rtl8152_nic_reset(tp);
2876         rtl_reset_bmu(tp);
2877
2878         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2879         ocp_data &= ~NOW_IS_OOB;
2880         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2881
2882         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2883         ocp_data &= ~MCU_BORW_EN;
2884         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2885
2886         for (i = 0; i < 1000; i++) {
2887                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2888                 if (ocp_data & LINK_LIST_READY)
2889                         break;
2890                 usleep_range(1000, 2000);
2891         }
2892
2893         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2894         ocp_data |= RE_INIT_LL;
2895         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2896
2897         for (i = 0; i < 1000; i++) {
2898                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2899                 if (ocp_data & LINK_LIST_READY)
2900                         break;
2901                 usleep_range(1000, 2000);
2902         }
2903
2904         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2905
2906         ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2907         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2908         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2909
2910         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2911         ocp_data |= TCR0_AUTO_FIFO;
2912         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2913
2914         rtl8152_nic_reset(tp);
2915
2916         /* rx share fifo credit full threshold */
2917         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2918         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2919         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2920         /* TX share fifo free credit full threshold */
2921         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2922
2923         /* rx aggregation */
2924         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2925         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2926         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2927 }
2928
2929 static void r8153_enter_oob(struct r8152 *tp)
2930 {
2931         u32 ocp_data;
2932         int i;
2933
2934         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2935         ocp_data &= ~NOW_IS_OOB;
2936         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2937
2938         rtl_disable(tp);
2939         rtl_reset_bmu(tp);
2940
2941         for (i = 0; i < 1000; i++) {
2942                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2943                 if (ocp_data & LINK_LIST_READY)
2944                         break;
2945                 usleep_range(1000, 2000);
2946         }
2947
2948         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2949         ocp_data |= RE_INIT_LL;
2950         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2951
2952         for (i = 0; i < 1000; i++) {
2953                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2954                 if (ocp_data & LINK_LIST_READY)
2955                         break;
2956                 usleep_range(1000, 2000);
2957         }
2958
2959         ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2960         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2961
2962         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2963         ocp_data &= ~TEREDO_WAKE_MASK;
2964         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2965
2966         rtl_rx_vlan_en(tp, true);
2967
2968         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2969         ocp_data |= ALDPS_PROXY_MODE;
2970         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2971
2972         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2973         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2974         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2975
2976         rxdy_gated_en(tp, false);
2977
2978         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2979         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2980         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2981 }
2982
2983 static void rtl8153_disable(struct r8152 *tp)
2984 {
2985         r8153_aldps_en(tp, false);
2986         rtl_disable(tp);
2987         rtl_reset_bmu(tp);
2988         r8153_aldps_en(tp, true);
2989         usb_enable_lpm(tp->udev);
2990 }
2991
2992 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2993 {
2994         u16 bmcr, anar, gbcr;
2995         int ret = 0;
2996
2997         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2998         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2999                   ADVERTISE_100HALF | ADVERTISE_100FULL);
3000         if (tp->mii.supports_gmii) {
3001                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3002                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3003         } else {
3004                 gbcr = 0;
3005         }
3006
3007         if (autoneg == AUTONEG_DISABLE) {
3008                 if (speed == SPEED_10) {
3009                         bmcr = 0;
3010                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3011                 } else if (speed == SPEED_100) {
3012                         bmcr = BMCR_SPEED100;
3013                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3014                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3015                         bmcr = BMCR_SPEED1000;
3016                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3017                 } else {
3018                         ret = -EINVAL;
3019                         goto out;
3020                 }
3021
3022                 if (duplex == DUPLEX_FULL)
3023                         bmcr |= BMCR_FULLDPLX;
3024         } else {
3025                 if (speed == SPEED_10) {
3026                         if (duplex == DUPLEX_FULL)
3027                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3028                         else
3029                                 anar |= ADVERTISE_10HALF;
3030                 } else if (speed == SPEED_100) {
3031                         if (duplex == DUPLEX_FULL) {
3032                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3033                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3034                         } else {
3035                                 anar |= ADVERTISE_10HALF;
3036                                 anar |= ADVERTISE_100HALF;
3037                         }
3038                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3039                         if (duplex == DUPLEX_FULL) {
3040                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3041                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3042                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3043                         } else {
3044                                 anar |= ADVERTISE_10HALF;
3045                                 anar |= ADVERTISE_100HALF;
3046                                 gbcr |= ADVERTISE_1000HALF;
3047                         }
3048                 } else {
3049                         ret = -EINVAL;
3050                         goto out;
3051                 }
3052
3053                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3054         }
3055
3056         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3057                 bmcr |= BMCR_RESET;
3058
3059         if (tp->mii.supports_gmii)
3060                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3061
3062         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3063         r8152_mdio_write(tp, MII_BMCR, bmcr);
3064
3065         if (bmcr & BMCR_RESET) {
3066                 int i;
3067
3068                 for (i = 0; i < 50; i++) {
3069                         msleep(20);
3070                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3071                                 break;
3072                 }
3073         }
3074
3075 out:
3076         return ret;
3077 }
3078
3079 static void rtl8152_up(struct r8152 *tp)
3080 {
3081         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3082                 return;
3083
3084         r8152_aldps_en(tp, false);
3085         r8152b_exit_oob(tp);
3086         r8152_aldps_en(tp, true);
3087 }
3088
3089 static void rtl8152_down(struct r8152 *tp)
3090 {
3091         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3092                 rtl_drop_queued_tx(tp);
3093                 return;
3094         }
3095
3096         r8152_power_cut_en(tp, false);
3097         r8152_aldps_en(tp, false);
3098         r8152b_enter_oob(tp);
3099         r8152_aldps_en(tp, true);
3100 }
3101
3102 static void rtl8153_up(struct r8152 *tp)
3103 {
3104         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3105                 return;
3106
3107         r8153_u1u2en(tp, false);
3108         r8153_aldps_en(tp, false);
3109         r8153_first_init(tp);
3110         r8153_aldps_en(tp, true);
3111         r8153_u2p3en(tp, true);
3112         r8153_u1u2en(tp, true);
3113         usb_enable_lpm(tp->udev);
3114 }
3115
3116 static void rtl8153_down(struct r8152 *tp)
3117 {
3118         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3119                 rtl_drop_queued_tx(tp);
3120                 return;
3121         }
3122
3123         r8153_u1u2en(tp, false);
3124         r8153_u2p3en(tp, false);
3125         r8153_power_cut_en(tp, false);
3126         r8153_aldps_en(tp, false);
3127         r8153_enter_oob(tp);
3128         r8153_aldps_en(tp, true);
3129 }
3130
3131 static bool rtl8152_in_nway(struct r8152 *tp)
3132 {
3133         u16 nway_state;
3134
3135         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3136         tp->ocp_base = 0x2000;
3137         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
3138         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3139
3140         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3141         if (nway_state & 0xc000)
3142                 return false;
3143         else
3144                 return true;
3145 }
3146
3147 static bool rtl8153_in_nway(struct r8152 *tp)
3148 {
3149         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3150
3151         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3152                 return false;
3153         else
3154                 return true;
3155 }
3156
3157 static void set_carrier(struct r8152 *tp)
3158 {
3159         struct net_device *netdev = tp->netdev;
3160         struct napi_struct *napi = &tp->napi;
3161         u8 speed;
3162
3163         speed = rtl8152_get_speed(tp);
3164
3165         if (speed & LINK_STATUS) {
3166                 if (!netif_carrier_ok(netdev)) {
3167                         tp->rtl_ops.enable(tp);
3168                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3169                         netif_stop_queue(netdev);
3170                         napi_disable(napi);
3171                         netif_carrier_on(netdev);
3172                         rtl_start_rx(tp);
3173                         napi_enable(&tp->napi);
3174                         netif_wake_queue(netdev);
3175                         netif_info(tp, link, netdev, "carrier on\n");
3176                 } else if (netif_queue_stopped(netdev) &&
3177                            skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3178                         netif_wake_queue(netdev);
3179                 }
3180         } else {
3181                 if (netif_carrier_ok(netdev)) {
3182                         netif_carrier_off(netdev);
3183                         napi_disable(napi);
3184                         tp->rtl_ops.disable(tp);
3185                         napi_enable(napi);
3186                         netif_info(tp, link, netdev, "carrier off\n");
3187                 }
3188         }
3189 }
3190
3191 static void rtl_work_func_t(struct work_struct *work)
3192 {
3193         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3194
3195         /* If the device is unplugged or !netif_running(), the workqueue
3196          * doesn't need to wake the device, and could return directly.
3197          */
3198         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3199                 return;
3200
3201         if (usb_autopm_get_interface(tp->intf) < 0)
3202                 return;
3203
3204         if (!test_bit(WORK_ENABLE, &tp->flags))
3205                 goto out1;
3206
3207         if (!mutex_trylock(&tp->control)) {
3208                 schedule_delayed_work(&tp->schedule, 0);
3209                 goto out1;
3210         }
3211
3212         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3213                 set_carrier(tp);
3214
3215         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3216                 _rtl8152_set_rx_mode(tp->netdev);
3217
3218         /* don't schedule napi before linking */
3219         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3220             netif_carrier_ok(tp->netdev))
3221                 napi_schedule(&tp->napi);
3222
3223         mutex_unlock(&tp->control);
3224
3225 out1:
3226         usb_autopm_put_interface(tp->intf);
3227 }
3228
3229 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3230 {
3231         struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3232
3233         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3234                 return;
3235
3236         if (usb_autopm_get_interface(tp->intf) < 0)
3237                 return;
3238
3239         mutex_lock(&tp->control);
3240
3241         tp->rtl_ops.hw_phy_cfg(tp);
3242
3243         rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3244
3245         mutex_unlock(&tp->control);
3246
3247         usb_autopm_put_interface(tp->intf);
3248 }
3249
3250 #ifdef CONFIG_PM_SLEEP
3251 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3252                         void *data)
3253 {
3254         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3255
3256         switch (action) {
3257         case PM_HIBERNATION_PREPARE:
3258         case PM_SUSPEND_PREPARE:
3259                 usb_autopm_get_interface(tp->intf);
3260                 break;
3261
3262         case PM_POST_HIBERNATION:
3263         case PM_POST_SUSPEND:
3264                 usb_autopm_put_interface(tp->intf);
3265                 break;
3266
3267         case PM_POST_RESTORE:
3268         case PM_RESTORE_PREPARE:
3269         default:
3270                 break;
3271         }
3272
3273         return NOTIFY_DONE;
3274 }
3275 #endif
3276
3277 static int rtl8152_open(struct net_device *netdev)
3278 {
3279         struct r8152 *tp = netdev_priv(netdev);
3280         int res = 0;
3281
3282         res = alloc_all_mem(tp);
3283         if (res)
3284                 goto out;
3285
3286         res = usb_autopm_get_interface(tp->intf);
3287         if (res < 0)
3288                 goto out_free;
3289
3290         mutex_lock(&tp->control);
3291
3292         tp->rtl_ops.up(tp);
3293
3294         netif_carrier_off(netdev);
3295         netif_start_queue(netdev);
3296         set_bit(WORK_ENABLE, &tp->flags);
3297
3298         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3299         if (res) {
3300                 if (res == -ENODEV)
3301                         netif_device_detach(tp->netdev);
3302                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3303                            res);
3304                 goto out_unlock;
3305         }
3306         napi_enable(&tp->napi);
3307
3308         mutex_unlock(&tp->control);
3309
3310         usb_autopm_put_interface(tp->intf);
3311 #ifdef CONFIG_PM_SLEEP
3312         tp->pm_notifier.notifier_call = rtl_notifier;
3313         register_pm_notifier(&tp->pm_notifier);
3314 #endif
3315         return 0;
3316
3317 out_unlock:
3318         mutex_unlock(&tp->control);
3319         usb_autopm_put_interface(tp->intf);
3320 out_free:
3321         free_all_mem(tp);
3322 out:
3323         return res;
3324 }
3325
3326 static int rtl8152_close(struct net_device *netdev)
3327 {
3328         struct r8152 *tp = netdev_priv(netdev);
3329         int res = 0;
3330
3331 #ifdef CONFIG_PM_SLEEP
3332         unregister_pm_notifier(&tp->pm_notifier);
3333 #endif
3334         napi_disable(&tp->napi);
3335         clear_bit(WORK_ENABLE, &tp->flags);
3336         usb_kill_urb(tp->intr_urb);
3337         cancel_delayed_work_sync(&tp->schedule);
3338         netif_stop_queue(netdev);
3339
3340         res = usb_autopm_get_interface(tp->intf);
3341         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3342                 rtl_drop_queued_tx(tp);
3343                 rtl_stop_rx(tp);
3344         } else {
3345                 mutex_lock(&tp->control);
3346
3347                 tp->rtl_ops.down(tp);
3348
3349                 mutex_unlock(&tp->control);
3350
3351                 usb_autopm_put_interface(tp->intf);
3352         }
3353
3354         free_all_mem(tp);
3355
3356         return res;
3357 }
3358
3359 static void rtl_tally_reset(struct r8152 *tp)
3360 {
3361         u32 ocp_data;
3362
3363         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3364         ocp_data |= TALLY_RESET;
3365         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3366 }
3367
3368 static void r8152b_init(struct r8152 *tp)
3369 {
3370         u32 ocp_data;
3371         u16 data;
3372
3373         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3374                 return;
3375
3376         data = r8152_mdio_read(tp, MII_BMCR);
3377         if (data & BMCR_PDOWN) {
3378                 data &= ~BMCR_PDOWN;
3379                 r8152_mdio_write(tp, MII_BMCR, data);
3380         }
3381
3382         r8152_aldps_en(tp, false);
3383
3384         if (tp->version == RTL_VER_01) {
3385                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3386                 ocp_data &= ~LED_MODE_MASK;
3387                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3388         }
3389
3390         r8152_power_cut_en(tp, false);
3391
3392         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3393         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3394         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3395         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3396         ocp_data &= ~MCU_CLK_RATIO_MASK;
3397         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3398         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3399         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3400                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3401         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3402
3403         rtl_tally_reset(tp);
3404
3405         /* enable rx aggregation */
3406         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3407         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3408         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3409 }
3410
3411 static void r8153_init(struct r8152 *tp)
3412 {
3413         u32 ocp_data;
3414         u16 data;
3415         int i;
3416
3417         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3418                 return;
3419
3420         r8153_u1u2en(tp, false);
3421
3422         for (i = 0; i < 500; i++) {
3423                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3424                     AUTOLOAD_DONE)
3425                         break;
3426                 msleep(20);
3427         }
3428
3429         for (i = 0; i < 500; i++) {
3430                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3431                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3432                         break;
3433                 msleep(20);
3434         }
3435
3436         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3437             tp->version == RTL_VER_05)
3438                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3439
3440         data = r8152_mdio_read(tp, MII_BMCR);
3441         if (data & BMCR_PDOWN) {
3442                 data &= ~BMCR_PDOWN;
3443                 r8152_mdio_write(tp, MII_BMCR, data);
3444         }
3445
3446         for (i = 0; i < 500; i++) {
3447                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3448                 if (ocp_data == PHY_STAT_LAN_ON)
3449                         break;
3450                 msleep(20);
3451         }
3452
3453         usb_disable_lpm(tp->udev);
3454         r8153_u2p3en(tp, false);
3455
3456         if (tp->version == RTL_VER_04) {
3457                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3458                 ocp_data &= ~pwd_dn_scale_mask;
3459                 ocp_data |= pwd_dn_scale(96);
3460                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3461
3462                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3463                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3464                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3465         } else if (tp->version == RTL_VER_05) {
3466                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3467                 ocp_data &= ~ECM_ALDPS;
3468                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3469
3470                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3471                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3472                         ocp_data &= ~DYNAMIC_BURST;
3473                 else
3474                         ocp_data |= DYNAMIC_BURST;
3475                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3476         } else if (tp->version == RTL_VER_06) {
3477                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3478                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3479                         ocp_data &= ~DYNAMIC_BURST;
3480                 else
3481                         ocp_data |= DYNAMIC_BURST;
3482                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3483         }
3484
3485         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3486         ocp_data |= EP4_FULL_FC;
3487         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3488
3489         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3490         ocp_data &= ~TIMER11_EN;
3491         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3492
3493         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3494         ocp_data &= ~LED_MODE_MASK;
3495         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3496
3497         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3498         if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3499                 ocp_data |= LPM_TIMER_500MS;
3500         else
3501                 ocp_data |= LPM_TIMER_500US;
3502         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3503
3504         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3505         ocp_data &= ~SEN_VAL_MASK;
3506         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3507         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3508
3509         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3510
3511         r8153_power_cut_en(tp, false);
3512         r8153_u1u2en(tp, true);
3513
3514         /* MAC clock speed down */
3515         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3516         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3517         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3518         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3519
3520         rtl_tally_reset(tp);
3521         r8153_u2p3en(tp, true);
3522 }
3523
3524 static int rtl8152_pre_reset(struct usb_interface *intf)
3525 {
3526         struct r8152 *tp = usb_get_intfdata(intf);
3527         struct net_device *netdev;
3528
3529         if (!tp)
3530                 return 0;
3531
3532         netdev = tp->netdev;
3533         if (!netif_running(netdev))
3534                 return 0;
3535
3536         netif_stop_queue(netdev);
3537         napi_disable(&tp->napi);
3538         clear_bit(WORK_ENABLE, &tp->flags);
3539         usb_kill_urb(tp->intr_urb);
3540         cancel_delayed_work_sync(&tp->schedule);
3541         if (netif_carrier_ok(netdev)) {
3542                 mutex_lock(&tp->control);
3543                 tp->rtl_ops.disable(tp);
3544                 mutex_unlock(&tp->control);
3545         }
3546
3547         return 0;
3548 }
3549
3550 static int rtl8152_post_reset(struct usb_interface *intf)
3551 {
3552         struct r8152 *tp = usb_get_intfdata(intf);
3553         struct net_device *netdev;
3554
3555         if (!tp)
3556                 return 0;
3557
3558         netdev = tp->netdev;
3559         if (!netif_running(netdev))
3560                 return 0;
3561
3562         set_bit(WORK_ENABLE, &tp->flags);
3563         if (netif_carrier_ok(netdev)) {
3564                 mutex_lock(&tp->control);
3565                 tp->rtl_ops.enable(tp);
3566                 rtl_start_rx(tp);
3567                 rtl8152_set_rx_mode(netdev);
3568                 mutex_unlock(&tp->control);
3569         }
3570
3571         napi_enable(&tp->napi);
3572         netif_wake_queue(netdev);
3573         usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3574
3575         if (!list_empty(&tp->rx_done))
3576                 napi_schedule(&tp->napi);
3577
3578         return 0;
3579 }
3580
3581 static bool delay_autosuspend(struct r8152 *tp)
3582 {
3583         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3584         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3585
3586         /* This means a linking change occurs and the driver doesn't detect it,
3587          * yet. If the driver has disabled tx/rx and hw is linking on, the
3588          * device wouldn't wake up by receiving any packet.
3589          */
3590         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3591                 return true;
3592
3593         /* If the linking down is occurred by nway, the device may miss the
3594          * linking change event. And it wouldn't wake when linking on.
3595          */
3596         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3597                 return true;
3598         else if (!skb_queue_empty(&tp->tx_queue))
3599                 return true;
3600         else
3601                 return false;
3602 }
3603
3604 static int rtl8152_runtime_suspend(struct r8152 *tp)
3605 {
3606         struct net_device *netdev = tp->netdev;
3607         int ret = 0;
3608
3609         set_bit(SELECTIVE_SUSPEND, &tp->flags);
3610         smp_mb__after_atomic();
3611
3612         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3613                 u32 rcr = 0;
3614
3615                 if (delay_autosuspend(tp)) {
3616                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3617                         smp_mb__after_atomic();
3618                         ret = -EBUSY;
3619                         goto out1;
3620                 }
3621
3622                 if (netif_carrier_ok(netdev)) {
3623                         u32 ocp_data;
3624
3625                         rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3626                         ocp_data = rcr & ~RCR_ACPT_ALL;
3627                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3628                         rxdy_gated_en(tp, true);
3629                         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3630                                                  PLA_OOB_CTRL);
3631                         if (!(ocp_data & RXFIFO_EMPTY)) {
3632                                 rxdy_gated_en(tp, false);
3633                                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3634                                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3635                                 smp_mb__after_atomic();
3636                                 ret = -EBUSY;
3637                                 goto out1;
3638                         }
3639                 }
3640
3641                 clear_bit(WORK_ENABLE, &tp->flags);
3642                 usb_kill_urb(tp->intr_urb);
3643
3644                 tp->rtl_ops.autosuspend_en(tp, true);
3645
3646                 if (netif_carrier_ok(netdev)) {
3647                         struct napi_struct *napi = &tp->napi;
3648
3649                         napi_disable(napi);
3650                         rtl_stop_rx(tp);
3651                         rxdy_gated_en(tp, false);
3652                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3653                         napi_enable(napi);
3654                 }
3655         }
3656
3657 out1:
3658         return ret;
3659 }
3660
3661 static int rtl8152_system_suspend(struct r8152 *tp)
3662 {
3663         struct net_device *netdev = tp->netdev;
3664         int ret = 0;
3665
3666         netif_device_detach(netdev);
3667
3668         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3669                 struct napi_struct *napi = &tp->napi;
3670
3671                 clear_bit(WORK_ENABLE, &tp->flags);
3672                 usb_kill_urb(tp->intr_urb);
3673                 napi_disable(napi);
3674                 cancel_delayed_work_sync(&tp->schedule);
3675                 tp->rtl_ops.down(tp);
3676                 napi_enable(napi);
3677         }
3678
3679         return ret;
3680 }
3681
3682 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3683 {
3684         struct r8152 *tp = usb_get_intfdata(intf);
3685         int ret;
3686
3687         mutex_lock(&tp->control);
3688
3689         if (PMSG_IS_AUTO(message))
3690                 ret = rtl8152_runtime_suspend(tp);
3691         else
3692                 ret = rtl8152_system_suspend(tp);
3693
3694         mutex_unlock(&tp->control);
3695
3696         return ret;
3697 }
3698
3699 static int rtl8152_resume(struct usb_interface *intf)
3700 {
3701         struct r8152 *tp = usb_get_intfdata(intf);
3702         struct net_device *netdev = tp->netdev;
3703
3704         mutex_lock(&tp->control);
3705
3706         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3707                 tp->rtl_ops.init(tp);
3708                 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3709                 netif_device_attach(netdev);
3710         }
3711
3712         if (netif_running(netdev) && netdev->flags & IFF_UP) {
3713                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3714                         struct napi_struct *napi = &tp->napi;
3715
3716                         tp->rtl_ops.autosuspend_en(tp, false);
3717                         napi_disable(napi);
3718                         set_bit(WORK_ENABLE, &tp->flags);
3719                         if (netif_carrier_ok(netdev)) {
3720                                 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3721                                         rtl_start_rx(tp);
3722                                 } else {
3723                                         netif_carrier_off(netdev);
3724                                         tp->rtl_ops.disable(tp);
3725                                         netif_info(tp, link, netdev,
3726                                                    "linking down\n");
3727                                 }
3728                         }
3729                         napi_enable(napi);
3730                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3731                         smp_mb__after_atomic();
3732                         if (!list_empty(&tp->rx_done))
3733                                 napi_schedule(&tp->napi);
3734                 } else {
3735                         tp->rtl_ops.up(tp);
3736                         netif_carrier_off(netdev);
3737                         set_bit(WORK_ENABLE, &tp->flags);
3738                 }
3739                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3740         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3741                 if (netdev->flags & IFF_UP)
3742                         tp->rtl_ops.autosuspend_en(tp, false);
3743                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3744         }
3745
3746         mutex_unlock(&tp->control);
3747
3748         return 0;
3749 }
3750
3751 static int rtl8152_reset_resume(struct usb_interface *intf)
3752 {
3753         struct r8152 *tp = usb_get_intfdata(intf);
3754
3755         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3756         return rtl8152_resume(intf);
3757 }
3758
3759 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3760 {
3761         struct r8152 *tp = netdev_priv(dev);
3762
3763         if (usb_autopm_get_interface(tp->intf) < 0)
3764                 return;
3765
3766         if (!rtl_can_wakeup(tp)) {
3767                 wol->supported = 0;
3768                 wol->wolopts = 0;
3769         } else {
3770                 mutex_lock(&tp->control);
3771                 wol->supported = WAKE_ANY;
3772                 wol->wolopts = __rtl_get_wol(tp);
3773                 mutex_unlock(&tp->control);
3774         }
3775
3776         usb_autopm_put_interface(tp->intf);
3777 }
3778
3779 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3780 {
3781         struct r8152 *tp = netdev_priv(dev);
3782         int ret;
3783
3784         if (!rtl_can_wakeup(tp))
3785                 return -EOPNOTSUPP;
3786
3787         ret = usb_autopm_get_interface(tp->intf);
3788         if (ret < 0)
3789                 goto out_set_wol;
3790
3791         mutex_lock(&tp->control);
3792
3793         __rtl_set_wol(tp, wol->wolopts);
3794         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3795
3796         mutex_unlock(&tp->control);
3797
3798         usb_autopm_put_interface(tp->intf);
3799
3800 out_set_wol:
3801         return ret;
3802 }
3803
3804 static u32 rtl8152_get_msglevel(struct net_device *dev)
3805 {
3806         struct r8152 *tp = netdev_priv(dev);
3807
3808         return tp->msg_enable;
3809 }
3810
3811 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3812 {
3813         struct r8152 *tp = netdev_priv(dev);
3814
3815         tp->msg_enable = value;
3816 }
3817
3818 static void rtl8152_get_drvinfo(struct net_device *netdev,
3819                                 struct ethtool_drvinfo *info)
3820 {
3821         struct r8152 *tp = netdev_priv(netdev);
3822
3823         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3824         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3825         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3826 }
3827
3828 static
3829 int rtl8152_get_link_ksettings(struct net_device *netdev,
3830                                struct ethtool_link_ksettings *cmd)
3831 {
3832         struct r8152 *tp = netdev_priv(netdev);
3833         int ret;
3834
3835         if (!tp->mii.mdio_read)
3836                 return -EOPNOTSUPP;
3837
3838         ret = usb_autopm_get_interface(tp->intf);
3839         if (ret < 0)
3840                 goto out;
3841
3842         mutex_lock(&tp->control);
3843
3844         ret = mii_ethtool_get_link_ksettings(&tp->mii, cmd);
3845
3846         mutex_unlock(&tp->control);
3847
3848         usb_autopm_put_interface(tp->intf);
3849
3850 out:
3851         return ret;
3852 }
3853
3854 static int rtl8152_set_link_ksettings(struct net_device *dev,
3855                                       const struct ethtool_link_ksettings *cmd)
3856 {
3857         struct r8152 *tp = netdev_priv(dev);
3858         int ret;
3859
3860         ret = usb_autopm_get_interface(tp->intf);
3861         if (ret < 0)
3862                 goto out;
3863
3864         mutex_lock(&tp->control);
3865
3866         ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
3867                                 cmd->base.duplex);
3868         if (!ret) {
3869                 tp->autoneg = cmd->base.autoneg;
3870                 tp->speed = cmd->base.speed;
3871                 tp->duplex = cmd->base.duplex;
3872         }
3873
3874         mutex_unlock(&tp->control);
3875
3876         usb_autopm_put_interface(tp->intf);
3877
3878 out:
3879         return ret;
3880 }
3881
3882 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3883         "tx_packets",
3884         "rx_packets",
3885         "tx_errors",
3886         "rx_errors",
3887         "rx_missed",
3888         "align_errors",
3889         "tx_single_collisions",
3890         "tx_multi_collisions",
3891         "rx_unicast",
3892         "rx_broadcast",
3893         "rx_multicast",
3894         "tx_aborted",
3895         "tx_underrun",
3896 };
3897
3898 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3899 {
3900         switch (sset) {
3901         case ETH_SS_STATS:
3902                 return ARRAY_SIZE(rtl8152_gstrings);
3903         default:
3904                 return -EOPNOTSUPP;
3905         }
3906 }
3907
3908 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3909                                       struct ethtool_stats *stats, u64 *data)
3910 {
3911         struct r8152 *tp = netdev_priv(dev);
3912         struct tally_counter tally;
3913
3914         if (usb_autopm_get_interface(tp->intf) < 0)
3915                 return;
3916
3917         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3918
3919         usb_autopm_put_interface(tp->intf);
3920
3921         data[0] = le64_to_cpu(tally.tx_packets);
3922         data[1] = le64_to_cpu(tally.rx_packets);
3923         data[2] = le64_to_cpu(tally.tx_errors);
3924         data[3] = le32_to_cpu(tally.rx_errors);
3925         data[4] = le16_to_cpu(tally.rx_missed);
3926         data[5] = le16_to_cpu(tally.align_errors);
3927         data[6] = le32_to_cpu(tally.tx_one_collision);
3928         data[7] = le32_to_cpu(tally.tx_multi_collision);
3929         data[8] = le64_to_cpu(tally.rx_unicast);
3930         data[9] = le64_to_cpu(tally.rx_broadcast);
3931         data[10] = le32_to_cpu(tally.rx_multicast);
3932         data[11] = le16_to_cpu(tally.tx_aborted);
3933         data[12] = le16_to_cpu(tally.tx_underrun);
3934 }
3935
3936 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3937 {
3938         switch (stringset) {
3939         case ETH_SS_STATS:
3940                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3941                 break;
3942         }
3943 }
3944
3945 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3946 {
3947         u32 ocp_data, lp, adv, supported = 0;
3948         u16 val;
3949
3950         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3951         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3952
3953         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3954         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3955
3956         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3957         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3958
3959         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3960         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3961
3962         eee->eee_enabled = !!ocp_data;
3963         eee->eee_active = !!(supported & adv & lp);
3964         eee->supported = supported;
3965         eee->advertised = adv;
3966         eee->lp_advertised = lp;
3967
3968         return 0;
3969 }
3970
3971 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3972 {
3973         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3974
3975         r8152_eee_en(tp, eee->eee_enabled);
3976
3977         if (!eee->eee_enabled)
3978                 val = 0;
3979
3980         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3981
3982         return 0;
3983 }
3984
3985 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3986 {
3987         u32 ocp_data, lp, adv, supported = 0;
3988         u16 val;
3989
3990         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3991         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3992
3993         val = ocp_reg_read(tp, OCP_EEE_ADV);
3994         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3995
3996         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3997         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3998
3999         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4000         ocp_data &= EEE_RX_EN | EEE_TX_EN;
4001
4002         eee->eee_enabled = !!ocp_data;
4003         eee->eee_active = !!(supported & adv & lp);
4004         eee->supported = supported;
4005         eee->advertised = adv;
4006         eee->lp_advertised = lp;
4007
4008         return 0;
4009 }
4010
4011 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4012 {
4013         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4014
4015         r8153_eee_en(tp, eee->eee_enabled);
4016
4017         if (!eee->eee_enabled)
4018                 val = 0;
4019
4020         ocp_reg_write(tp, OCP_EEE_ADV, val);
4021
4022         return 0;
4023 }
4024
4025 static int
4026 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4027 {
4028         struct r8152 *tp = netdev_priv(net);
4029         int ret;
4030
4031         ret = usb_autopm_get_interface(tp->intf);
4032         if (ret < 0)
4033                 goto out;
4034
4035         mutex_lock(&tp->control);
4036
4037         ret = tp->rtl_ops.eee_get(tp, edata);
4038
4039         mutex_unlock(&tp->control);
4040
4041         usb_autopm_put_interface(tp->intf);
4042
4043 out:
4044         return ret;
4045 }
4046
4047 static int
4048 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4049 {
4050         struct r8152 *tp = netdev_priv(net);
4051         int ret;
4052
4053         ret = usb_autopm_get_interface(tp->intf);
4054         if (ret < 0)
4055                 goto out;
4056
4057         mutex_lock(&tp->control);
4058
4059         ret = tp->rtl_ops.eee_set(tp, edata);
4060         if (!ret)
4061                 ret = mii_nway_restart(&tp->mii);
4062
4063         mutex_unlock(&tp->control);
4064
4065         usb_autopm_put_interface(tp->intf);
4066
4067 out:
4068         return ret;
4069 }
4070
4071 static int rtl8152_nway_reset(struct net_device *dev)
4072 {
4073         struct r8152 *tp = netdev_priv(dev);
4074         int ret;
4075
4076         ret = usb_autopm_get_interface(tp->intf);
4077         if (ret < 0)
4078                 goto out;
4079
4080         mutex_lock(&tp->control);
4081
4082         ret = mii_nway_restart(&tp->mii);
4083
4084         mutex_unlock(&tp->control);
4085
4086         usb_autopm_put_interface(tp->intf);
4087
4088 out:
4089         return ret;
4090 }
4091
4092 static int rtl8152_get_coalesce(struct net_device *netdev,
4093                                 struct ethtool_coalesce *coalesce)
4094 {
4095         struct r8152 *tp = netdev_priv(netdev);
4096
4097         switch (tp->version) {
4098         case RTL_VER_01:
4099         case RTL_VER_02:
4100                 return -EOPNOTSUPP;
4101         default:
4102                 break;
4103         }
4104
4105         coalesce->rx_coalesce_usecs = tp->coalesce;
4106
4107         return 0;
4108 }
4109
4110 static int rtl8152_set_coalesce(struct net_device *netdev,
4111                                 struct ethtool_coalesce *coalesce)
4112 {
4113         struct r8152 *tp = netdev_priv(netdev);
4114         int ret;
4115
4116         switch (tp->version) {
4117         case RTL_VER_01:
4118         case RTL_VER_02:
4119                 return -EOPNOTSUPP;
4120         default:
4121                 break;
4122         }
4123
4124         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4125                 return -EINVAL;
4126
4127         ret = usb_autopm_get_interface(tp->intf);
4128         if (ret < 0)
4129                 return ret;
4130
4131         mutex_lock(&tp->control);
4132
4133         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4134                 tp->coalesce = coalesce->rx_coalesce_usecs;
4135
4136                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4137                         r8153_set_rx_early_timeout(tp);
4138         }
4139
4140         mutex_unlock(&tp->control);
4141
4142         usb_autopm_put_interface(tp->intf);
4143
4144         return ret;
4145 }
4146
4147 static const struct ethtool_ops ops = {
4148         .get_drvinfo = rtl8152_get_drvinfo,
4149         .get_link = ethtool_op_get_link,
4150         .nway_reset = rtl8152_nway_reset,
4151         .get_msglevel = rtl8152_get_msglevel,
4152         .set_msglevel = rtl8152_set_msglevel,
4153         .get_wol = rtl8152_get_wol,
4154         .set_wol = rtl8152_set_wol,
4155         .get_strings = rtl8152_get_strings,
4156         .get_sset_count = rtl8152_get_sset_count,
4157         .get_ethtool_stats = rtl8152_get_ethtool_stats,
4158         .get_coalesce = rtl8152_get_coalesce,
4159         .set_coalesce = rtl8152_set_coalesce,
4160         .get_eee = rtl_ethtool_get_eee,
4161         .set_eee = rtl_ethtool_set_eee,
4162         .get_link_ksettings = rtl8152_get_link_ksettings,
4163         .set_link_ksettings = rtl8152_set_link_ksettings,
4164 };
4165
4166 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4167 {
4168         struct r8152 *tp = netdev_priv(netdev);
4169         struct mii_ioctl_data *data = if_mii(rq);
4170         int res;
4171
4172         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4173                 return -ENODEV;
4174
4175         res = usb_autopm_get_interface(tp->intf);
4176         if (res < 0)
4177                 goto out;
4178
4179         switch (cmd) {
4180         case SIOCGMIIPHY:
4181                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4182                 break;
4183
4184         case SIOCGMIIREG:
4185                 mutex_lock(&tp->control);
4186                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4187                 mutex_unlock(&tp->control);
4188                 break;
4189
4190         case SIOCSMIIREG:
4191                 if (!capable(CAP_NET_ADMIN)) {
4192                         res = -EPERM;
4193                         break;
4194                 }
4195                 mutex_lock(&tp->control);
4196                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4197                 mutex_unlock(&tp->control);
4198                 break;
4199
4200         default:
4201                 res = -EOPNOTSUPP;
4202         }
4203
4204         usb_autopm_put_interface(tp->intf);
4205
4206 out:
4207         return res;
4208 }
4209
4210 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4211 {
4212         struct r8152 *tp = netdev_priv(dev);
4213         int ret;
4214
4215         switch (tp->version) {
4216         case RTL_VER_01:
4217         case RTL_VER_02:
4218                 dev->mtu = new_mtu;
4219                 return 0;
4220         default:
4221                 break;
4222         }
4223
4224         ret = usb_autopm_get_interface(tp->intf);
4225         if (ret < 0)
4226                 return ret;
4227
4228         mutex_lock(&tp->control);
4229
4230         dev->mtu = new_mtu;
4231
4232         if (netif_running(dev)) {
4233                 u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE;
4234
4235                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4236
4237                 if (netif_carrier_ok(dev))
4238                         r8153_set_rx_early_size(tp);
4239         }
4240
4241         mutex_unlock(&tp->control);
4242
4243         usb_autopm_put_interface(tp->intf);
4244
4245         return ret;
4246 }
4247
4248 static const struct net_device_ops rtl8152_netdev_ops = {
4249         .ndo_open               = rtl8152_open,
4250         .ndo_stop               = rtl8152_close,
4251         .ndo_do_ioctl           = rtl8152_ioctl,
4252         .ndo_start_xmit         = rtl8152_start_xmit,
4253         .ndo_tx_timeout         = rtl8152_tx_timeout,
4254         .ndo_set_features       = rtl8152_set_features,
4255         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4256         .ndo_set_mac_address    = rtl8152_set_mac_address,
4257         .ndo_change_mtu         = rtl8152_change_mtu,
4258         .ndo_validate_addr      = eth_validate_addr,
4259         .ndo_features_check     = rtl8152_features_check,
4260 };
4261
4262 static void rtl8152_unload(struct r8152 *tp)
4263 {
4264         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4265                 return;
4266
4267         if (tp->version != RTL_VER_01)
4268                 r8152_power_cut_en(tp, true);
4269 }
4270
4271 static void rtl8153_unload(struct r8152 *tp)
4272 {
4273         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4274                 return;
4275
4276         r8153_power_cut_en(tp, false);
4277 }
4278
4279 static int rtl_ops_init(struct r8152 *tp)
4280 {
4281         struct rtl_ops *ops = &tp->rtl_ops;
4282         int ret = 0;
4283
4284         switch (tp->version) {
4285         case RTL_VER_01:
4286         case RTL_VER_02:
4287                 ops->init               = r8152b_init;
4288                 ops->enable             = rtl8152_enable;
4289                 ops->disable            = rtl8152_disable;
4290                 ops->up                 = rtl8152_up;
4291                 ops->down               = rtl8152_down;
4292                 ops->unload             = rtl8152_unload;
4293                 ops->eee_get            = r8152_get_eee;
4294                 ops->eee_set            = r8152_set_eee;
4295                 ops->in_nway            = rtl8152_in_nway;
4296                 ops->hw_phy_cfg         = r8152b_hw_phy_cfg;
4297                 ops->autosuspend_en     = rtl_runtime_suspend_enable;
4298                 break;
4299
4300         case RTL_VER_03:
4301         case RTL_VER_04:
4302         case RTL_VER_05:
4303         case RTL_VER_06:
4304                 ops->init               = r8153_init;
4305                 ops->enable             = rtl8153_enable;
4306                 ops->disable            = rtl8153_disable;
4307                 ops->up                 = rtl8153_up;
4308                 ops->down               = rtl8153_down;
4309                 ops->unload             = rtl8153_unload;
4310                 ops->eee_get            = r8153_get_eee;
4311                 ops->eee_set            = r8153_set_eee;
4312                 ops->in_nway            = rtl8153_in_nway;
4313                 ops->hw_phy_cfg         = r8153_hw_phy_cfg;
4314                 ops->autosuspend_en     = rtl8153_runtime_enable;
4315                 break;
4316
4317         default:
4318                 ret = -ENODEV;
4319                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4320                 break;
4321         }
4322
4323         return ret;
4324 }
4325
4326 static u8 rtl_get_version(struct usb_interface *intf)
4327 {
4328         struct usb_device *udev = interface_to_usbdev(intf);
4329         u32 ocp_data = 0;
4330         __le32 *tmp;
4331         u8 version;
4332         int ret;
4333
4334         tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
4335         if (!tmp)
4336                 return 0;
4337
4338         ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
4339                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
4340                               PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
4341         if (ret > 0)
4342                 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
4343
4344         kfree(tmp);
4345
4346         switch (ocp_data) {
4347         case 0x4c00:
4348                 version = RTL_VER_01;
4349                 break;
4350         case 0x4c10:
4351                 version = RTL_VER_02;
4352                 break;
4353         case 0x5c00:
4354                 version = RTL_VER_03;
4355                 break;
4356         case 0x5c10:
4357                 version = RTL_VER_04;
4358                 break;
4359         case 0x5c20:
4360                 version = RTL_VER_05;
4361                 break;
4362         case 0x5c30:
4363                 version = RTL_VER_06;
4364                 break;
4365         default:
4366                 version = RTL_VER_UNKNOWN;
4367                 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
4368                 break;
4369         }
4370
4371         return version;
4372 }
4373
4374 static int rtl8152_probe(struct usb_interface *intf,
4375                          const struct usb_device_id *id)
4376 {
4377         struct usb_device *udev = interface_to_usbdev(intf);
4378         u8 version = rtl_get_version(intf);
4379         struct r8152 *tp;
4380         struct net_device *netdev;
4381         int ret;
4382
4383         if (version == RTL_VER_UNKNOWN)
4384                 return -ENODEV;
4385
4386         if (udev->actconfig->desc.bConfigurationValue != 1) {
4387                 usb_driver_set_configuration(udev, 1);
4388                 return -ENODEV;
4389         }
4390
4391         usb_reset_device(udev);
4392         netdev = alloc_etherdev(sizeof(struct r8152));
4393         if (!netdev) {
4394                 dev_err(&intf->dev, "Out of memory\n");
4395                 return -ENOMEM;
4396         }
4397
4398         SET_NETDEV_DEV(netdev, &intf->dev);
4399         tp = netdev_priv(netdev);
4400         tp->msg_enable = 0x7FFF;
4401
4402         tp->udev = udev;
4403         tp->netdev = netdev;
4404         tp->intf = intf;
4405         tp->version = version;
4406
4407         switch (version) {
4408         case RTL_VER_01:
4409         case RTL_VER_02:
4410                 tp->mii.supports_gmii = 0;
4411                 break;
4412         default:
4413                 tp->mii.supports_gmii = 1;
4414                 break;
4415         }
4416
4417         ret = rtl_ops_init(tp);
4418         if (ret)
4419                 goto out;
4420
4421         mutex_init(&tp->control);
4422         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4423         INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4424
4425         netdev->netdev_ops = &rtl8152_netdev_ops;
4426         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4427
4428         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4429                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4430                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4431                             NETIF_F_HW_VLAN_CTAG_TX;
4432         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4433                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4434                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4435                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4436         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4437                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4438                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4439
4440         if (tp->version == RTL_VER_01) {
4441                 netdev->features &= ~NETIF_F_RXCSUM;
4442                 netdev->hw_features &= ~NETIF_F_RXCSUM;
4443         }
4444
4445         netdev->ethtool_ops = &ops;
4446         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4447
4448         /* MTU range: 68 - 1500 or 9194 */
4449         netdev->min_mtu = ETH_MIN_MTU;
4450         switch (tp->version) {
4451         case RTL_VER_01:
4452         case RTL_VER_02:
4453                 netdev->max_mtu = ETH_DATA_LEN;
4454                 break;
4455         default:
4456                 netdev->max_mtu = RTL8153_MAX_MTU;
4457                 break;
4458         }
4459
4460         tp->mii.dev = netdev;
4461         tp->mii.mdio_read = read_mii_word;
4462         tp->mii.mdio_write = write_mii_word;
4463         tp->mii.phy_id_mask = 0x3f;
4464         tp->mii.reg_num_mask = 0x1f;
4465         tp->mii.phy_id = R8152_PHY_ID;
4466
4467         switch (udev->speed) {
4468         case USB_SPEED_SUPER:
4469         case USB_SPEED_SUPER_PLUS:
4470                 tp->coalesce = COALESCE_SUPER;
4471                 break;
4472         case USB_SPEED_HIGH:
4473                 tp->coalesce = COALESCE_HIGH;
4474                 break;
4475         default:
4476                 tp->coalesce = COALESCE_SLOW;
4477                 break;
4478         }
4479
4480         tp->autoneg = AUTONEG_ENABLE;
4481         tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4482         tp->duplex = DUPLEX_FULL;
4483
4484         intf->needs_remote_wakeup = 1;
4485
4486         tp->rtl_ops.init(tp);
4487         queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4488         set_ethernet_addr(tp);
4489
4490         usb_set_intfdata(intf, tp);
4491         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4492
4493         ret = register_netdev(netdev);
4494         if (ret != 0) {
4495                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4496                 goto out1;
4497         }
4498
4499         if (!rtl_can_wakeup(tp))
4500                 __rtl_set_wol(tp, 0);
4501
4502         tp->saved_wolopts = __rtl_get_wol(tp);
4503         if (tp->saved_wolopts)
4504                 device_set_wakeup_enable(&udev->dev, true);
4505         else
4506                 device_set_wakeup_enable(&udev->dev, false);
4507
4508         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4509
4510         return 0;
4511
4512 out1:
4513         netif_napi_del(&tp->napi);
4514         usb_set_intfdata(intf, NULL);
4515 out:
4516         free_netdev(netdev);
4517         return ret;
4518 }
4519
4520 static void rtl8152_disconnect(struct usb_interface *intf)
4521 {
4522         struct r8152 *tp = usb_get_intfdata(intf);
4523
4524         usb_set_intfdata(intf, NULL);
4525         if (tp) {
4526                 struct usb_device *udev = tp->udev;
4527
4528                 if (udev->state == USB_STATE_NOTATTACHED)
4529                         set_bit(RTL8152_UNPLUG, &tp->flags);
4530
4531                 netif_napi_del(&tp->napi);
4532                 unregister_netdev(tp->netdev);
4533                 cancel_delayed_work_sync(&tp->hw_phy_work);
4534                 tp->rtl_ops.unload(tp);
4535                 free_netdev(tp->netdev);
4536         }
4537 }
4538
4539 #define REALTEK_USB_DEVICE(vend, prod)  \
4540         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4541                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4542         .idVendor = (vend), \
4543         .idProduct = (prod), \
4544         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4545 }, \
4546 { \
4547         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4548                        USB_DEVICE_ID_MATCH_DEVICE, \
4549         .idVendor = (vend), \
4550         .idProduct = (prod), \
4551         .bInterfaceClass = USB_CLASS_COMM, \
4552         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4553         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4554
4555 /* table of devices that work with this driver */
4556 static struct usb_device_id rtl8152_table[] = {
4557         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4558         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4559         {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
4560         {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
4561         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4562         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4563         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x3062)},
4564         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x3069)},
4565         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4566         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x720c)},
4567         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7214)},
4568         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4569         {}
4570 };
4571
4572 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4573
4574 static struct usb_driver rtl8152_driver = {
4575         .name =         MODULENAME,
4576         .id_table =     rtl8152_table,
4577         .probe =        rtl8152_probe,
4578         .disconnect =   rtl8152_disconnect,
4579         .suspend =      rtl8152_suspend,
4580         .resume =       rtl8152_resume,
4581         .reset_resume = rtl8152_reset_resume,
4582         .pre_reset =    rtl8152_pre_reset,
4583         .post_reset =   rtl8152_post_reset,
4584         .supports_autosuspend = 1,
4585         .disable_hub_initiated_lpm = 1,
4586 };
4587
4588 module_usb_driver(rtl8152_driver);
4589
4590 MODULE_AUTHOR(DRIVER_AUTHOR);
4591 MODULE_DESCRIPTION(DRIVER_DESC);
4592 MODULE_LICENSE("GPL");
4593 MODULE_VERSION(DRIVER_VERSION);